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Xerox Notetaker: Implement ROM/RAM overlay as per schematics. Documented Address map and part of I/O map. [Lord Nightmare]
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Lord-Nightmare
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@ -9,8 +9,7 @@
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*
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* MISSING DUMP for 8741? I/O MCU which does mouse-related stuff
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TODO: Pretty much everything.
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* Get bootrom/ram bankswitching working
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TODO: everything below.
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* Get the running machine smalltalk-78 memory dump loaded as a rom and forced into ram on startup, since no boot disks have survived
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* floppy controller wd1791
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* crt5027 video controller
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@ -41,24 +40,93 @@ public:
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//required_device<crt5027_device> m_vtac;
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//declarations
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DECLARE_WRITE16_MEMBER(IPConReg_w);
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DECLARE_READ16_MEMBER(maincpu_r);
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DECLARE_WRITE16_MEMBER(maincpu_w);
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DECLARE_DRIVER_INIT(notetakr);
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//variables
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UINT8 m_BootSeqDone;
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UINT8 m_DisableROM;
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// overrides
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virtual void machine_reset() override;
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};
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WRITE16_MEMBER(notetaker_state::IPConReg_w)
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{
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m_BootSeqDone = (data&0x80)?1:0;
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//m_ProcLock = (data&0x40)?1:0;
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//m_CharCtr = (data&0x20)?1:0;
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m_DisableROM = (data&0x10)?1:0;
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//m_CorrOn = (data&0x08)?1:0; // also LedInd5
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//m_LedInd6 = (data&0x04)?1:0;
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//m_LedInd7 = (data&0x02)?1:0;
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//m_LedInd8 = (data&0x01)?1:0;
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}
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READ16_MEMBER(notetaker_state::maincpu_r)
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{
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UINT16 *rom = (UINT16 *)(memregion("maincpu")->base());
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rom += 0x7f800;
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UINT16 *ram = (UINT16 *)(memregion("ram")->base());
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if ( (m_BootSeqDone == 0) || ((m_DisableROM == 0) && ((offset&0x7F800) == 0)) )
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{
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rom += (offset&0x7FF);
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return *rom;
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}
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else
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{
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ram += (offset);
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return *ram;
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}
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}
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WRITE16_MEMBER(notetaker_state::maincpu_w)
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{
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UINT16 *ram = (UINT16 *)(memregion("ram")->base());
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ram += offset;
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*ram = data;
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}
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/* Address map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf
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a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 BootSeqDone DisableROM
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x x x x x x x x * * * * * * * * * * * * 0 x R ROM
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0 0 0 0 0 0 0 0 * * * * * * * * * * * * 1 0 R ROM
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< anything not all zeroes > * * * * * * * * * * * * 1 0 RW RAM
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x x x x ? ? * * * * * * * * * * * * * * x x W RAM
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x x x x ? ? * * * * * * * * * * * * * * 1 1 RW RAM
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More or less:
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BootSeqDone is 0, DisableROM is ignored, mem map is 0x00000-0xfffff reading is the 0x1000-long ROM, repeated every 0x1000 bytes. writing goes to RAM.
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BootSeqDone is 1, DisableROM is 0, mem map is 0x00000-0x00fff reading is the 0x1000-long ROM, remainder of memory map goes to RAM or open bus. writing goes to RAM.
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BootSeqDone is 1, DisableROM is 1, mem map is entirely RAM or open bus for both reading and writing.
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*/
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static ADDRESS_MAP_START(notetaker_mem, AS_PROGRAM, 16, notetaker_state)
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// AM_RANGE(0x00000, 0x01fff) AM_RAM
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AM_RANGE(0x00000, 0x00fff) AM_ROM AM_REGION("maincpu", 0xFF000) // I think this copy of rom is actually banked via io reg 0x20, there is ram which lives behind here?
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/*AM_RANGE(0x00000, 0x00fff) AM_ROM AM_REGION("maincpu", 0xFF000) // I think this copy of rom is actually banked via io reg 0x20, there is RAM which lives behind here?
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AM_RANGE(0x01000, 0x3ffff) AM_RAM // ram lives here, 256KB
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AM_RANGE(0xff000, 0xfffff) AM_ROM // is this banked too? Don't think so...
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AM_RANGE(0xff000, 0xfffff) AM_ROM // is this banked too? Don't think so...*/
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AM_RANGE(0x00000, 0xfffff) AM_READWRITE(maincpu_r, maincpu_w) // bypass MAME's memory map system as we need finer grained control
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ADDRESS_MAP_END
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// io memory map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf
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/* io memory map comes from http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/memos/19790605_Definition_of_8086_Ports.pdf
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and from the schematic at http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/notetaker/schematics/19790423_Notetaker_IO_Processor.pdf
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a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
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? ? ? ? 0 x x x x x x 0 0 0 0 x x x * . RW IntCon (PIC8259)
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? ? ? ? 0 x x x x x x 0 0 0 1 x x x x . W IPConReg
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? ? ? ? 0 x x x x x x 0 0 1 0 x x x x . W KbdInt
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? ? ? ? 0 x x x x x x 0 0 1 1 x x x x . W FIFOReg
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? ? ? ? 0 x x x x x x 0 1 0 0 x x x x . . Open Bus
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? ? ? ? 0 x x x x x x 0 1 0 1 x x x x . . Open Bus
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? ? ? ? 0 x x x x x x 0 1 1 0 x x x x . W FIFOBus
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? ? ? ? 0 x x x x x x 0 1 1 1 x x x x . . Open Bus
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0 0 0 0 0 0 0 0 * * * * * * * * * * * . R ROM, but ONLY if BootSegDone is TRUE, and /DisableROM is FALSE
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*/
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static ADDRESS_MAP_START(notetaker_io, AS_IO, 16, notetaker_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x02, 0x03) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xFF00)
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//AM_RANGE(0x20, 0x21) AM_WRITE processor (rom mapping, etc) control register
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AM_RANGE(0x00, 0x03) AM_MIRROR(0x7E1C) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0x00ff)
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AM_RANGE(0x20, 0x21) AM_MIRROR(0x7E1E) AM_WRITE(IPConReg_w) // processor (rom mapping, etc) control register
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//AM_RANGE(0x42, 0x43) AM_READ read keyboard data (high byte only) [from mcu?]
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//AM_RANGE(0x44, 0x45) AM_READ read keyboard fifo state (high byte only) [from mcu?]
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//AM_RANGE(0x48, 0x49) AM_WRITE kbd->uart control register [to mcu?]
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@ -100,6 +168,13 @@ read from 0x0002 (byte wide) (check interrupts) <looking for vblank int or odd/e
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read from 0x44 (byte wide) in a loop forever (read keyboard fifo status)
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*/
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/* Machine Reset */
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void notetaker_state::machine_reset()
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{
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m_BootSeqDone = 0;
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m_DisableROM = 0;
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}
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/* Input ports */
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static INPUT_PORTS_START( notetakr )
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INPUT_PORTS_END
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@ -143,7 +218,7 @@ DRIVER_INIT_MEMBER(notetaker_state,notetakr)
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UINT16 *temppointer;
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UINT16 wordtemp;
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UINT16 addrtemp;
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romsrc += 0x7f800; // set the src pointer to 0xff000 (>>1 because 16 bits data)
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// leave the src pointer alone, since we've only used a 0x1000 long address space
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romdst += 0x7f800; // set the dest pointer to 0xff000 (>>1 because 16 bits data)
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for (int i = 0; i < 0x800; i++)
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{
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@ -157,10 +232,11 @@ DRIVER_INIT_MEMBER(notetaker_state,notetakr)
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/* ROM definition */
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ROM_START( notetakr )
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ROM_REGION( 0x100000, "maincpuload", ROMREGION_ERASEFF ) // load roms here before descrambling
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ROMX_LOAD( "biop__2.00_hi.b2716.h1", 0xff000, 0x0800, CRC(1119691d) SHA1(4c20b595b554e6f5489ab2c3fb364b4a052f05e3), ROM_SKIP(1))
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ROMX_LOAD( "biop__2.00_lo.b2716.g1", 0xff001, 0x0800, CRC(b72aa4c7) SHA1(85dab2399f906c7695dc92e7c18f32e2303c5892), ROM_SKIP(1))
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ROM_REGION( 0x1000, "maincpuload", ROMREGION_ERASEFF ) // load roms here before descrambling
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ROMX_LOAD( "biop__2.00_hi.b2716.h1", 0x0000, 0x0800, CRC(1119691d) SHA1(4c20b595b554e6f5489ab2c3fb364b4a052f05e3), ROM_SKIP(1))
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ROMX_LOAD( "biop__2.00_lo.b2716.g1", 0x0001, 0x0800, CRC(b72aa4c7) SHA1(85dab2399f906c7695dc92e7c18f32e2303c5892), ROM_SKIP(1))
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ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) // area for descrambled roms
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ROM_REGION( 0x100000, "ram", ROMREGION_ERASEFF ) // ram cards
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ROM_END
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/* Driver */
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