mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
hh class cleanup 1/2
This commit is contained in:
hap
parent
7a15cbed2d
commit
4d2d78e908
File diff suppressed because it is too large
Load Diff
@ -51,8 +51,6 @@ public:
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UINT8 m_b; // MCU port B data
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UINT8 m_c; // MCU port C data
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virtual void machine_start();
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// display common
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int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
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int m_display_maxy; // display matrix number of rows
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@ -68,11 +66,14 @@ public:
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void set_display_size(int maxx, int maxy);
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void display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety);
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// game-specific handlers
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DECLARE_WRITE8_MEMBER(maniac_output_w);
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protected:
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virtual void machine_start();
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virtual void machine_reset();
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};
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// machine start/reset
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void hh_pic16_state::machine_start()
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{
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// zerofill
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@ -98,6 +99,10 @@ void hh_pic16_state::machine_start()
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save_item(NAME(m_c));
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}
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void hh_pic16_state::machine_reset()
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{
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}
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/***************************************************************************
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@ -124,7 +129,7 @@ void hh_pic16_state::display_update()
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m_display_decay[y][x] = m_display_wait;
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// determine active state
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int ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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UINT32 ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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active_state[y] |= (ds << x);
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}
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}
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@ -195,7 +200,7 @@ void hh_pic16_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
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/***************************************************************************
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Minidrivers (I/O, Inputs, Machine Config)
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Minidrivers (subclass, I/O, Inputs, Machine Config)
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***************************************************************************/
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@ -207,7 +212,19 @@ void hh_pic16_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
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***************************************************************************/
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WRITE8_MEMBER(hh_pic16_state::maniac_output_w)
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class maniac_state : public hh_pic16_state
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{
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public:
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maniac_state(const machine_config &mconfig, device_type type, const char *tag)
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: hh_pic16_state(mconfig, type, tag)
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{ }
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DECLARE_WRITE8_MEMBER(output_w);
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};
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// handlers
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WRITE8_MEMBER(maniac_state::output_w)
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{
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// B,C: outputs
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offset -= PIC16C5x_PORTB;
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@ -228,6 +245,8 @@ WRITE8_MEMBER(hh_pic16_state::maniac_output_w)
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}
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// config
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static INPUT_PORTS_START( maniac )
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PORT_START("IN.0") // port A
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // bottom-right
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@ -239,13 +258,13 @@ INPUT_PORTS_END
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static const INT16 maniac_speaker_levels[] = { 0, 32767, -32768, 0 };
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static MACHINE_CONFIG_START( maniac, hh_pic16_state )
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static MACHINE_CONFIG_START( maniac, maniac_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", PIC16C55, 850000) // RC osc. R=13.4K, C=470pf, but unknown RC curve - measured 800-890kHz
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MCFG_PIC16C5x_READ_A_CB(IOPORT("IN.0"))
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(hh_pic16_state, maniac_output_w))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(hh_pic16_state, maniac_output_w))
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(maniac_state, output_w))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(maniac_state, output_w))
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MCFG_PIC16C5x_SET_CONFIG(0) // ?
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MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_pic16_state, display_decay_tick, attotime::from_msec(1))
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@ -161,7 +161,7 @@ void hh_tms1k_state::display_update()
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m_display_decay[y][x] = m_display_wait;
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// determine active state
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int ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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UINT32 ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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active_state[y] |= (ds << x);
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}
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}
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@ -228,6 +228,15 @@ void hh_tms1k_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety
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display_update();
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}
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void hh_tms1k_state::display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 sety, UINT16 segmask)
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{
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// expects m_display_segmask to be not-0
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for (int y = 0; y < maxy; y++)
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m_display_segmask[y] &= segmask;
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display_matrix(maxx, maxy, setx, sety);
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}
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UINT8 hh_tms1k_state::read_inputs(int columns)
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{
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@ -54,13 +54,11 @@ public:
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optional_device<speaker_sound_device> m_speaker;
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// misc common
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UINT8 m_port[9]; // MCU port A-I write data
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UINT8 m_port[9]; // MCU port A-I write data (optional)
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UINT16 m_inp_mux; // multiplexed inputs mask
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UINT8 read_inputs(int columns);
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virtual void machine_start();
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// display common
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int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
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int m_display_maxy; // display matrix number of rows
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@ -79,41 +77,14 @@ public:
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void set_display_size(int maxx, int maxy);
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void display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety);
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// game-specific handlers
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void ssfball_display();
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DECLARE_WRITE8_MEMBER(ssfball_grid_w);
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DECLARE_WRITE8_MEMBER(ssfball_plate_w);
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DECLARE_READ8_MEMBER(ssfball_input_b_r);
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void splasfgt_display();
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DECLARE_WRITE8_MEMBER(splasfgt_grid_w);
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DECLARE_WRITE8_MEMBER(splasfgt_plate_w);
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DECLARE_READ8_MEMBER(splasfgt_input_b_r);
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void astrocmd_display();
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DECLARE_WRITE8_MEMBER(astrocmd_grid_w);
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DECLARE_WRITE8_MEMBER(astrocmd_plate_w);
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DECLARE_WRITE8_MEMBER(edracula_grid_w);
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DECLARE_WRITE8_MEMBER(edracula_plate_w);
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DECLARE_WRITE8_MEMBER(tmtennis_grid_w);
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DECLARE_WRITE8_MEMBER(tmtennis_plate_w);
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DECLARE_WRITE8_MEMBER(tmtennis_port_e_w);
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DECLARE_READ8_MEMBER(tmtennis_input_r);
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void tmtennis_set_clock();
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DECLARE_INPUT_CHANGED_MEMBER(tmtennis_difficulty_switch);
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DECLARE_MACHINE_RESET(tmtennis);
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void tmpacman_display();
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DECLARE_WRITE8_MEMBER(tmpacman_grid_w);
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DECLARE_WRITE8_MEMBER(tmpacman_plate_w);
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DECLARE_WRITE8_MEMBER(alnchase_output_w);
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DECLARE_READ8_MEMBER(alnchase_input_r);
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protected:
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virtual void machine_start();
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virtual void machine_reset();
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};
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// machine start/reset
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void hh_ucom4_state::machine_start()
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{
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// zerofill
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@ -143,6 +114,10 @@ void hh_ucom4_state::machine_start()
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save_item(NAME(m_plate));
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}
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void hh_ucom4_state::machine_reset()
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{
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}
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/***************************************************************************
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@ -169,7 +144,7 @@ void hh_ucom4_state::display_update()
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m_display_decay[y][x] = m_display_wait;
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// determine active state
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int ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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UINT32 ds = (m_display_decay[y][x] != 0) ? 1 : 0;
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active_state[y] |= (ds << x);
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}
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}
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@ -253,7 +228,7 @@ UINT8 hh_ucom4_state::read_inputs(int columns)
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/***************************************************************************
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Minidrivers (I/O, Inputs, Machine Config)
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Minidrivers (subclass, I/O, Inputs, Machine Config)
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***************************************************************************/
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@ -272,23 +247,36 @@ UINT8 hh_ucom4_state::read_inputs(int columns)
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***************************************************************************/
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void hh_ucom4_state::ssfball_display()
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class ssfball_state : public hh_ucom4_state
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{
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public:
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ssfball_state(const machine_config &mconfig, device_type type, const char *tag)
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: hh_ucom4_state(mconfig, type, tag)
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{ }
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void ssfball_display();
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DECLARE_WRITE8_MEMBER(grid_w);
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DECLARE_WRITE8_MEMBER(plate_w);
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DECLARE_READ8_MEMBER(input_b_r);
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};
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// handlers
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void ssfball_state::ssfball_display()
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{
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UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,10,9,8,0,1,2,4,5,6);
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display_matrix(16, 9, plate, m_grid);
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}
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WRITE8_MEMBER(hh_ucom4_state::ssfball_grid_w)
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WRITE8_MEMBER(ssfball_state::grid_w)
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{
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// C,D(,E): vfd matrix grid 0-7(,8)
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// C,D(,E3): vfd matrix grid 0-7(,8)
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int shift = (offset - NEC_UCOM4_PORTC) * 4;
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m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
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ssfball_display();
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}
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WRITE8_MEMBER(hh_ucom4_state::ssfball_plate_w)
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WRITE8_MEMBER(ssfball_state::plate_w)
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{
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m_port[offset] = data;
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@ -302,18 +290,20 @@ WRITE8_MEMBER(hh_ucom4_state::ssfball_plate_w)
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// E3: vfd matrix grid 8
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if (offset == NEC_UCOM4_PORTE)
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ssfball_grid_w(space, offset, data >> 3 & 1);
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grid_w(space, offset, data >> 3 & 1);
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else
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ssfball_display();
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}
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READ8_MEMBER(hh_ucom4_state::ssfball_input_b_r)
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READ8_MEMBER(ssfball_state::input_b_r)
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{
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// B: input port 2, where B3 is multiplexed
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return m_inp_matrix[2]->read() | read_inputs(2);
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}
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// config
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static INPUT_PORTS_START( ssfball )
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PORT_START("IN.0") // F3 port B3
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PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED )
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@ -341,19 +331,19 @@ INPUT_PORTS_END
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static const INT16 ssfball_speaker_levels[] = { 0, 32767, -32768, 0 };
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static MACHINE_CONFIG_START( ssfball, hh_ucom4_state )
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static MACHINE_CONFIG_START( ssfball, ssfball_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_400kHz)
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MCFG_UCOM4_READ_A_CB(IOPORT("IN.3"))
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MCFG_UCOM4_READ_B_CB(READ8(hh_ucom4_state, ssfball_input_b_r))
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MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, ssfball_grid_w))
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MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, ssfball_grid_w))
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MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, ssfball_plate_w))
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MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, ssfball_plate_w))
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MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, ssfball_plate_w))
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MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, ssfball_plate_w))
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MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, ssfball_plate_w))
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MCFG_UCOM4_READ_B_CB(READ8(ssfball_state, input_b_r))
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MCFG_UCOM4_WRITE_C_CB(WRITE8(ssfball_state, grid_w))
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MCFG_UCOM4_WRITE_D_CB(WRITE8(ssfball_state, grid_w))
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MCFG_UCOM4_WRITE_E_CB(WRITE8(ssfball_state, plate_w))
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MCFG_UCOM4_WRITE_F_CB(WRITE8(ssfball_state, plate_w))
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MCFG_UCOM4_WRITE_G_CB(WRITE8(ssfball_state, plate_w))
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MCFG_UCOM4_WRITE_H_CB(WRITE8(ssfball_state, plate_w))
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MCFG_UCOM4_WRITE_I_CB(WRITE8(ssfball_state, plate_w))
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MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
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MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
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@ -382,14 +372,28 @@ MACHINE_CONFIG_END
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***************************************************************************/
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void hh_ucom4_state::splasfgt_display()
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class splasfgt_state : public hh_ucom4_state
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{
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public:
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splasfgt_state(const machine_config &mconfig, device_type type, const char *tag)
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: hh_ucom4_state(mconfig, type, tag)
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{ }
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void splasfgt_display();
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DECLARE_WRITE8_MEMBER(grid_w);
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DECLARE_WRITE8_MEMBER(plate_w);
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DECLARE_READ8_MEMBER(input_b_r);
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};
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// handlers
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void splasfgt_state::splasfgt_display()
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{
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UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,17,13,1,0,8,6,0,10,11,14,15,16,9,5,7,4,2,3);
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display_matrix(16, 9, plate, m_grid);
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}
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WRITE8_MEMBER(hh_ucom4_state::splasfgt_grid_w)
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WRITE8_MEMBER(splasfgt_state::grid_w)
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{
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// G,H,I0: vfd matrix grid
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int shift = (offset - NEC_UCOM4_PORTG) * 4;
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@ -400,31 +404,32 @@ WRITE8_MEMBER(hh_ucom4_state::splasfgt_grid_w)
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// I2: vfd matrix plate 6
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if (offset == NEC_UCOM4_PORTI)
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m_plate = (m_plate & 0xffff) | (data << 14 & 0x10000);
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splasfgt_display();
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plate_w(space, 4 + NEC_UCOM4_PORTC, data >> 2 & 1);
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else
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splasfgt_display();
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}
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WRITE8_MEMBER(hh_ucom4_state::splasfgt_plate_w)
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WRITE8_MEMBER(splasfgt_state::plate_w)
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{
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// C,D,E,F23: vfd matrix plate
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int shift = (offset - NEC_UCOM4_PORTC) * 4;
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m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
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// F01: speaker out
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if (offset == NEC_UCOM4_PORTF)
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m_speaker->level_w(data & 3);
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ssfball_display();
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// C,D,E,F23(,I2): vfd matrix plate
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int shift = (offset - NEC_UCOM4_PORTC) * 4;
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m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
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splasfgt_display();
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}
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READ8_MEMBER(hh_ucom4_state::splasfgt_input_b_r)
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READ8_MEMBER(splasfgt_state::input_b_r)
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{
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// B: multiplexed buttons
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return read_inputs(4);
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}
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// config
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/* physical button layout and labels is like this:
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* left = P1 side * * right = P2 side * (note: in 1P mode, switch sides between turns)
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@ -475,19 +480,19 @@ INPUT_PORTS_END
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static const INT16 splasfgt_speaker_levels[] = { 0, 32767, -32768, 0 };
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static MACHINE_CONFIG_START( splasfgt, hh_ucom4_state )
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static MACHINE_CONFIG_START( splasfgt, splasfgt_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_400kHz)
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MCFG_UCOM4_READ_A_CB(IOPORT("IN.4"))
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MCFG_UCOM4_READ_B_CB(READ8(hh_ucom4_state, splasfgt_input_b_r))
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MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, splasfgt_plate_w))
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MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, splasfgt_plate_w))
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MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, splasfgt_plate_w))
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MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, splasfgt_plate_w))
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MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, splasfgt_grid_w))
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MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, splasfgt_grid_w))
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MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, splasfgt_grid_w))
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MCFG_UCOM4_READ_B_CB(READ8(splasfgt_state, input_b_r))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(splasfgt_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(splasfgt_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(splasfgt_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(splasfgt_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(splasfgt_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(splasfgt_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(splasfgt_state, grid_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
@ -521,24 +526,36 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void hh_ucom4_state::astrocmd_display()
|
||||
class astrocmd_state : public hh_ucom4_state
|
||||
{
|
||||
public:
|
||||
astrocmd_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hh_ucom4_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void astrocmd_display();
|
||||
DECLARE_WRITE8_MEMBER(grid_w);
|
||||
DECLARE_WRITE8_MEMBER(plate_w);
|
||||
};
|
||||
|
||||
// handlers
|
||||
|
||||
void astrocmd_state::astrocmd_display()
|
||||
{
|
||||
UINT16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,4,5,6,7,0,1,2,3);
|
||||
UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,3,2,12,13,14,15,16,17,18,0,1,4,8,5,9,7,11,6,10);
|
||||
|
||||
display_matrix(17, 9, plate, grid);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::astrocmd_grid_w)
|
||||
WRITE8_MEMBER(astrocmd_state::grid_w)
|
||||
{
|
||||
// C,D(,E3): vfd matrix grid
|
||||
int shift = (offset - NEC_UCOM4_PORTC) * 4;
|
||||
m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
astrocmd_display();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::astrocmd_plate_w)
|
||||
WRITE8_MEMBER(astrocmd_state::plate_w)
|
||||
{
|
||||
// E01,F,G,H,I: vfd matrix plate
|
||||
int shift = (offset - NEC_UCOM4_PORTE) * 4;
|
||||
@ -550,13 +567,15 @@ WRITE8_MEMBER(hh_ucom4_state::astrocmd_plate_w)
|
||||
m_speaker->level_w(data >> 2 & 1);
|
||||
|
||||
// E3: vfd matrix grid 8
|
||||
astrocmd_grid_w(space, offset, data >> 3 & 1);
|
||||
grid_w(space, offset, data >> 3 & 1);
|
||||
}
|
||||
else
|
||||
astrocmd_display();
|
||||
}
|
||||
|
||||
|
||||
// config
|
||||
|
||||
static INPUT_PORTS_START( astrocmd )
|
||||
PORT_START("IN.0") // port A
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT )
|
||||
@ -571,20 +590,19 @@ static INPUT_PORTS_START( astrocmd )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( astrocmd, hh_ucom4_state )
|
||||
static MACHINE_CONFIG_START( astrocmd, astrocmd_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_400kHz)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, astrocmd_grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, astrocmd_grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, astrocmd_plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, astrocmd_plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, astrocmd_plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, astrocmd_plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, astrocmd_plate_w))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(astrocmd_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(astrocmd_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(astrocmd_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(astrocmd_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(astrocmd_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(astrocmd_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(astrocmd_state, plate_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
@ -617,16 +635,28 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::edracula_grid_w)
|
||||
class edracula_state : public hh_ucom4_state
|
||||
{
|
||||
public:
|
||||
edracula_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hh_ucom4_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(grid_w);
|
||||
DECLARE_WRITE8_MEMBER(plate_w);
|
||||
};
|
||||
|
||||
// handlers
|
||||
|
||||
WRITE8_MEMBER(edracula_state::grid_w)
|
||||
{
|
||||
// C,D: vfd matrix grid
|
||||
int shift = (offset - NEC_UCOM4_PORTC) * 4;
|
||||
m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
display_matrix(18+1, 8, m_plate, m_grid);
|
||||
display_matrix(18, 8, m_plate, m_grid);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::edracula_plate_w)
|
||||
WRITE8_MEMBER(edracula_state::plate_w)
|
||||
{
|
||||
// I2: speaker out
|
||||
if (offset == NEC_UCOM4_PORTI)
|
||||
@ -635,11 +665,12 @@ WRITE8_MEMBER(hh_ucom4_state::edracula_plate_w)
|
||||
// E,F,G,H,I01: vfd matrix plate
|
||||
int shift = (offset - NEC_UCOM4_PORTE) * 4;
|
||||
m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
display_matrix(18, 8, m_plate, m_grid);
|
||||
}
|
||||
|
||||
|
||||
// config
|
||||
|
||||
static INPUT_PORTS_START( edracula )
|
||||
PORT_START("IN.0") // port A
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT )
|
||||
@ -654,20 +685,19 @@ static INPUT_PORTS_START( edracula )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( edracula, hh_ucom4_state )
|
||||
static MACHINE_CONFIG_START( edracula, edracula_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_400kHz)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, edracula_grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, edracula_grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, edracula_plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, edracula_plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, edracula_plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, edracula_plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, edracula_plate_w))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(edracula_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(edracula_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(edracula_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(edracula_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(edracula_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(edracula_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(edracula_state, plate_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
@ -701,26 +731,45 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::tmtennis_grid_w)
|
||||
class tmtennis_state : public hh_ucom4_state
|
||||
{
|
||||
public:
|
||||
tmtennis_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hh_ucom4_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(grid_w);
|
||||
DECLARE_WRITE8_MEMBER(plate_w);
|
||||
DECLARE_WRITE8_MEMBER(port_e_w);
|
||||
DECLARE_READ8_MEMBER(input_r);
|
||||
|
||||
void set_clock();
|
||||
DECLARE_INPUT_CHANGED_MEMBER(difficulty_switch);
|
||||
|
||||
protected:
|
||||
virtual void machine_reset();
|
||||
};
|
||||
|
||||
// handlers
|
||||
|
||||
WRITE8_MEMBER(tmtennis_state::grid_w)
|
||||
{
|
||||
// G,H,I: vfd matrix grid
|
||||
int shift = (offset - NEC_UCOM4_PORTG) * 4;
|
||||
m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
display_matrix(12, 12, m_plate, m_grid);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::tmtennis_plate_w)
|
||||
WRITE8_MEMBER(tmtennis_state::plate_w)
|
||||
{
|
||||
// C,D,F: vfd matrix plate
|
||||
if (offset == NEC_UCOM4_PORTF) offset--;
|
||||
int shift = (offset - NEC_UCOM4_PORTC) * 4;
|
||||
m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
display_matrix(12, 12, m_plate, m_grid);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::tmtennis_port_e_w)
|
||||
WRITE8_MEMBER(tmtennis_state::port_e_w)
|
||||
{
|
||||
// E01: input mux
|
||||
// E2: speaker out
|
||||
@ -729,13 +778,15 @@ WRITE8_MEMBER(hh_ucom4_state::tmtennis_port_e_w)
|
||||
m_speaker->level_w(data >> 2 & 1);
|
||||
}
|
||||
|
||||
READ8_MEMBER(hh_ucom4_state::tmtennis_input_r)
|
||||
READ8_MEMBER(tmtennis_state::input_r)
|
||||
{
|
||||
// A,B: multiplexed buttons
|
||||
return ~read_inputs(2) >> (offset*4);
|
||||
}
|
||||
|
||||
|
||||
// config
|
||||
|
||||
/* Pro-Tennis physical button layout and labels is like this:
|
||||
|
||||
* left = P2/CPU side * * right = P1 side *
|
||||
@ -758,9 +809,9 @@ static INPUT_PORTS_START( tmtennis )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) PORT_NAME("P1 Button 6")
|
||||
|
||||
PORT_START("IN.1") // E1 port A/B
|
||||
PORT_CONFNAME( 0x101, 0x100, DEF_STR( Difficulty ) ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_ucom4_state, tmtennis_difficulty_switch, NULL)
|
||||
PORT_CONFNAME( 0x101, 0x100, DEF_STR( Difficulty ) ) PORT_CHANGED_MEMBER(DEVICE_SELF, tmtennis_state, difficulty_switch, NULL)
|
||||
PORT_CONFSETTING( 0x001, "Practice" )
|
||||
PORT_CONFSETTING( 0x100, "Pro 1" ) // -> tmtennis_difficulty_switch
|
||||
PORT_CONFSETTING( 0x100, "Pro 1" ) // -> difficulty_switch
|
||||
PORT_CONFSETTING( 0x000, "Pro 2" )
|
||||
PORT_CONFNAME( 0x02, 0x00, "Players" )
|
||||
PORT_CONFSETTING( 0x00, "1" )
|
||||
@ -773,8 +824,13 @@ static INPUT_PORTS_START( tmtennis )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_NAME("P2 Button 6")
|
||||
INPUT_PORTS_END
|
||||
|
||||
INPUT_CHANGED_MEMBER(tmtennis_state::difficulty_switch)
|
||||
{
|
||||
set_clock();
|
||||
}
|
||||
|
||||
void hh_ucom4_state::tmtennis_set_clock()
|
||||
|
||||
void tmtennis_state::set_clock()
|
||||
{
|
||||
// MCU clock is from an LC circuit oscillating by default at ~360kHz,
|
||||
// but on PRO1, the difficulty switch puts a capacitor across the LC circuit
|
||||
@ -782,35 +838,29 @@ void hh_ucom4_state::tmtennis_set_clock()
|
||||
m_maincpu->set_unscaled_clock((m_inp_matrix[1]->read() & 0x100) ? 260000 : 360000);
|
||||
}
|
||||
|
||||
INPUT_CHANGED_MEMBER(hh_ucom4_state::tmtennis_difficulty_switch)
|
||||
void tmtennis_state::machine_reset()
|
||||
{
|
||||
tmtennis_set_clock();
|
||||
hh_ucom4_state::machine_reset();
|
||||
set_clock();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(hh_ucom4_state, tmtennis)
|
||||
{
|
||||
tmtennis_set_clock();
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( tmtennis, hh_ucom4_state )
|
||||
static MACHINE_CONFIG_START( tmtennis, tmtennis_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D552, 360000) // see tmtennis_set_clock
|
||||
MCFG_UCOM4_READ_A_CB(READ8(hh_ucom4_state, tmtennis_input_r))
|
||||
MCFG_UCOM4_READ_B_CB(READ8(hh_ucom4_state, tmtennis_input_r))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, tmtennis_plate_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, tmtennis_plate_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, tmtennis_port_e_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, tmtennis_plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, tmtennis_grid_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, tmtennis_grid_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, tmtennis_grid_w))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D552, 360000) // see set_clock
|
||||
MCFG_UCOM4_READ_A_CB(READ8(tmtennis_state, input_r))
|
||||
MCFG_UCOM4_READ_B_CB(READ8(tmtennis_state, input_r))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(tmtennis_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(tmtennis_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(tmtennis_state, port_e_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(tmtennis_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(tmtennis_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(tmtennis_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(tmtennis_state, grid_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hh_ucom4_state, tmtennis)
|
||||
|
||||
/* no video! */
|
||||
|
||||
/* sound hardware */
|
||||
@ -844,24 +894,36 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void hh_ucom4_state::tmpacman_display()
|
||||
class tmpacman_state : public hh_ucom4_state
|
||||
{
|
||||
public:
|
||||
tmpacman_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hh_ucom4_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void tmpacman_display();
|
||||
DECLARE_WRITE8_MEMBER(grid_w);
|
||||
DECLARE_WRITE8_MEMBER(plate_w);
|
||||
};
|
||||
|
||||
// handlers
|
||||
|
||||
void tmpacman_state::tmpacman_display()
|
||||
{
|
||||
UINT16 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7);
|
||||
UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,16,17,18,11,10,9,8,0,2,3,1,4,5,6,7,12,13,14,15);
|
||||
|
||||
display_matrix(19, 8, plate, grid);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::tmpacman_grid_w)
|
||||
WRITE8_MEMBER(tmpacman_state::grid_w)
|
||||
{
|
||||
// C,D: vfd matrix grid
|
||||
int shift = (offset - NEC_UCOM4_PORTC) * 4;
|
||||
m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
tmpacman_display();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::tmpacman_plate_w)
|
||||
WRITE8_MEMBER(tmpacman_state::plate_w)
|
||||
{
|
||||
// E1: speaker out
|
||||
if (offset == NEC_UCOM4_PORTE)
|
||||
@ -870,11 +932,12 @@ WRITE8_MEMBER(hh_ucom4_state::tmpacman_plate_w)
|
||||
// E023,F,G,H,I: vfd matrix plate
|
||||
int shift = (offset - NEC_UCOM4_PORTE) * 4;
|
||||
m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
|
||||
|
||||
tmpacman_display();
|
||||
}
|
||||
|
||||
|
||||
// config
|
||||
|
||||
static INPUT_PORTS_START( tmpacman )
|
||||
PORT_START("IN.0") // port A
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY // separate directional buttons, hence 16way
|
||||
@ -889,20 +952,19 @@ static INPUT_PORTS_START( tmpacman )
|
||||
PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( tmpacman, hh_ucom4_state )
|
||||
static MACHINE_CONFIG_START( tmpacman, tmpacman_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_430kHz)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, tmpacman_grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, tmpacman_grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, tmpacman_plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, tmpacman_plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, tmpacman_plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, tmpacman_plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, tmpacman_plate_w))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(tmpacman_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(tmpacman_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(tmpacman_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(tmpacman_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(tmpacman_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(tmpacman_state, plate_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(tmpacman_state, plate_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
@ -937,7 +999,20 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(hh_ucom4_state::alnchase_output_w)
|
||||
class alnchase_state : public hh_ucom4_state
|
||||
{
|
||||
public:
|
||||
alnchase_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hh_ucom4_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(output_w);
|
||||
DECLARE_READ8_MEMBER(input_r);
|
||||
};
|
||||
|
||||
// handlers
|
||||
|
||||
WRITE8_MEMBER(alnchase_state::output_w)
|
||||
{
|
||||
if (offset <= NEC_UCOM4_PORTE)
|
||||
{
|
||||
@ -964,13 +1039,15 @@ WRITE8_MEMBER(hh_ucom4_state::alnchase_output_w)
|
||||
display_matrix(17, 9, m_plate, m_grid);
|
||||
}
|
||||
|
||||
READ8_MEMBER(hh_ucom4_state::alnchase_input_r)
|
||||
READ8_MEMBER(alnchase_state::input_r)
|
||||
{
|
||||
// A: buttons
|
||||
return read_inputs(2);
|
||||
}
|
||||
|
||||
|
||||
// config
|
||||
|
||||
/* physical button layout and labels is like this:
|
||||
|
||||
POWER SOUND LEVEL PLAYER
|
||||
@ -1008,20 +1085,19 @@ static INPUT_PORTS_START( alnchase )
|
||||
PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( alnchase, hh_ucom4_state )
|
||||
static MACHINE_CONFIG_START( alnchase, alnchase_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL_400kHz)
|
||||
MCFG_UCOM4_READ_A_CB(READ8(hh_ucom4_state, alnchase_input_r))
|
||||
MCFG_UCOM4_READ_A_CB(READ8(alnchase_state, input_r))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.2"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(hh_ucom4_state, alnchase_output_w))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_F_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_G_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_H_CB(WRITE8(alnchase_state, output_w))
|
||||
MCFG_UCOM4_WRITE_I_CB(WRITE8(alnchase_state, output_w))
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
|
||||
MCFG_DEFAULT_LAYOUT(layout_hh_ucom4_test)
|
||||
|
||||
@ -31,8 +31,6 @@ public:
|
||||
: hh_tms1k_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 sety, UINT16 segmask);
|
||||
|
||||
// calculator-specific handlers
|
||||
void tisr16_display();
|
||||
DECLARE_WRITE16_MEMBER(tisr16_write_o);
|
||||
@ -73,14 +71,6 @@ void ticalc1x_state::machine_start()
|
||||
memset(m_display_segmask, ~0, sizeof(m_display_segmask)); // !
|
||||
}
|
||||
|
||||
void ticalc1x_state::display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 sety, UINT16 segmask)
|
||||
{
|
||||
for (int y = 0; y < maxy; y++)
|
||||
m_display_segmask[y] &= segmask;
|
||||
|
||||
display_matrix(maxx, maxy, setx, sety);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
@ -314,6 +314,7 @@ public:
|
||||
// cartridge
|
||||
UINT32 m_cart_max_size;
|
||||
UINT8* m_cart_base;
|
||||
void init_cartridge();
|
||||
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(tispeak_cartridge);
|
||||
DECLARE_DRIVER_INIT(snspell);
|
||||
DECLARE_DRIVER_INIT(lantutor);
|
||||
@ -333,13 +334,33 @@ protected:
|
||||
};
|
||||
|
||||
|
||||
void tispeak_state::machine_start()
|
||||
{
|
||||
hh_tms1k_state::machine_start();
|
||||
memset(m_display_segmask, ~0, sizeof(m_display_segmask)); // !
|
||||
|
||||
init_cartridge();
|
||||
}
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
File Handling
|
||||
Cartridge Handling
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void tispeak_state::init_cartridge()
|
||||
{
|
||||
if (m_cart != NULL && m_cart->exists())
|
||||
{
|
||||
astring region_tag;
|
||||
memory_region *src = memregion(region_tag.cpy(m_cart->tag()).cat(GENERIC_ROM_REGION_TAG));
|
||||
if (src)
|
||||
memcpy(m_cart_base, src->base(), src->bytes());
|
||||
}
|
||||
}
|
||||
|
||||
DEVICE_IMAGE_LOAD_MEMBER(tispeak_state, tispeak_cartridge)
|
||||
{
|
||||
UINT32 size = m_cart->common_get_size("rom");
|
||||
@ -381,16 +402,7 @@ DRIVER_INIT_MEMBER(tispeak_state, lantutor)
|
||||
|
||||
void tispeak_state::snspell_display()
|
||||
{
|
||||
for (int y = 0; y < 16; y++)
|
||||
m_display_segmask[y] = 0x3fff;
|
||||
|
||||
display_matrix(16, 16, m_o, (m_r & 0x8000) ? (m_r & 0x21ff) : 0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(tispeak_state::snspell_read_k)
|
||||
{
|
||||
// note: the Vss row is always on
|
||||
return m_inp_matrix[8]->read() | read_inputs(8);
|
||||
display_matrix_seg(16, 16, m_o, (m_r & 0x8000) ? (m_r & 0x21ff) : 0, 0x3fff);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(tispeak_state::snspell_write_r)
|
||||
@ -414,6 +426,12 @@ WRITE16_MEMBER(tispeak_state::snspell_write_o)
|
||||
snspell_display();
|
||||
}
|
||||
|
||||
READ8_MEMBER(tispeak_state::snspell_read_k)
|
||||
{
|
||||
// note: the Vss row is always on
|
||||
return m_inp_matrix[8]->read() | read_inputs(8);
|
||||
}
|
||||
|
||||
|
||||
void tispeak_state::snspell_power_off()
|
||||
{
|
||||
@ -639,21 +657,6 @@ INPUT_PORTS_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void tispeak_state::machine_start()
|
||||
{
|
||||
hh_tms1k_state::machine_start();
|
||||
|
||||
// init cartridge
|
||||
if (m_cart != NULL && m_cart->exists())
|
||||
{
|
||||
astring region_tag;
|
||||
memory_region *src = memregion(region_tag.cpy(m_cart->tag()).cat(GENERIC_ROM_REGION_TAG));
|
||||
if (src)
|
||||
memcpy(m_cart_base, src->base(), src->bytes());
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( snmath, tispeak_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
@ -919,17 +922,18 @@ ROM_END
|
||||
|
||||
|
||||
|
||||
COMP( 1978, snspell, 0, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1978 version/prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
COMP( 1979, snspella, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1979 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1980, snspellb, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1980 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1978, snspelluk, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (UK, 1978 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1981, snspelluka, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (UK, 1981 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1979, snspelljp, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (Japan)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1980, ladictee, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "La Dictee Magique (France)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // doesn't work due to missing CD2702 MCU dump, German/Italian version has CD2702 too
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */
|
||||
COMP( 1978, snspell, 0, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1978 version/prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
COMP( 1979, snspella, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1979 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1980, snspellb, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (US, 1980 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1978, snspelluk, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (UK, 1978 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1981, snspelluka, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (UK, 1981 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1979, snspelljp, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "Speak & Spell (Japan)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // incomplete dump, uses prototype MCU ROM
|
||||
COMP( 1980, ladictee, snspell, 0, snspell, snspell, tispeak_state, snspell, "Texas Instruments", "La Dictee Magique (France)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) // doesn't work due to missing CD2702 MCU dump, German/Italian version has CD2702 too
|
||||
|
||||
COMP( 1986, snmath, 0, 0, snmath, snmath, driver_device, 0, "Texas Instruments", "Speak & Math (US, 1986 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
COMP( 1980, snmathp, snmath, 0, snmath, snmath, driver_device, 0, "Texas Instruments", "Speak & Math (US, 1980 version/prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING )
|
||||
COMP( 1986, snmath, 0, 0, snmath, snmath, driver_device, 0, "Texas Instruments", "Speak & Math (US, 1986 version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
COMP( 1980, snmathp, snmath, 0, snmath, snmath, driver_device, 0, "Texas Instruments", "Speak & Math (US, 1980 version/prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING )
|
||||
|
||||
COMP( 1980, snread, 0, 0, snread, snread, tispeak_state, snspell, "Texas Instruments", "Speak & Read (US)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
COMP( 1980, snread, 0, 0, snread, snread, tispeak_state, snspell, "Texas Instruments", "Speak & Read (US)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
|
||||
|
||||
COMP( 1979, lantutor, 0, 0, lantutor, lantutor, tispeak_state, lantutor, "Texas Instruments", "Language Tutor (prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING )
|
||||
COMP( 1979, lantutor, 0, 0, lantutor, lantutor, tispeak_state, lantutor, "Texas Instruments", "Language Tutor (prototype)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING )
|
||||
|
||||
@ -57,6 +57,7 @@ public:
|
||||
void display_update();
|
||||
void set_display_size(int maxx, int maxy);
|
||||
void display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety);
|
||||
void display_matrix_seg(int maxx, int maxy, UINT32 setx, UINT32 sety, UINT16 segmask);
|
||||
|
||||
// game-specific handlers
|
||||
void mathmagi_display();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user