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l9nibble: Better guess at CPU type (nw)

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This commit is contained in:
AJR 2018-10-13 18:57:38 -04:00
parent 2515997eee
commit 4d69553e25
1 changed files with 15 additions and 21 deletions
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36
src/mame/drivers/nibble.cpp
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@ -40,17 +40,17 @@
Tech notes...
About the unknown ICs:
DIP64 (U101) CPU with Xtal tied to pins 30 % 31. --> TMS9900? (ROM 9)
DIP64 (U101) CPU with Xtal tied to pins 30 % 31. --> NEC uPD78C11? (ROM 9)
DIP40 (U64) CPU or sound IC driving 128k (ROM 10) data? (pin 20 tied to GND)
*************************************************************************/
#include "emu.h"
#include "cpu/tms9900/tms9980a.h"
//#include "cpu/tms9900/tms9900.h"
#include "cpu/upd7810/upd7811.h"
#include "sound/ay8910.h"
#include "video/mc6845.h"
//#include "video/ramdac.h"
#include "emupal.h"
#include "screen.h"
@ -70,9 +70,9 @@ public:
void nibble(machine_config &config);
private:
required_shared_ptr<uint16_t> m_videoram;
required_shared_ptr<uint8_t> m_videoram;
tilemap_t *m_bg_tilemap;
DECLARE_WRITE16_MEMBER(nibble_videoram_w);
DECLARE_WRITE8_MEMBER(nibble_videoram_w);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
virtual void machine_start() override;
@ -83,7 +83,6 @@ private:
INTERRUPT_GEN_MEMBER(nibble_interrupt);
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
void nibble_cru_map(address_map &map);
void nibble_map(address_map &map);
};
@ -92,7 +91,7 @@ private:
* Video Hardware *
*************************/
WRITE16_MEMBER(nibble_state::nibble_videoram_w)
WRITE8_MEMBER(nibble_state::nibble_videoram_w)
{
COMBINE_DATA(m_videoram+offset);
m_bg_tilemap->mark_tile_dirty(offset*2);
@ -108,7 +107,7 @@ TILE_GET_INFO_MEMBER(nibble_state::get_bg_tile_info)
---- ---- color code.
---- ---- seems unused.
*/
uint8_t code = m_videoram[tile_index/2] >> (tile_index & 1 ? 0 : 8);
uint8_t code = m_videoram[tile_index];
SET_TILE_INFO_MEMBER(0 /* bank */, code, 0 /* color */, 0);
}
@ -157,16 +156,11 @@ void nibble_state::machine_reset()
void nibble_state::nibble_map(address_map &map)
{
// ADDRESS_MAP_GLOBAL_MASK(0x3fff)
map(0x0000, 0xbfff).rom();
map(0xc000, 0xc3ff).w(FUNC(nibble_state::nibble_videoram_w)).share("videoram"); // placeholder
// AM_RANGE(0xff00, 0xff01) AM_DEVWRITE("crtc", mc6845_device, address_w)
// AM_RANGE(0xff02, 0xff03) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
}
void nibble_state::nibble_cru_map(address_map &map)
{
map(0xdc00, 0xdfff).ram().w(FUNC(nibble_state::nibble_videoram_w)).share("videoram");
// RAMDAC at 0xec40?
map(0xecc8, 0xecc8).w("crtc", FUNC(mc6845_device::address_w));
map(0xecc9, 0xecc9).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
}
@ -311,10 +305,9 @@ GFXDECODE_END
MACHINE_CONFIG_START(nibble_state::nibble)
TMS9900(config, m_maincpu, MASTER_CLOCK/4);
UPD7811(config, m_maincpu, MASTER_CLOCK / 3); // type guessed; clock not verified
m_maincpu->set_addrmap(AS_PROGRAM, &nibble_state::nibble_map);
m_maincpu->set_addrmap(AS_IO, &nibble_state::nibble_cru_map);
m_maincpu->set_vblank_int("screen", FUNC(nibble_state::nibble_interrupt));
//m_maincpu->set_vblank_int("screen", FUNC(nibble_state::nibble_interrupt));
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -343,7 +336,8 @@ MACHINE_CONFIG_END
ROM_START( l9nibble )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "09.u123", 0x00000, 0x10000, CRC(dfef685d) SHA1(0aeb4257e408e8549df629a0cdb5f2b6790e32de) ) // tms9900 code?
ROM_LOAD( "u101", 0x00000, 0x01000, NO_DUMP ) // first 4K of code likely contained in undumped internal ROM (with U123 banked over it?)
ROM_LOAD( "09.u123", 0x00000, 0x10000, CRC(dfef685d) SHA1(0aeb4257e408e8549df629a0cdb5f2b6790e32de) )
ROM_REGION( 0x80000, "gfx", 0 )
ROM_LOAD( "01.u139", 0x00000, 0x10000, CRC(aba06e58) SHA1(5841beec122613eed2ba9f48cb1d51bfa0ff450c) )