mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
From: Atari Ace [mailto:atari_ace@verizon.net]
Subject: [patch] CPU/SOUND independence fixes Hi mamedev, Here's some updates to the CPU/SOUND cores to improve build independence. While I was at it, I rescued the M65CE02 core from bitrot hell (perhaps m65ce02.[ch] should just be deleted), and fixed some MESS cores that were broken by the deprecat.h changes.
This commit is contained in:
Aaron Giles
parent
ec872c6178
commit
4db5afa87e
@ -2071,6 +2071,7 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info)
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}
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}
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#if (HAS_ADSP2104||HAS_ADSP2105||HAS_ADSP2115||HAS_ADSP2181)
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static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
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{
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/* see how many words we need to copy */
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@ -2082,6 +2083,7 @@ static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
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dstdata[i] = opcode;
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}
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}
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#endif
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#if (HAS_ADSP2100)
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/**************************************************************************
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@ -534,7 +534,7 @@ CPUDEFS += -DHAS_N7751=$(if $(filter N7751,$(CPUS)),1,0)
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CPUDEFS += -DHAS_MB8884=$(if $(filter MB8884,$(CPUS)),1,0)
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CPUDEFS += -DHAS_M58715=$(if $(filter M58715,$(CPUS)),1,0)
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ifneq ($(filter I8035 I8039 I8048 N7751,$(CPUS)),)
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ifneq ($(filter I8035 I8039 I8048 N7751 MB8884 M58715,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/i8039
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CPUOBJS += $(CPUOBJ)/i8039/i8039.o
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DBGOBJS += $(CPUOBJ)/i8039/8039dasm.o
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@ -1598,32 +1598,44 @@ static void e116_init(int index, int clock, const void *config, int (*irqcallbac
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hyperstone_init(index, clock, config, irqcallback, scale_mask);
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}
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#endif
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#if (HAS_E116T)
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static void e116t_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 0);
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}
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#endif
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#if (HAS_E116XT)
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static void e116xt_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 3);
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}
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#endif
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#if (HAS_E116XS)
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static void e116xs_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 7);
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}
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#endif
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#if (HAS_E116XSR)
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static void e116xsr_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 7);
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}
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#endif
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#if (HAS_GMS30C2116)
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static void gms30c2116_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 0);
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}
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#endif
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#if (HAS_GMS30C2216)
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static void gms30c2216_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e116_init(index, clock, config, irqcallback, 0);
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@ -1647,42 +1659,58 @@ static void e132_init(int index, int clock, const void *config, int (*irqcallbac
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hyperstone_init(index, clock, config, irqcallback, scale_mask);
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}
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#endif
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#if (HAS_E132N)
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static void e132n_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 0);
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}
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#endif
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#if (HAS_E132T)
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static void e132t_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 0);
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}
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#endif
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#if (HAS_E132XN)
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static void e132xn_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 3);
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}
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#endif
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#if (HAS_E132XT)
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static void e132xt_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 3);
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}
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#endif
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#if (HAS_E132XS)
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static void e132xs_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 7);
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}
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#endif
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#if (HAS_E132XSR)
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static void e132xsr_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 7);
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}
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#endif
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#if (HAS_GMS30C2132)
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static void gms30c2132_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 0);
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}
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#endif
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#if (HAS_GMS30C2232)
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static void gms30c2232_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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e132_init(index, clock, config, irqcallback, 0);
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@ -620,14 +620,14 @@ static void i8039_init (int index, int clock, const void *config, int (*irqcallb
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R.timer = 0;
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}
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#if (HAS_I8035)
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#if (HAS_I8035||HAS_I8048||HAS_MB8884)
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static void i8035_init (int index, int clock, const void *config, int (*irqcallback)(int))
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{
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i8039_init(index, clock, config, irqcallback);
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R.ram_mask = 0x3F;
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R.int_rom_size = 0x400;
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}
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#endif /* HAS_I8035 */
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#endif
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#if (HAS_M58715)
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static void m58715_init (int index, int clock, const void *config, int (*irqcallback)(int))
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@ -38,42 +38,32 @@
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*/
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#include "debugger.h"
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#include "deprecat.h"
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#include "m65ce02.h"
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#include "mincce02.h"
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#include "opsce02.h"
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#define M6502_NMI_VEC 0xfffa
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#define M6502_RST_VEC 0xfffc
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#define M6502_IRQ_VEC 0xfffe
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#define M65CE02_RST_VEC M6502_RST_VEC
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#define M65CE02_IRQ_VEC M6502_IRQ_VEC
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#define M65CE02_NMI_VEC M6502_NMI_VEC
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#define VERBOSE 0
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#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
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/* Layout of the registers in the debugger */
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static UINT8 m65ce02_reg_layout[] = {
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M65CE02_A,M65CE02_X,M65CE02_Y,M65CE02_Z,M65CE02_S,M65CE02_PC,
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M65CE02_P,
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-1,
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M65CE02_EA,M65CE02_ZP,M65CE02_NMI_STATE,M65CE02_IRQ_STATE, M65CE02_B,
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0
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};
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/* Layout of the debugger windows x,y,w,h */
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static UINT8 m65ce02_win_layout[] = {
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25, 0,55, 2, /* register window (top, right rows) */
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0, 0,24,22, /* disassembler window (left colums) */
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25, 3,55, 9, /* memory #1 window (right, upper middle) */
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25,13,55, 9, /* memory #2 window (right, lower middle) */
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0,23,80, 1, /* command line window (bottom rows) */
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};
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typedef struct {
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void (**insn)(void); /* pointer to the function pointer table */
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void (*const *insn)(void); /* pointer to the function pointer table */
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PAIR ppc; /* previous program counter */
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PAIR pc; /* program counter */
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PAIR sp; /* stack pointer (always 100 - 1FF) */
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PAIR zp; /* zero page address */
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PAIR pc; /* program counter */
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PAIR sp; /* stack pointer (always 100 - 1FF) */
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PAIR zp; /* zero page address */
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/* contains B register zp.b.h */
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PAIR ea; /* effective address */
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PAIR ea; /* effective address */
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UINT8 a; /* Accumulator */
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UINT8 x; /* X index register */
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UINT8 y; /* Y index register */
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@ -84,10 +74,12 @@ typedef struct {
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UINT8 nmi_state;
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UINT8 irq_state;
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int (*irq_callback)(int irqline); /* IRQ callback */
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read8_handler rdmem_id; /* readmem callback for indexed instructions */
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write8_handler wrmem_id; /* writemem callback for indexed instructions */
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} m65ce02_Regs;
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int m65ce02_ICount = 0;
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static int m65ce02_ICount = 0;
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static m65ce02_Regs m65ce02;
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@ -97,7 +89,14 @@ static m65ce02_Regs m65ce02;
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#include "t65ce02.c"
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void m65ce02_reset (void *param)
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static void m65ce02_init(int index, int clock, const void *config, int (*irqcallback)(int))
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{
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m65ce02.rdmem_id = program_read_byte_8;
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m65ce02.wrmem_id = program_write_byte_8;
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m65ce02.irq_callback = irqcallback;
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}
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static void m65ce02_reset(void)
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{
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m65ce02.insn = insn65ce02;
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@ -119,19 +118,18 @@ void m65ce02_reset (void *param)
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change_pc(PCD);
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}
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void m65ce02_exit(void)
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static void m65ce02_exit(void)
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{
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/* nothing to do yet */
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}
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unsigned m65ce02_get_context (void *dst)
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static void m65ce02_get_context (void *dst)
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{
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if( dst )
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*(m65ce02_Regs*)dst = m65ce02;
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return sizeof(m65ce02_Regs);
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}
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void m65ce02_set_context (void *src)
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static void m65ce02_set_context (void *src)
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{
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if( src )
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{
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@ -140,50 +138,6 @@ void m65ce02_set_context (void *src)
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}
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}
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unsigned m65ce02_get_reg (int regnum)
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{
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switch( regnum )
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{
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case REG_PC: return PCD;
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case M65CE02_PC: return m65ce02.pc.w.l;
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case REG_SP: return S;
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case M65CE02_S: return m65ce02.sp.w.l;
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case M65CE02_P: return m65ce02.p;
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case M65CE02_A: return m65ce02.a;
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case M65CE02_X: return m65ce02.x;
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case M65CE02_Y: return m65ce02.y;
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case M65CE02_Z: return m65ce02.z;
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case M65CE02_B: return m65ce02.zp.b.h;
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case M65CE02_EA: return m65ce02.ea.w.l;
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case M65CE02_ZP: return m65ce02.zp.b.l;
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case M65CE02_NMI_STATE: return m65ce02.nmi_state;
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case M65CE02_IRQ_STATE: return m65ce02.irq_state;
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case REG_PREVIOUSPC: return m65ce02.ppc.w.l;
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}
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return 0;
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}
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void m65ce02_set_reg (int regnum, unsigned val)
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{
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switch( regnum )
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{
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case REG_PC: PCW = val; change_pc(PCD); break;
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case M65CE02_PC: m65ce02.pc.w.l = val; break;
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case REG_SP: S = val; break;
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case M65CE02_S: m65ce02.sp.w.l = val; break;
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case M65CE02_P: m65ce02.p = val; break;
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case M65CE02_A: m65ce02.a = val; break;
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case M65CE02_X: m65ce02.x = val; break;
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case M65CE02_Y: m65ce02.y = val; break;
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case M65CE02_Z: m65ce02.z = val; break;
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case M65CE02_B: m65ce02.zp.b.h = val; break;
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case M65CE02_EA: m65ce02.ea.w.l = val; break;
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case M65CE02_ZP: m65ce02.zp.b.l = val; break;
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case M65CE02_NMI_STATE: m65ce02_set_irq_line( INPUT_LINE_NMI, val ); break;
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case M65CE02_IRQ_STATE: m65ce02_set_irq_line( 0, val ); break;
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}
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}
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INLINE void m65ce02_take_irq(void)
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{
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if( !(P & F_I) )
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@ -204,7 +158,7 @@ INLINE void m65ce02_take_irq(void)
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m65ce02.pending_irq = 0;
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}
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int m65ce02_execute(int cycles)
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static int m65ce02_execute(int cycles)
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{
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m65ce02_ICount = cycles;
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@ -248,7 +202,7 @@ int m65ce02_execute(int cycles)
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return cycles - m65ce02_ICount;
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}
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void m65ce02_set_irq_line(int irqline, int state)
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static void m65ce02_set_irq_line(int irqline, int state)
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{
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if (irqline == INPUT_LINE_NMI)
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{
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@ -280,106 +234,133 @@ void m65ce02_set_irq_line(int irqline, int state)
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}
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}
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void m65ce02_set_irq_callback(int (*callback)(int))
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/**************************************************************************
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* Generic set_info
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**************************************************************************/
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static void m65ce02_set_info(UINT32 state, cpuinfo *info)
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{
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m65ce02.irq_callback = callback;
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}
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switch( state )
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + M65CE02_IRQ_STATE: m65ce02_set_irq_line( M65CE02_IRQ_LINE, info->i ); break;
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case CPUINFO_INT_INPUT_STATE + M65CE02_NMI_STATE: m65ce02_set_irq_line( INPUT_LINE_NMI, info->i ); break;
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void m65ce02_state_save(void *file)
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{
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int cpu = cpu_getactivecpu();
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/* insn is set at restore since it's a pointer */
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state_save_UINT16(file,"m65ce02",cpu,"PC",&m65ce02.pc.w.l,2);
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state_save_UINT16(file,"m65ce02",cpu,"SP",&m65ce02.sp.w.l,2);
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state_save_UINT8(file,"m65ce02",cpu,"P",&m65ce02.p,1);
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state_save_UINT8(file,"m65ce02",cpu,"A",&m65ce02.a,1);
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state_save_UINT8(file,"m65ce02",cpu,"X",&m65ce02.x,1);
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state_save_UINT8(file,"m65ce02",cpu,"Y",&m65ce02.y,1);
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state_save_UINT8(file,"m65ce02",cpu,"Z",&m65ce02.z,1);
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state_save_UINT8(file,"m65ce02",cpu,"B",&m65ce02.zp.b.h,1);
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state_save_UINT8(file,"m65ce02",cpu,"PENDING",&m65ce02.pending_irq,1);
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state_save_UINT8(file,"m65ce02",cpu,"AFTER_CLI",&m65ce02.after_cli,1);
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state_save_UINT8(file,"m65ce02",cpu,"NMI_STATE",&m65ce02.nmi_state,1);
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state_save_UINT8(file,"m65ce02",cpu,"IRQ_STATE",&m65ce02.irq_state,1);
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}
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case CPUINFO_INT_PC: PCW = info->i; change_pc(PCD); break;
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case CPUINFO_INT_REGISTER + M65CE02_PC: m65ce02.pc.w.l = info->i; break;
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case CPUINFO_INT_SP: m65ce02.sp.b.l = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_S: m65ce02.sp.w.l = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_P: m65ce02.p = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_A: m65ce02.a = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_X: m65ce02.x = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_Y: m65ce02.y = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_Z: m65ce02.z = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_B: m65ce02.zp.b.h = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_EA: m65ce02.ea.w.l = info->i; break;
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case CPUINFO_INT_REGISTER + M65CE02_ZP: m65ce02.zp.b.l = info->i; break;
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void m65ce02_state_load(void *file)
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{
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int cpu = cpu_getactivecpu();
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m65ce02.insn = insn65ce02;
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state_load_UINT16(file,"m65ce02",cpu,"PC",&m65ce02.pc.w.l,2);
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state_load_UINT16(file,"m65ce02",cpu,"SP",&m65ce02.sp.w.l,2);
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state_load_UINT8(file,"m65ce02",cpu,"P",&m65ce02.p,1);
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state_load_UINT8(file,"m65ce02",cpu,"A",&m65ce02.a,1);
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state_load_UINT8(file,"m65ce02",cpu,"X",&m65ce02.x,1);
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state_load_UINT8(file,"m65ce02",cpu,"Y",&m65ce02.y,1);
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state_load_UINT8(file,"m65ce02",cpu,"Z",&m65ce02.z,1);
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state_load_UINT8(file,"m65ce02",cpu,"B",&m65ce02.zp.b.h,1);
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state_load_UINT8(file,"m65ce02",cpu,"PENDING",&m65ce02.pending_irq,1);
|
||||
state_load_UINT8(file,"m65ce02",cpu,"AFTER_CLI",&m65ce02.after_cli,1);
|
||||
state_load_UINT8(file,"m65ce02",cpu,"NMI_STATE",&m65ce02.nmi_state,1);
|
||||
state_load_UINT8(file,"m65ce02",cpu,"IRQ_STATE",&m65ce02.irq_state,1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Return a formatted string for a register
|
||||
****************************************************************************/
|
||||
const char *m65ce02_info(void *context, int regnum)
|
||||
{
|
||||
char *buffer = cpuintrf_temp_str();
|
||||
m65ce02_Regs *r = context;
|
||||
|
||||
if( !context )
|
||||
r = &m65ce02;
|
||||
|
||||
switch( regnum )
|
||||
{
|
||||
case CPU_INFO_REG+M65CE02_PC: sprintf(buffer, "PC:%04X", r->pc.w.l); break;
|
||||
case CPU_INFO_REG+M65CE02_S: sprintf(buffer, "S:%04X", r->sp.w.l); break;
|
||||
case CPU_INFO_REG+M65CE02_P: sprintf(buffer, "P:%02X", r->p); break;
|
||||
case CPU_INFO_REG+M65CE02_A: sprintf(buffer, "A:%02X", r->a); break;
|
||||
case CPU_INFO_REG+M65CE02_X: sprintf(buffer, "X:%02X", r->x); break;
|
||||
case CPU_INFO_REG+M65CE02_Y: sprintf(buffer, "Y:%02X", r->y); break;
|
||||
case CPU_INFO_REG+M65CE02_Z: sprintf(buffer, "Z:%02X", r->z); break;
|
||||
case CPU_INFO_REG+M65CE02_B: sprintf(buffer, "B:%02X", r->zp.b.h); break;
|
||||
case CPU_INFO_REG+M65CE02_EA: sprintf(buffer, "EA:%04X", r->ea.w.l); break;
|
||||
case CPU_INFO_REG+M65CE02_ZP: sprintf(buffer, "ZP:%04X", r->zp.w.l); break;
|
||||
case CPU_INFO_REG+M65CE02_NMI_STATE: sprintf(buffer, "NMI:%X", r->nmi_state); break;
|
||||
case CPU_INFO_REG+M65CE02_IRQ_STATE: sprintf(buffer, "IRQ:%X", r->irq_state); break;
|
||||
case CPU_INFO_FLAGS:
|
||||
sprintf(buffer, "%c%c%c%c%c%c%c%c",
|
||||
r->p & 0x80 ? 'N':'.',
|
||||
r->p & 0x40 ? 'V':'.',
|
||||
r->p & 0x20 ? 'E':'.',
|
||||
r->p & 0x10 ? 'B':'.',
|
||||
r->p & 0x08 ? 'D':'.',
|
||||
r->p & 0x04 ? 'I':'.',
|
||||
r->p & 0x02 ? 'Z':'.',
|
||||
r->p & 0x01 ? 'C':'.');
|
||||
break;
|
||||
case CPU_INFO_NAME: return "M65CE02";
|
||||
case CPU_INFO_FAMILY: return "CBM Semiconductor Group CSG 65CE02";
|
||||
case CPU_INFO_VERSION: return "1.0beta";
|
||||
case CPU_INFO_CREDITS:
|
||||
return "Copyright Juergen Buchmueller\n"
|
||||
"Copyright Peter Trauner\n"
|
||||
"all rights reserved.";
|
||||
case CPU_INFO_FILE: return __FILE__;
|
||||
case CPU_INFO_REG_LAYOUT: return (const char*)m65ce02_reg_layout;
|
||||
case CPU_INFO_WIN_LAYOUT: return (const char*)m65ce02_win_layout;
|
||||
/* --- the following bits of info are set as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: m65ce02.rdmem_id = (read8_handler) info->f; break;
|
||||
case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: m65ce02.wrmem_id = (write8_handler) info->f; break;
|
||||
}
|
||||
return buffer;
|
||||
}
|
||||
|
||||
/**************************************************************************
|
||||
* Generic get_info
|
||||
**************************************************************************/
|
||||
|
||||
unsigned int m65ce02_dasm(char *buffer, unsigned pc)
|
||||
void m65ce02_get_info(UINT32 state, cpuinfo *info)
|
||||
{
|
||||
switch( state )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m65ce02); break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
|
||||
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break;
|
||||
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
|
||||
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE+M65CE02_NMI_STATE: info->i = m65ce02.nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE+M65CE02_IRQ_STATE: info->i = m65ce02.irq_state; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: info->i = m65ce02.ppc.w.l; break;
|
||||
|
||||
case CPUINFO_INT_PC: info->i = PCD; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_PC: info->i = m65ce02.pc.w.l; break;
|
||||
case CPUINFO_INT_SP: info->i = m65ce02.sp.b.l; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_S: info->i = m65ce02.sp.w.l; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_P: info->i = m65ce02.p; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_A: info->i = m65ce02.a; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_X: info->i = m65ce02.x; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_Y: info->i = m65ce02.y; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_Z: info->i = m65ce02.z; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_B: info->i = m65ce02.zp.b.h; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_EA: info->i = m65ce02.ea.w.l; break;
|
||||
case CPUINFO_INT_REGISTER+M65CE02_ZP: info->i = m65ce02.zp.w.l; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_SET_INFO: info->setinfo = m65ce02_set_info; break;
|
||||
case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m65ce02_get_context; break;
|
||||
case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m65ce02_set_context; break;
|
||||
case CPUINFO_PTR_INIT: info->init = m65ce02_init; break;
|
||||
case CPUINFO_PTR_RESET: info->reset = m65ce02_reset; break;
|
||||
case CPUINFO_PTR_EXIT: info->exit = m65ce02_exit; break;
|
||||
case CPUINFO_PTR_EXECUTE: info->execute = m65ce02_execute; break;
|
||||
case CPUINFO_PTR_BURN: info->burn = NULL; break;
|
||||
#ifdef ENABLE_DEBUGGER
|
||||
return Dasm65ce02( buffer, pc );
|
||||
#else
|
||||
sprintf( buffer, "$%02X", cpu_readop(pc) );
|
||||
return 1;
|
||||
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65ce02_dasm; break;
|
||||
#endif
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m65ce02_ICount; break;
|
||||
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m65ce02.rdmem_id; break;
|
||||
case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m65ce02.wrmem_id; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "M65CE02"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s,"CBM Semiconductor Group CSG 65CE02"); break;
|
||||
case CPUINFO_STR_CORE_VERSION: strcpy(info->s,"1.0beta"); break;
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s,__FILE__);
|
||||
case CPUINFO_STR_CORE_CREDITS:
|
||||
strcpy(info->s, "Copyright Juergen Buchmueller\n"
|
||||
"Copyright Peter Trauner\n"
|
||||
"all rights reserved."); break;
|
||||
case CPUINFO_STR_FLAGS:
|
||||
sprintf(info->s, "%c%c%c%c%c%c%c%c",
|
||||
m65ce02.p & 0x80 ? 'N':'.',
|
||||
m65ce02.p & 0x40 ? 'V':'.',
|
||||
m65ce02.p & 0x20 ? 'E':'.',
|
||||
m65ce02.p & 0x10 ? 'B':'.',
|
||||
m65ce02.p & 0x08 ? 'D':'.',
|
||||
m65ce02.p & 0x04 ? 'I':'.',
|
||||
m65ce02.p & 0x02 ? 'Z':'.',
|
||||
m65ce02.p & 0x01 ? 'C':'.');
|
||||
break;
|
||||
|
||||
case CPUINFO_STR_REGISTER + M65CE02_PC: sprintf(info->s, "PC:%04X", m65ce02.pc.w.l); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_S: sprintf(info->s, "S:%02X", m65ce02.sp.b.l); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_P: sprintf(info->s, "P:%02X", m65ce02.p); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_A: sprintf(info->s, "A:%02X", m65ce02.a); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_X: sprintf(info->s, "X:%02X", m65ce02.x); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_Y: sprintf(info->s, "Y:%02X", m65ce02.y); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_Z: sprintf(info->s, "Z:%02X", m65ce02.z); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_B: sprintf(info->s, "B:%02X", m65ce02.zp.b.h); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_EA: sprintf(info->s, "EA:%04X", m65ce02.ea.w.l); break;
|
||||
case CPUINFO_STR_REGISTER + M65CE02_ZP: sprintf(info->s, "ZP:%03X", m65ce02.zp.w.l); break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -32,24 +32,10 @@ enum {
|
||||
|
||||
#define M65CE02_IRQ_LINE M6502_IRQ_LINE
|
||||
|
||||
extern int m65ce02_ICount; /* cycle count */
|
||||
|
||||
extern void m65ce02_reset(void *param);
|
||||
extern void m65ce02_exit(void);
|
||||
extern int m65ce02_execute(int cycles);
|
||||
extern unsigned m65ce02_get_context (void *dst);
|
||||
extern void m65ce02_set_context (void *src);
|
||||
extern unsigned m65ce02_get_reg (int regnum);
|
||||
extern void m65ce02_set_reg (int regnum, unsigned val);
|
||||
extern void m65ce02_set_irq_line(int irqline, int state);
|
||||
extern void m65ce02_set_irq_callback(int (*callback)(int irqline));
|
||||
extern void m65ce02_state_save(void *file);
|
||||
extern void m65ce02_state_load(void *file);
|
||||
extern const char *m65ce02_info(void *context, int regnum);
|
||||
extern unsigned m65ce02_dasm(char *buffer, unsigned pc);
|
||||
void m65ce02_get_info(UINT32 state, cpuinfo *info);
|
||||
|
||||
#ifdef ENABLE_DEBUGGER
|
||||
extern unsigned int Dasm65ce02( char *dst, unsigned pc );
|
||||
extern unsigned m65ce02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
|
||||
#endif
|
||||
|
||||
#endif /* _M65CE02_H */
|
||||
|
||||
@ -288,7 +288,7 @@
|
||||
t1=RDOPARG(); \
|
||||
t2=RDOPARG(); \
|
||||
t3=RDOPARG(); \
|
||||
logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", t1,t2,t3);
|
||||
logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", activecpu_get_pc(),t1,t2,t3);
|
||||
|
||||
/* 65ce02 ******************************************************
|
||||
* BBR Branch if bit is reset
|
||||
|
||||
@ -47,6 +47,7 @@ TODO:
|
||||
|
||||
#include "minx.h"
|
||||
#include "debugger.h"
|
||||
#include "deprecat.h"
|
||||
|
||||
#define FLAG_I 0x80
|
||||
#define FLAG_D 0x40
|
||||
|
||||
@ -2714,7 +2714,7 @@ static UINT32 recompile_invalid(drc_core *drc, UINT32 op)
|
||||
|
||||
/* PowerPC 60x Recompilers */
|
||||
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
|
||||
static UINT32 recompile_lfs(drc_core *drc,UINT32 op)
|
||||
{
|
||||
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
|
||||
@ -3798,7 +3798,9 @@ static UINT32 recompile_tlbli(drc_core *drc, UINT32 op)
|
||||
{
|
||||
return RECOMPILE_SUCCESSFUL_CP(1,4);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (HAS_PPC602||HAS_PPC604||HAS_MPC8240)
|
||||
static UINT32 recompile_tlbld(drc_core *drc, UINT32 op)
|
||||
{
|
||||
return RECOMPILE_SUCCESSFUL_CP(1,4);
|
||||
|
||||
@ -66,7 +66,7 @@ INLINE void WRITE64(UINT32 a, UINT64 d)
|
||||
|
||||
/***********************************************************************/
|
||||
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
|
||||
static UINT16 ppc_read16_unaligned(UINT32 a)
|
||||
{
|
||||
return ((UINT16)ppc.read8(a+0) << 8) | ((UINT16)ppc.read8(a+1) << 0);
|
||||
@ -372,7 +372,7 @@ static offs_t ppc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
|
||||
|
||||
/***********************************************************************/
|
||||
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
|
||||
static int ppc_readop(UINT32 offset, int size, UINT64 *value)
|
||||
{
|
||||
if (!(ppc.msr & MSR_IR))
|
||||
|
||||
@ -1785,7 +1785,7 @@ INLINE void set_fprf(FPR f)
|
||||
|
||||
|
||||
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
|
||||
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
|
||||
static void ppc_lfs(UINT32 op)
|
||||
{
|
||||
UINT32 ea = SIMM16;
|
||||
|
||||
@ -592,7 +592,7 @@ SOUNDDEFS += -DHAS_TMC0285=$(if $(filter TMC0285,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_TMS5200=$(if $(filter TMS5200,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_TMS5220=$(if $(filter TMS5220,$(SOUNDS)),1,0)
|
||||
|
||||
ifneq ($(filter TMS5110,$(SOUNDS)),)
|
||||
ifneq ($(filter TMS5100 TMS5110 TMS5110A CD2801 TMC0281 CD2802 M58817,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/tms5110.o $(SOUNDOBJ)/5110intf.o
|
||||
endif
|
||||
|
||||
|
||||
@ -5,7 +5,9 @@
|
||||
* CassetteWave interface
|
||||
*****************************************************************************/
|
||||
|
||||
#ifdef MESS
|
||||
#include "messdrv.h"
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user