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Major renaming of netlist device macros, like

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NETDEV_ALIAS ==> ALIAS
NETDEV_R ==> RES
NETDEV_C ==> CAP
This commit is contained in:
Couriersud 2014-01-19 15:51:25 +00:00
parent c1158bbabf
commit 4dc77142f9
22 changed files with 323 additions and 321 deletions
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16
nl_examples/7400_astable.c
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@ -14,21 +14,21 @@ NETLIST_START(7400_astable)
/* Standard stuff */ /* Standard stuff */
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_PARAM(Solver.ACCURACY, 1e-7) PARAM(Solver.ACCURACY, 1e-7)
// astable NAND Multivibrator // astable NAND Multivibrator
NETDEV_R(R1, 1000) RES(R1, 1000)
NETDEV_C(C1, 1e-6) CAP(C1, 1e-6)
TTL_7400_NAND(n1,R1.1,R1.1) TTL_7400_NAND(n1,R1.1,R1.1)
TTL_7400_NAND(n2,R1.2,R1.2) TTL_7400_NAND(n2,R1.2,R1.2)
NET_C(n1.Q, R1.2) NET_C(n1.Q, R1.2)
NET_C(n2.Q, C1.1) NET_C(n2.Q, C1.1)
NET_C(C1.2, R1.1) NET_C(C1.2, R1.1)
NETDEV_LOG(log2, C1.2) LOG(log2, C1.2)
//NETDEV_LOG(log2, n1.Q) //LOG(log2, n1.Q)
NETDEV_LOG(log3, n2.Q) LOG(log3, n2.Q)
NETLIST_END() NETLIST_END()

28
nl_examples/bjt.c
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@ -9,18 +9,18 @@
NETLIST_START(bjt) NETLIST_START(bjt)
/* Standard stuff */ /* Standard stuff */
NETDEV_CLOCK(clk) CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 1000) // 1000 Hz PARAM(clk.FREQ, 1000) // 1000 Hz
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_ANALOG_INPUT(V5, 5) ANALOG_INPUT(V5, 5)
NETDEV_ANALOG_INPUT(V3, 3.5) ANALOG_INPUT(V3, 3.5)
/* NPN - example */ /* NPN - example */
NETDEV_QBJT_SW(Q, "BC237B") QBJT_SW(Q, "BC237B")
NETDEV_R(RB, 1000) RES(RB, 1000)
NETDEV_R(RC, 1000) RES(RC, 1000)
NET_C(RC.1, V5) NET_C(RC.1, V5)
NET_C(RC.2, Q.C) NET_C(RC.2, Q.C)
@ -30,9 +30,9 @@ NETLIST_START(bjt)
/* PNP - example */ /* PNP - example */
NETDEV_QBJT_SW(Q1, "BC556B") QBJT_SW(Q1, "BC556B")
NETDEV_R(RB1, 1000) RES(RB1, 1000)
NETDEV_R(RC1, 1000) RES(RC1, 1000)
NET_C(RC1.1, GND) NET_C(RC1.1, GND)
NET_C(RC1.2, Q1.C) NET_C(RC1.2, Q1.C)
@ -40,7 +40,7 @@ NETLIST_START(bjt)
NET_C(RB1.2, Q1.B) NET_C(RB1.2, Q1.B)
NET_C(Q1.E, V3) NET_C(Q1.E, V3)
NETDEV_LOG(logB, Q.B) LOG(logB, Q.B)
NETDEV_LOG(logC, Q.C) LOG(logC, Q.C)
NETLIST_END() NETLIST_END()

30
nl_examples/bjt_eb.c
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@ -5,24 +5,26 @@
#include "netlist/devices/net_lib.h" #include "netlist/devices/net_lib.h"
#include "netlist/analog/nld_twoterm.h"
NETLIST_START(bjt) NETLIST_START(bjt)
/* Standard stuff */ /* Standard stuff */
NETDEV_CLOCK(clk) CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 10000) // 1000 Hz PARAM(clk.FREQ, 10000) // 1000 Hz
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_PARAM(Solver.ACCURACY, 1e-6) PARAM(Solver.ACCURACY, 1e-4)
NETDEV_PARAM(Solver.RESCHED_LOOPS, 50) //PARAM(Solver.ACCURACY, 1e-6)
NETDEV_ANALOG_INPUT(V5, 5) PARAM(Solver.RESCHED_LOOPS, 50)
NETDEV_ANALOG_INPUT(V3, 3.5) ANALOG_INPUT(V5, 5)
ANALOG_INPUT(V3, 3.5)
/* NPN - example */ /* NPN - example */
NETDEV_QBJT_EB(Q, "BC237B") QBJT_EB(Q, "BC237B")
NETDEV_R(RB, 1000) RES(RB, 1000)
NETDEV_R(RC, 1000) RES(RC, 1000)
NET_C(RC.1, V5) NET_C(RC.1, V5)
NET_C(RC.2, Q.C) NET_C(RC.2, Q.C)
@ -33,11 +35,11 @@ NETLIST_START(bjt)
// put some load on Q.C // put some load on Q.C
NETDEV_R(RCE, 150000) RES(RCE, 150000)
NET_C(RCE.1, Q.C) NET_C(RCE.1, Q.C)
NET_C(RCE.2, GND) NET_C(RCE.2, GND)
NETDEV_LOG(logB, Q.B) //LOG(logB, Q.B)
NETDEV_LOG(logC, Q.C) //LOG(logC, Q.C)
NETLIST_END() NETLIST_END()

44
nl_examples/msx_mixer_stage.c
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@ -9,32 +9,32 @@
NETLIST_START(msx) NETLIST_START(msx)
/* Standard stuff */ /* Standard stuff */
NETDEV_CLOCK(clk) CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 1000) // 1000 Hz PARAM(clk.FREQ, 1000) // 1000 Hz
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_PARAM(Solver.ACCURACY, 1e-6) PARAM(Solver.ACCURACY, 1e-5)
NETDEV_PARAM(Solver.CONVERG, 0.3) PARAM(Solver.CONVERG, 0.3)
NETDEV_PARAM(Solver.RESCHED_LOOPS, 60) PARAM(Solver.RESCHED_LOOPS, 80)
NETDEV_R(RAY8910, 2345) // Max Voltage RES(RAY8910, 2345) // Max Voltage
NETDEV_ANALOG_INPUT(V5, 5) ANALOG_INPUT(V5, 5)
NETDEV_ANALOG_INPUT(V12, 12) ANALOG_INPUT(V12, 12)
NETDEV_ANALOG_INPUT(SOUND, 5) ANALOG_INPUT(SOUND, 5)
NETDEV_ANALOG_INPUT(SND, 5) ANALOG_INPUT(SND, 5)
NET_MODEL(".model ss9014 NPN(is=2.87599e-14 bf=377.5 vaf=123 ikf=1.1841 ise=4.7863e-15 ne=1.5 br=4.79 var=11.29 ikr=0.275423 isc=1.44544e-14 nc=1.5 rb=200 irb=1e-5 rbm=10 re=0.56 rc=5 cje=1.7205e-11 vje=0.6905907 mje=0.3193434 tf=5.89463e-10 cjc=6.2956p vjc=0.4164212 mjc=0.2559546 xcjc=0.451391 xtb=1.8881 eg=1.2415 xti=3 fc=0.5 Vceo=45 Icrating=0.1 mfg=Fairchild)") NET_MODEL(".model ss9014 NPN(is=2.87599e-14 bf=377.5 vaf=123 ikf=1.1841 ise=4.7863e-15 ne=1.5 br=4.79 var=11.29 ikr=0.275423 isc=1.44544e-14 nc=1.5 rb=200 irb=1e-5 rbm=10 re=0.56 rc=5 cje=1.7205e-11 vje=0.6905907 mje=0.3193434 tf=5.89463e-10 cjc=6.2956p vjc=0.4164212 mjc=0.2559546 xcjc=0.451391 xtb=1.8881 eg=1.2415 xti=3 fc=0.5 Vceo=45 Icrating=0.1 mfg=Fairchild)")
NETDEV_R(R24, RES_K(51)) RES(R24, RES_K(51))
NETDEV_R(R23, RES_K(5)) RES(R23, RES_K(5))
NETDEV_R(R21, RES_K(51)) RES(R21, RES_K(51))
NETDEV_R(R20, RES_K(1)) RES(R20, RES_K(1))
NETDEV_R(R9, RES_K(10)) RES(R9, RES_K(10))
NETDEV_R(R8, 330) RES(R8, 330)
NETDEV_C(C55, CAP_U(5)) // Guessed CAP(C55, CAP_U(5)) // Guessed
//NET_C(RAY8910.1, SND) //NET_C(RAY8910.1, SND)
NET_C(RAY8910.1, clk) NET_C(RAY8910.1, clk)
@ -50,7 +50,7 @@ NETLIST_START(msx)
NET_C(R21.1, V5) NET_C(R21.1, V5)
NET_C(R21.2, R23.2) NET_C(R21.2, R23.2)
NETDEV_QBJT_EB(T2, "ss9014") QBJT_EB(T2, "ss9014")
NET_C(R9.1, V12) NET_C(R9.1, V12)
NET_C(R9.2, T2.C) NET_C(R9.2, T2.C)
@ -58,7 +58,7 @@ NETLIST_START(msx)
NET_C(R8.1, T2.E) NET_C(R8.1, T2.E)
NET_C(R8.2, GND) NET_C(R8.2, GND)
//NETDEV_LOG(logB, T2.B) LOG(logB, T2.B)
//NETDEV_LOG(logC, T2.C) LOG(logC, T2.C)
NETLIST_END() NETLIST_END()

18
nl_examples/ne555_astable.c
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@ -14,19 +14,19 @@ NETLIST_START(ne555_astable)
/* Standard stuff */ /* Standard stuff */
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_ANALOG_INPUT(V5, 5) // 5V ANALOG_INPUT(V5, 5) // 5V
/* Wiring up the ne555 */ /* Wiring up the ne555 */
// astable NE555, 1.13 ms period // astable NE555, 1.13 ms period
NETDEV_R(RA, 5000) RES(RA, 5000)
NETDEV_R(RB, 3000) RES(RB, 3000)
NETDEV_C(C, 0.15e-6) CAP(C, 0.15e-6)
NETDEV_NE555(555) NE555(555)
NET_C(GND, 555.GND) NET_C(GND, 555.GND)
NET_C(V5, 555.VCC) NET_C(V5, 555.VCC)
@ -43,7 +43,7 @@ NETLIST_START(ne555_astable)
NET_C(555.TRIG, C.1) NET_C(555.TRIG, C.1)
NET_C(C.2, GND) NET_C(C.2, GND)
NETDEV_LOG(log2, C.1) LOG(log2, C.1)
NETDEV_LOG(log3, 555.OUT) LOG(log3, 555.OUT)
NETLIST_END() NETLIST_END()

24
nl_examples/opamp.c
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@ -19,11 +19,11 @@ NETLIST_START(opamp)
/* Standard stuff */ /* Standard stuff */
NETDEV_CLOCK(clk) CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 1000) // 1000 Hz PARAM(clk.FREQ, 1000) // 1000 Hz
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_PARAM(Solver.ACCURACY, 1e-6) PARAM(Solver.ACCURACY, 1e-6)
/* Wiring up the opamp */ /* Wiring up the opamp */
@ -33,12 +33,12 @@ NETLIST_START(opamp)
/* The opamp model */ /* The opamp model */
NETDEV_VCCS(G1) NETDEV_VCCS(G1)
NETDEV_PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000 PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
NETDEV_R(RP1, 1000) RES(RP1, 1000)
NETDEV_C(CP1, 1.59e-6) // <== change to 1.59e-3 for 10Khz bandwidth CAP(CP1, 1.59e-6) // <== change to 1.59e-3 for 10Khz bandwidth
NETDEV_VCVS(EBUF) NETDEV_VCVS(EBUF)
NETDEV_PARAM(EBUF.RO, 50) PARAM(EBUF.RO, 50)
NETDEV_PARAM(EBUF.G, 1) PARAM(EBUF.G, 1)
NET_ALIAS(PLUS, G1.IP) // Positive input NET_ALIAS(PLUS, G1.IP) // Positive input
NET_ALIAS(MINUS, G1.IN) // Negative input NET_ALIAS(MINUS, G1.IN) // Negative input
@ -55,6 +55,6 @@ NETLIST_START(opamp)
NET_C(CP1.1, RP1.1) NET_C(CP1.1, RP1.1)
NET_C(EBUF.IP, RP1.1) NET_C(EBUF.IP, RP1.1)
//NETDEV_LOG(logX, OUT) //LOG(logX, OUT)
//NETDEV_LOG(logY, 4V) //LOG(logY, 4V)
NETLIST_END() NETLIST_END()

40
nl_examples/test.c
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@ -9,13 +9,13 @@
NETLIST_START(bjt) NETLIST_START(bjt)
/* Standard stuff */ /* Standard stuff */
NETDEV_CLOCK(clk) CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 1000) // 1000 Hz PARAM(clk.FREQ, 1000) // 1000 Hz
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_ANALOG_INPUT(V3, 3) ANALOG_INPUT(V3, 3)
NETDEV_ANALOG_INPUT(STOPG, 0) ANALOG_INPUT(STOPG, 0)
NET_ALIAS(SRSTQ, RYf.2) NET_ALIAS(SRSTQ, RYf.2)
NET_ALIAS(SRST, RYc.2) NET_ALIAS(SRST, RYc.2)
NET_C(antenna, GND) NET_C(antenna, GND)
@ -23,15 +23,15 @@ NETLIST_START(bjt)
TTL_7404_INVERT(e4d, STOPG) TTL_7404_INVERT(e4d, STOPG)
NETDEV_R(RYf, 50) // output impedance RES(RYf, 50) // output impedance
NETDEV_R(RYc, 50) // output impedance RES(RYc, 50) // output impedance
TTL_7404_INVERT(c9f, RYc.2) TTL_7404_INVERT(c9f, RYc.2)
TTL_7404_INVERT(c9c, RYf.2) TTL_7404_INVERT(c9c, RYf.2)
NET_C(c9f.Q, RYf.1) NET_C(c9f.Q, RYf.1)
NET_C(c9c.Q, RYc.1) NET_C(c9c.Q, RYc.1)
NETDEV_SWITCH2(coinsw, RYc.2, RYf.2) SWITCH2(coinsw, RYc.2, RYf.2)
NET_C(coinsw.Q, GND) NET_C(coinsw.Q, GND)
@ -40,8 +40,8 @@ NETLIST_START(bjt)
NETDEV_QNPN(Q3, BC237B) NETDEV_QNPN(Q3, BC237B)
NET_ALIAS(antenna, Q3.B) NET_ALIAS(antenna, Q3.B)
NET_C(GND, Q3.E) NET_C(GND, Q3.E)
NETDEV_R(RX5, 100) RES(RX5, 100)
NETDEV_C(CX1, 100) CAP(CX1, 100)
NET_C(RX5.1, CX1.1) NET_C(RX5.1, CX1.1)
NET_C(RX5.1, Q3.C) NET_C(RX5.1, Q3.C)
NET_C(RX5.2, GND) NET_C(RX5.2, GND)
@ -50,20 +50,20 @@ NETLIST_START(bjt)
NET_C(Q1.B, RX5.1) NET_C(Q1.B, RX5.1)
NET_C(Q1.E, GND) NET_C(Q1.E, GND)
NETDEV_D(D3, 1N914) DIODE(D3, 1N914)
NET_C(D3.A, Q1.C) NET_C(D3.A, Q1.C)
NET_C(D3.K, SRSTQ) NET_C(D3.K, SRSTQ)
NETDEV_D(D2, 1N914) DIODE(D2, 1N914)
NETDEV_R(RX4, 220) RES(RX4, 220)
NET_C(D2.K, e4d.Q) NET_C(D2.K, e4d.Q)
NET_C(D2.A, RX4.1) NET_C(D2.A, RX4.1)
NET_C(RX4.2, Q3.C) NET_C(RX4.2, Q3.C)
NETDEV_R(RX1, 100) RES(RX1, 100)
NETDEV_R(RX2, 100) RES(RX2, 100)
NETDEV_R(RX3, 330) RES(RX3, 330)
NETDEV_C(CX2, CAP_U(0.1)) CAP(CX2, CAP_U(0.1))
NET_C(RX3.2, D3.A) NET_C(RX3.2, D3.A)
NET_C(RX3.1, RX1.2) NET_C(RX3.1, RX1.2)
@ -80,7 +80,7 @@ NETLIST_START(bjt)
NET_C(RX2.1, D2.A) NET_C(RX2.1, D2.A)
//NETDEV_LOG(logB, Q1.B) //LOG(logB, Q1.B)
//NETDEV_LOG(logC, Q1.C) //LOG(logC, Q1.C)
NETLIST_END() NETLIST_END()

64
nl_examples/todo.c
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@ -4,30 +4,30 @@
*/ */
#if 0 #if 0
NETDEV_R(R1, 10) RES(R1, 10)
NETDEV_R(R2, 10) RES(R2, 10)
NETDEV_R(R3, 10) RES(R3, 10)
NET_C(V5,R1.1) NET_C(V5,R1.1)
NET_C(R1.2, R2.1) NET_C(R1.2, R2.1)
NET_C(R2.2, R3.1) NET_C(R2.2, R3.1)
NET_C(R3.2, GND) NET_C(R3.2, GND)
#endif #endif
#if 0 #if 0
NETDEV_R(R4, 1000) RES(R4, 1000)
NETDEV_C(C1, 1e-6) CAP(C1, 1e-6)
NET_C(V5,R4.1) NET_C(V5,R4.1)
NET_C(R4.2, C1.1) NET_C(R4.2, C1.1)
NET_C(C1.2, GND) NET_C(C1.2, GND)
//NETDEV_LOG(log1, C1.1) //LOG(log1, C1.1)
#endif #endif
#if 0 #if 0
NETDEV_R(R5, 1000) RES(R5, 1000)
NETDEV_1N914(D1) NETDEV_1N914(D1)
NET_C(V5, R5.1) NET_C(V5, R5.1)
NET_C(R5.2, D1.A) NET_C(R5.2, D1.A)
NET_C(D1.K, GND) NET_C(D1.K, GND)
//NETDEV_LOG(log1, D1.A) //LOG(log1, D1.A)
#endif #endif
#if 0 #if 0
@ -35,8 +35,8 @@
#if 0 #if 0
NETDEV_VCVS(VV) NETDEV_VCVS(VV)
NETDEV_R(R1, 1000) RES(R1, 1000)
NETDEV_R(R2, 10000) RES(R2, 10000)
NET_C(V5, R1.1) NET_C(V5, R1.1)
NET_C(R1.2, VV.IN) NET_C(R1.2, VV.IN)
@ -44,16 +44,16 @@
NET_C(R2.2, VV.IN) NET_C(R2.2, VV.IN)
NET_C(VV.ON, GND) NET_C(VV.ON, GND)
NET_C(VV.IP, GND) NET_C(VV.IP, GND)
NETDEV_LOG(logX, VV.OP) LOG(logX, VV.OP)
#endif #endif
#if 0 #if 0
NETDEV_VCCS(VV) NETDEV_VCCS(VV)
NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification PARAM(VV.G, 100000) // typical OP-AMP amplification
NETDEV_R(R1, 1000) RES(R1, 1000)
NETDEV_R(R2, 1) RES(R2, 1)
NETDEV_R(R3, 10000) RES(R3, 10000)
NET_C(4V, R1.1) NET_C(4V, R1.1)
NET_C(R1.2, VV.IN) NET_C(R1.2, VV.IN)
@ -63,17 +63,17 @@
NET_C(R2.2, GND) NET_C(R2.2, GND)
NET_C(VV.ON, GND) NET_C(VV.ON, GND)
NET_C(VV.IP, GND) NET_C(VV.IP, GND)
//NETDEV_LOG(logX, VV.OP) //LOG(logX, VV.OP)
//NETDEV_LOG(logY, 4V) //LOG(logY, 4V)
#endif #endif
#if 0 #if 0
NETDEV_VCVS(VV) NETDEV_VCVS(VV)
NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification PARAM(VV.G, 100000) // typical OP-AMP amplification
NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification PARAM(VV.RO, 50) // typical OP-AMP amplification
NETDEV_R(R1, 1000) RES(R1, 1000)
NETDEV_R(R3, 10000) // ==> 10x amplification (inverting) RES(R3, 10000) // ==> 10x amplification (inverting)
NET_C(4V, R1.1) NET_C(4V, R1.1)
NET_C(R1.2, VV.IN) NET_C(R1.2, VV.IN)
@ -81,38 +81,38 @@
NET_C(R3.2, VV.OP) NET_C(R3.2, VV.OP)
NET_C(VV.ON, GND) NET_C(VV.ON, GND)
NET_C(VV.IP, GND) NET_C(VV.IP, GND)
NETDEV_LOG(logX, VV.OP) LOG(logX, VV.OP)
NETDEV_LOG(logY, 4V) LOG(logY, 4V)
#endif #endif
#if 0 #if 0
// Impedance converter with resistor // Impedance converter with resistor
NETDEV_VCVS(VV) NETDEV_VCVS(VV)
NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification PARAM(VV.G, 100000) // typical OP-AMP amplification
NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification PARAM(VV.RO, 50) // typical OP-AMP amplification
NETDEV_R(R3, 10000) RES(R3, 10000)
NET_C(4V, VV.IP) NET_C(4V, VV.IP)
NET_C(R3.1, VV.IN) NET_C(R3.1, VV.IN)
NET_C(R3.2, VV.OP) NET_C(R3.2, VV.OP)
NET_C(VV.ON, GND) NET_C(VV.ON, GND)
NETDEV_LOG(logX, VV.OP) LOG(logX, VV.OP)
NETDEV_LOG(logY, 4V) LOG(logY, 4V)
#endif #endif
#if 0 #if 0
// Impedance converter without resistor // Impedance converter without resistor
NETDEV_VCVS(VV) NETDEV_VCVS(VV)
NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification PARAM(VV.G, 100000) // typical OP-AMP amplification
NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification PARAM(VV.RO, 50) // typical OP-AMP amplification
NET_C(4V, VV.IP) NET_C(4V, VV.IP)
NET_C(VV.IN, VV.OP) NET_C(VV.IN, VV.OP)
NET_C(VV.ON, GND) NET_C(VV.ON, GND)
NETDEV_LOG(logX, VV.OP) LOG(logX, VV.OP)
NETDEV_LOG(logY, 4V) LOG(logY, 4V)
#endif #endif
d d

2
src/emu/machine/netlist.h
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@ -97,7 +97,7 @@
#define NETDEV_SOUND_OUT(_name, _v) \ #define NETDEV_SOUND_OUT(_name, _v) \
NET_REGISTER_DEV(sound, _name) \ NET_REGISTER_DEV(sound, _name) \
NETDEV_PARAM(_name.CHAN, _v) PARAM_name.CHAN, _v)
class netlist_mame_device_t; class netlist_mame_device_t;

4
src/emu/netlist/analog/nld_bjt.h
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@ -13,11 +13,11 @@
// Macros // Macros
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_QBJT_SW(_name, _model) \ #define QBJT_SW(_name, _model) \
NET_REGISTER_DEV(QBJT_switch, _name) \ NET_REGISTER_DEV(QBJT_switch, _name) \
NETDEV_PARAMI(_name, model, _model) NETDEV_PARAMI(_name, model, _model)
#define NETDEV_QBJT_EB(_name, _model) \ #define QBJT_EB(_name, _model) \
NET_REGISTER_DEV(QBJT_EB, _name) \ NET_REGISTER_DEV(QBJT_EB, _name) \
NETDEV_PARAMI(_name, model, _model) NETDEV_PARAMI(_name, model, _model)

2
src/emu/netlist/analog/nld_solver.h
View File

@ -13,7 +13,7 @@
// Macros // Macros
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_SOLVER(_name) \ #define SOLVER(_name) \
NET_REGISTER_DEV(solver, _name) NET_REGISTER_DEV(solver, _name)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------

2
src/emu/netlist/analog/nld_switches.h
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@ -17,7 +17,7 @@
// Macros // Macros
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_SWITCH2(_name, _i1, _i2) \ #define SWITCH2(_name, _i1, _i2) \
NET_REGISTER_DEV(switch2, _name) \ NET_REGISTER_DEV(switch2, _name) \
NET_CONNECT(_name, i1, _i1) \ NET_CONNECT(_name, i1, _i1) \
NET_CONNECT(_name, i2, _i2) NET_CONNECT(_name, i2, _i2)

8
src/emu/netlist/analog/nld_twoterm.h
View File

@ -39,21 +39,21 @@
// Macros // Macros
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_R(_name, _R) \ #define RES(_name, _R) \
NET_REGISTER_DEV(R, _name) \ NET_REGISTER_DEV(R, _name) \
NETDEV_PARAMI(_name, R, _R) NETDEV_PARAMI(_name, R, _R)
#define NETDEV_POT(_name, _R) \ #define POT(_name, _R) \
NET_REGISTER_DEV(POT, _name) \ NET_REGISTER_DEV(POT, _name) \
NETDEV_PARAMI(_name, R, _R) NETDEV_PARAMI(_name, R, _R)
#define NETDEV_C(_name, _C) \ #define CAP(_name, _C) \
NET_REGISTER_DEV(C, _name) \ NET_REGISTER_DEV(C, _name) \
NETDEV_PARAMI(_name, C, _C) NETDEV_PARAMI(_name, C, _C)
/* Generic Diode */ /* Generic Diode */
#define NETDEV_D(_name, _model) \ #define DIODE(_name, _model) \
NET_REGISTER_DEV(D, _name) \ NET_REGISTER_DEV(D, _name) \
NETDEV_PARAMI(_name, model, _model) NETDEV_PARAMI(_name, model, _model)

30
src/emu/netlist/devices/net_lib.c
View File

@ -247,23 +247,23 @@ netlist_factory_t::~netlist_factory_t()
void netlist_factory_t::initialize() void netlist_factory_t::initialize()
{ {
ENTRY(R, NETDEV_R, "R") ENTRY(R, RES, "R")
ENTRY(POT, NETDEV_POT, "R") ENTRY(POT, POT, "R")
ENTRY(C, NETDEV_C, "C") ENTRY(C, CAP, "C")
ENTRY(D, NETDEV_D, "model") ENTRY(D, DIODE, "model")
ENTRY(VCVS, NETDEV_VCVS, "-") ENTRY(VCVS, NETDEV_VCVS, "-")
ENTRY(VCCS, NETDEV_VCCS, "-") ENTRY(VCCS, NETDEV_VCCS, "-")
ENTRY(QBJT_EB, NETDEV_QBJT_EB, "model") ENTRY(QBJT_EB, QBJT_EB, "model")
ENTRY(QBJT_switch, NETDEV_QBJT_SW, "model") ENTRY(QBJT_switch, QBJT_SW, "model")
ENTRY(ttl_input, NETDEV_TTL_INPUT, "IN") ENTRY(ttl_input, TTL_INPUT, "IN")
ENTRY(analog_input, NETDEV_ANALOG_INPUT, "IN") ENTRY(analog_input, ANALOG_INPUT, "IN")
ENTRY(log, NETDEV_LOG, "+I") ENTRY(log, LOG, "+I")
ENTRY(logD, NETDEV_LOGD, "+I,I2") ENTRY(logD, LOGD, "+I,I2")
ENTRY(clock, NETDEV_CLOCK, "-") // FIXME ENTRY(clock, CLOCK, "-") // FIXME
ENTRY(mainclock, NETDEV_MAINCLOCK, "-") // FIXME ENTRY(mainclock, MAINCLOCK, "-") // FIXME
ENTRY(solver, NETDEV_SOLVER, "-") // FIXME ENTRY(solver, SOLVER, "-") // FIXME
ENTRY(gnd, NETDEV_GND, "-") ENTRY(gnd, NETDEV_GND, "-")
ENTRY(switch2, NETDEV_SWITCH2, "+i1,i2") ENTRY(switch2, SWITCH2, "+i1,i2")
ENTRY(nicRSFF, NETDEV_RSFF, "+S,R") ENTRY(nicRSFF, NETDEV_RSFF, "+S,R")
ENTRY(7400, TTL_7400_NAND, "+A,B") ENTRY(7400, TTL_7400_NAND, "+A,B")
ENTRY(7402, TTL_7402_NOR, "+A,B") ENTRY(7402, TTL_7402_NOR, "+A,B")
@ -284,7 +284,7 @@ void netlist_factory_t::initialize()
ENTRY(nic74107A, TTL_74107A, "+CLK,J,K,CLRQ") ENTRY(nic74107A, TTL_74107A, "+CLK,J,K,CLRQ")
ENTRY(nic74153, TTL_74153, "+C0,C1,C2,C3,A,B,G") ENTRY(nic74153, TTL_74153, "+C0,C1,C2,C3,A,B,G")
ENTRY(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D") ENTRY(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D")
ENTRY(NE555, NETDEV_NE555, "-") ENTRY(NE555, NE555, "-")
} }
netlist_device_t *netlist_factory_t::new_device_by_classname(const pstring &classname, netlist_setup_t &setup) const netlist_device_t *netlist_factory_t::new_device_by_classname(const pstring &classname, netlist_setup_t &setup) const

4
src/emu/netlist/devices/nld_log.h
View File

@ -20,7 +20,7 @@
#include "../nl_base.h" #include "../nl_base.h"
#define NETDEV_LOG(_name, _I) \ #define LOG(_name, _I) \
NET_REGISTER_DEV(log, _name) \ NET_REGISTER_DEV(log, _name) \
NET_CONNECT(_name, I, _I) NET_CONNECT(_name, I, _I)
@ -31,7 +31,7 @@ protected:
FILE *m_file; FILE *m_file;
); );
#define NETDEV_LOGD(_name, _I, _I2) \ #define LOGD(_name, _I, _I2) \
NET_REGISTER_DEV(logD, _name) \ NET_REGISTER_DEV(logD, _name) \
NET_CONNECT(_name, I, _I) \ NET_CONNECT(_name, I, _I) \
NET_CONNECT(_name, I2, _I2) NET_CONNECT(_name, I2, _I2)

2
src/emu/netlist/devices/nld_ne555.h
View File

@ -22,7 +22,7 @@
#include "../nl_base.h" #include "../nl_base.h"
#include "../analog/nld_twoterm.h" #include "../analog/nld_twoterm.h"
#define NETDEV_NE555(_name) \ #define NE555(_name) \
NET_REGISTER_DEV(NE555, _name) NET_REGISTER_DEV(NE555, _name)
NETLIB_DEVICE(NE555, NETLIB_DEVICE(NE555,
NETLIB_NAME(R) m_R1; NETLIB_NAME(R) m_R1;

14
src/emu/netlist/devices/nld_system.h
View File

@ -16,18 +16,18 @@
// Macros // Macros
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_TTL_INPUT(_name, _v) \ #define TTL_INPUT(_name, _v) \
NET_REGISTER_DEV(ttl_input, _name) \ NET_REGISTER_DEV(ttl_input, _name) \
NETDEV_PARAM(_name.IN, _v) PARAM(_name.IN, _v)
#define NETDEV_ANALOG_INPUT(_name, _v) \ #define ANALOG_INPUT(_name, _v) \
NET_REGISTER_DEV(analog_input, _name) \ NET_REGISTER_DEV(analog_input, _name) \
NETDEV_PARAM(_name.IN, _v) PARAM(_name.IN, _v)
#define NETDEV_MAINCLOCK(_name) \ #define MAINCLOCK(_name) \
NET_REGISTER_DEV(mainclock, _name) NET_REGISTER_DEV(mainclock, _name)
#define NETDEV_CLOCK(_name) \ #define CLOCK(_name) \
NET_REGISTER_DEV(clock, _name) NET_REGISTER_DEV(clock, _name)
#define NETDEV_GND() \ #define NETDEV_GND() \
@ -155,7 +155,7 @@ protected:
}; };
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// netdev_d_to_a // DIODE_to_a
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
class nld_base_d_to_a_proxy : public netlist_device_t class nld_base_d_to_a_proxy : public netlist_device_t

8
src/emu/netlist/nl_parser.c
View File

@ -48,11 +48,11 @@ void netlist_parser::parse(const char *buf)
if (eof()) break; if (eof()) break;
n = getname('('); n = getname('(');
NL_VERBOSE_OUT(("Parser: Device: %s\n", n.cstr())); NL_VERBOSE_OUT(("Parser: Device: %s\n", n.cstr()));
if (n == "NET_ALIAS") if (n == "ALIAS")
net_alias(); net_alias();
else if (n == "NET_C") else if (n == "NET_C")
net_c(); net_c();
else if (n == "NETDEV_PARAM") else if (n == "PARAM")
netdev_param(); netdev_param();
else if ((n == "NET_MODEL")) else if ((n == "NET_MODEL"))
net_model(); net_model();
@ -61,7 +61,7 @@ void netlist_parser::parse(const char *buf)
else if (n == "NETLIST_END") else if (n == "NETLIST_END")
netdev_netlist_end(); netdev_netlist_end();
else else
netdev_device(n); DIODEevice(n);
} }
} }
@ -125,7 +125,7 @@ void netlist_parser::netdev_param()
check_char(')'); check_char(')');
} }
void netlist_parser::netdev_device(const pstring &dev_type) void netlist_parser::DIODEevice(const pstring &dev_type)
{ {
pstring devname; pstring devname;
net_device_t_base_factory *f = m_setup.factory().factory_by_name(dev_type, m_setup); net_device_t_base_factory *f = m_setup.factory().factory_by_name(dev_type, m_setup);

2
src/emu/netlist/nl_parser.h
View File

@ -21,7 +21,7 @@ public:
void net_alias(); void net_alias();
void netdev_param(); void netdev_param();
void net_c(); void net_c();
void netdev_device(const pstring &dev_type); void DIODEevice(const pstring &dev_type);
void netdev_netlist_start(); void netdev_netlist_start();
void netdev_netlist_end(); void netdev_netlist_end();
void net_model(); void net_model();

4
src/emu/netlist/nl_setup.c
View File

@ -14,8 +14,8 @@
#include "analog/nld_twoterm.h" #include "analog/nld_twoterm.h"
static NETLIST_START(base) static NETLIST_START(base)
NETDEV_TTL_INPUT(ttlhigh, 1) TTL_INPUT(ttlhigh, 1)
NETDEV_TTL_INPUT(ttllow, 0) TTL_INPUT(ttllow, 0)
NETDEV_GND() NETDEV_GND()
NET_MODEL(".model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)") NET_MODEL(".model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")

4
src/emu/netlist/nl_setup.h
View File

@ -21,7 +21,7 @@
#define NET_MODEL(_model) \ #define NET_MODEL(_model) \
netlist.register_model(_model); netlist.register_model(_model);
#define NET_ALIAS(_alias, _name) \ #define ALIAS(_alias, _name) \
netlist.register_alias(# _alias, # _name); netlist.register_alias(# _alias, # _name);
#define NET_NEW(_type) netlist.factory().new_device_by_classname(NETLIB_NAME_STR(_type), netlist) #define NET_NEW(_type) netlist.factory().new_device_by_classname(NETLIB_NAME_STR(_type), netlist)
@ -41,7 +41,7 @@
#define NET_C(_input, _output) \ #define NET_C(_input, _output) \
netlist.register_link(NET_STR(_input) , NET_STR(_output)); netlist.register_link(NET_STR(_input) , NET_STR(_output));
#define NETDEV_PARAM(_name, _val) \ #define PARAM(_name, _val) \
netlist.register_param(# _name, _val); netlist.register_param(# _name, _val);
#define NETDEV_PARAMI(_name, _param, _val) \ #define NETDEV_PARAMI(_name, _param, _val) \

294
src/mame/drivers/pong.c
View File

@ -84,100 +84,100 @@ enum input_changed_enum
}; };
static NETLIST_START(pong_schematics) static NETLIST_START(pong_schematics)
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
NETDEV_PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient
NETDEV_ANALOG_INPUT(V5, 5) ANALOG_INPUT(V5, 5)
NETDEV_TTL_INPUT(high, 1) TTL_INPUT(high, 1)
NETDEV_TTL_INPUT(low, 0) TTL_INPUT(low, 0)
#if 1 #if 1
#if 0 #if 0
/* this is the clock circuit in schematics. */ /* this is the clock circuit in schematics. */
NETDEV_MAINCLOCK(xclk) MAINCLOCK(xclk)
//NETDEV_CLOCK(clk) //CLOCK(clk)
NETDEV_PARAM(xclk.FREQ, 7159000.0*2) PARAM(xclk.FREQ, 7159000.0*2)
TTL_74107(ic_f6a, xclk, high, high, high) TTL_74107(ic_f6a, xclk, high, high, high)
NET_ALIAS(clk, ic_f6a.Q) ALIAS(clk, ic_f6a.Q)
#else #else
/* abstracting this, performance increases by 40% /* abstracting this, performance increases by 40%
* No surprise, the clock is extremely expensive */ * No surprise, the clock is extremely expensive */
NETDEV_MAINCLOCK(clk) MAINCLOCK(clk)
//NETDEV_CLOCK(clk) //CLOCK(clk)
NETDEV_PARAM(clk.FREQ, 7159000.0) PARAM(clk.FREQ, 7159000.0)
#endif #endif
#else #else
// benchmarking ... // benchmarking ...
NETDEV_TTL_CONST(clk, 0) NETDEV_TTL_CONST(clk, 0)
NETDEV_MAINCLOCK(xclk) MAINCLOCK(xclk)
NETDEV_PARAM(xclk.FREQ, 7159000.0*2) PARAM(xclk.FREQ, 7159000.0*2)
#endif #endif
/* 3V Logic - Just a resistor - the value is not given in schematics */ /* 3V Logic - Just a resistor - the value is not given in schematics */
NETDEV_R(R3V, 50) // Works ... RES(R3V, 50) // Works ...
NET_C(R3V.1, V5) NET_C(R3V.1, V5)
NET_ALIAS(V3, R3V.2) ALIAS(V3, R3V.2)
/* Coin, antenna and startup circuit */ /* Coin, antenna and startup circuit */
NETDEV_ANALOG_INPUT(STOPG, 0) ANALOG_INPUT(STOPG, 0)
NET_ALIAS(SRSTQ, RYf.2) ALIAS(SRSTQ, RYf.2)
NET_ALIAS(SRST, RYc.2) ALIAS(SRST, RYc.2)
/* SRSTQ has a diode to +3V to protect against overvoltage - omitted */ /* SRSTQ has a diode to +3V to protect against overvoltage - omitted */
NETDEV_TTL_INPUT(antenna, 0) TTL_INPUT(antenna, 0)
NET_ALIAS(runQ, Q1.C) ALIAS(runQ, Q1.C)
TTL_7404_INVERT(e4d, STOPG) TTL_7404_INVERT(e4d, STOPG)
NETDEV_R(RYf, 50) // output impedance RES(RYf, 50) // output impedance
NETDEV_R(RYc, 50) // output impedance RES(RYc, 50) // output impedance
TTL_7404_INVERT(c9f, RYc.2) TTL_7404_INVERT(c9f, RYc.2)
TTL_7404_INVERT(c9c, RYf.2) TTL_7404_INVERT(c9c, RYf.2)
NET_C(c9f.Q, RYf.1) NET_C(c9f.Q, RYf.1)
NET_C(c9c.Q, RYc.1) NET_C(c9c.Q, RYc.1)
NETDEV_SWITCH2(coinsw, RYc.2, RYf.2) SWITCH2(coinsw, RYc.2, RYf.2)
NET_C(coinsw.Q, GND) NET_C(coinsw.Q, GND)
/* Antenna circuit */ /* Antenna circuit */
/* Has a diode to clamp negative voltages - omitted here */ /* Has a diode to clamp negative voltages - omitted here */
NETDEV_QBJT_SW(Q3, "BC237B") QBJT_SW(Q3, "BC237B")
NET_C(antenna, Q3.B) NET_C(antenna, Q3.B)
NET_C(GND, Q3.E) NET_C(GND, Q3.E)
NETDEV_R(RX5, 100) RES(RX5, 100)
NETDEV_C(CX1, CAP_U(0.1)) CAP(CX1, CAP_U(0.1))
NET_C(RX5.1, CX1.1) NET_C(RX5.1, CX1.1)
NET_C(RX5.1, Q3.C) NET_C(RX5.1, Q3.C)
NET_C(RX5.2, GND) NET_C(RX5.2, GND)
NET_C(CX1.2, GND) NET_C(CX1.2, GND)
NETDEV_QBJT_SW(Q1, "BC237B") QBJT_SW(Q1, "BC237B")
NET_C(Q1.B, RX5.1) NET_C(Q1.B, RX5.1)
NET_C(Q1.E, GND) NET_C(Q1.E, GND)
NETDEV_D(D3, "1N914") DIODE(D3, "1N914")
NET_C(D3.A, Q1.C) NET_C(D3.A, Q1.C)
NET_C(D3.K, SRSTQ) NET_C(D3.K, SRSTQ)
NETDEV_D(D2, "1N914") DIODE(D2, "1N914")
NETDEV_R(RX4, 220) RES(RX4, 220)
NET_C(D2.K, e4d.Q) NET_C(D2.K, e4d.Q)
NET_C(D2.A, RX4.1) NET_C(D2.A, RX4.1)
NET_C(RX4.2, Q3.C) NET_C(RX4.2, Q3.C)
NETDEV_R(RX1, 100) RES(RX1, 100)
NETDEV_R(RX2, 100) RES(RX2, 100)
NETDEV_R(RX3, 330) RES(RX3, 330)
NETDEV_C(CX2, CAP_U(0.1)) CAP(CX2, CAP_U(0.1))
NET_C(RX3.2, D3.A) NET_C(RX3.2, D3.A)
NET_C(RX3.1, RX1.2) NET_C(RX3.1, RX1.2)
@ -186,7 +186,7 @@ static NETLIST_START(pong_schematics)
NET_C(RX1.1, CX2.1) NET_C(RX1.1, CX2.1)
NET_C(RX1.2, CX2.2) NET_C(RX1.2, CX2.2)
NETDEV_QBJT_SW(Q2, "BC556B") QBJT_SW(Q2, "BC556B")
NET_C(Q2.E, V3) NET_C(Q2.E, V3)
NET_C(Q2.B, RX1.2) NET_C(Q2.B, RX1.2)
NET_C(Q2.C, RX2.2) NET_C(Q2.C, RX2.2)
@ -202,28 +202,28 @@ static NETLIST_START(pong_schematics)
TTL_7404_INVERT(attract, attractQ) TTL_7404_INVERT(attract, attractQ)
TTL_7420_NAND(ic_h6a, hvidQ, hvidQ, hvidQ, hvidQ) TTL_7420_NAND(ic_h6a, hvidQ, hvidQ, hvidQ, hvidQ)
NET_ALIAS(hvid, ic_h6a.Q) ALIAS(hvid, ic_h6a.Q)
TTL_7400_NAND(ic_e6c, hvid, hblank) TTL_7400_NAND(ic_e6c, hvid, hblank)
NET_ALIAS(MissQ, ic_e6c.Q) ALIAS(MissQ, ic_e6c.Q)
TTL_7404_INVERT(ic_d1e, MissQ) TTL_7404_INVERT(ic_d1e, MissQ)
TTL_7400_NAND(ic_e1a, ic_d1e.Q, attractQ) TTL_7400_NAND(ic_e1a, ic_d1e.Q, attractQ)
NET_ALIAS(Missed, ic_e1a.Q) ALIAS(Missed, ic_e1a.Q)
TTL_7400_NAND(rstspeed, SRSTQ, MissQ) TTL_7400_NAND(rstspeed, SRSTQ, MissQ)
TTL_7400_NAND(StopG, StopG1Q, StopG2Q) TTL_7400_NAND(StopG, StopG1Q, StopG2Q)
NET_ALIAS(L, ic_h3b.Q) ALIAS(L, ic_h3b.Q)
NET_ALIAS(R, ic_h3b.QQ) ALIAS(R, ic_h3b.QQ)
TTL_7400_NAND(hit1Q, pad1, ic_g1b.Q) TTL_7400_NAND(hit1Q, pad1, ic_g1b.Q)
TTL_7400_NAND(hit2Q, pad2, ic_g1b.Q) TTL_7400_NAND(hit2Q, pad2, ic_g1b.Q)
TTL_7400_NAND(ic_g3c, 128H, ic_h3a.QQ) TTL_7400_NAND(ic_g3c, 128H, ic_h3a.QQ)
TTL_7427_NOR(ic_g2c, ic_g3c.Q, 256H, vpad1Q) TTL_7427_NOR(ic_g2c, ic_g3c.Q, 256H, vpad1Q)
NET_ALIAS(pad1, ic_g2c.Q) ALIAS(pad1, ic_g2c.Q)
TTL_7427_NOR(ic_g2a, ic_g3c.Q, 256HQ, vpad2Q) TTL_7427_NOR(ic_g2a, ic_g3c.Q, 256HQ, vpad2Q)
NET_ALIAS(pad2, ic_g2a.Q) ALIAS(pad2, ic_g2a.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// horizontal counter // horizontal counter
@ -234,16 +234,16 @@ static NETLIST_START(pong_schematics)
TTL_7430_NAND(ic_f7, ic_f8.QB, ic_f8.QC, ic_f9.QC, ic_f9.QD, ic_f6b.Q, high, high, high) TTL_7430_NAND(ic_f7, ic_f8.QB, ic_f8.QC, ic_f9.QC, ic_f9.QD, ic_f6b.Q, high, high, high)
TTL_7474(ic_e7b, clk, ic_f7, high, high) TTL_7474(ic_e7b, clk, ic_f7, high, high)
NET_ALIAS(hreset, ic_e7b.QQ) ALIAS(hreset, ic_e7b.QQ)
NET_ALIAS(hresetQ, ic_e7b.Q) ALIAS(hresetQ, ic_e7b.Q)
NET_ALIAS( 4H, ic_f8.QC) ALIAS( 4H, ic_f8.QC)
NET_ALIAS( 8H, ic_f8.QD) ALIAS( 8H, ic_f8.QD)
NET_ALIAS( 16H, ic_f9.QA) ALIAS( 16H, ic_f9.QA)
NET_ALIAS( 32H, ic_f9.QB) ALIAS( 32H, ic_f9.QB)
NET_ALIAS( 64H, ic_f9.QC) ALIAS( 64H, ic_f9.QC)
NET_ALIAS(128H, ic_f9.QD) ALIAS(128H, ic_f9.QD)
NET_ALIAS(256H, ic_f6b.Q) ALIAS(256H, ic_f6b.Q)
NET_ALIAS(256HQ, ic_f6b.QQ) ALIAS(256HQ, ic_f6b.QQ)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// vertical counter // vertical counter
@ -254,15 +254,15 @@ static NETLIST_START(pong_schematics)
TTL_7474(ic_e7a, hreset, e7a_data, high, high) TTL_7474(ic_e7a, hreset, e7a_data, high, high)
TTL_7410_NAND(e7a_data, ic_e8.QA, ic_e8.QC, ic_d9b.Q) TTL_7410_NAND(e7a_data, ic_e8.QA, ic_e8.QC, ic_d9b.Q)
NET_ALIAS(vreset, ic_e7a.QQ) ALIAS(vreset, ic_e7a.QQ)
NET_ALIAS( 4V, ic_e8.QC) ALIAS( 4V, ic_e8.QC)
NET_ALIAS( 8V, ic_e8.QD) ALIAS( 8V, ic_e8.QD)
NET_ALIAS( 16V, ic_e9.QA) ALIAS( 16V, ic_e9.QA)
NET_ALIAS( 32V, ic_e9.QB) ALIAS( 32V, ic_e9.QB)
NET_ALIAS( 64V, ic_e9.QC) ALIAS( 64V, ic_e9.QC)
NET_ALIAS(128V, ic_e9.QD) ALIAS(128V, ic_e9.QD)
NET_ALIAS(256V, ic_d9b.Q) ALIAS(256V, ic_d9b.Q)
NET_ALIAS(256VQ, ic_d9b.QQ) ALIAS(256VQ, ic_d9b.QQ)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
@ -275,8 +275,8 @@ static NETLIST_START(pong_schematics)
TTL_7400_NAND(ic_h5c, ic_h5b.Q, hresetQ) TTL_7400_NAND(ic_h5c, ic_h5b.Q, hresetQ)
TTL_7400_NAND(ic_h5b, ic_h5c.Q, ic_g5b.Q) TTL_7400_NAND(ic_h5b, ic_h5c.Q, ic_g5b.Q)
NET_ALIAS(hblank, ic_h5c.Q) ALIAS(hblank, ic_h5c.Q)
NET_ALIAS(hblankQ, ic_h5b.Q) ALIAS(hblankQ, ic_h5b.Q)
TTL_7400_NAND(hsyncQ, hblank, 32H) TTL_7400_NAND(hsyncQ, hblank, 32H)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
@ -285,12 +285,12 @@ static NETLIST_START(pong_schematics)
TTL_7402_NOR(ic_f5c, ic_f5d.Q, vreset) TTL_7402_NOR(ic_f5c, ic_f5d.Q, vreset)
TTL_7402_NOR(ic_f5d, ic_f5c.Q, 16V) TTL_7402_NOR(ic_f5d, ic_f5c.Q, 16V)
NET_ALIAS(vblank, ic_f5d.Q) ALIAS(vblank, ic_f5d.Q)
NET_ALIAS(vblankQ, ic_f5c.Q) ALIAS(vblankQ, ic_f5c.Q)
TTL_7400_NAND(ic_h5a, 8V, 8V) TTL_7400_NAND(ic_h5a, 8V, 8V)
TTL_7410_NAND(ic_g5a, vblank, 4V, ic_h5a.Q) TTL_7410_NAND(ic_g5a, vblank, 4V, ic_h5a.Q)
NET_ALIAS(vsyncQ, ic_g5a.Q) ALIAS(vsyncQ, ic_g5a.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// move logic // move logic
@ -312,7 +312,7 @@ static NETLIST_START(pong_schematics)
TTL_74107(ic_h2b, ic_g1c.Q, high, move, ic_h1c.Q) TTL_74107(ic_h2b, ic_g1c.Q, high, move, ic_h1c.Q)
TTL_7400_NAND(ic_h4a, ic_h2b.Q, ic_h2a.Q) TTL_7400_NAND(ic_h4a, ic_h2b.Q, ic_h2a.Q)
NET_ALIAS(move, ic_h4a.Q) ALIAS(move, ic_h4a.Q)
TTL_7400_NAND(ic_c1d, SC, attract) TTL_7400_NAND(ic_c1d, SC, attract)
TTL_7404_INVERT(ic_d1a, ic_c1d.Q) TTL_7404_INVERT(ic_d1a, ic_c1d.Q)
@ -321,8 +321,8 @@ static NETLIST_START(pong_schematics)
TTL_7400_NAND(ic_h4d, ic_h3b.Q, move) TTL_7400_NAND(ic_h4d, ic_h3b.Q, move)
TTL_7400_NAND(ic_h4b, ic_h3b.QQ, move) TTL_7400_NAND(ic_h4b, ic_h3b.QQ, move)
TTL_7400_NAND(ic_h4c, ic_h4d.Q, ic_h4b.Q) TTL_7400_NAND(ic_h4c, ic_h4d.Q, ic_h4b.Q)
NET_ALIAS(Aa, ic_h4c.Q) ALIAS(Aa, ic_h4c.Q)
NET_ALIAS(Ba, ic_h4b.Q) ALIAS(Ba, ic_h4b.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// hvid circuit // hvid circuit
@ -335,7 +335,7 @@ static NETLIST_START(pong_schematics)
TTL_74107(ic_g6b, ic_h7.RC, high, high, hball_resetQ) TTL_74107(ic_g6b, ic_h7.RC, high, high, hball_resetQ)
TTL_7410_NAND(ic_g5c, ic_g6b.Q, ic_h7.RC, ic_g7.RC) TTL_7410_NAND(ic_g5c, ic_g6b.Q, ic_h7.RC, ic_g7.RC)
TTL_7420_NAND(ic_h6b, ic_g6b.Q, ic_h7.RC, ic_g7.QC, ic_g7.QD) TTL_7420_NAND(ic_h6b, ic_g6b.Q, ic_h7.RC, ic_g7.QC, ic_g7.QD)
NET_ALIAS(hvidQ, ic_h6b.Q) ALIAS(hvidQ, ic_h6b.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// vvid circuit // vvid circuit
@ -345,11 +345,11 @@ static NETLIST_START(pong_schematics)
TTL_9316(ic_a3, hsyncQ, ic_b3.RC, high, high, ic_b2b.Q, low, low, low, low) TTL_9316(ic_a3, hsyncQ, ic_b3.RC, high, high, ic_b2b.Q, low, low, low, low)
TTL_7400_NAND(ic_b2b, ic_a3.RC, ic_b3.RC) TTL_7400_NAND(ic_b2b, ic_a3.RC, ic_b3.RC)
TTL_7410_NAND(ic_e2b, ic_a3.RC, ic_b3.QC, ic_b3.QD) TTL_7410_NAND(ic_e2b, ic_a3.RC, ic_b3.QC, ic_b3.QD)
NET_ALIAS(vvidQ, ic_e2b.Q) ALIAS(vvidQ, ic_e2b.Q)
TTL_7404_INVERT(vvid, vvidQ) // D2D TTL_7404_INVERT(vvid, vvidQ) // D2D
NET_ALIAS(vpos256, ic_a3.RC) ALIAS(vpos256, ic_a3.RC)
NET_ALIAS(vpos32, ic_a3.QB) ALIAS(vpos32, ic_a3.QB)
NET_ALIAS(vpos16, ic_a3.QA) ALIAS(vpos16, ic_a3.QA)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// vball ctrl circuit // vball ctrl circuit
@ -372,10 +372,10 @@ static NETLIST_START(pong_schematics)
TTL_7404_INVERT(ic_c4a, ic_b6a) TTL_7404_INVERT(ic_c4a, ic_b6a)
TTL_7483(ic_b4, ic_a4c, ic_a4b, ic_b6a, low, ic_c4a, high, high, low, low) TTL_7483(ic_b4, ic_a4c, ic_a4b, ic_b6a, low, ic_c4a, high, high, low, low)
NET_ALIAS(a6, ic_b4.SA) ALIAS(a6, ic_b4.SA)
NET_ALIAS(b6, ic_b4.SB) ALIAS(b6, ic_b4.SB)
NET_ALIAS(c6, ic_b4.SC) ALIAS(c6, ic_b4.SC)
NET_ALIAS(d6, ic_b4.SD) ALIAS(d6, ic_b4.SD)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// serve monoflop // serve monoflop
@ -383,9 +383,9 @@ static NETLIST_START(pong_schematics)
TTL_7404_INVERT(f4_trig, rstspeed) TTL_7404_INVERT(f4_trig, rstspeed)
NETDEV_R(ic_f4_serve_R, RES_K(330)) RES(ic_f4_serve_R, RES_K(330))
NETDEV_C(ic_f4_serve_C, CAP_U(4.7)) CAP(ic_f4_serve_C, CAP_U(4.7))
NETDEV_NE555(ic_f4_serve) NE555(ic_f4_serve)
NET_C(ic_f4_serve.VCC, V5) NET_C(ic_f4_serve.VCC, V5)
NET_C(ic_f4_serve.GND, GND) NET_C(ic_f4_serve.GND, GND)
@ -400,8 +400,8 @@ static NETLIST_START(pong_schematics)
TTL_7427_NOR(ic_e5a, ic_f4_serve.OUT, StopG, runQ) TTL_7427_NOR(ic_e5a, ic_f4_serve.OUT, StopG, runQ)
TTL_7474(ic_b5b_serve, pad1, ic_e5a, ic_e5a, high) TTL_7474(ic_b5b_serve, pad1, ic_e5a, ic_e5a, high)
NET_ALIAS(Serve, ic_b5b_serve.QQ) ALIAS(Serve, ic_b5b_serve.QQ)
NET_ALIAS(ServeQ, ic_b5b_serve.Q) ALIAS(ServeQ, ic_b5b_serve.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// score logic // score logic
@ -419,10 +419,10 @@ static NETLIST_START(pong_schematics)
// monoflop with NE555 determines duration of score sound // monoflop with NE555 determines duration of score sound
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
NETDEV_R(ic_g4_R, RES_K(220)) RES(ic_g4_R, RES_K(220))
NETDEV_C(ic_g4_C, CAP_U(1)) CAP(ic_g4_C, CAP_U(1))
NETDEV_NE555(ic_g4_sc) NE555(ic_g4_sc)
NET_ALIAS(SC, ic_g4_sc.OUT) ALIAS(SC, ic_g4_sc.OUT)
NET_C(ic_g4_sc.VCC, V5) NET_C(ic_g4_sc.VCC, V5)
NET_C(ic_g4_sc.GND, GND) NET_C(ic_g4_sc.GND, GND)
@ -434,33 +434,33 @@ static NETLIST_START(pong_schematics)
NET_C(ic_g4_R.2, ic_g4_C.1) NET_C(ic_g4_R.2, ic_g4_C.1)
NET_C(GND, ic_g4_C.2) NET_C(GND, ic_g4_C.2)
NET_ALIAS(hit_sound_en, ic_c2a.QQ) ALIAS(hit_sound_en, ic_c2a.QQ)
TTL_7400_NAND(hit_sound, hit_sound_en, vpos16) TTL_7400_NAND(hit_sound, hit_sound_en, vpos16)
TTL_7400_NAND(score_sound, SC, vpos32) TTL_7400_NAND(score_sound, SC, vpos32)
TTL_7400_NAND(topbothitsound, ic_f3_topbot.Q, vpos32) TTL_7400_NAND(topbothitsound, ic_f3_topbot.Q, vpos32)
TTL_7410_NAND(ic_c4b, topbothitsound, hit_sound, score_sound) TTL_7410_NAND(ic_c4b, topbothitsound, hit_sound, score_sound)
TTL_7400_NAND(ic_c1b, ic_c4b.Q, attractQ) TTL_7400_NAND(ic_c1b, ic_c4b.Q, attractQ)
NET_ALIAS(sound, ic_c1b.Q) ALIAS(sound, ic_c1b.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// paddle1 logic 1 // paddle1 logic 1
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
NETDEV_POT(ic_b9_POT, RES_K(1)) // This is a guess!! POT(ic_b9_POT, RES_K(1)) // This is a guess!!
NETDEV_PARAM(ic_b9_POT.DIALLOG, 1) // Log Dial ... PARAM(ic_b9_POT.DIALLOG, 1) // Log Dial ...
NETDEV_R(ic_b9_RPRE, 470) RES(ic_b9_RPRE, 470)
NET_C(ic_b9_POT.1, V5) NET_C(ic_b9_POT.1, V5)
NET_C(ic_b9_POT.3, GND) NET_C(ic_b9_POT.3, GND)
NET_C(ic_b9_POT.2, ic_b9_RPRE.1) NET_C(ic_b9_POT.2, ic_b9_RPRE.1)
NET_C(ic_b9_RPRE.2, ic_b9.CONT) NET_C(ic_b9_RPRE.2, ic_b9.CONT)
NETDEV_R(ic_b9_R, RES_K(81)) // Adjustment pot RES(ic_b9_R, RES_K(81)) // Adjustment pot
NETDEV_C(ic_b9_C, CAP_U(.1)) CAP(ic_b9_C, CAP_U(.1))
NETDEV_D(ic_b9_D, "1N914") DIODE(ic_b9_D, "1N914")
NETDEV_NE555(ic_b9) NE555(ic_b9)
NET_C(ic_b9.VCC, V5) NET_C(ic_b9.VCC, V5)
NET_C(ic_b9.GND, GND) NET_C(ic_b9.GND, GND)
@ -478,29 +478,29 @@ static NETLIST_START(pong_schematics)
TTL_7493(ic_b8, ic_b7b.Q, ic_b8.QA, ic_b9.OUT, ic_b9.OUT) TTL_7493(ic_b8, ic_b7b.Q, ic_b8.QA, ic_b9.OUT, ic_b9.OUT)
TTL_7400_NAND(ic_b7a, ic_c9b.Q, ic_a7b.Q) TTL_7400_NAND(ic_b7a, ic_c9b.Q, ic_a7b.Q)
TTL_7420_NAND(ic_a7b, ic_b8.QA, ic_b8.QB, ic_b8.QC, ic_b8.QD) TTL_7420_NAND(ic_a7b, ic_b8.QA, ic_b8.QB, ic_b8.QC, ic_b8.QD)
NET_ALIAS(vpad1Q, ic_b7a.Q) ALIAS(vpad1Q, ic_b7a.Q)
NET_ALIAS(b1, ic_b8.QB) ALIAS(b1, ic_b8.QB)
NET_ALIAS(c1, ic_b8.QC) ALIAS(c1, ic_b8.QC)
NET_ALIAS(d1, ic_b8.QD) ALIAS(d1, ic_b8.QD)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// paddle1 logic 2 // paddle1 logic 2
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
NETDEV_POT(ic_a9_POT, RES_K(1)) // This is a guess!! POT(ic_a9_POT, RES_K(1)) // This is a guess!!
NETDEV_PARAM(ic_a9_POT.DIALLOG, 1) // Log Dial ... PARAM(ic_a9_POT.DIALLOG, 1) // Log Dial ...
NETDEV_R(ic_a9_RPRE, 470) RES(ic_a9_RPRE, 470)
NET_C(ic_a9_POT.1, V5) NET_C(ic_a9_POT.1, V5)
NET_C(ic_a9_POT.3, GND) NET_C(ic_a9_POT.3, GND)
NET_C(ic_a9_POT.2, ic_a9_RPRE.1) NET_C(ic_a9_POT.2, ic_a9_RPRE.1)
NET_C(ic_a9_RPRE.2, ic_a9.CONT) NET_C(ic_a9_RPRE.2, ic_a9.CONT)
NETDEV_R(ic_a9_R, RES_K(81)) // Adjustment pot RES(ic_a9_R, RES_K(81)) // Adjustment pot
NETDEV_C(ic_a9_C, CAP_U(.1)) CAP(ic_a9_C, CAP_U(.1))
NETDEV_D(ic_a9_D, "1N914") DIODE(ic_a9_D, "1N914")
NETDEV_NE555(ic_a9) NE555(ic_a9)
NET_C(ic_a9.VCC, V5) NET_C(ic_a9.VCC, V5)
NET_C(ic_a9.GND, GND) NET_C(ic_a9.GND, GND)
@ -518,11 +518,11 @@ static NETLIST_START(pong_schematics)
TTL_7493(ic_a8, ic_b7c.Q, ic_a8.QA, ic_a9.OUT, ic_a9.OUT) TTL_7493(ic_a8, ic_b7c.Q, ic_a8.QA, ic_a9.OUT, ic_a9.OUT)
TTL_7400_NAND(ic_b7d, ic_c9a.Q, ic_a7a.Q) TTL_7400_NAND(ic_b7d, ic_c9a.Q, ic_a7a.Q)
TTL_7420_NAND(ic_a7a, ic_a8.QA, ic_a8.QB, ic_a8.QC, ic_a8.QD) TTL_7420_NAND(ic_a7a, ic_a8.QA, ic_a8.QB, ic_a8.QC, ic_a8.QD)
NET_ALIAS(vpad2Q, ic_b7d.Q) ALIAS(vpad2Q, ic_b7d.Q)
NET_ALIAS(b2, ic_a8.QB) ALIAS(b2, ic_a8.QB)
NET_ALIAS(c2, ic_a8.QC) ALIAS(c2, ic_a8.QC)
NET_ALIAS(d2, ic_a8.QD) ALIAS(d2, ic_a8.QD)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// C5-EN Logic // C5-EN Logic
@ -535,7 +535,7 @@ static NETLIST_START(pong_schematics)
TTL_7402_NOR(ic_d2c, ic_e3c.Q, ic_e3b.Q) TTL_7402_NOR(ic_d2c, ic_e3c.Q, ic_e3b.Q)
TTL_7404_INVERT(ic_g1a, 32V) TTL_7404_INVERT(ic_g1a, 32V)
TTL_7425_NOR(ic_f2a, ic_g1a.Q, 64V, 128V, ic_d2c.Q) TTL_7425_NOR(ic_f2a, ic_g1a.Q, 64V, 128V, ic_d2c.Q)
NET_ALIAS(c5_en, ic_f2a.Q) ALIAS(c5_en, ic_f2a.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// Score logic ... // Score logic ...
@ -544,32 +544,32 @@ static NETLIST_START(pong_schematics)
TTL_7402_NOR(ic_f5b, L, Missed) TTL_7402_NOR(ic_f5b, L, Missed)
TTL_7490(ic_c7, ic_f5b, SRST, SRST, low, low) TTL_7490(ic_c7, ic_f5b, SRST, SRST, low, low)
TTL_74107(ic_c8a, ic_c7.QD, high, high, SRSTQ) TTL_74107(ic_c8a, ic_c7.QD, high, high, SRSTQ)
NETDEV_SWITCH2(sw1a, high, ic_c7.QC) SWITCH2(sw1a, high, ic_c7.QC)
NETDEV_PARAM(sw1a.POS, 0) PARAM(sw1a.POS, 0)
TTL_7410_NAND(ic_d8a, ic_c7.QA, sw1a.Q, ic_c8a.Q) // would be nand2 for 11 instead of 15 points, need a switch dev! TTL_7410_NAND(ic_d8a, ic_c7.QA, sw1a.Q, ic_c8a.Q) // would be nand2 for 11 instead of 15 points, need a switch dev!
NET_ALIAS(StopG1Q, ic_d8a.Q) ALIAS(StopG1Q, ic_d8a.Q)
NET_ALIAS(score1_1, ic_c7.QA) ALIAS(score1_1, ic_c7.QA)
NET_ALIAS(score1_2, ic_c7.QB) ALIAS(score1_2, ic_c7.QB)
NET_ALIAS(score1_4, ic_c7.QC) ALIAS(score1_4, ic_c7.QC)
NET_ALIAS(score1_8, ic_c7.QD) ALIAS(score1_8, ic_c7.QD)
NET_ALIAS(score1_10, ic_c8a.Q) ALIAS(score1_10, ic_c8a.Q)
NET_ALIAS(score1_10Q, ic_c8a.QQ) ALIAS(score1_10Q, ic_c8a.QQ)
TTL_7402_NOR(ic_f5a, R, Missed) TTL_7402_NOR(ic_f5a, R, Missed)
TTL_7490(ic_d7, ic_f5a, SRST, SRST, low, low) TTL_7490(ic_d7, ic_f5a, SRST, SRST, low, low)
TTL_74107(ic_c8b, ic_d7.QD, high, high, SRSTQ) TTL_74107(ic_c8b, ic_d7.QD, high, high, SRSTQ)
NETDEV_SWITCH2(sw1b, high, ic_d7.QC) SWITCH2(sw1b, high, ic_d7.QC)
NETDEV_PARAM(sw1b.POS, 0) PARAM(sw1b.POS, 0)
TTL_7410_NAND(ic_d8b, ic_d7.QA, sw1b.Q, ic_c8b.Q) // would be nand2 for 11 instead of 15 points, need a switch dev! TTL_7410_NAND(ic_d8b, ic_d7.QA, sw1b.Q, ic_c8b.Q) // would be nand2 for 11 instead of 15 points, need a switch dev!
NET_ALIAS(StopG2Q, ic_d8b.Q) ALIAS(StopG2Q, ic_d8b.Q)
NET_ALIAS(score2_1, ic_d7.QA) ALIAS(score2_1, ic_d7.QA)
NET_ALIAS(score2_2, ic_d7.QB) ALIAS(score2_2, ic_d7.QB)
NET_ALIAS(score2_4, ic_d7.QC) ALIAS(score2_4, ic_d7.QC)
NET_ALIAS(score2_8, ic_d7.QD) ALIAS(score2_8, ic_d7.QD)
NET_ALIAS(score2_10, ic_c8b.Q) ALIAS(score2_10, ic_c8b.Q)
NET_ALIAS(score2_10Q, ic_c8b.QQ) ALIAS(score2_10Q, ic_c8b.QQ)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// Score display // Score display
@ -585,19 +585,19 @@ static NETLIST_START(pong_schematics)
TTL_7404_INVERT(ic_e4b, 16H) TTL_7404_INVERT(ic_e4b, 16H)
TTL_7427_NOR(ic_e5c, ic_e4b.Q, 8H, 4H) TTL_7427_NOR(ic_e5c, ic_e4b.Q, 8H, 4H)
NET_ALIAS(scoreFE, ic_e5c.Q) ALIAS(scoreFE, ic_e5c.Q)
TTL_7400_NAND(ic_c3d, 8H, 4H) TTL_7400_NAND(ic_c3d, 8H, 4H)
//TTL_7400_NAND(ic_c3d, 4H, 8H) //TTL_7400_NAND(ic_c3d, 4H, 8H)
TTL_7402_NOR(ic_d2b, ic_e4b.Q, ic_c3d.Q) TTL_7402_NOR(ic_d2b, ic_e4b.Q, ic_c3d.Q)
NET_ALIAS(scoreBC, ic_d2b.Q) ALIAS(scoreBC, ic_d2b.Q)
TTL_7427_NOR(ic_e5b, ic_e4b.Q, 8V, 4V) TTL_7427_NOR(ic_e5b, ic_e4b.Q, 8V, 4V)
NET_ALIAS(scoreA, ic_e5b.Q) ALIAS(scoreA, ic_e5b.Q)
TTL_7410_NAND(ic_e2a, 16H, 8V, 4V) TTL_7410_NAND(ic_e2a, 16H, 8V, 4V)
TTL_7404_INVERT(ic_e4a, ic_e2a.Q) TTL_7404_INVERT(ic_e4a, ic_e2a.Q)
NET_ALIAS(scoreGD, ic_e4a.Q) ALIAS(scoreGD, ic_e4a.Q)
TTL_7404_INVERT(ic_e4c, 16V) TTL_7404_INVERT(ic_e4c, 16V)
@ -610,13 +610,13 @@ static NETLIST_START(pong_schematics)
TTL_7410_NAND(ic_d5b, 16V, ic_c5.d, scoreGD) TTL_7410_NAND(ic_d5b, 16V, ic_c5.d, scoreGD)
TTL_7430_NAND(ic_d3, ic_d4a, ic_d5c, ic_c4c, ic_d5a, ic_d4c, ic_d4b, ic_d5b, high) TTL_7430_NAND(ic_d3, ic_d4a, ic_d5c, ic_c4c, ic_d5a, ic_d4c, ic_d4b, ic_d5b, high)
NET_ALIAS(score, ic_d3.Q) //FIXME ALIAS(score, ic_d3.Q) //FIXME
// net // net
TTL_74107(ic_f3b, clk, 256H, 256HQ, high) TTL_74107(ic_f3b, clk, 256H, 256HQ, high)
TTL_7400_NAND(ic_g3b, ic_f3b.QQ, 256H) TTL_7400_NAND(ic_g3b, ic_f3b.QQ, 256H)
TTL_7427_NOR(ic_g2b, ic_g3b.Q, vblank, 4V) TTL_7427_NOR(ic_g2b, ic_g3b.Q, vblank, 4V)
NET_ALIAS(net, ic_g2b.Q) ALIAS(net, ic_g2b.Q)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// video // video
@ -625,21 +625,21 @@ static NETLIST_START(pong_schematics)
TTL_7402_NOR(ic_g1b, hvidQ, vvidQ) TTL_7402_NOR(ic_g1b, hvidQ, vvidQ)
TTL_7425_NOR(ic_f2b, ic_g1b.Q, pad1, pad2, net) TTL_7425_NOR(ic_f2b, ic_g1b.Q, pad1, pad2, net)
TTL_7404_INVERT(ic_e4e, ic_f2b.Q) TTL_7404_INVERT(ic_e4e, ic_f2b.Q)
NET_ALIAS(video, ic_e4e.Q) ALIAS(video, ic_e4e.Q)
TTL_7486_XOR(ic_a4d, hsyncQ, vsyncQ) TTL_7486_XOR(ic_a4d, hsyncQ, vsyncQ)
TTL_7404_INVERT(ic_e4f, ic_a4d.Q) TTL_7404_INVERT(ic_e4f, ic_a4d.Q)
NETDEV_R(RV1, RES_K(1)) RES(RV1, RES_K(1))
NETDEV_R(RV2, RES_K(1.2)) RES(RV2, RES_K(1.2))
NETDEV_R(RV3, RES_K(22)) RES(RV3, RES_K(22))
NET_C(video, RV1.1) NET_C(video, RV1.1)
NET_C(score, RV2.1) NET_C(score, RV2.1)
NET_C(ic_e4f.Q, RV3.1) NET_C(ic_e4f.Q, RV3.1)
NET_C(RV1.2, RV2.2) NET_C(RV1.2, RV2.2)
NET_C(RV2.2, RV3.2) NET_C(RV2.2, RV3.2)
NET_ALIAS(videomix, RV3.2) ALIAS(videomix, RV3.2)
NETLIST_END() NETLIST_END()
@ -717,12 +717,12 @@ static NETLIST_START(test)
/* Standard stuff */ /* Standard stuff */
NETDEV_SOLVER(Solver) SOLVER(Solver)
NETDEV_PARAM(Solver.FREQ, 48000) PARAM(Solver.FREQ, 48000)
// astable NAND Multivibrator // astable NAND Multivibrator
NETDEV_R(R1, 1000) RES(R1, 1000)
NETDEV_C(C1, 1e-6) CAP(C1, 1e-6)
TTL_7400_NAND(n1,R1.1,R1.1) TTL_7400_NAND(n1,R1.1,R1.1)
TTL_7400_NAND(n2,R1.2,R1.2) TTL_7400_NAND(n2,R1.2,R1.2)
NET_C(n1.Q, R1.2) NET_C(n1.Q, R1.2)