From 4df50ea208f0504a71e8a1f4e51dce5fa4a13e43 Mon Sep 17 00:00:00 2001
From: arbee <rb6502@users.noreply.github.com>
Date: Sun, 23 Jul 2023 14:04:22 -0400
Subject: [PATCH] apple/iosb.cpp: Correct ASC IRQ polarity, fixes lockup during
 sound playback on macquadra800.cpp machines. [R. Belmont]

devices/sound/asc.cpp: Fix half-full flag for all variants and add IRQ gate for Sonora/Aardbeg, gives smooth playback on all chip variants. [R. Belmont]
---
 src/devices/sound/asc.cpp | 66 +++++++++++++++++++++++++++++----------
 src/mame/apple/iosb.cpp   |  2 +-
 2 files changed, 50 insertions(+), 18 deletions(-)

diff --git a/src/devices/sound/asc.cpp b/src/devices/sound/asc.cpp
index bc17e19571e..5306d207484 100644
--- a/src/devices/sound/asc.cpp
+++ b/src/devices/sound/asc.cpp
@@ -33,6 +33,8 @@
     0x828: WAVETABLE 3 PHASE
     0x82C: WAVETABLE 3 INCREMENT
 
+    TODO: rewrite this, we know so much more now and the "chip variant type" pattern must die.
+
 ***************************************************************************/
 
 #include "emu.h"
@@ -207,7 +209,39 @@ void asc_device::sound_stream_update(sound_stream &stream, std::vector<read_stre
 						}
 						break;
 
-					default:    // V8/Sonora/Eagle/etc
+					// Sonora sets the 1/2 full flag continuously, ASC/EASC only does it when it happens
+					case asc_type::SONORA:
+					case asc_type::ARDBEG:
+						if (m_fifo_cap_a <= 0x200)
+						{
+							m_regs[R_FIFOSTAT-0x800] |= 1;  // fifo A less than half full
+
+							if (m_fifo_cap_a == 0)   // fifo A fully empty
+							{
+								m_regs[R_FIFOSTAT-0x800] |= 2;  // fifo A empty
+							}
+							if (!(m_regs[0xf09 - 0x800] & 1))
+							{
+								write_irq(ASSERT_LINE);
+							}
+						}
+
+						if (m_fifo_cap_b <= 0x200)
+						{
+							m_regs[R_FIFOSTAT-0x800] |= 4;  // fifo B less than half full
+
+							if (m_fifo_cap_b == 0)   // fifo B fully empty
+							{
+								m_regs[R_FIFOSTAT-0x800] |= 8;  // fifo B empty
+							}
+							if (!(m_regs[0xf29 - 0x800] & 1))
+							{
+								write_irq(ASSERT_LINE);
+							}
+						}
+						break;
+
+					default:    // V8/Eagle/etc
 						if (m_fifo_cap_a < 0x1ff)
 						{
 							m_regs[R_FIFOSTAT-0x800] |= 1;  // fifo A less than half full
@@ -218,20 +252,6 @@ void asc_device::sound_stream_update(sound_stream &stream, std::vector<read_stre
 							}
 							write_irq(ASSERT_LINE);
 						}
-
-						if (m_chip_type == asc_type::SONORA)
-						{
-							if (m_fifo_cap_b < 0x1ff)
-							{
-								m_regs[R_FIFOSTAT-0x800] |= 4;  // fifo B less than half full
-
-								if (m_fifo_cap_b == 0)   // fifo B fully empty
-								{
-									m_regs[R_FIFOSTAT-0x800] |= 8;  // fifo B empty
-								}
-								write_irq(ASSERT_LINE);
-							}
-						}
 						break;
 				}
 
@@ -437,14 +457,21 @@ void asc_device::write(offs_t offset, uint8_t data)
 	{
 		if (m_regs[R_MODE-0x800] == 1)
 		{
+			if (m_fifo_cap_a >= 0x400) printf("Overflow FIFO A!\n");
+
 			m_fifo_a[m_fifo_a_wrptr++] = data;
 			m_fifo_cap_a++;
 
-			if (m_fifo_cap_a == 0x3ff)
+			if (m_fifo_cap_a == 0x400)
 			{
 				m_regs[R_FIFOSTAT-0x800] |= 2;  // fifo A full
 			}
 
+			if (m_fifo_cap_a > 0x200)
+			{
+				m_regs[R_FIFOSTAT-0x800] &= ~1;
+			}
+
 			m_fifo_a_wrptr &= 0x3ff;
 		}
 		else
@@ -459,11 +486,16 @@ void asc_device::write(offs_t offset, uint8_t data)
 			m_fifo_b[m_fifo_b_wrptr++] = data;
 			m_fifo_cap_b++;
 
-			if (m_fifo_cap_b == 0x3ff)
+			if (m_fifo_cap_b == 0x400)
 			{
 				m_regs[R_FIFOSTAT-0x800] |= 8;  // fifo B full
 			}
 
+			if (m_fifo_cap_b > 0x200)
+			{
+				m_regs[R_FIFOSTAT-0x800] &= ~4;
+			}
+
 			m_fifo_b_wrptr &= 0x3ff;
 		}
 		else
diff --git a/src/mame/apple/iosb.cpp b/src/mame/apple/iosb.cpp
index 8f1164b8ea2..e9d93a7dc82 100644
--- a/src/mame/apple/iosb.cpp
+++ b/src/mame/apple/iosb.cpp
@@ -329,7 +329,7 @@ void iosb_device::scsi_irq_w(int state)
 
 void iosb_device::asc_irq(int state)
 {
-	m_via2->write_cb1(state);
+	m_via2->write_cb1(state ^ 1);
 	m_asc_irq = state;
 }