mirror of
https://github.com/holub/mame
synced 2025-06-06 04:43:45 +03:00
- Added dkongjr discrete sound
- Proper interface Z80 - I8035 for dkongjr - Changed discrete sound output factors - removed samples support for dkongjr
This commit is contained in:
Couriersud
parent
e15832fcb4
commit
4df95f41db
@ -46,14 +46,16 @@
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#define DS_SOUND2_INV NODE_03
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#define DS_SOUND6_INV NODE_04
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#define DS_SOUND7_INV NODE_05
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#define DS_DAC NODE_06
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#define DS_DAC_DISCHARGE NODE_07
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#define DS_SOUND9_INV NODE_06
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#define DS_DAC NODE_07
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#define DS_DAC_DISCHARGE NODE_08
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#define DS_SOUND0 NODE_208
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#define DS_SOUND1 NODE_209
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#define DS_SOUND2 NODE_210
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#define DS_SOUND6 NODE_211
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#define DS_SOUND7 NODE_212
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#define DS_SOUND9 NODE_213
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#define DS_ADJ_DAC NODE_240
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@ -62,7 +64,8 @@
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#define DS_OUT_SOUND2 NODE_243
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#define DS_OUT_SOUND6 NODE_247
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#define DS_OUT_SOUND7 NODE_248
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#define DS_OUT_DAC NODE_249
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#define DS_OUT_SOUND9 NODE_249
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#define DS_OUT_DAC NODE_250
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/* Input definitions for write handlers */
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@ -71,6 +74,7 @@
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#define DS_SOUND2_INP DS_SOUND2_INV
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#define DS_SOUND6_INP DS_SOUND6_INV
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#define DS_SOUND7_INP DS_SOUND7_INV
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#define DS_SOUND9_INP DS_SOUND9_INV
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/* General defines */
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@ -144,25 +148,23 @@
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/* Capacitors */
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#define CAP_U_AGED(x) (1*CAP_U(x))
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#define DK_C8 CAP_U_AGED(220)
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#define DK_C12 CAP_U_AGED(1)
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#define DK_C8 CAP_U(220)
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#define DK_C12 CAP_U(1)
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#define DK_C13 CAP_U(33)
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#define DK_C16 CAP_U_AGED(1)
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#define DK_C17 CAP_U_AGED(4.7)
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#define DK_C18 CAP_U_AGED(1)
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#define DK_C19 CAP_U_AGED(1)
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#define DK_C20 CAP_U_AGED(3.3)
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#define DK_C21 CAP_U_AGED(1)
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#define DK_C16 CAP_U(1)
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#define DK_C17 CAP_U(4.7)
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#define DK_C18 CAP_U(1)
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#define DK_C19 CAP_U(1)
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#define DK_C20 CAP_U(3.3)
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#define DK_C21 CAP_U(1)
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#define DK_C23 CAP_U_AGED(4.7)
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#define DK_C24 CAP_U_AGED(10)
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#define DK_C25 CAP_U_AGED(3.3)
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#define DK_C26 CAP_U_AGED(3.3)
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#define DK_C29 CAP_U_AGED(3.3)
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#define DK_C30 CAP_U_AGED(10)
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#define DK_C32 CAP_U_AGED(10)
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#define DK_C23 CAP_U(4.7)
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#define DK_C24 CAP_U(10)
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#define DK_C25 CAP_U(3.3)
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#define DK_C26 CAP_U(3.3)
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#define DK_C29 CAP_U(3.3)
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#define DK_C30 CAP_U(10)
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#define DK_C32 CAP_U(10)
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#define DK_C34 CAP_N(10)
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#define DK_C160 CAP_N(100)
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@ -364,8 +366,8 @@ static DISCRETE_SOUND_START(dkong2b)
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//DISCRETE_ADDER2(NODE_289,1,NODE_288,0.3+5.0*150.0/(150.0+1000.0))
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DISCRETE_ADDER2(NODE_289,1,NODE_288,5.0*43.0/(100.0+43.0))
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DISCRETE_RCINTEGRATE(NODE_294,1,NODE_289,0,150,1000, CAP_U(33),DK_SUP_V,DISC_RC_INTEGRATE_TYPE3)
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DISCRETE_CRFILTER(NODE_295,1,NODE_294, 50, DK_C13)
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DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 )
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DISCRETE_CRFILTER(NODE_295,1,NODE_294, 1000, DK_C13)
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DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 * 3)
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#endif
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DISCRETE_SOUND_END
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@ -634,12 +636,237 @@ static DISCRETE_SOUND_START(radarscp)
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//DISCRETE_ADDER2(NODE_289,1,NODE_288,0.5+5.0*150.0/(150.0+1000.0))
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DISCRETE_ADDER2(NODE_289,1,NODE_288,5.0*43.0/(100.0+43.0))
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DISCRETE_RCINTEGRATE(NODE_294,1,NODE_289,0,150,1000, CAP_U(33),DK_SUP_V,DISC_RC_INTEGRATE_TYPE3)
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DISCRETE_CRFILTER(NODE_295,1,NODE_294, 50, DK_C13)
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DISCRETE_CRFILTER(NODE_295,1,NODE_294, 1000, DK_C13)
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DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 * 3)
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#endif
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DISCRETE_SOUND_END
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/****************************************************************
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*
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* DkongJR Discrete Sound Interface
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*
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****************************************************************/
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#define JR_R2 120
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#define JR_R3 RES_K(100)
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#define JR_R4 RES_K(47)
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#define JR_R5 RES_K(150)
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#define JR_R6 RES_K(20)
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#define JR_R8 RES_K(47)
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#define JR_R9 RES_K(47)
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#define JR_R10 RES_K(10)
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#define JR_R11 RES_K(20)
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#define JR_R14 RES_K(30)
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#define JR_R17 RES_K(47)
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#define JR_R18 RES_K(100)
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#define JR_R19 (100)
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#define JR_R20 RES_K(10)
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#define JR_R24 RES_K(4.7)
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#define JR_R25 RES_K(47)
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#define JR_R27 RES_K(10)
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#define JR_R28 RES_K(100)
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#define JR_C13 CAP_U(4.7)
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#define JR_C14 CAP_U(4.7)
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#define JR_C15 CAP_U(22)
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#define JR_C16 CAP_U(3.3)
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#define JR_C17 CAP_U(3.3) // ??? illegible
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#define JR_C18 CAP_N(22)
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#define JR_C19 CAP_N(4.7)
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#define JR_C20 CAP_U(0.12)
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#define JR_C21 CAP_N(56)
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#define JR_C22 CAP_N(220)
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#define JR_C23 CAP_U(0.47)
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#define JR_C25 CAP_U(1)
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#define JR_C26 CAP_U(47)
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#define JR_C27 CAP_U(22)
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#define JR_C28 CAP_U(10)
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#define JR_C29 CAP_U(10)
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#define JR_C30 CAP_U(0.47)
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#define JR_C32 CAP_U(10)
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#define JR_C37 CAP_U(0.12)
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#define JR_C39 CAP_U(0.47)
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#define JR_C161 CAP_U(1)
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#define JR_C155 CAP_U(0.01)
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#define TTL_HIGH (4)
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#define GND (0)
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/* KT = 0.33 for C>1uF, 0.25 else */
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#define DISCRETE_LS123(_N, _T, _R, _C) \
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DISCRETE_ONESHOTR(_N, 0, _T, TTL_HIGH, (0.33 * (_R) * (_C) * (1.0+700./(_R))), DISC_ONESHOT_RETRIG | DISC_ONESHOT_REDGE)
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#define DISCRETE_LS123_INV(_N, _T, _R, _C) \
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DISCRETE_ONESHOTR(_N, 0, _T, TTL_HIGH, (0.33 * (_R) * (_C) * (1.0+700./(_R))), DISC_ONESHOT_RETRIG | DISC_ONESHOT_REDGE | DISC_OUT_ACTIVE_LOW)
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#define DISCRETE_BITSET(_N, _N1, _B) DISCRETE_TRANSFORM3(_N, 1, _N1, 1 << ((_B)-1), 0, "01&2>")
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#define DISCRETE_ENERGY_NAND(_N, _E, _N1, _N2) DISCRETE_TRANSFORM3(_N, _E, _N1, _N2, 1, "201*-")
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static const discrete_mixer_desc dkongjr_mixer_desc =
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{DISC_MIXER_IS_RESISTOR,
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{JR_R5, JR_R3, JR_R6, JR_R4, JR_R25},
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{0,0,0,0,0}, // no variable resistors
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{0,0,0,0,0}, // no node capacitors
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0, RES_M(1), // Dummy,
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JR_C155,
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JR_C161,
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0, 1};
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#define JR_R12 RES_K(10)
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#define JR_R13 RES_K(47)
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#define JR_C24 CAP_U(47)
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static const discrete_mixer_desc dkongjr_s1_mixer_desc =
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{DISC_MIXER_IS_RESISTOR,
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{JR_R13, JR_R12},
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{0,0}, // no variable resistors
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{0,0}, // no node capacitors
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0, RES_K(90), // Internal LS624 resistors ...
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JR_C24,
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0,
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0, 1};
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static const discrete_lfsr_desc dkongjr_lfsr =
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{
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DISC_CLK_BY_COUNT,
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16, /* Bit Length */
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0, /* Reset Value */
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2, /* Use Bit 2 (QC of first LS164) as F0 input 0 */
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15, /* Use Bit 15 (QH of secong LS164) as F0 input 1 */
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DISC_LFSR_XOR, /* F0 is XOR */
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DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
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DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
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0x000001, /* Everything is shifted into the first bit only */
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DISC_LFSR_FLAG_OUTPUT_F0 | DISC_LFSR_FLAG_OUT_INVERT, /* Output is result of F0 */
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0 /* Output bit */
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};
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static DISCRETE_SOUND_START(dkongjr)
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/************************************************/
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/* Input register mapping for dkongjr */
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/************************************************/
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/* DISCRETE_INPUT_DATA */
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DISCRETE_INPUT_NOT(DS_SOUND0_INV)
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DISCRETE_INPUT_NOT(DS_SOUND1_INV)
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DISCRETE_INPUT_NOT(DS_SOUND2_INV)
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DISCRETE_INPUT_NOT(DS_SOUND6_INV)
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DISCRETE_INPUT_NOT(DS_SOUND7_INV)
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DISCRETE_INPUT_NOT(DS_SOUND9_INV)
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DISCRETE_INPUT_LOGIC(DS_DAC_DISCHARGE)
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DISCRETE_INPUT_DATA(DS_DAC)
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/************************************************/
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/* SIGNALS */
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/************************************************/
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DISCRETE_LOGIC_INVERT(DS_SOUND7,1,DS_SOUND7_INV)
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DISCRETE_LOGIC_INVERT(DS_SOUND9,1,DS_SOUND9_INV)
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/************************************************/
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/* SOUND1 */
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/************************************************/
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DISCRETE_LS123(NODE_10, DS_SOUND1_INV, JR_R9, JR_C15)
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DISCRETE_TRANSFORM2(NODE_11,1,NODE_104,TTL_HIGH,"0!1*")
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DISCRETE_LOGIC_INVERT(NODE_12,1,NODE_10)
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DISCRETE_MIXER2(NODE_13, 1, NODE_10, NODE_11, &dkongjr_s1_mixer_desc)
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DISCRETE_74LS624( NODE_14, 1, NODE_13, 0.98*DK_SUP_V, JR_C22, DISC_LS624_OUT_ENERGY)
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DISCRETE_RCDISC_MODULATED(NODE_15, 1, NODE_12, NODE_14, 120, JR_R27, RES_K(0.001), JR_R28, JR_C28, DK_SUP_V)
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/* The following circuit does not match 100%, however works.
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* To be exact, we need a C-R-C-R circuit, we actually do not have.
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*/
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DISCRETE_CRFILTER_VREF(NODE_16, 1, NODE_15, JR_R4, JR_C23, 2.5)
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DISCRETE_RCFILTER(DS_OUT_SOUND1, 1, NODE_16, JR_R19, JR_C21)
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/************************************************/
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/* SOUND2 */
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/************************************************/
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DISCRETE_74LS624( NODE_20, 1, 0, 0.98*DK_SUP_V, JR_C20, DISC_LS624_OUT_COUNT_F)
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DISCRETE_LFSR_NOISE(NODE_21, 1, 1, NODE_20, 1.0, 0, 0.5, &dkongjr_lfsr)
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DISCRETE_LS123_INV(NODE_25, DS_SOUND2_INV, JR_R17, JR_C27)
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DISCRETE_RCDISC_MODULATED(NODE_26, 1, NODE_25, NODE_21, 120, JR_R24, RES_K(0.001), JR_R18, JR_C29, DK_SUP_V)
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/* The following circuit does not match 100%, however works.
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* To be exact, we need a C-R-C-R circuit, we actually do not have.
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*/
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DISCRETE_CRFILTER_VREF(NODE_27, 1, NODE_26, JR_R6, JR_C30, 2.5)
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DISCRETE_RCFILTER(DS_OUT_SOUND2, 1, NODE_27, JR_R2, JR_C25)
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/************************************************/
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/* SOUND9 */
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/************************************************/
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DISCRETE_RCFILTER(NODE_90, 1, DS_SOUND9_INV, JR_R14, JR_C26)
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DISCRETE_MULTIPLY(NODE_91, 1, NODE_90, TTL_HIGH)
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DISCRETE_74LS624( NODE_92, 1, NODE_91, DK_SUP_V, JR_C37, DISC_LS624_OUT_ENERGY)
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DISCRETE_ENERGY_NAND(NODE_93, 1, NODE_92, DS_SOUND9)
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DISCRETE_MULTIPLY(DS_OUT_SOUND9, 1, NODE_93, TTL_HIGH)
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/************************************************/
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/* SOUND0 / SOUND7 */
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/************************************************/
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DISCRETE_COUNTER(NODE_100,1,0,NODE_118,0xFFFF,DISC_COUNT_UP,0,DISC_CLK_BY_COUNT)
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DISCRETE_BITSET(NODE_101, NODE_100, 7) //LS157 2A
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DISCRETE_BITSET(NODE_102, NODE_100, 4) //LS157 2B
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DISCRETE_BITSET(NODE_103, NODE_100, 13) //LS157 3A
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DISCRETE_BITSET(NODE_104, NODE_100, 12) //LS157 3B
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/* LS157 Switches */
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DISCRETE_SWITCH(NODE_105, 1, DS_SOUND7_INV, GND, NODE_113) // Switch 1 from LS624
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DISCRETE_SWITCH(NODE_106, 1, DS_SOUND7_INV, NODE_101, NODE_102) // Switch 2
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DISCRETE_SWITCH(NODE_107, 1, DS_SOUND7_INV, NODE_103, NODE_104) // Switch 3
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DISCRETE_LS123(NODE_110, DS_SOUND0_INV, JR_R8, JR_C14)
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DISCRETE_TRANSFORM2(NODE_111, 1, TTL_HIGH, NODE_110, "01-")
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DISCRETE_RCFILTER(NODE_112, 1, NODE_111, JR_R10, JR_C17)
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DISCRETE_74LS624(NODE_113, 1, NODE_112, DK_SUP_V, JR_C18, DISC_LS624_OUT_ENERGY)
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DISCRETE_LOGIC_XOR(NODE_115, 1, NODE_105, NODE_106)
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DISCRETE_TRANSFORM2(NODE_116,1, NODE_107, TTL_HIGH, "0!1*")
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DISCRETE_RCFILTER(NODE_117, 1, NODE_116, JR_R11, JR_C16)
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DISCRETE_74LS624(NODE_118, 1, NODE_117, DK_SUP_V, JR_C19, DISC_LS624_OUT_COUNT_F)
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DISCRETE_LOGIC_NAND(NODE_120, 1, NODE_115, NODE_110)
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DISCRETE_MULTIPLY(DS_OUT_SOUND0, 1, NODE_120, TTL_HIGH)
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/************************************************/
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/* DAC */
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/************************************************/
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/* Signal decay circuit Q7, R20, C32 */
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DISCRETE_RCDISC(NODE_170, DS_DAC_DISCHARGE, 1, JR_R20, JR_C32)
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DISCRETE_TRANSFORM4(NODE_171, 1, DS_DAC, DK_SUP_V/256.0, NODE_170, DS_DAC_DISCHARGE, "01*3!2+*")
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/* following the DAC are two opamps. The first is a current-to-voltage changer
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* for the DAC08 which delivers a variable output current.
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*
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* The second one is a Sallen Key filter ...
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* http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
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* f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
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* Q = 1/2 * sqrt(22n/10n)= 0.74
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*/
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DISCRETE_FILTER2(DS_OUT_DAC, 1, NODE_171, 1916, (1.0/0.74), DISC_FILTER_LOWPASS)
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/************************************************/
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/* Amplifier */
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/************************************************/
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DISCRETE_MIXER5(NODE_288, 1, DS_OUT_SOUND9, DS_OUT_SOUND0, DS_OUT_SOUND2, DS_OUT_SOUND1, DS_OUT_DAC, &dkongjr_mixer_desc)
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/* Amplifier: internal amplifier
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* Just a 1:n amplifier without filters - just the output filter
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*/
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DISCRETE_CRFILTER(NODE_295,1,NODE_288, 1000, JR_C13)
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DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 * 10)
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DISCRETE_SOUND_END
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/****************************************************************
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*
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@ -654,34 +881,6 @@ static SOUND_START( dkong )
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state_save_register_global(state->page);
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state_save_register_global(state->mcustatus);
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state_save_register_global(state->portT);
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state->has_discrete_interface = 1;
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}
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static SOUND_START( dkongjr )
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{
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dkong_state *state = machine->driver_data;
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sound_start_dkong(machine);
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state_save_register_global(state->sh_climb_count);
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state_save_register_global_array(state->dkongjr_latch);
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state_save_register_global(state->envelope);
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state_save_register_global(state->tt);
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state_save_register_global(state->decay);
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state->has_discrete_interface = 0;
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}
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static SOUND_START( radarsc1 )
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{
|
||||
dkong_state *state = machine->driver_data;
|
||||
|
||||
sound_start_dkong(machine);
|
||||
|
||||
state->has_discrete_interface = 1;
|
||||
}
|
||||
|
||||
static SOUND_RESET( dkong )
|
||||
@ -697,22 +896,6 @@ static SOUND_RESET( dkong )
|
||||
I8035_P2_W(255);
|
||||
}
|
||||
|
||||
static SOUND_RESET( dkongjr )
|
||||
{
|
||||
dkong_state *state = machine->driver_data;
|
||||
int i;
|
||||
|
||||
sound_reset_dkong(machine);
|
||||
|
||||
state->envelope = 0;
|
||||
state->tt = 0;
|
||||
state->decay = 0;
|
||||
state->sh_climb_count = 0;
|
||||
|
||||
for (i=0;i<10;i++)
|
||||
state->dkongjr_latch[i]=0;
|
||||
}
|
||||
|
||||
/****************************************************************
|
||||
*
|
||||
* M58817 Speech
|
||||
@ -881,19 +1064,7 @@ static READ8_HANDLER( dkongjr_sh_tune_r )
|
||||
|
||||
static WRITE8_HANDLER( dkong_sh_p1_w )
|
||||
{
|
||||
dkong_state *state = Machine->driver_data;
|
||||
|
||||
if (state->has_discrete_interface)
|
||||
discrete_sound_w(DS_DAC,data);
|
||||
else
|
||||
{
|
||||
state->envelope=exp(-state->tt);
|
||||
DAC_data_w(0,(int)(data*state->envelope));
|
||||
if (state->decay)
|
||||
state->tt+=TSTEP;
|
||||
else
|
||||
state->tt=0;
|
||||
}
|
||||
discrete_sound_w(DS_DAC,data);
|
||||
}
|
||||
|
||||
|
||||
@ -907,6 +1078,8 @@ static READ8_HANDLER( radarsc1_sh_p1_r )
|
||||
|
||||
static WRITE8_HANDLER( dkong_sh_p2_w )
|
||||
{
|
||||
dkong_state *state = Machine->driver_data;
|
||||
|
||||
/* If P2.Bit7 -> is apparently an external signal decay or other output control
|
||||
* If P2.Bit6 -> activates the external compressed sample ROM (not radarsc1)
|
||||
* If P2.Bit5 -> Signal ANSN ==> Grid enable (radarsc1)
|
||||
@ -914,15 +1087,11 @@ static WRITE8_HANDLER( dkong_sh_p2_w )
|
||||
* P2.Bit2-0 -> select the 256 byte bank for external ROM
|
||||
*/
|
||||
|
||||
dkong_state *state = Machine->driver_data;
|
||||
|
||||
if (state->has_discrete_interface)
|
||||
discrete_sound_w(DS_DAC_DISCHARGE, (data & 0x80) ? 0 : 1 );
|
||||
else
|
||||
state->decay = !(data & 0x80);
|
||||
state->mcustatus = ((~data & 0x10) >> 4);
|
||||
radarsc1_ansn_w(0, (data & 0x20) >> 5);
|
||||
state->page = (data & 0x47);
|
||||
|
||||
discrete_sound_w(DS_DAC_DISCHARGE, (data & 0x80) ? 0 : 1 );
|
||||
}
|
||||
|
||||
|
||||
@ -962,11 +1131,6 @@ WRITE8_HANDLER( dkong_snd_disc_w )
|
||||
{
|
||||
dkong_state *state = Machine->driver_data;
|
||||
|
||||
if (!state->has_discrete_interface && (offset<3))
|
||||
{
|
||||
logerror("dkong.c: Write to snd port %d (%d)\n", offset, data);
|
||||
return;
|
||||
}
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
@ -993,12 +1157,9 @@ WRITE8_HANDLER( dkong_snd_disc_w )
|
||||
I8035_T_W_AL(0, data & 1);
|
||||
break;
|
||||
case 6:
|
||||
if (state->has_discrete_interface)
|
||||
discrete_sound_w(DS_SOUND6_INP,data & 1);
|
||||
break;
|
||||
discrete_sound_w(DS_SOUND6_INP,data & 1);
|
||||
case 7:
|
||||
if (state->has_discrete_interface)
|
||||
discrete_sound_w(DS_SOUND7_INP,data & 1);
|
||||
discrete_sound_w(DS_SOUND7_INP,data & 1);
|
||||
break;
|
||||
}
|
||||
return;
|
||||
@ -1012,91 +1173,43 @@ WRITE8_HANDLER( dkong_sh_tuneselect_w )
|
||||
WRITE8_HANDLER( dkongjr_snd_w1 )
|
||||
{
|
||||
dkong_state *state = Machine->driver_data;
|
||||
static const int sample_order[7] = {1,2,1,2,0,1,0};
|
||||
|
||||
if (state->dkongjr_latch[offset] != data)
|
||||
switch (offset)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0: /* climb */
|
||||
if (data && state->dkongjr_latch[7] == 0)
|
||||
{
|
||||
sample_start (3,sample_order[state->sh_climb_count]+3,0);
|
||||
state->sh_climb_count++;
|
||||
if (state->sh_climb_count == 7) state->sh_climb_count = 0;
|
||||
}
|
||||
else if (data && state->dkongjr_latch[7] == 1)
|
||||
{
|
||||
sample_start (3,sample_order[state->sh_climb_count]+8,0);
|
||||
state->sh_climb_count++;
|
||||
if (state->sh_climb_count == 7) state->sh_climb_count = 0;
|
||||
}
|
||||
break;
|
||||
case 1: /* jump */
|
||||
if (data)
|
||||
sample_start (6,0,0);
|
||||
break;
|
||||
case 2: /* land */
|
||||
if (data)
|
||||
sample_stop (7);
|
||||
sample_start (4,1,0);
|
||||
break;
|
||||
case 3: /* Port 3 write ==> PB 5 */
|
||||
I8035_P2_W_AL(5,data & 1);
|
||||
break;
|
||||
#if 0 // above verified from schematics
|
||||
case 3: /* roar */
|
||||
if (data)
|
||||
sample_start (7,2,0);
|
||||
break;
|
||||
#endif
|
||||
case 4: /* Port 4 write */
|
||||
I8035_T_W_AL(1, data & 1);
|
||||
break;
|
||||
case 5: /* Port 5 write */
|
||||
I8035_T_W_AL(0, data & 1);
|
||||
break;
|
||||
case 6: /* Port 6 write ==> PB 4 */
|
||||
I8035_P2_W_AL(4,data & 1);
|
||||
break;
|
||||
#if 0 // above verified from schematics
|
||||
case 6: /* snapjaw */
|
||||
if (data)
|
||||
sample_stop (7);
|
||||
sample_start (4,11,0);
|
||||
break;
|
||||
#endif
|
||||
case 7: /* walk */
|
||||
//walk = data;
|
||||
break;
|
||||
}
|
||||
state->dkongjr_latch[offset] = data;
|
||||
case 0: /* climb */
|
||||
discrete_sound_w(DS_SOUND0_INP,data & 1);
|
||||
break;
|
||||
case 1: /* jump */
|
||||
discrete_sound_w(DS_SOUND1_INP,data & 1);
|
||||
break;
|
||||
case 2: /* land */
|
||||
discrete_sound_w(DS_SOUND2_INP,data & 1);
|
||||
break;
|
||||
case 3: /* Port 3 write ==> PB 5 */
|
||||
I8035_P2_W_AL(5,data & 1);
|
||||
break;
|
||||
case 4: /* Port 4 write */
|
||||
I8035_T_W_AL(1, data & 1);
|
||||
break;
|
||||
case 5: /* Port 5 write */
|
||||
I8035_T_W_AL(0, data & 1);
|
||||
break;
|
||||
case 6: /* Port 6 write ==> PB 4 */
|
||||
I8035_P2_W_AL(4,data & 1);
|
||||
break;
|
||||
case 7: /* walk */
|
||||
discrete_sound_w(DS_SOUND7_INP,data & 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( dkongjr_snd_w2 )
|
||||
{
|
||||
dkong_state *state = Machine->driver_data;
|
||||
if (state->dkongjr_latch[offset+8] != data)
|
||||
switch (offset)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
dkong_audio_irq_w(0, data & 1);
|
||||
break;
|
||||
#if 0 // above verified from schematics
|
||||
case 0: /* death */
|
||||
if (data)
|
||||
sample_stop (7);
|
||||
sample_start (6, 6, 0);
|
||||
break;
|
||||
#endif
|
||||
case 1: /* drop */
|
||||
if (data)
|
||||
sample_start (7, 7, 0);
|
||||
break;
|
||||
}
|
||||
state->dkongjr_latch[offset+8] = data;
|
||||
case 0: /* S9 - drop */
|
||||
discrete_sound_w(DS_SOUND9_INP,data & 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1231,8 +1344,6 @@ MACHINE_DRIVER_START( radarsc1_audio )
|
||||
MDRV_CPU_MODIFY("sound")
|
||||
MDRV_CPU_IO_MAP(radarsc1_sound_io_map, 0)
|
||||
|
||||
MDRV_SOUND_START(radarsc1)
|
||||
|
||||
MDRV_SOUND_ADD(TMS5110, 640000)
|
||||
MDRV_SOUND_CONFIG(tms5110_interface)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
@ -1245,17 +1356,15 @@ MACHINE_DRIVER_START( dkongjr_audio )
|
||||
MDRV_CPU_PROGRAM_MAP(dkong_sound_map,0)
|
||||
MDRV_CPU_IO_MAP(dkongjr_sound_io_map, 0)
|
||||
|
||||
MDRV_SOUND_START(dkongjr)
|
||||
MDRV_SOUND_RESET(dkongjr)
|
||||
MDRV_SOUND_START(dkong)
|
||||
MDRV_SOUND_RESET(dkong)
|
||||
|
||||
MDRV_SPEAKER_STANDARD_MONO("mono")
|
||||
MDRV_SOUND_ADD(DAC, 0)
|
||||
|
||||
MDRV_SOUND_ADD_TAG("discrete", DISCRETE, 0)
|
||||
MDRV_SOUND_CONFIG_DISCRETE(dkongjr)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.55)
|
||||
|
||||
MDRV_SOUND_ADD(SAMPLES, 0)
|
||||
MDRV_SOUND_CONFIG(dkongjr_samples_interface)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
MACHINE_DRIVER_START( dkong3_audio )
|
||||
|
||||
@ -2,7 +2,6 @@
|
||||
|
||||
TODO:
|
||||
|
||||
- dkongjr discrete interface
|
||||
- write a shootgal palette_init
|
||||
- Pestplce colors and origin
|
||||
- Shooting Gallery: Shootgal.txt mentions speech pcb,
|
||||
@ -13,6 +12,7 @@ TODO:
|
||||
74LS175 (QUAD D FlipFlop), 74LS373 (Octal transparent latch)
|
||||
|
||||
Done:
|
||||
- dkongjr discrete interface
|
||||
- when i am retired: implement 8257 DMA controller
|
||||
- drakton - add dkongjr conversion
|
||||
- for documentation: hook up speech interface still present on radarscp (TRS02)
|
||||
@ -59,6 +59,9 @@ Done:
|
||||
|
||||
Couriersud: 12/2007
|
||||
|
||||
- Added dkongjr discrete sound
|
||||
- Proper interface Z80 - I8035 for dkongjr
|
||||
- Changed discrete sound output factors
|
||||
- changed dkong/radarscp based games to use hardware-conformant I8035 memory maps
|
||||
- Added drakton clone drktnjr on dkongjr hardware
|
||||
- wrote M58817 sound driver and hooked it up
|
||||
@ -255,6 +258,7 @@ Changes:
|
||||
*************************************/
|
||||
|
||||
#define DEBUG_PROTECTION (0)
|
||||
#define DEBUG_DISC_SOUND (0)
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -498,6 +502,21 @@ static READ8_HANDLER( dkong_in2_r )
|
||||
{
|
||||
UINT8 r;
|
||||
|
||||
#if DEBUG_DISC_SOUND
|
||||
static UINT8 ui_snd = 0;
|
||||
static UINT8 lst = 0;
|
||||
if (!lst && (readinputportbytag("TST") & 0x01))
|
||||
{
|
||||
ui_snd = (ui_snd + 1) % 10;
|
||||
ui_popup("Sound %d", ui_snd);
|
||||
}
|
||||
lst = readinputportbytag("TST") & 0x01;
|
||||
if (ui_snd<8)
|
||||
dkongjr_snd_w1(ui_snd, (readinputportbytag("TST") & 0x02)>>1);
|
||||
else
|
||||
dkongjr_snd_w2(ui_snd-8, (readinputportbytag("TST") & 0x02)>>1);
|
||||
#endif
|
||||
|
||||
r = (readinputportbytag("IN2") & 0xBF) | (dkong_audio_status_r(0) << 6);
|
||||
coin_counter_w(offset, r >> 7);
|
||||
if (r & 0x10)
|
||||
@ -769,9 +788,9 @@ static ADDRESS_MAP_START( dkongjr_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(dkongjr_gfxbank_w)
|
||||
AM_RANGE(0x7c81, 0x7c81) AM_WRITE(dkongjr_sh_test6_w)
|
||||
AM_RANGE(0x7d00, 0x7d00) AM_READ(dkong_in2_r) /* IN2 */
|
||||
AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") /* DSW0 */
|
||||
AM_RANGE(0x7d00, 0x7d07) AM_WRITE(dkongjr_snd_w1) /* Sound addrs */
|
||||
AM_RANGE(0x7d80, 0x7d81) AM_WRITE(dkongjr_snd_w2) /* Sound addrs */
|
||||
AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
|
||||
AM_RANGE(0x7d81, 0x7d81) AM_WRITE(dkongjr_snd_w2) /* Sound addrs */
|
||||
AM_RANGE(0x7d82, 0x7d82) AM_WRITE(dkong_flipscreen_w)
|
||||
AM_RANGE(0x7d83, 0x7d83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
|
||||
AM_RANGE(0x7d84, 0x7d84) AM_WRITE(interrupt_enable_w)
|
||||
@ -1036,6 +1055,12 @@ static INPUT_PORTS_START( dkongjr )
|
||||
PORT_INCLUDE( dkong_in1_4 )
|
||||
PORT_INCLUDE( dkong_in2 )
|
||||
PORT_INCLUDE( dkong_dsw0 )
|
||||
|
||||
#if DEBUG_DISC_SOUND
|
||||
PORT_START_TAG("TST") /* TST */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CODE(KEYCODE_B)
|
||||
#endif
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( hunchbkd )
|
||||
|
||||
@ -63,15 +63,7 @@ struct _dkong_state
|
||||
UINT8 hardware_type;
|
||||
|
||||
/* sound state */
|
||||
UINT8 dkongjr_latch[10];
|
||||
UINT8 sh_climb_count;
|
||||
|
||||
UINT8 has_discrete_interface;
|
||||
|
||||
UINT8 page,mcustatus;
|
||||
|
||||
double envelope,tt;
|
||||
UINT8 decay;
|
||||
UINT8 portT;
|
||||
|
||||
/* video state */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user