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b5000: added easy opcodes

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This commit is contained in:
hap 2022-03-18 17:03:30 +01:00
parent a6b8f21977
commit 4e278b36bb
25 changed files with 553 additions and 163 deletions
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24
src/devices/cpu/amis2000/amis2000.cpp
View File

@ -113,12 +113,6 @@ std::unique_ptr<util::disasm_interface> amis2000_base_device::create_disassemble
// device_start - device-specific startup
//-------------------------------------------------
enum
{
S2000_PC = STATE_GENPC, S2000_BL = 0, S2000_BU,
S2000_ACC, S2000_E, S2000_CY
};
void amis2000_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -175,16 +169,18 @@ void amis2000_base_device::device_start()
save_item(NAME(m_a));
// register state for debugger
state_add(S2000_PC, "PC", m_pc ).formatstr("%04X");
state_add(S2000_BL, "BL", m_bl ).formatstr("%01X");
state_add(S2000_BU, "BU", m_bu ).formatstr("%01X");
state_add(S2000_ACC, "ACC", m_acc ).formatstr("%01X");
state_add(S2000_E, "E", m_e ).formatstr("%01X");
state_add(S2000_CY, "CY", m_carry ).formatstr("%01X");
state_add(STATE_GENPCBASE, "CURPC", m_pc).noshow();
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENFLAGS, "CURFLAGS", m_f).formatstr("%6s").noshow();
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
state_add(++m_state_count, "BL", m_bl).formatstr("%01X"); // 2
state_add(++m_state_count, "BU", m_bu).formatstr("%01X"); // 3
state_add(++m_state_count, "ACC", m_acc).formatstr("%01X"); // 4
state_add(++m_state_count, "E", m_e).formatstr("%01X"); // 5
state_add(++m_state_count, "CY", m_carry).formatstr("%01X"); // 6
set_icountptr(m_icount);
}

4
src/devices/cpu/amis2000/amis2000.h
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@ -82,13 +82,15 @@ protected:
address_space *m_program;
address_space *m_data;
int m_icount;
int m_state_count;
u8 m_bu_bits;
u16 m_bu_mask;
u8 m_callstack_bits; // number of program counter bits held in callstack
u16 m_callstack_mask;
u8 m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
u16 m_callstack[5]; // max 5
int m_icount;
u16 m_pc; // 13-bit program counter
u8 m_ppr; // prepared page register (PP 1)
u8 m_pbr; // prepared bank register (PP 2)

80
src/devices/cpu/b5000/b5000.cpp
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@ -40,22 +40,78 @@ std::unique_ptr<util::disasm_interface> b5000_cpu_device::create_disassembler()
}
// initialize
void b5000_cpu_device::device_start()
{
b5000_base_device::device_start();
}
void b5000_cpu_device::device_reset()
{
b5000_base_device::device_reset();
}
//-------------------------------------------------
// execute
//-------------------------------------------------
void b5000_cpu_device::execute_one()
{
switch (m_op & 0xf0)
{
case 0x40: op_lax(); break;
case 0x60:
if (m_op != 0x6f)
op_adx();
else
op_read();
break;
case 0x80: case 0x90: case 0xa0: case 0xb0: op_tra0(1); break;
case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_tra1(1); break;
default:
switch (m_op & 0xfc)
{
case 0x04: op_tdin(); break;
case 0x08: op_tm(); break;
case 0x10: op_sm(); break;
case 0x14: op_rsm(); break;
case 0x18: op_ret(1); break;
case 0x20: op_lb(7); break;
case 0x24: op_lb(10); break;
case 0x28: op_lb(9); break;
case 0x2c: op_lb(8); break;
case 0x3c: op_lb(0); break;
case 0x30: case 0x34: op_tl(); break;
case 0x50: op_lda(); break;
case 0x54: op_excp(); break;
case 0x58: op_exc0(); break;
case 0x5c: op_excm(); break;
case 0x70: op_add(); break;
case 0x78: op_comp(); break;
case 0x7c: op_tam(); break;
default:
switch (m_op)
{
case 0x00: op_nop(); break;
case 0x01: op_tc(); break;
case 0x02: op_tkb(); break;
case 0x03: op_tkbs(1); break;
case 0x39: op_rsc(); break;
case 0x3b: op_sc(); break;
case 0x74: op_kseg(); break;
case 0x77: op_atbz(1); break; // ATB
default: op_illegal(); break;
}
break; // 0xff
}
break; // 0xfc
}
}
bool b5000_cpu_device::op_canskip(u8 op)
{
// TL and ATB are unskippable
return ((op & 0xf8) != 0x30) && (op != 0x77);
}
bool b5000_cpu_device::op_is_lb(u8 op)
{
return ((op & 0xf0) == 0x20) || ((op & 0xfc) == 0x3c);
}

40
src/devices/cpu/b5000/b5000.h
View File

@ -25,16 +25,16 @@ public:
b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_execute_interface overrides
virtual void execute_one() override;
virtual bool op_canskip(u8 op) override;
virtual bool op_is_lb(u8 op);
virtual u16 reset_vector() override { return 0x1c0; }
void data_map(address_map &map);
void program_map(address_map &map);
@ -43,9 +43,41 @@ protected:
void ram_w(u8 data);
void pop_pc();
void push_pc();
void set_bu(u8 bu);
void op_illegal();
// opcode handlers
virtual void op_tl();
virtual void op_tra1(u8 step) override;
virtual void op_tra0(u8 step) override;
virtual void op_ret(u8 step) override;
virtual void op_nop();
virtual void op_lb(u8 bl);
virtual void op_atb();
virtual void op_lda();
virtual void op_exc0();
virtual void op_excp();
virtual void op_excm();
virtual void op_sm();
virtual void op_rsm();
virtual void op_tm();
virtual void op_tam();
virtual void op_lax();
virtual void op_comp();
virtual void op_adx();
virtual void op_add();
virtual void op_sc();
virtual void op_rsc();
virtual void op_tc();
virtual void op_kseg();
virtual void op_atbz(u8 step) override;
virtual void op_tkb();
virtual void op_tkbs(u8 step) override;
virtual void op_read();
virtual void op_tdin();
};

121
src/devices/cpu/b5000/b5000base.cpp
View File

@ -12,7 +12,7 @@ useful for making handheld games.
The main difference between Axxxx and Bxxxx is that B runs on low power,
there's also a small change with the way they output LEDs.
A4000 is similar, but too many differences to emulate in this device.
A4000 is similar, but too many differences to emulate in this device, probably.
*/
@ -35,11 +35,6 @@ b5000_base_device::b5000_base_device(const machine_config &mconfig, device_type
// device_start - device-specific startup
//-------------------------------------------------
enum
{
B5000_PC=1
};
void b5000_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -53,20 +48,65 @@ void b5000_base_device::device_start()
// zerofill
m_pc = 0;
m_prev_pc = 0;
m_s = 0;
m_op = 0;
m_prev_op = 0;
m_a = 0;
m_bl = 0;
m_bu = 0;
m_prev_bl = 0;
m_prev_bu = 0;
m_bl_delay = false;
m_bu_delay = false;
m_ram_addr = 0;
m_c = 0;
m_prev_c = 0;
m_prev2_c = 0;
m_skip = false;
m_atbz_step = 0;
m_tkbs_step = 0;
m_tra0_step = 0;
m_tra1_step = 0;
m_ret_step = 0;
// register for savestates
save_item(NAME(m_pc));
save_item(NAME(m_prev_pc));
save_item(NAME(m_s));
save_item(NAME(m_op));
save_item(NAME(m_prev_op));
save_item(NAME(m_a));
save_item(NAME(m_bl));
save_item(NAME(m_bu));
save_item(NAME(m_prev_bl));
save_item(NAME(m_prev_bu));
save_item(NAME(m_bl_delay));
save_item(NAME(m_bu_delay));
save_item(NAME(m_ram_addr));
save_item(NAME(m_c));
save_item(NAME(m_prev_c));
save_item(NAME(m_prev2_c));
save_item(NAME(m_skip));
save_item(NAME(m_atbz_step));
save_item(NAME(m_tkbs_step));
save_item(NAME(m_tra0_step));
save_item(NAME(m_tra1_step));
save_item(NAME(m_ret_step));
// register state for debugger
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%03X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_prev_pc).formatstr("%03X").noshow();
state_add(B5000_PC, "PC", m_pc).formatstr("%03X");
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%03X"); // 1
state_add(++m_state_count, "S", m_s).formatstr("%03X"); // 2
state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 3
state_add(++m_state_count, "C", m_c).formatstr("%01X"); // 4
state_add(++m_state_count, "B", m_ram_addr).formatstr("%02X"); // 5
set_icountptr(m_icount);
}
@ -86,8 +126,21 @@ device_memory_interface::space_config_vector b5000_base_device::memory_space_con
void b5000_base_device::device_reset()
{
m_pc = m_prev_pc = 0;
m_pc = reset_vector();
m_prev_pc = 0;
m_s = 0;
m_op = 0;
m_prev_op = 0;
m_skip = false;
m_bl_delay = false;
m_bu_delay = false;
m_atbz_step = 0;
m_tkbs_step = 0;
m_tra0_step = 0;
m_tra1_step = 0;
m_ret_step = 0;
}
@ -95,11 +148,6 @@ void b5000_base_device::device_reset()
// execute
//-------------------------------------------------
void b5000_base_device::cycle()
{
m_icount--;
}
void b5000_base_device::increment_pc()
{
// low part is LFSR
@ -112,9 +160,52 @@ void b5000_base_device::execute_run()
{
while (m_icount > 0)
{
debugger_instruction_hook(m_pc);
// remember previous state
m_prev_op = m_op;
m_prev_pc = m_pc;
m_prev_bl = m_bl;
m_prev_bu = m_bu;
m_prev2_c = m_prev_c;
m_prev_c = m_c;
// fetch next opcode
m_op = m_program->read_byte(m_pc);
bool skip = m_skip && op_canskip(m_op);
m_skip = false;
if (!skip)
debugger_instruction_hook(m_pc);
increment_pc();
cycle();
m_icount--;
// handle opcode if it's not skipped
if (skip)
m_op = 0; // fake nop
else
execute_one();
// some opcodes have multiple steps and will run in parallel with next ones,
// eg. it may fetch in order A,B and then execute in order B,A
op_atbz(m_atbz_step);
op_tkbs(m_tkbs_step);
op_tra0(m_tra0_step);
op_tra1(m_tra1_step);
op_ret(m_ret_step);
// some opcodes delay RAM address adjustment for 1 cycle
m_ram_addr = (m_bu << 4 & 0x30) | (m_bl & 0xf);
if (m_bu_delay)
{
m_ram_addr = (m_ram_addr & 0xf) | (m_prev_bu << 4 & 0x30);
m_bu_delay = false;
}
if (m_bl_delay)
{
m_ram_addr = (m_ram_addr & ~0xf) | (m_prev_bl & 0xf);
m_bl_delay = false;
}
execute_one();
}

31
src/devices/cpu/b5000/b5000base.h
View File

@ -29,7 +29,7 @@ protected:
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4-phase clock
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2; }
virtual u32 execute_max_cycles() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_one() = 0;
@ -42,21 +42,48 @@ protected:
address_space *m_data;
int m_icount;
int m_state_count;
int m_prgwidth; // ROM/RAM address size
int m_datawidth; // "
u16 m_prgmask; // "
u16 m_datamask; // "
void cycle();
void increment_pc();
virtual bool op_canskip(u8 op) = 0;
virtual u16 reset_vector() = 0;
u16 m_pc;
u16 m_prev_pc;
u16 m_s;
u8 m_op;
u8 m_prev_op;
u8 m_a;
u8 m_bl;
u8 m_bu;
u8 m_prev_bl;
u8 m_prev_bu;
bool m_bl_delay;
bool m_bu_delay;
u8 m_ram_addr;
u8 m_c;
u8 m_prev_c;
u8 m_prev2_c;
bool m_skip;
u8 m_atbz_step;
u8 m_tkbs_step;
u8 m_tra0_step;
u8 m_tra1_step;
u8 m_ret_step;
virtual void op_atbz(u8 step) { ; }
virtual void op_tkbs(u8 step) { ; }
virtual void op_tra0(u8 step) { ; }
virtual void op_tra1(u8 step) { ; }
virtual void op_ret(u8 step) { ; }
// i/o handlers
};

9
src/devices/cpu/b5000/b5000d.cpp
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@ -110,7 +110,6 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
{
switch (param ^ 2)
{
case 1: stream << "S"; break; // 0,1
case 2: stream << "C"; break; // 1,0
case 3: stream << "C,S"; break; // 1,1
@ -167,9 +166,9 @@ offs_t b5000_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
}
// B5900/B6100 disasm (for A5xxx, the only difference is ATBZ = MTD)
// B5500/B6100 disasm (for A5xxx, the only difference is ATBZ = MTD)
const u8 b5900_disassembler::b5900_opmap[0x100] =
const u8 b5500_disassembler::b5500_opmap[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
em_NOP, em_TC, em_TKB, em_TKBS, em_TDIN, em_TDIN, em_TDIN, em_TDIN, em_TM, em_TM, em_TM, em_TM, em_SC, em_RSC, 0, 0, // 0
@ -193,7 +192,7 @@ const u8 b5900_disassembler::b5900_opmap[0x100] =
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // F
};
offs_t b5900_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
offs_t b5500_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
return common_disasm(b5900_opmap, stream, pc, opcodes, params);
return common_disasm(b5500_opmap, stream, pc, opcodes, params);
}

8
src/devices/cpu/b5000/b5000d.h
View File

@ -62,16 +62,16 @@ private:
};
class b5900_disassembler : public b5000_common_disassembler
class b5500_disassembler : public b5000_common_disassembler
{
public:
b5900_disassembler() = default;
virtual ~b5900_disassembler() = default;
b5500_disassembler() = default;
virtual ~b5500_disassembler() = default;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const u8 b5900_opmap[0x100];
static const u8 b5500_opmap[0x100];
};

218
src/devices/cpu/b5000/b5000op.cpp
View File

@ -11,24 +11,232 @@
inline u8 b5000_cpu_device::ram_r()
{
return 0;
//return m_data->read_byte(m_b) & 0xf;
return m_data->read_byte(m_ram_addr) & 0xf;
}
inline void b5000_cpu_device::ram_w(u8 data)
{
//m_data->write_byte(m_b, data & 0xf);
m_data->write_byte(m_ram_addr, data & 0xf);
}
void b5000_cpu_device::pop_pc()
{
//m_pc = m_sa;
m_pc = m_s;
}
void b5000_cpu_device::push_pc()
{
//m_sa = m_pc;
m_s = m_pc;
}
void b5000_cpu_device::set_bu(u8 bu)
{
m_bu = bu & 3;
// changing from 0 to non-0 or vice versa delays RAM address modification
if ((m_bu && !m_prev_bu) || (!m_bu && m_prev_bu))
m_bu_delay = true;
}
void b5000_cpu_device::op_illegal()
{
logerror("unknown opcode $%02X at $%03X\n", m_op, m_prev_pc);
}
// opcodes
// ROM addressing instructions
void b5000_cpu_device::op_tl()
{
// x
}
void b5000_cpu_device::op_tra1(u8 step)
{
// x
}
void b5000_cpu_device::op_tra0(u8 step)
{
// x
}
void b5000_cpu_device::op_ret(u8 step)
{
// x
}
void b5000_cpu_device::op_nop()
{
// NOP: no operation
}
// RAM addressing instructions
void b5000_cpu_device::op_lb(u8 bl)
{
// LB x,y: load B from x,y (successive LB are ignored)
if (!op_is_lb(m_prev_op))
{
m_bl = bl;
set_bu(m_op & 3);
}
}
void b5000_cpu_device::op_atb()
{
// ATB: load Bl from A (ignore if previous opcode was LB)
if (!op_is_lb(m_prev_op))
m_bl = m_a;
}
void b5000_cpu_device::op_lda()
{
// LDA x: load A from RAM, XOR Bu with x
m_a = ram_r();
set_bu(m_op ^ m_bu);
}
void b5000_cpu_device::op_exc0()
{
// EXC x,0: exchange A with RAM, XOR Bu with x
u8 a = m_a;
m_a = ram_r();
ram_w(a);
set_bu(m_op ^ m_bu);
}
void b5000_cpu_device::op_excp()
{
// EXC x,+1: EXC x,0 + increment Bl and skip on 3-bit overflow
op_exc0();
m_bl = (m_bl + 1) & 0xf;
m_skip = (m_bl & 7) == 0;
m_bl_delay = true;
}
void b5000_cpu_device::op_excm()
{
// EXC x,-1: EXC x,0 + decrement Bl and skip on overflow
op_exc0();
m_bl = (m_bl - 1) & 0xf;
m_skip = (m_bl == 0xf);
m_bl_delay = true;
}
void b5000_cpu_device::op_sm()
{
// SM x: set bit x in RAM
ram_w(ram_r() | (1 << (m_op & 3)));
}
void b5000_cpu_device::op_rsm()
{
// RSM x: reset bit x in RAM
ram_w(ram_r() & ~(1 << (m_op & 3)));
}
void b5000_cpu_device::op_tm()
{
// TM x: skip next if bit x in RAM is clear
m_skip = !BIT(ram_r(), m_op & 3);
}
void b5000_cpu_device::op_tam()
{
// TAM: skip next if A equals RAM
m_skip = (m_a == ram_r());
}
// arithmetic instructions
void b5000_cpu_device::op_lax()
{
// LAX x: load A from x
m_a = ~m_op & 0xf;
}
void b5000_cpu_device::op_comp()
{
// COMP: complement A
m_a ^= 0xf;
}
void b5000_cpu_device::op_adx()
{
// ADX x: add x to A, skip on no overflow
m_a += ~m_op & 0xf;
m_skip = !(m_a & 0x10);
m_a &= 0xf;
}
void b5000_cpu_device::op_add()
{
// ADD (C),(S): add RAM to A (optional carry/skip)
m_a += ram_r();
if (~m_op & 2)
{
m_a += m_c;
m_c = BIT(m_a, 4);
}
if (m_op & 1)
m_skip = !BIT(m_a, 4);
m_a &= 0xf;
}
void b5000_cpu_device::op_sc()
{
// SC: set carry
m_c = 1;
}
void b5000_cpu_device::op_rsc()
{
// RSC: reset carry
m_c = 0;
}
void b5000_cpu_device::op_tc()
{
// TC: skip next on carry
m_skip = bool(m_c);
}
// I/O instructions
void b5000_cpu_device::op_kseg()
{
// KSEG: reset segment outputs
}
void b5000_cpu_device::op_atbz(u8 step)
{
// ATBZ (aka ATB on B5xxx): ATB + load strobe (multi step)
if (step)
m_atbz_step++;
}
void b5000_cpu_device::op_tkb()
{
// x
}
void b5000_cpu_device::op_tkbs(u8 step)
{
// x
}
void b5000_cpu_device::op_read()
{
// x
}
void b5000_cpu_device::op_tdin()
{
// x
}

23
src/devices/cpu/cops1/cops1base.cpp
View File

@ -60,12 +60,6 @@ cops1_base_device::cops1_base_device(const machine_config &mconfig, device_type
// device_start - device-specific startup
//-------------------------------------------------
enum
{
COPS1_PC=1, COPS1_SA, COPS1_SB,
COPS1_A, COPS1_C, COPS1_H, COPS1_B, COPS1_F
};
void cops1_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -125,15 +119,16 @@ void cops1_base_device::device_start()
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%03X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_prev_pc).formatstr("%03X").noshow();
state_add(COPS1_PC, "PC", m_pc).formatstr("%03X");
state_add(COPS1_SA, "SA", m_sa).formatstr("%03X");
state_add(COPS1_SB, "SB", m_sb).formatstr("%03X");
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%03X"); // 1
state_add(++m_state_count, "SA", m_sa).formatstr("%03X"); // 2
state_add(++m_state_count, "SB", m_sb).formatstr("%03X"); // 3
state_add(COPS1_A, "A", m_a).formatstr("%01X");
state_add(COPS1_C, "C", m_c).formatstr("%01X");
state_add(COPS1_H, "H", m_h).formatstr("%01X");
state_add(COPS1_B, "B", m_b).formatstr("%02X");
state_add(COPS1_F, "F", m_f).formatstr("%01X");
state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 4
state_add(++m_state_count, "C", m_c).formatstr("%01X"); // 5
state_add(++m_state_count, "H", m_h).formatstr("%01X"); // 6
state_add(++m_state_count, "B", m_b).formatstr("%02X"); // 7
state_add(++m_state_count, "F", m_f).formatstr("%01X"); // 8
set_icountptr(m_icount);
}

1
src/devices/cpu/cops1/cops1base.h
View File

@ -92,6 +92,7 @@ protected:
address_space *m_data;
int m_icount;
int m_state_count;
// fixed settings or mask options
int m_prgwidth; // ROM/RAM address size

23
src/devices/cpu/hmcs40/hmcs40.cpp
View File

@ -199,12 +199,6 @@ std::unique_ptr<util::disasm_interface> hmcs40_cpu_device::create_disassembler()
// device_start - device-specific startup
//-------------------------------------------------
enum
{
HMCS40_PC=1, HMCS40_A, HMCS40_B,
HMCS40_X, HMCS40_SPX, HMCS40_Y, HMCS40_SPY
};
void hmcs40_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -282,18 +276,19 @@ void hmcs40_cpu_device::device_start()
save_item(NAME(m_d));
// register state for debugger
state_add(HMCS40_PC, "PC", m_pc).formatstr("%04X");
state_add(HMCS40_A, "A", m_a).formatstr("%01X");
state_add(HMCS40_B, "B", m_b).formatstr("%01X");
state_add(HMCS40_X, "X", m_x).formatstr("%01X");
state_add(HMCS40_SPX, "SPX", m_spx).formatstr("%01X");
state_add(HMCS40_Y, "Y", m_y).formatstr("%01X");
state_add(HMCS40_SPY, "SPY", m_spy).formatstr("%01X");
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_s).formatstr("%2s").noshow();
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 2
state_add(++m_state_count, "B", m_b).formatstr("%01X"); // 3
state_add(++m_state_count, "X", m_x).formatstr("%01X"); // 4
state_add(++m_state_count, "SPX", m_spx).formatstr("%01X"); // 5
state_add(++m_state_count, "Y", m_y).formatstr("%01X"); // 6
state_add(++m_state_count, "SPY", m_spy).formatstr("%01X"); // 7
set_icountptr(m_icount);
}

4
src/devices/cpu/hmcs40/hmcs40.h
View File

@ -134,6 +134,9 @@ protected:
address_space *m_program;
address_space *m_data;
int m_icount;
int m_state_count;
int m_pcwidth; // Program Counter bit-width
int m_prgwidth;
int m_datawidth;
@ -151,7 +154,6 @@ protected:
int m_eint_line; // which input_line caused an interrupt
int m_halt; // internal HLT state
u8 m_prescaler; // internal timer prescaler
int m_icount;
u16 m_pc; // Program Counter
u16 m_prev_pc;

32
src/devices/cpu/melps4/melps4.cpp
View File

@ -96,13 +96,6 @@ void melps4_cpu_device::state_string_export(const device_state_entry &entry, std
// device_start - device-specific startup
//-------------------------------------------------
enum
{
MELPS4_PC=1, MELPS4_A, MELPS4_B, MELPS4_E,
MELPS4_Y, MELPS4_X, MELPS4_Z,
MELPS4_H, MELPS4_L, MELPS4_C, MELPS4_V, MELPS4_W
};
void melps4_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -218,19 +211,20 @@ void melps4_cpu_device::device_start()
state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_cy).formatstr("%9s").noshow();
state_add(MELPS4_PC, "PC", m_pc).formatstr("%04X");
state_add(MELPS4_A, "A", m_a).formatstr("%2d"); // show in decimal
state_add(MELPS4_B, "B", m_b).formatstr("%2d"); // "
state_add(MELPS4_E, "E", m_e).formatstr("%02X");
state_add(MELPS4_Y, "Y", m_y).formatstr("%1X");
state_add(MELPS4_X, "X", m_x).formatstr("%1d");
state_add(MELPS4_Z, "Z", m_z).formatstr("%1d");
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
state_add(++m_state_count, "A", m_a).formatstr("%2d"); // 2 - show in decimal
state_add(++m_state_count, "B", m_b).formatstr("%2d"); // 3 - "
state_add(++m_state_count, "E", m_e).formatstr("%02X"); // 4
state_add(++m_state_count, "Y", m_y).formatstr("%1X"); // 5
state_add(++m_state_count, "X", m_x).formatstr("%1d"); // 6
state_add(++m_state_count, "Z", m_z).formatstr("%1d"); // 7
state_add(MELPS4_H, "H", m_h).formatstr("%1X");
state_add(MELPS4_L, "L", m_l).formatstr("%1X");
state_add(MELPS4_C, "C", m_c).formatstr("%1X");
state_add(MELPS4_V, "V", m_v).formatstr("%1X");
state_add(MELPS4_W, "W", m_w).formatstr("%1X");
state_add(++m_state_count, "H", m_h).formatstr("%1X"); // 8
state_add(++m_state_count, "L", m_l).formatstr("%1X"); // 9
state_add(++m_state_count, "C", m_c).formatstr("%1X"); // 10
state_add(++m_state_count, "V", m_v).formatstr("%1X"); // 11
state_add(++m_state_count, "W", m_w).formatstr("%1X"); // 12
set_icountptr(m_icount);
}

1
src/devices/cpu/melps4/melps4.h
View File

@ -120,6 +120,7 @@ protected:
address_space *m_data;
int m_icount;
int m_state_count;
// fixed settings or mask options that differ between MCU type
int m_prgwidth; // number of bits and bitmask for ROM/RAM size: see melps4.c for info

6
src/devices/cpu/melps4/melps4d.cpp
View File

@ -104,15 +104,15 @@ offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
{
uint8_t x = op >> 4 & 3;
uint8_t y = op & 0xf;
util::stream_format(stream, " %d,%d", x, y);
util::stream_format(stream, "%d,%d", x, y);
}
else if (bits > 0)
{
uint8_t param = op & ((1 << bits) - 1);
if (bits > 4)
util::stream_format(stream, " $%02X", param);
util::stream_format(stream, "$%02X", param);
else
util::stream_format(stream, " %d", param);
util::stream_format(stream, "%d", param);
}
return 1 | em_flags[instr] | SUPPORTED;

2
src/devices/cpu/pps41/mm78.cpp
View File

@ -91,7 +91,7 @@ void mm78_device::device_start()
mm76_device::device_start();
m_stack_levels = 2;
state_add(++m_state_count, "X", m_x).formatstr("%01X");
state_add(++m_state_count, "X", m_x).formatstr("%01X"); // 6
}
void mm78_device::device_reset()

10
src/devices/cpu/pps41/pps41base.cpp
View File

@ -177,11 +177,11 @@ void pps41_base_device::device_start()
state_add(STATE_GENPCBASE, "CURPC", m_prev_pc).formatstr("%03X").noshow();
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%03X");
state_add(++m_state_count, "A", m_a).formatstr("%01X");
state_add(++m_state_count, "C", m_c_in).formatstr("%01X");
state_add(++m_state_count, "B", m_b).formatstr("%02X");
state_add(++m_state_count, "S", m_s).formatstr("%01X");
state_add(++m_state_count, "PC", m_pc).formatstr("%03X"); // 1
state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 2
state_add(++m_state_count, "C", m_c_in).formatstr("%01X"); // 3
state_add(++m_state_count, "B", m_b).formatstr("%02X"); // 4
state_add(++m_state_count, "S", m_s).formatstr("%01X"); // 5
set_icountptr(m_icount);
}

23
src/devices/cpu/sm510/sm510base.cpp
View File

@ -24,12 +24,6 @@
// device_start - device-specific startup
//-------------------------------------------------
enum
{
SM510_PC=1, SM510_ACC, SM510_X, SM510_BL, SM510_BM,
SM510_C, SM510_W
};
void sm510_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -111,18 +105,19 @@ void sm510_base_device::device_start()
save_item(NAME(m_clk_div));
// register state for debugger
state_add(SM510_PC, "PC", m_pc).formatstr("%04X");
state_add(SM510_ACC, "ACC", m_acc).formatstr("%01X");
state_add(SM510_X, "X", m_x).formatstr("%01X");
state_add(SM510_BL, "BL", m_bl).formatstr("%01X");
state_add(SM510_BM, "BM", m_bm).formatstr("%01X");
state_add(SM510_C, "C", m_c).formatstr("%01X");
state_add(SM510_W, "W", m_w).formatstr("%02X");
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_c).formatstr("%1s").noshow();
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
state_add(++m_state_count, "ACC", m_acc).formatstr("%01X"); // 2
state_add(++m_state_count, "X", m_x).formatstr("%01X"); // 3
state_add(++m_state_count, "BL", m_bl).formatstr("%01X"); // 4
state_add(++m_state_count, "BM", m_bm).formatstr("%01X"); // 5
state_add(++m_state_count, "C", m_c).formatstr("%01X"); // 6
state_add(++m_state_count, "W", m_w).formatstr("%02X"); // 7
set_icountptr(m_icount);
// init peripherals

4
src/devices/cpu/sm510/sm510base.h
View File

@ -120,12 +120,14 @@ protected:
int m_datamask;
int m_pagemask;
int m_icount;
int m_state_count;
u16 m_pc, m_prev_pc;
u16 m_op, m_prev_op;
u8 m_param;
int m_stack_levels;
u16 m_stack[4]; // max 4
int m_icount;
u8 m_acc;
u8 m_bl;

25
src/devices/cpu/tms1000/tms1k_base.cpp
View File

@ -115,12 +115,6 @@ void tms1k_base_device::state_string_export(const device_state_entry &entry, std
// device_start - device-specific startup
//-------------------------------------------------
enum
{
TMS1XXX_PC=1, TMS1XXX_SR, TMS1XXX_PA, TMS1XXX_PB,
TMS1XXX_A, TMS1XXX_X, TMS1XXX_Y, TMS1XXX_STATUS
};
void tms1k_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -223,19 +217,20 @@ void tms1k_base_device::device_start()
save_item(NAME(m_subcycle));
// register state for debugger
state_add(TMS1XXX_PC, "PC", m_pc ).formatstr("%02X");
state_add(TMS1XXX_SR, "SR", m_sr ).formatstr("%01X");
state_add(TMS1XXX_PA, "PA", m_pa ).formatstr("%01X");
state_add(TMS1XXX_PB, "PB", m_pb ).formatstr("%01X");
state_add(TMS1XXX_A, "A", m_a ).formatstr("%01X");
state_add(TMS1XXX_X, "X", m_x ).formatstr("%01X");
state_add(TMS1XXX_Y, "Y", m_y ).formatstr("%01X");
state_add(TMS1XXX_STATUS, "STATUS", m_status).formatstr("%01X");
state_add(STATE_GENPC, "GENPC", m_rom_address).formatstr("%03X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_rom_address).formatstr("%03X").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_sr).formatstr("%8s").noshow();
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%02X"); // 1
state_add(++m_state_count, "SR", m_sr).formatstr("%01X"); // 2
state_add(++m_state_count, "PA", m_pa).formatstr("%01X"); // 3
state_add(++m_state_count, "PB", m_pb).formatstr("%01X"); // 4
state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 5
state_add(++m_state_count, "X", m_x).formatstr("%01X"); // 6
state_add(++m_state_count, "Y", m_y).formatstr("%01X"); // 7
state_add(++m_state_count, "STATUS", m_status).formatstr("%01X"); // 8
set_icountptr(m_icount);
}

4
src/devices/cpu/tms1000/tms1k_base.h
View File

@ -248,7 +248,6 @@ protected:
u32 m_fixed;
u32 m_micro;
int m_subcycle;
int m_icount;
u8 m_o_index;
u8 m_o_pins; // how many O pins
@ -276,6 +275,9 @@ protected:
u32 m_pc_mask;
u32 m_x_mask;
int m_icount;
int m_state_count;
// lookup tables
std::vector<u32> m_fixed_decode;
std::vector<u32> m_micro_decode;

17
src/devices/cpu/ucom4/ucom4.cpp
View File

@ -151,12 +151,6 @@ std::unique_ptr<util::disasm_interface> ucom4_cpu_device::create_disassembler()
// device_start - device-specific startup
//-------------------------------------------------
enum
{
UCOM4_PC=1, UCOM4_DPL, UCOM4_DPH,
UCOM4_ACC
};
void ucom4_cpu_device::device_start()
{
assert(PORTA == 0);
@ -219,15 +213,16 @@ void ucom4_cpu_device::device_start()
save_item(NAME(m_int_line));
// register state for debugger
state_add(UCOM4_PC, "PC", m_pc).formatstr("%04X");
state_add(UCOM4_DPL, "DPL", m_dpl).formatstr("%01X");
state_add(UCOM4_DPH, "DPH", m_dph).formatstr("%01X");
state_add(UCOM4_ACC, "ACC", m_acc).formatstr("%01X");
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_carry_f).formatstr("%5s").noshow(); // dummy
m_state_count = 0;
state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
state_add(++m_state_count, "DPL", m_dpl).formatstr("%01X"); // 2
state_add(++m_state_count, "DPH", m_dph).formatstr("%01X"); // 3
state_add(++m_state_count, "ACC", m_acc).formatstr("%01X"); // 4
set_icountptr(m_icount);
}

4
src/devices/cpu/ucom4/ucom4.h
View File

@ -116,6 +116,9 @@ protected:
address_space *m_program;
address_space *m_data;
int m_icount;
int m_state_count;
int m_prgwidth;
int m_datawidth;
int m_prgmask;
@ -129,7 +132,6 @@ protected:
u8 m_arg; // opcode argument for 2-byte opcodes
u8 m_bitmask; // opcode bit argument
bool m_skip; // skip next opcode
int m_icount;
emu_timer *m_timer;
u16 m_pc; // program counter

2
src/tools/unidasm.cpp
View File

@ -392,7 +392,7 @@ static const dasm_table_entry dasm_table[] =
{ "axc51core", le, 0, []() -> util::disasm_interface * { return new axc51core_disassembler; } },
{ "axc208", le, 0, []() -> util::disasm_interface * { return new ax208_disassembler; } },
{ "b5000", le, 0, []() -> util::disasm_interface * { return new b5000_disassembler; } },
{ "b5900", le, 0, []() -> util::disasm_interface * { return new b5900_disassembler; } },
{ "b5500", le, 0, []() -> util::disasm_interface * { return new b5500_disassembler; } },
{ "capricorn", le, 0, []() -> util::disasm_interface * { return new capricorn_disassembler; } },
{ "ccpu", le, 0, []() -> util::disasm_interface * { return new ccpu_disassembler; } },
{ "cdp1801", le, 0, []() -> util::disasm_interface * { return new cosmac_disassembler(cosmac_disassembler::TYPE_1801); } },