mirror of
https://github.com/holub/mame
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Merge pull request #5061 from cam900/pgm_args
pgm.cpp, pgmprot_*.cpp : Updates
This commit is contained in:
commit
4e6a5bd3df
File diff suppressed because it is too large
Load Diff
@ -28,11 +28,13 @@ class pgm_state : public driver_device
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public:
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pgm_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_mainram(*this, "sram")
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, m_region(*this, "Region")
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, m_regionhack(*this, "RegionHack")
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, m_maincpu(*this, "maincpu")
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, m_videoregs(*this, "videoregs")
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, m_videoram(*this, "videoram")
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, m_z80_mainram(*this, "z80_mainram")
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, m_mainram(*this, "sram")
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, m_maincpu(*this, "maincpu")
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, m_soundcpu(*this, "soundcpu")
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, m_gfxdecode(*this, "gfxdecode")
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, m_palette(*this, "palette")
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@ -44,24 +46,48 @@ public:
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m_irq4_disabled = 0;
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}
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void init_pgm();
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void pgm_basic_init(bool set_bank = true);
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void pgm(machine_config &config);
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void pgmbase(machine_config &config);
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protected:
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virtual void machine_reset() override;
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virtual void video_start() override;
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/* memory pointers */
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required_shared_ptr<uint16_t> m_videoregs;
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required_shared_ptr<uint16_t> m_videoram;
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required_shared_ptr<uint8_t> m_z80_mainram;
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required_shared_ptr<uint16_t> m_mainram;
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uint16_t * m_bg_videoram;
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uint16_t * m_tx_videoram;
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uint16_t * m_rowscrollram;
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std::unique_ptr<uint8_t[]> m_sprite_a_region;
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required_shared_ptr<u16> m_mainram;
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optional_ioport m_region;
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optional_ioport m_regionhack;
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/* devices */
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required_device<cpu_device> m_maincpu;
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/* hack */
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int m_irq4_disabled;
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void pgm_base_mem(address_map &map);
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void pgm_mem(address_map &map);
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private:
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/* memory pointers */
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required_shared_ptr<u16> m_videoregs;
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required_shared_ptr<u16> m_videoram;
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required_shared_ptr<u8> m_z80_mainram;
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u16 * m_bg_videoram;
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u16 * m_tx_videoram;
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u16 * m_rowscrollram;
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std::unique_ptr<u8[]> m_sprite_a_region;
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size_t m_sprite_a_region_size;
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std::unique_ptr<uint16_t[]> m_spritebufferram; // buffered spriteram
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std::unique_ptr<u16[]> m_spritebufferram; // buffered spriteram
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/* video-related */
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tilemap_t *m_bg_tilemap;
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tilemap_t *m_tx_tilemap;
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/* devices */
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_soundcpu;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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@ -70,65 +96,45 @@ public:
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required_device<ics2115_device> m_ics;
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/* used by rendering */
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required_region_ptr<uint8_t> m_bdata;
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required_region_ptr<u8> m_bdata;
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int m_aoffset;
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int m_boffset;
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/* hack */
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int m_irq4_disabled;
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u16 videoram_r(offs_t offset);
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void videoram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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void coin_counter_w(u16 data);
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u8 z80_ram_r(offs_t offset);
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void z80_ram_w(offs_t offset, u8 data);
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void z80_reset_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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void z80_ctrl_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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void m68k_l1_w(u8 data);
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void z80_l3_w(u8 data);
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void tx_videoram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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void bg_videoram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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/* calendar */
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uint8_t m_cal_val;
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uint8_t m_cal_mask;
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uint8_t m_cal_com;
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uint8_t m_cal_cnt;
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system_time m_systime;
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TILE_GET_INFO_MEMBER(get_tx_tile_info);
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TILE_GET_INFO_MEMBER(get_bg_tile_info);
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u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER(screen_vblank);
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TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
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DECLARE_READ16_MEMBER(pgm_videoram_r);
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DECLARE_WRITE16_MEMBER(pgm_videoram_w);
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DECLARE_WRITE16_MEMBER(pgm_coin_counter_w);
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DECLARE_READ16_MEMBER(z80_ram_r);
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DECLARE_WRITE16_MEMBER(z80_ram_w);
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DECLARE_WRITE16_MEMBER(z80_reset_w);
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DECLARE_WRITE16_MEMBER(z80_ctrl_w);
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DECLARE_WRITE16_MEMBER(m68k_l1_w);
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DECLARE_WRITE8_MEMBER(z80_l3_w);
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DECLARE_WRITE16_MEMBER(pgm_tx_videoram_w);
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DECLARE_WRITE16_MEMBER(pgm_bg_videoram_w);
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void init_pgm();
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TILE_GET_INFO_MEMBER(get_pgm_tx_tilemap_tile_info);
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TILE_GET_INFO_MEMBER(get_pgm_bg_tilemap_tile_info);
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DECLARE_VIDEO_START(pgm);
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DECLARE_MACHINE_START(pgm);
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DECLARE_MACHINE_RESET(pgm);
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uint32_t screen_update_pgm(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER(screen_vblank_pgm);
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TIMER_DEVICE_CALLBACK_MEMBER(pgm_interrupt);
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inline void pgm_draw_pix( int xdrawpos, int pri, uint16_t* dest, uint8_t* destpri, uint16_t srcdat);
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inline void pgm_draw_pix_nopri( int xdrawpos, uint16_t* dest, uint8_t* destpri, uint16_t srcdat);
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inline void pgm_draw_pix_pri( int xdrawpos, uint16_t* dest, uint8_t* destpri, uint16_t srcdat);
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void draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, int xzoom, int xgrow, int flip, int xpos, int pri, int realxsize, int palt, int draw );
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void draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, uint32_t xzoom, int xgrow, uint32_t yzoom, int ygrow, int pri );
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void draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destpri, int flip, int xpos, int pri, int realxsize, int palt, int draw );
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void draw_sprite_new_basic( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, int pri );
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void draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_source, bitmap_ind8& priority_bitmap );
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inline void pgm_draw_pix(int xdrawpos, int pri, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat);
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inline void pgm_draw_pix_nopri(int xdrawpos, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat);
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inline void pgm_draw_pix_pri(int xdrawpos, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat);
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void draw_sprite_line(int wide, u16* dest, u8* destpri, const rectangle &cliprect, int xzoom, bool xgrow, int flip, int xpos, int pri, int realxsize, int palt, bool draw);
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void draw_sprite_new_zoomed(int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, u32 xzoom, bool xgrow, u32 yzoom, bool ygrow, int pri);
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void draw_sprite_line_basic(int wide, u16* dest, u8* destpri, const rectangle &cliprect, int flip, int xpos, int pri, int realxsize, int palt, bool draw);
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void draw_sprite_new_basic(int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, int pri);
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void draw_sprites(bitmap_ind16& spritebitmap, const rectangle &cliprect, u16 *sprite_source, bitmap_ind8& priority_bitmap);
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void expand_colourdata();
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void pgm_basic_init( bool set_bank = true);
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void pgm(machine_config &config);
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void pgmbase(machine_config &config);
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void pgm_base_mem(address_map &map);
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void pgm_basic_mem(address_map &map);
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void pgm_mem(address_map &map);
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void pgm_z80_io(address_map &map);
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void pgm_z80_mem(address_map &map);
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};
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/*----------- defined in drivers/pgm.c -----------*/
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/*----------- defined in drivers/pgm.cpp -----------*/
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INPUT_PORTS_EXTERN(pgm);
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@ -25,14 +25,13 @@
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void pgm_012_025_state::pgm_drgw2_decrypt()
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{
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int i;
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uint16_t *src = (uint16_t *) (memregion("maincpu")->base()+0x100000);
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u16 *src = (u16 *) (memregion("maincpu")->base() + 0x100000);
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int rom_size = 0x80000;
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for (i = 0; i < rom_size / 2; i++)
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for (int i = 0; i < rom_size / 2; i++)
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{
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uint16_t x = src[i];
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u16 x = src[i];
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if (((i & 0x20890) == 0) || ((i & 0x20000) == 0x20000 && (i & 0x01500) != 0x01400))
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x ^= 0x0002;
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@ -46,7 +45,7 @@ void pgm_012_025_state::pgm_drgw2_decrypt()
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// All tables all xored by 'warning' information at $1354ee (drgw2)
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// tables are the same as drgw3 and olds
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static const uint8_t drgw2_source_data[0x08][0xec] =
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static const u8 drgw2_source_data[0x08][0xec] =
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{
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{ 0, }, // Region 0, not used
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{ // Region 1, $13A886
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@ -106,24 +105,14 @@ static const uint8_t drgw2_source_data[0x08][0xec] =
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{ 0, } // Region 7, not used
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};
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MACHINE_RESET_MEMBER(pgm_012_025_state,drgw2)
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{
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MACHINE_RESET_CALL_MEMBER(pgm);
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}
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void pgm_012_025_state::drgw2_common_init()
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{
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m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xd80000, 0xd80003, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::drgw2_d80000_protection_w), (igs025_device*)m_igs025));
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m_igs025->m_kb_source_data = drgw2_source_data;
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pgm_basic_init();
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pgm_drgw2_decrypt();
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}
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void pgm_012_025_state::drgw2_mem(address_map &map)
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@ -141,19 +130,17 @@ void pgm_012_025_state::pgm_012_025_drgw2(machine_config &config)
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IGS025(config, m_igs025, 0);
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//m_igs025->set_external_cb(FUNC(pgm_022_025_state::igs025_to_igs012_callback), this);
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MCFG_MACHINE_RESET_OVERRIDE(pgm_012_025_state,drgw2)
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}
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void pgm_012_025_state::init_drgw2()
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{
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/* incomplete? */
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uint16_t *mem16 = (uint16_t *)memregion("maincpu")->base();
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u16 *mem16 = (u16 *)memregion("maincpu")->base();
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drgw2_common_init();
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int region = 0x06;
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const int region = 0x06;
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m_igs025->m_kb_region = region;
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m_igs025->m_kb_game_id = region | (region << 8) | (region << 16) | (region << 24);
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@ -164,11 +151,11 @@ void pgm_012_025_state::init_drgw2()
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void pgm_012_025_state::init_dw2v100x()
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{
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uint16_t *mem16 = (uint16_t *)memregion("maincpu")->base();
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u16 *mem16 = (u16 *)memregion("maincpu")->base();
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drgw2_common_init();
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int region = 0x06;
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const int region = 0x06;
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m_igs025->m_kb_region = region;
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m_igs025->m_kb_game_id = region | (region << 8) | (region << 16) | (region << 24);
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@ -179,11 +166,11 @@ void pgm_012_025_state::init_dw2v100x()
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void pgm_012_025_state::init_drgw2c()
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{
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uint16_t *mem16 = (uint16_t *)memregion("maincpu")->base();
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u16 *mem16 = (u16 *)memregion("maincpu")->base();
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drgw2_common_init();
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int region = 0x05;
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const int region = 0x05;
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m_igs025->m_kb_region = region;
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m_igs025->m_kb_game_id = region | (region << 8) | (region << 16) | (region << 24);
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@ -194,11 +181,11 @@ void pgm_012_025_state::init_drgw2c()
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void pgm_012_025_state::init_drgw2j()
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{
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uint16_t *mem16 = (uint16_t *)memregion("maincpu")->base();
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u16 *mem16 = (u16 *)memregion("maincpu")->base();
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drgw2_common_init();
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int region = 0x01;
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const int region = 0x01;
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m_igs025->m_kb_region = region;
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m_igs025->m_kb_game_id = region | (region << 8) | (region << 16) | (region << 24);
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@ -212,11 +199,11 @@ void pgm_012_025_state::init_drgw2hk()
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drgw2_common_init();
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// todo, correct protection sequence for this region?
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int region = 0x01;
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const int region = 0x01;
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m_igs025->m_kb_region = region;
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m_igs025->m_kb_game_id = region | (region << 8) | (region << 16) | (region << 24);
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uint16_t *mem16 = (uint16_t *)memregion("maincpu")->base();
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u16 *mem16 = (u16 *)memregion("maincpu")->base();
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mem16[0x12f520 / 2] = 0x4e93;
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mem16[0x12f5c6 / 2] = 0x4e93;
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mem16[0x12f656 / 2] = 0x4e93;
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@ -10,10 +10,6 @@ public:
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{
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}
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required_device<igs025_device> m_igs025;
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void pgm_drgw2_decrypt();
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void drgw2_common_init();
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void init_drgw2();
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@ -22,7 +18,10 @@ public:
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void init_drgw2j();
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void init_drgw2hk();
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DECLARE_MACHINE_RESET(drgw2);
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void pgm_012_025_drgw2(machine_config &config);
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private:
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required_device<igs025_device> m_igs025;
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void pgm_drgw2_decrypt();
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void drgw2_mem(address_map &map);
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};
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@ -36,13 +36,13 @@
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void pgm_022_025_state::pgm_dw3_decrypt()
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{
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int i;
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uint16_t *src = (uint16_t *) (memregion("maincpu")->base()+0x100000);
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u16 *src = (u16 *) (memregion("maincpu")->base() + 0x100000);
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int rom_size = 0x100000;
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for(i=0; i<rom_size/2; i++) {
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uint16_t x = src[i];
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for (int i = 0; i < rom_size / 2; i++)
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{
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u16 x = src[i];
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if ((i & 0x005460) == 0x001400 || (i & 0x005450) == 0x001040)
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x ^= 0x0100;
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@ -56,13 +56,13 @@ void pgm_022_025_state::pgm_dw3_decrypt()
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void pgm_022_025_state::pgm_killbld_decrypt()
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{
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int i;
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uint16_t *src = (uint16_t *) (memregion("maincpu")->base()+0x100000);
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u16 *src = (u16 *) (memregion("maincpu")->base() + 0x100000);
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int rom_size = 0x200000;
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for(i=0; i<rom_size/2; i++) {
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uint16_t x = src[i];
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for (int i = 0; i < rom_size / 2; i++)
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{
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u16 x = src[i];
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if ((i & 0x006d00) == 0x000400 || (i & 0x006c80) == 0x000880)
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x ^= 0x0008;
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@ -75,7 +75,7 @@ void pgm_022_025_state::pgm_killbld_decrypt()
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}
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// these were all xored by a table at $178B2A
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static const uint8_t killbld_source_data[0x0c][0xec] = // offsets to these tables stored at $155ed0
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static const u8 killbld_source_data[0x0c][0xec] = // offsets to these tables stored at $155ed0
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{
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{ // region 16, $178772
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0x5e, 0x09, 0xb3, 0x39, 0x60, 0x71, 0x71, 0x53, 0x11, 0xe5, 0x26, 0x34, 0x4c, 0x8c, 0x90, 0xee,
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@ -189,7 +189,7 @@ static const uint8_t killbld_source_data[0x0c][0xec] = // offsets to these tabl
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// all tables xored with data from $149c4c
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// tables are the same as olds and drgw2
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static const uint8_t dw3_source_data[0x08][0xec] =
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static const u8 dw3_source_data[0x08][0xec] =
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{
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{ 0, },
|
||||
{ // region 1, $14c21a
|
||||
@ -315,27 +315,25 @@ static const uint8_t dw3_source_data[0x08][0xec] =
|
||||
|
||||
MACHINE_RESET_MEMBER(pgm_022_025_state,killbld)
|
||||
{
|
||||
int region = (ioport(":Region")->read()) & 0xff;
|
||||
const int region = (ioport(":Region")->read()) & 0xff;
|
||||
|
||||
m_igs025->m_kb_region = region - 0x16;
|
||||
m_igs025->m_kb_game_id = 0x89911400 | region;
|
||||
|
||||
MACHINE_RESET_CALL_MEMBER(pgm);
|
||||
pgm_state::machine_reset();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(pgm_022_025_state, dw3)
|
||||
{
|
||||
int region = (ioport(":Region")->read()) & 0xff;
|
||||
const int region = (ioport(":Region")->read()) & 0xff;
|
||||
|
||||
m_igs025->m_kb_region = region;
|
||||
m_igs025->m_kb_game_id = 0x00060000 | region;
|
||||
|
||||
MACHINE_RESET_CALL_MEMBER(pgm);
|
||||
pgm_state::machine_reset();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void pgm_022_025_state::igs025_to_igs022_callback( void )
|
||||
{
|
||||
// printf("igs025_to_igs022_callback\n");
|
||||
@ -343,7 +341,6 @@ void pgm_022_025_state::igs025_to_igs022_callback( void )
|
||||
}
|
||||
|
||||
|
||||
|
||||
void pgm_022_025_state::init_killbld()
|
||||
{
|
||||
pgm_basic_init();
|
||||
|
@ -15,7 +15,7 @@ public:
|
||||
void pgm_dw3_decrypt();
|
||||
void pgm_killbld_decrypt();
|
||||
|
||||
required_shared_ptr<uint16_t> m_sharedprotram;
|
||||
required_shared_ptr<u16> m_sharedprotram;
|
||||
|
||||
void init_killbld();
|
||||
void init_drgw3();
|
||||
|
@ -26,7 +26,7 @@
|
||||
|
||||
// tables are xored by table at $1998dc
|
||||
// tables are the same as drgw3 and drgw2
|
||||
static const uint8_t m_olds_source_data[8][0xec] = // table addresses $2951CA
|
||||
static const u8 m_olds_source_data[8][0xec] = // table addresses $2951CA
|
||||
{
|
||||
{ // region 0, unused...
|
||||
0,
|
||||
@ -152,14 +152,14 @@ static const uint8_t m_olds_source_data[8][0xec] = // table addresses $2951CA
|
||||
}
|
||||
};
|
||||
|
||||
MACHINE_RESET_MEMBER(pgm_028_025_state,olds)
|
||||
void pgm_028_025_state::machine_reset()
|
||||
{
|
||||
int region = (ioport(":Region")->read()) & 0xff;
|
||||
const int region = (ioport(":Region")->read()) & 0xff;
|
||||
|
||||
m_igs025->m_kb_region = region;
|
||||
m_igs025->m_kb_game_id = 0x00900000 | region;
|
||||
|
||||
MACHINE_RESET_CALL_MEMBER(pgm);
|
||||
pgm_state::machine_reset();
|
||||
}
|
||||
|
||||
void pgm_028_025_state::init_olds()
|
||||
@ -169,7 +169,6 @@ void pgm_028_025_state::init_olds()
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xdcb400, 0xdcb403, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::olds_w), (igs025_device*)m_igs025));
|
||||
m_igs028->m_sharedprotram = m_sharedprotram;
|
||||
m_igs025->m_kb_source_data = m_olds_source_data;
|
||||
|
||||
}
|
||||
|
||||
void pgm_028_025_state::olds_mem(address_map &map)
|
||||
@ -196,8 +195,6 @@ void pgm_028_025_state::pgm_028_025_ol(machine_config &config)
|
||||
m_igs025->set_external_cb(FUNC(pgm_028_025_state::igs025_to_igs028_callback), this);
|
||||
|
||||
IGS028(config, m_igs028, 0);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(pgm_028_025_state,olds)
|
||||
}
|
||||
|
||||
|
||||
|
@ -13,15 +13,20 @@ public:
|
||||
{
|
||||
}
|
||||
|
||||
required_shared_ptr<uint16_t> m_sharedprotram;
|
||||
void init_olds();
|
||||
|
||||
void pgm_028_025_ol(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_reset() override;
|
||||
|
||||
private:
|
||||
required_shared_ptr<u16> m_sharedprotram;
|
||||
required_device<igs025_device> m_igs025;
|
||||
required_device<igs028_device> m_igs028;
|
||||
|
||||
void igs025_to_igs028_callback( void );
|
||||
|
||||
void init_olds();
|
||||
DECLARE_MACHINE_RESET(olds);
|
||||
void pgm_028_025_ol(machine_config &config);
|
||||
void olds_mem(address_map &map);
|
||||
};
|
||||
|
||||
|
@ -66,69 +66,74 @@
|
||||
/**************************** EMULATION *******************************/
|
||||
/* used by photoy2k, kovsh */
|
||||
|
||||
READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_protlatch_r )
|
||||
u16 pgm_arm_type1_state::arm7_type1_protlatch_r(offs_t offset)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
|
||||
if (offset & 1)
|
||||
return m_arm_type1_highlatch_68k_w;
|
||||
else
|
||||
return m_arm_type1_lowlatch_68k_w;
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::arm7_type1_protlatch_w(offs_t offset, u16 data)
|
||||
{
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
|
||||
return (m_pgm_arm_type1_highlatch_68k_w << 16) | (m_pgm_arm_type1_lowlatch_68k_w);
|
||||
if (offset & 1)
|
||||
{
|
||||
m_arm_type1_highlatch_arm_w = data;
|
||||
m_arm_type1_highlatch_68k_w = 0;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_protlatch_w )
|
||||
else
|
||||
{
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
|
||||
if (ACCESSING_BITS_16_31)
|
||||
{
|
||||
m_pgm_arm_type1_highlatch_arm_w = data >> 16;
|
||||
m_pgm_arm_type1_highlatch_68k_w = 0;
|
||||
}
|
||||
if (ACCESSING_BITS_0_15)
|
||||
{
|
||||
m_pgm_arm_type1_lowlatch_arm_w = data;
|
||||
m_pgm_arm_type1_lowlatch_68k_w = 0;
|
||||
m_arm_type1_lowlatch_arm_w = data;
|
||||
m_arm_type1_lowlatch_68k_w = 0;
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_r )
|
||||
u16 pgm_arm_type1_state::arm7_type1_68k_protlatch_r(offs_t offset)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 1: return m_pgm_arm_type1_highlatch_arm_w;
|
||||
case 0: return m_pgm_arm_type1_lowlatch_arm_w;
|
||||
case 1: return m_arm_type1_highlatch_arm_w;
|
||||
case 0: return m_arm_type1_lowlatch_arm_w;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_w )
|
||||
void pgm_arm_type1_state::arm7_type1_68k_protlatch_w(offs_t offset, u16 data)
|
||||
{
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 1:
|
||||
m_pgm_arm_type1_highlatch_68k_w = data;
|
||||
m_arm_type1_highlatch_68k_w = data;
|
||||
break;
|
||||
|
||||
case 0:
|
||||
m_pgm_arm_type1_lowlatch_68k_w = data;
|
||||
m_arm_type1_lowlatch_68k_w = data;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_ram_r )
|
||||
u16 pgm_arm_type1_state::arm7_type1_ram_r(offs_t offset, u16 mem_mask)
|
||||
{
|
||||
uint16_t *share16 = reinterpret_cast<uint16_t *>(m_arm7_shareram.target());
|
||||
const u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) %s\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, machine().describe_context());
|
||||
return share16[BYTE_XOR_LE(offset << 1)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_ram_w )
|
||||
void pgm_arm_type1_state::arm7_type1_ram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
uint16_t *share16 = reinterpret_cast<uint16_t *>(m_arm7_shareram.target());
|
||||
u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) %s\n", BYTE_XOR_LE(offset), data, mem_mask, machine().describe_context());
|
||||
@ -136,26 +141,27 @@ WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_ram_w )
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_unk_r )
|
||||
u32 pgm_arm_type1_state::arm7_type1_unk_r()
|
||||
{
|
||||
return m_pgm_arm_type1_counter++;
|
||||
const u32 val = m_arm_type1_counter;
|
||||
if (!machine().side_effects_disabled())
|
||||
m_arm_type1_counter++;
|
||||
return val;
|
||||
}
|
||||
|
||||
READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_exrom_r )
|
||||
u32 pgm_arm_type1_state::arm7_type1_exrom_r()
|
||||
{
|
||||
return 0x00000000;
|
||||
}
|
||||
|
||||
READ32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_shareram_r )
|
||||
u32 pgm_arm_type1_state::arm7_type1_shareram_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) %s\n", offset << 2, m_arm7_shareram[offset], mem_mask, machine().describe_context());
|
||||
return m_arm7_shareram[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_shareram_w )
|
||||
void pgm_arm_type1_state::arm7_type1_shareram_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) %s\n", offset << 2, data, mem_mask, machine().describe_context());
|
||||
@ -169,25 +175,23 @@ void pgm_arm_type1_state::kov_map(address_map &map)
|
||||
{
|
||||
pgm_mem(map);
|
||||
map(0x100000, 0x4effff).bankr("bank1"); /* Game ROM */
|
||||
map(0x4f0000, 0x4f003f).rw(FUNC(pgm_arm_type1_state::pgm_arm7_type1_ram_r), FUNC(pgm_arm_type1_state::pgm_arm7_type1_ram_w)); /* ARM7 Shared RAM */
|
||||
map(0x500000, 0x500005).rw(FUNC(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_r), FUNC(pgm_arm_type1_state::pgm_arm7_type1_68k_protlatch_w)); /* ARM7 Latch */
|
||||
map(0x4f0000, 0x4f003f).rw(FUNC(pgm_arm_type1_state::arm7_type1_ram_r), FUNC(pgm_arm_type1_state::arm7_type1_ram_w)); /* ARM7 Shared RAM */
|
||||
map(0x500000, 0x500005).rw(FUNC(pgm_arm_type1_state::arm7_type1_68k_protlatch_r), FUNC(pgm_arm_type1_state::arm7_type1_68k_protlatch_w)); /* ARM7 Latch */
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::_55857E_arm7_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x00003fff).rom();
|
||||
map(0x08100000, 0x083fffff).r(FUNC(pgm_arm_type1_state::pgm_arm7_type1_exrom_r)); // unpopulated, returns 0 to keep checksum happy
|
||||
map(0x08100000, 0x083fffff).r(FUNC(pgm_arm_type1_state::arm7_type1_exrom_r)); // unpopulated, returns 0 to keep checksum happy
|
||||
map(0x10000000, 0x100003ff).ram(); // internal ram for asic
|
||||
map(0x40000000, 0x40000003).rw(FUNC(pgm_arm_type1_state::pgm_arm7_type1_protlatch_r), FUNC(pgm_arm_type1_state::pgm_arm7_type1_protlatch_w));
|
||||
map(0x40000000, 0x40000003).rw(FUNC(pgm_arm_type1_state::arm7_type1_protlatch_r), FUNC(pgm_arm_type1_state::arm7_type1_protlatch_w));
|
||||
map(0x40000008, 0x4000000b).nopw(); // ?
|
||||
map(0x4000000c, 0x4000000f).r(FUNC(pgm_arm_type1_state::pgm_arm7_type1_unk_r));
|
||||
map(0x50800000, 0x5080003f).rw(FUNC(pgm_arm_type1_state::pgm_arm7_type1_shareram_r), FUNC(pgm_arm_type1_state::pgm_arm7_type1_shareram_w)).share("arm7_shareram");
|
||||
map(0x4000000c, 0x4000000f).r(FUNC(pgm_arm_type1_state::arm7_type1_unk_r));
|
||||
map(0x50800000, 0x5080003f).rw(FUNC(pgm_arm_type1_state::arm7_type1_shareram_r), FUNC(pgm_arm_type1_state::arm7_type1_shareram_w)).share("arm7_shareram");
|
||||
map(0x50000000, 0x500003ff).ram(); // uploads xor table to decrypt 68k rom here
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************** SIMULATIONS *****************************/
|
||||
|
||||
void pgm_arm_type1_state::kov_sim_map(address_map &map)
|
||||
@ -204,9 +208,8 @@ void pgm_arm_type1_state::cavepgm_mem(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
MACHINE_START_MEMBER(pgm_arm_type1_state,pgm_arm_type1)
|
||||
void pgm_arm_type1_state::machine_start()
|
||||
{
|
||||
MACHINE_START_CALL_MEMBER(pgm);
|
||||
save_item(NAME(m_value0));
|
||||
save_item(NAME(m_value1));
|
||||
save_item(NAME(m_valuekey));
|
||||
@ -221,8 +224,6 @@ void pgm_arm_type1_state::pgm_arm_type1_cave(machine_config &config)
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &pgm_arm_type1_state::cavepgm_mem);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(pgm_arm_type1_state, pgm_arm_type1 )
|
||||
|
||||
subdevice<screen_device>("screen")->set_refresh_hz(59.17); // verified on pcb
|
||||
}
|
||||
|
||||
@ -247,28 +248,28 @@ void pgm_arm_type1_state::pgm_arm_type1(machine_config &config)
|
||||
m_prot->set_addrmap(AS_PROGRAM, &pgm_arm_type1_state::_55857E_arm7_map);
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::pgm_arm7_type1_latch_init()
|
||||
void pgm_arm_type1_state::arm7_type1_latch_init()
|
||||
{
|
||||
m_pgm_arm_type1_highlatch_arm_w = 0;
|
||||
m_pgm_arm_type1_lowlatch_arm_w = 0;
|
||||
m_pgm_arm_type1_highlatch_68k_w = 0;
|
||||
m_pgm_arm_type1_lowlatch_68k_w = 0;
|
||||
m_pgm_arm_type1_counter = 1;
|
||||
m_arm_type1_highlatch_arm_w = 0;
|
||||
m_arm_type1_lowlatch_arm_w = 0;
|
||||
m_arm_type1_highlatch_68k_w = 0;
|
||||
m_arm_type1_lowlatch_68k_w = 0;
|
||||
m_arm_type1_counter = 1;
|
||||
|
||||
save_item(NAME(m_pgm_arm_type1_highlatch_arm_w));
|
||||
save_item(NAME(m_pgm_arm_type1_lowlatch_arm_w));
|
||||
save_item(NAME(m_pgm_arm_type1_highlatch_68k_w));
|
||||
save_item(NAME(m_pgm_arm_type1_lowlatch_68k_w));
|
||||
save_item(NAME(m_pgm_arm_type1_counter));
|
||||
save_item(NAME(m_arm_type1_highlatch_arm_w));
|
||||
save_item(NAME(m_arm_type1_lowlatch_arm_w));
|
||||
save_item(NAME(m_arm_type1_highlatch_68k_w));
|
||||
save_item(NAME(m_arm_type1_lowlatch_68k_w));
|
||||
save_item(NAME(m_arm_type1_counter));
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type1_state::kovsh_fake_region_r )
|
||||
u16 pgm_arm_type1_state::kovsh_fake_region_r()
|
||||
{
|
||||
int regionhack = ioport("RegionHack")->read();
|
||||
const int regionhack = m_regionhack->read();
|
||||
if (regionhack != 0xff) return regionhack;
|
||||
|
||||
offset = 0x4;
|
||||
uint16_t *share16 = reinterpret_cast<uint16_t *>(m_arm7_shareram.target());
|
||||
offs_t offset = 0x4;
|
||||
u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
|
||||
return share16[BYTE_XOR_LE(offset << 1)];
|
||||
}
|
||||
|
||||
@ -276,33 +277,33 @@ void pgm_arm_type1_state::init_photoy2k()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_photoy2k_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_kovsh()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_kovsh_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
}
|
||||
|
||||
/* Fake remapping of ASIC commands to the ones used by KOVSH due to the lack of the real ARM rom for this set */
|
||||
WRITE16_MEMBER(pgm_arm_type1_state::kovshp_asic27a_write_word )
|
||||
void pgm_arm_type1_state::kovshp_asic27a_write_word(offs_t offset, u16 data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
m_pgm_arm_type1_lowlatch_68k_w = data;
|
||||
m_arm_type1_lowlatch_68k_w = data;
|
||||
return;
|
||||
|
||||
case 1:
|
||||
{
|
||||
unsigned char asic_key = data >> 8;
|
||||
unsigned char asic_cmd = (data & 0xff) ^ asic_key;
|
||||
const u8 asic_key = data >> 8;
|
||||
u8 asic_cmd = (data & 0xff) ^ asic_key;
|
||||
|
||||
switch (asic_cmd)
|
||||
{
|
||||
@ -343,7 +344,7 @@ WRITE16_MEMBER(pgm_arm_type1_state::kovshp_asic27a_write_word )
|
||||
case 0xf8: asic_cmd = 0xf3; break;
|
||||
}
|
||||
|
||||
m_pgm_arm_type1_highlatch_68k_w = asic_cmd ^ (asic_key | (asic_key << 8));
|
||||
m_arm_type1_highlatch_68k_w = asic_cmd ^ (asic_key | (asic_key << 8));
|
||||
}
|
||||
return;
|
||||
}
|
||||
@ -354,33 +355,31 @@ void pgm_arm_type1_state::init_kovshp()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_kovshp_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16sm_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* bootleg inits */
|
||||
|
||||
void pgm_arm_type1_state::init_kovshxas()
|
||||
{
|
||||
pgm_basic_init();
|
||||
// pgm_kovshp_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16sm_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::pgm_decode_kovlsqh2_tiles()
|
||||
{
|
||||
int i, j;
|
||||
uint16_t *src = (uint16_t *)(memregion("tiles")->base() + 0x180000);
|
||||
std::vector<uint16_t> dst(0x800000);
|
||||
u16 *src = (u16 *)(memregion("tiles")->base() + 0x180000);
|
||||
std::vector<u16> dst(0x800000);
|
||||
|
||||
for (i = 0; i < 0x800000 / 2; i++)
|
||||
for (int i = 0; i < 0x800000 / 2; i++)
|
||||
{
|
||||
j = bitswap<24>(i, 23, 22, 9, 8, 21, 18, 0, 1, 2, 3, 16, 15, 14, 13, 12, 11, 10, 19, 20, 17, 7, 6, 5, 4);
|
||||
const int j = bitswap<24>(i, 23, 22, 9, 8, 21, 18, 0, 1, 2, 3, 16, 15, 14, 13, 12, 11, 10, 19, 20, 17, 7, 6, 5, 4);
|
||||
|
||||
dst[j] = bitswap<16>(src[i], 1, 14, 8, 7, 0, 15, 6, 9, 13, 2, 5, 10, 12, 3, 4, 11);
|
||||
}
|
||||
@ -388,14 +387,13 @@ void pgm_arm_type1_state::pgm_decode_kovlsqh2_tiles()
|
||||
memcpy( src, &dst[0], 0x800000 );
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::pgm_decode_kovlsqh2_sprites( uint8_t *src )
|
||||
void pgm_arm_type1_state::pgm_decode_kovlsqh2_sprites( u8 *src )
|
||||
{
|
||||
int i, j;
|
||||
std::vector<uint8_t> dst(0x800000);
|
||||
std::vector<u8> dst(0x800000);
|
||||
|
||||
for (i = 0; i < 0x800000; i++)
|
||||
for (int i = 0; i < 0x800000; i++)
|
||||
{
|
||||
j = bitswap<24>(i, 23, 10, 9, 22, 19, 18, 20, 21, 17, 16, 15, 14, 13, 12, 11, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
||||
const int j = bitswap<24>(i, 23, 10, 9, 22, 19, 18, 20, 21, 17, 16, 15, 14, 13, 12, 11, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
||||
|
||||
dst[j] = src[i];
|
||||
}
|
||||
@ -405,10 +403,9 @@ void pgm_arm_type1_state::pgm_decode_kovlsqh2_sprites( uint8_t *src )
|
||||
|
||||
void pgm_arm_type1_state::pgm_decode_kovlsqh2_samples()
|
||||
{
|
||||
int i;
|
||||
uint8_t *src = (uint8_t *)(memregion("ics")->base() + 0x400000);
|
||||
u8 *src = (u8 *)(memregion("ics")->base() + 0x400000);
|
||||
|
||||
for (i = 0; i < 0x400000; i+=2) {
|
||||
for (int i = 0; i < 0x400000; i+=2) {
|
||||
src[i + 0x000001] = src[i + 0x400001];
|
||||
}
|
||||
|
||||
@ -417,13 +414,12 @@ void pgm_arm_type1_state::pgm_decode_kovlsqh2_samples()
|
||||
|
||||
void pgm_arm_type1_state::pgm_decode_kovqhsgs_program()
|
||||
{
|
||||
int i;
|
||||
uint16_t *src = (uint16_t *)(memregion("maincpu")->base() + 0x100000);
|
||||
std::vector<uint16_t> dst(0x400000);
|
||||
u16 *src = (u16 *)(memregion("maincpu")->base() + 0x100000);
|
||||
std::vector<u16> dst(0x400000);
|
||||
|
||||
for (i = 0; i < 0x400000 / 2; i++)
|
||||
for (int i = 0; i < 0x400000 / 2; i++)
|
||||
{
|
||||
int j = bitswap<24>(i, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 6, 7, 5, 4, 3, 2, 1, 0);
|
||||
const int j = bitswap<24>(i, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 6, 7, 5, 4, 3, 2, 1, 0);
|
||||
|
||||
dst[j] = bitswap<16>(src[i], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0);
|
||||
}
|
||||
@ -433,13 +429,12 @@ void pgm_arm_type1_state::pgm_decode_kovqhsgs_program()
|
||||
|
||||
void pgm_arm_type1_state::pgm_decode_kovqhsgs2_program()
|
||||
{
|
||||
int i;
|
||||
uint16_t *src = (uint16_t *)(memregion("maincpu")->base() + 0x100000);
|
||||
std::vector<uint16_t> dst(0x400000);
|
||||
u16 *src = (u16 *)(memregion("maincpu")->base() + 0x100000);
|
||||
std::vector<u16> dst(0x400000);
|
||||
|
||||
for (i = 0; i < 0x400000 / 2; i++)
|
||||
for (int i = 0; i < 0x400000 / 2; i++)
|
||||
{
|
||||
int j = bitswap<24>(i, 23, 22, 21, 20, 19, 16, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 18, 17, 7);
|
||||
const int j = bitswap<24>(i, 23, 22, 21, 20, 19, 16, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 18, 17, 7);
|
||||
|
||||
dst[j] = src[i];
|
||||
}
|
||||
@ -464,9 +459,9 @@ void pgm_arm_type1_state::init_kovlsqh2()
|
||||
|
||||
pgm_decode_kovlsqh2_samples();
|
||||
pgm_basic_init();
|
||||
pgm_arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
arm7_type1_latch_init();
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x500000, 0x500005, write16sm_delegate(FUNC(pgm_arm_type1_state::kovshp_asic27a_write_word),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_kovqhsgs()
|
||||
@ -485,9 +480,9 @@ void pgm_arm_type1_state::init_kovqhsgs()
|
||||
|
||||
pgm_decode_kovlsqh2_samples();
|
||||
pgm_basic_init();
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0008, 0x4f0009, read16smo_delegate(FUNC(pgm_arm_type1_state::kovsh_fake_region_r),this));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -499,26 +494,23 @@ void pgm_arm_type1_state::init_kovqhsgs()
|
||||
bp A71A0,1,{d0=0x12;g}
|
||||
*/
|
||||
|
||||
READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_r )
|
||||
READ16_MEMBER(pgm_arm_type1_state::arm7_type1_sim_r )
|
||||
{
|
||||
if (offset == 0)
|
||||
{
|
||||
uint16_t d = m_valueresponse & 0xffff;
|
||||
uint16_t realkey = m_valuekey >> 8;
|
||||
u16 d = m_valueresponse & 0xffff;
|
||||
u16 realkey = m_valuekey >> 8;
|
||||
realkey |= m_valuekey;
|
||||
d ^= realkey;
|
||||
|
||||
return d;
|
||||
|
||||
}
|
||||
else if (offset == 1)
|
||||
{
|
||||
uint16_t d = m_valueresponse >> 16;
|
||||
uint16_t realkey = m_valuekey >> 8;
|
||||
u16 d = m_valueresponse >> 16;
|
||||
u16 realkey = m_valuekey >> 8;
|
||||
realkey |= m_valuekey;
|
||||
d ^= realkey;
|
||||
return d;
|
||||
|
||||
}
|
||||
return 0xffff;
|
||||
}
|
||||
@ -553,15 +545,13 @@ void pgm_arm_type1_state::command_handler_ddp3(int pc)
|
||||
m_slots[m_curslots] |= (m_value0 & 0xffff);
|
||||
break;
|
||||
|
||||
|
||||
case 0x8e: // read back result of operations
|
||||
// printf("%s command %02x | %04x\n", machine().describe_context().c_str(), m_ddp3lastcommand, m_value0);
|
||||
m_valueresponse = m_slots[m_value0 & 0xff];
|
||||
break;
|
||||
|
||||
|
||||
case 0x99: // reset?
|
||||
m_simregion = 0;//ioport("Region")->read();
|
||||
m_simregion = 0;//m_region->read();
|
||||
m_valuekey = 0x100;
|
||||
m_valueresponse = 0x00880000 | m_simregion << 8;
|
||||
break;
|
||||
@ -572,7 +562,7 @@ void pgm_arm_type1_state::command_handler_ddp3(int pc)
|
||||
/* preliminary */
|
||||
|
||||
// should be correct, note each value only appears once
|
||||
uint8_t puzzli2_level_decode[256] = {
|
||||
u8 puzzli2_level_decode[256] = {
|
||||
// 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , a , b , c , d , e , f ,
|
||||
0x32, 0x3e, 0xb2, 0x37, 0x31, 0x22, 0xd6, 0x0d, 0x35, 0x5c, 0x8d, 0x3c, 0x7a, 0x5f, 0xd7, 0xac, // 0x0
|
||||
// 0 , 0 , 0 , 0 , 0 , 1 , 1 , 0 , 1 , 1 , 0 , 0 , 0 , 0 , x , x ,
|
||||
@ -619,13 +609,11 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
{
|
||||
// how is this selected? command 54?
|
||||
|
||||
|
||||
/* writes the following sequence before how to play
|
||||
each level has a different sequence written before it, size of sequence doesn't seem directly connected to level size (unlike the reads)
|
||||
so it's probably compressed somehow as well as scrambled? 68k doesnt know in advance how big each lot of data is either, it only stops
|
||||
writing when it gets a difference response from the MCU.
|
||||
|
||||
|
||||
00138278: 31 00fd | (set xor table offset)
|
||||
UNKNOWN - related to depth / number of columns?
|
||||
00138278: 31 0087 | value 87, after xor is 75 (table address,value fd,f2)
|
||||
@ -710,8 +698,8 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
// but different for the writes on startup?
|
||||
m_valueresponse = 0x00d20000;
|
||||
|
||||
//uint8_t tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
|
||||
//uint8_t xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
|
||||
//u8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2 & 0xf)) & 0xff;
|
||||
//u8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
|
||||
//puzzli2_printf("value %02x, after xor is %02x (table address,value %02x,%02x)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr]);
|
||||
|
||||
hackcount2++;
|
||||
@ -724,15 +712,11 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
// when the ARM detects the end of the stream has been reached it returns a 0x63 status with the number of columns in the data word
|
||||
m_valueresponse = 0x00630000 | numbercolumns;
|
||||
|
||||
//uint8_t tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
|
||||
//uint8_t xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
|
||||
//u8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2 & 0xf)) & 0xff;
|
||||
//u8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
|
||||
//puzzli2_printf("value %02x, after xor is %02x (table address,value %02x,%02x) (end, returning %02x as playfield width)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr], m_valueresponse);
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -746,7 +730,6 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
// after writing the compressed and scrambled data stream for the level (copied from ROM) with command 0x31
|
||||
// the game expects to read back a fully formed level structure from the ARM
|
||||
case 0x13:
|
||||
@ -755,7 +738,7 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
|
||||
// this is the how to play screen, correctly returned with current code
|
||||
/*
|
||||
uint16_t retvals[61] =
|
||||
u16 retvals[61] =
|
||||
{ 0x0008, // depth (-2?)
|
||||
0x0103, 0x0101, 0x0102, 0x0102, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, // first column
|
||||
0x0103, 0x0100, 0x0101, 0x0105, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
@ -767,7 +750,7 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
*/
|
||||
|
||||
|
||||
uint16_t* leveldata = &level_structure[0][0];
|
||||
u16* leveldata = &level_structure[0][0];
|
||||
if (hackcount==0)
|
||||
{
|
||||
m_valueresponse = 0x002d0000 | ((depth>>4)+1); // this *seems* to come from upper bits of the first real value written to the device during the level stream (verify, seems wrong for some levels because you get a black bar on the bottom of the screen, but might be bad xors)
|
||||
@ -800,7 +783,7 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
|
||||
|
||||
case 0x38: // Reset
|
||||
puzzli2_printf("%08x: %02x %04x (RESET)\n",pc, m_ddp3lastcommand, m_value0);
|
||||
m_simregion = ioport("Region")->read();
|
||||
m_simregion = m_region->read();
|
||||
m_valueresponse = 0x780000 | m_simregion<<8; // this must also return the cart region or the game will act in odd ways when inserting a coin on continue, or during the game on later levels
|
||||
m_valuekey = 0x100;
|
||||
m_puzzli_54_trigger = 0;
|
||||
@ -1065,7 +1048,7 @@ void pgm_arm_type1_state::command_handler_py2k2(int pc)
|
||||
break;
|
||||
|
||||
case 0x99: // reset?
|
||||
m_simregion = ioport("Region")->read();
|
||||
m_simregion = m_region->read();
|
||||
m_valuekey = 0x100;
|
||||
m_valueresponse = 0x00880000 | m_simregion<<8;
|
||||
|
||||
@ -1176,10 +1159,9 @@ void pgm_arm_type1_state::command_handler_pstars(int pc)
|
||||
switch (m_ddp3lastcommand)
|
||||
{
|
||||
case 0x99:
|
||||
m_simregion = ioport("Region")->read();
|
||||
m_simregion = m_region->read();
|
||||
m_valuekey = 0x100;
|
||||
m_valueresponse = 0x00880000 | m_simregion<<8;
|
||||
|
||||
break;
|
||||
|
||||
case 0xe0:
|
||||
@ -1274,13 +1256,13 @@ void pgm_arm_type1_state::command_handler_pstars(int pc)
|
||||
|
||||
/* Old KOV and bootlegs sim ... really these should be read out... */
|
||||
|
||||
static const uint8_t kov_BATABLE[0x40] = {
|
||||
static const u8 kov_BATABLE[0x40] = {
|
||||
0x00,0x29,0x2c,0x35,0x3a,0x41,0x4a,0x4e,0x57,0x5e,0x77,0x79,0x7a,0x7b,0x7c,0x7d,
|
||||
0x7e,0x7f,0x80,0x81,0x82,0x85,0x86,0x87,0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x90,
|
||||
0x95,0x96,0x97,0x98,0x99,0x9a,0x9b,0x9c,0x9e,0xa3,0xd4,0xa9,0xaf,0xb5,0xbb,0xc1
|
||||
};
|
||||
|
||||
static const uint8_t kov_B0TABLE[16] = { 2, 0, 1, 4, 3 }; // Maps char portraits to tables
|
||||
static const u8 kov_B0TABLE[16] = { 2, 0, 1, 4, 3 }; // Maps char portraits to tables
|
||||
|
||||
|
||||
void pgm_arm_type1_state::command_handler_kov(int pc)
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||||
@ -1297,7 +1279,7 @@ void pgm_arm_type1_state::command_handler_kov(int pc)
|
||||
break;
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||||
|
||||
case 0x99: // Reset
|
||||
m_simregion = ioport("Region")->read();
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||||
m_simregion = m_region->read();
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||||
m_valueresponse = 0x880000 | m_simregion<<8;
|
||||
m_valuekey = 0x100;
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||||
break;
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@ -1371,7 +1353,7 @@ void pgm_arm_type1_state::command_handler_kov(int pc)
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||||
{
|
||||
m_valueresponse = 0x880000;
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||||
|
||||
int32_t sel = (m_curslots >> 12) & 0x0f;
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||||
s32 sel = (m_curslots >> 12) & 0x0f;
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||||
m_slots[sel] = (m_slots[sel] & 0x00ff0000) | ((m_value0 & 0xffff) << 0);
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||||
}
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||||
break;
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||||
@ -1381,7 +1363,7 @@ void pgm_arm_type1_state::command_handler_kov(int pc)
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||||
m_valueresponse = 0x880000;
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||||
m_curslots = m_value0;
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||||
|
||||
int32_t sel = (m_curslots >> 12) & 0x0f;
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||||
s32 sel = (m_curslots >> 12) & 0x0f;
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m_slots[sel] = (m_slots[sel] & 0x0000ffff) | ((m_value0 & 0x00ff) << 16);
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||||
}
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||||
break;
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@ -1572,7 +1554,7 @@ void pgm_arm_type1_state::command_handler_oldsplus(int pc)
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switch (m_ddp3lastcommand)
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{
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||||
case 0x88:
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||||
m_simregion = ioport("Region")->read();
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m_simregion = m_region->read();
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||||
m_valuekey = 0x100;
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||||
m_valueresponse = 0x00990000 | m_simregion<<8;
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@ -1740,9 +1722,9 @@ void pgm_arm_type1_state::command_handler_oldsplus(int pc)
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}
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}
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WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_w )
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WRITE16_MEMBER(pgm_arm_type1_state::arm7_type1_sim_w )
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{
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||||
int pc = m_maincpu->pc();
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const int pc = m_maincpu->pc();
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||||
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||||
if (offset == 0)
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{
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||||
@ -1751,7 +1733,7 @@ WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_w )
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}
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else if (offset == 1)
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||||
{
|
||||
uint16_t realkey;
|
||||
u16 realkey;
|
||||
if ((data >> 8) == 0xff)
|
||||
m_valuekey = 0xff00;
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||||
realkey = m_valuekey >> 8;
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@ -1775,7 +1757,7 @@ WRITE16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_w )
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||||
}
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}
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||||
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||||
READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r )
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||||
u16 pgm_arm_type1_state::arm7_type1_sim_protram_r(offs_t offset)
|
||||
{
|
||||
if (offset == 4)
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||||
return m_simregion;
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||||
@ -1783,14 +1765,19 @@ READ16_MEMBER(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r )
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return 0x0000;
|
||||
}
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||||
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||||
READ16_MEMBER(pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r )
|
||||
u16 pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r(offs_t offset)
|
||||
{
|
||||
if (offset == 4) //region
|
||||
return ioport("Region")->read();
|
||||
return m_region->read();
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||||
else if (offset >= 0x10) //timer
|
||||
{
|
||||
logerror("PSTARS ACCESS COUNTER %6X\n", m_extra_ram[offset - 0x10]);
|
||||
return m_extra_ram[offset - 0x10]--;
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||||
const u16 val = m_extra_ram[offset - 0x10];
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
logerror("PSTARS ACCESS COUNTER %6X\n", val);
|
||||
m_extra_ram[offset - 0x10]--;
|
||||
}
|
||||
return val;
|
||||
}
|
||||
return 0x0000;
|
||||
}
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||||
@ -1801,7 +1788,7 @@ void pgm_arm_type1_state::init_ddp3()
|
||||
pgm_basic_init(false);
|
||||
pgm_py2k2_decrypt(machine()); // yes, it's the same as photo y2k2
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_ket()
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||||
@ -1809,7 +1796,7 @@ void pgm_arm_type1_state::init_ket()
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||||
pgm_basic_init(false);
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||||
pgm_ket_decrypt(machine());
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||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_espgal()
|
||||
@ -1817,11 +1804,11 @@ void pgm_arm_type1_state::init_espgal()
|
||||
pgm_basic_init(false);
|
||||
pgm_espgal_decrypt(machine());
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_ddp3;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x400000, 0x400005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
}
|
||||
|
||||
|
||||
int count_bits(uint16_t value)
|
||||
int count_bits(u16 value)
|
||||
{
|
||||
int count = 0;
|
||||
for (int i = 0; i < 16; i++)
|
||||
@ -1834,7 +1821,7 @@ int count_bits(uint16_t value)
|
||||
return count;
|
||||
}
|
||||
|
||||
int get_position_of_bit(uint16_t value, int bit_wanted)
|
||||
int get_position_of_bit(u16 value, int bit_wanted)
|
||||
{
|
||||
int count = 0;
|
||||
for (int i = 0; i < 16; i++)
|
||||
@ -1850,7 +1837,7 @@ int get_position_of_bit(uint16_t value, int bit_wanted)
|
||||
return -1;
|
||||
}
|
||||
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||||
int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
int pgm_arm_type1_state::puzzli2_take_leveldata_value(u8 datvalue)
|
||||
{
|
||||
if (stage == -1)
|
||||
{
|
||||
@ -1871,8 +1858,8 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8_t rawvalue = datvalue;
|
||||
uint8_t tableloc = (tableoffs+tableoffs2)&0xff;
|
||||
u8 rawvalue = datvalue;
|
||||
u8 tableloc = (tableoffs+tableoffs2) & 0xff;
|
||||
rawvalue ^= puzzli2_level_decode[tableloc];
|
||||
|
||||
tableoffs2++;
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||||
@ -1889,12 +1876,9 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
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||||
puzzli2_printf("%02x <- Sizes (level depth %01x) (number of columns %01x)", rawvalue, depth>>4, numbercolumns);
|
||||
|
||||
|
||||
if ((depth != 0x80) && (depth != 0x70) && (depth != 0x50))
|
||||
fatalerror("depth isn't 0x5, 0x7 or 0x8");
|
||||
|
||||
|
||||
|
||||
// it seems to use this to specify the number of columns, ie how many data structures follow, so that the ARM knows when to send back the 'finished' flag.
|
||||
// it also gets returned at the end with said flag
|
||||
if ((numbercolumns != 0x6) && (numbercolumns != 0x7) && (numbercolumns != 0x8))
|
||||
@ -1920,11 +1904,7 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
puzzli2_printf("0 entries for this column?"); // seems a valid condition based on the data
|
||||
}
|
||||
|
||||
|
||||
|
||||
puzzli2_printf("\n");
|
||||
|
||||
|
||||
}
|
||||
else if (stage == 2)
|
||||
{
|
||||
@ -1998,7 +1978,6 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
puzzli2_printf(" possible wrong mask?");
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
@ -2008,7 +1987,7 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
}
|
||||
else if (stage == 3)
|
||||
{
|
||||
uint16_t object_value;
|
||||
u16 object_value;
|
||||
|
||||
// return values
|
||||
// 0x0100 = normal fish
|
||||
@ -2064,7 +2043,6 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
else if (rawvalue == 0xe3) {object_value = 0x8060; puzzli2_printf("%02x <- solid bottom slant up", rawvalue);}
|
||||
else if (rawvalue == 0xe4) {object_value = 0x8080; puzzli2_printf("%02x <- solid bottom slant down", rawvalue);} // sold slant bottom up
|
||||
|
||||
|
||||
else {object_value = 0xffff; puzzli2_printf("%02x <- unknown object", rawvalue);}
|
||||
|
||||
puzzli2_printf(" (xor table location is %02x)\n",tableloc);
|
||||
@ -2075,7 +2053,7 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(uint8_t datvalue)
|
||||
popmessage("unknown object type %02x\n", rawvalue);
|
||||
}
|
||||
|
||||
int realrow = get_position_of_bit(m_row_bitmask, currentrow);
|
||||
const int realrow = get_position_of_bit(m_row_bitmask, currentrow);
|
||||
|
||||
if (realrow != -1)
|
||||
level_structure[currentcolumn][realrow] = object_value;
|
||||
@ -2109,11 +2087,10 @@ void pgm_arm_type1_state::init_puzzli2()
|
||||
{
|
||||
pgm_basic_init();
|
||||
|
||||
|
||||
pgm_puzzli2_decrypt(machine());
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_puzzli2;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
m_irq4_disabled = 1; // // doesn't like this irq?? - seems to be RTC related
|
||||
|
||||
hackcount = 0;
|
||||
@ -2123,7 +2100,7 @@ void pgm_arm_type1_state::init_puzzli2()
|
||||
|
||||
//#define PUZZLI2_LEVEL_STRUCTURE_LOG
|
||||
#ifdef PUZZLI2_LEVEL_STRUCTURE_LOG
|
||||
uint8_t *src2 = (uint8_t *) (machine().root_device().memregion("maincpu")->base());
|
||||
u8 *src2 = (u8 *) (machine().root_device().memregion("maincpu")->base());
|
||||
|
||||
int offset;
|
||||
int limit;
|
||||
@ -2146,16 +2123,15 @@ void pgm_arm_type1_state::init_puzzli2()
|
||||
|
||||
for (int i = 0; i < limit; i++)
|
||||
{
|
||||
uint32_t val1 = (src2[offset+1]<<24) | (src2[offset+0] << 16) | (src2[offset+3]<<8) | (src2[offset+2] << 0);
|
||||
u32 val1 = (src2[offset+1]<<24) | (src2[offset+0] << 16) | (src2[offset+3]<<8) | (src2[offset+2] << 0);
|
||||
offset += 4;
|
||||
uint32_t val2 = (src2[offset+1]<<24) | (src2[offset+0] << 16) | (src2[offset+3]<<8) | (src2[offset+2] << 0);
|
||||
u32 val2 = (src2[offset+1]<<24) | (src2[offset+0] << 16) | (src2[offset+3]<<8) | (src2[offset+2] << 0);
|
||||
|
||||
|
||||
printf("(%d) data range %08x %08x\n", i, val1, val2);
|
||||
|
||||
int x = 0;
|
||||
|
||||
|
||||
stage = -1;
|
||||
|
||||
for (x = val1; x < val2; x++)
|
||||
@ -2207,7 +2183,7 @@ void pgm_arm_type1_state::init_puzzli2()
|
||||
#if 0
|
||||
if (!strcmp(machine().system().name,"puzzli2"))
|
||||
{
|
||||
uint8_t *src3 = (uint8_t *) (machine().root_device().memregion("maincpu")->base());
|
||||
u8 *src3 = (u8 *) (machine().root_device().memregion("maincpu")->base());
|
||||
printf("how to play data pointer %02x %02x %02x %02x\n", src3[0x17b28e ^1], src3[0x17b28f ^1], src3[0x17b290 ^1], src3[0x17b291 ^1]);
|
||||
src3[0x17b28e ^1] = 0x00;
|
||||
src3[0x17b28f ^1] = 0x11;
|
||||
@ -2219,7 +2195,7 @@ void pgm_arm_type1_state::init_puzzli2()
|
||||
pgm_puzzli2_decrypt(machine());
|
||||
|
||||
{
|
||||
uint8_t *ROM = (uint8_t*)memregion("maincpu")->base();
|
||||
u8 *ROM = (u8*)memregion("maincpu")->base();
|
||||
|
||||
FILE *fp;
|
||||
char filename[256];
|
||||
@ -2242,8 +2218,8 @@ void pgm_arm_type1_state::init_py2k2()
|
||||
pgm_basic_init();
|
||||
pgm_py2k2_decrypt(machine());
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_py2k2;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_pgm3in1()
|
||||
@ -2251,8 +2227,8 @@ void pgm_arm_type1_state::init_pgm3in1()
|
||||
pgm_basic_init();
|
||||
pgm_decrypt_pgm3in1(machine());
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_py2k2;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005,read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005,read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
m_irq4_disabled = 1; // // doesn't like this irq??
|
||||
}
|
||||
|
||||
@ -2260,7 +2236,7 @@ void pgm_arm_type1_state::init_pstar()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_pstar_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
|
||||
m_pstar_e7_value = 0;
|
||||
m_pstar_b1_value = 0;
|
||||
@ -2268,11 +2244,11 @@ void pgm_arm_type1_state::init_pstar()
|
||||
m_extra_ram[0] = 0;
|
||||
m_extra_ram[1] = 0;
|
||||
m_extra_ram[2] = 0;
|
||||
memset(m_slots, 0, 16 * sizeof(uint32_t));
|
||||
memset(m_slots, 0, 16 * sizeof(u32));
|
||||
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_pstars;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::pstars_arm7_type1_sim_protram_r),this));
|
||||
|
||||
save_item(NAME(m_pstar_e7_value));
|
||||
save_item(NAME(m_pstar_b1_value));
|
||||
@ -2284,28 +2260,28 @@ void pgm_arm_type1_state::init_kov()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_kov_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
m_curslots = 0;
|
||||
m_kov_c0_value = 0;
|
||||
m_kov_cb_value = 0;
|
||||
m_kov_fe_value = 0;
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_kov;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
}
|
||||
|
||||
void pgm_arm_type1_state::init_kovboot()
|
||||
{
|
||||
pgm_basic_init();
|
||||
// pgm_kov_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
arm7_type1_latch_init();
|
||||
m_curslots = 0;
|
||||
m_kov_c0_value = 0;
|
||||
m_kov_cb_value = 0;
|
||||
m_kov_fe_value = 0;
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_kov;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
|
||||
}
|
||||
|
||||
@ -2313,12 +2289,12 @@ void pgm_arm_type1_state::init_oldsplus()
|
||||
{
|
||||
pgm_basic_init();
|
||||
pgm_oldsplus_decrypt(machine());
|
||||
pgm_arm7_type1_latch_init();
|
||||
memset(m_extra_ram, 0, 0x100 * sizeof(uint16_t));
|
||||
memset(m_slots, 0, 0x100 * sizeof(uint32_t));
|
||||
arm7_type1_latch_init();
|
||||
memset(m_extra_ram, 0, 0x100 * sizeof(u16));
|
||||
memset(m_slots, 0, 0x100 * sizeof(u32));
|
||||
arm_sim_handler = &pgm_arm_type1_state::command_handler_oldsplus;
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16_delegate(FUNC(pgm_arm_type1_state::pgm_arm7_type1_sim_protram_r),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x500000, 0x500005, read16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_r),this), write16_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4f0000, 0x4f003f, read16sm_delegate(FUNC(pgm_arm_type1_state::arm7_type1_sim_protram_r),this));
|
||||
save_item(NAME(m_extra_ram));
|
||||
}
|
||||
|
||||
|
@ -14,40 +14,6 @@ public:
|
||||
m_puzzli_54_trigger = 0;
|
||||
}
|
||||
|
||||
/////////////// simulations
|
||||
uint16_t m_value0;
|
||||
uint16_t m_value1;
|
||||
uint16_t m_valuekey;
|
||||
uint16_t m_ddp3lastcommand;
|
||||
uint32_t m_valueresponse;
|
||||
int m_curslots;
|
||||
uint32_t m_slots[0x100];
|
||||
|
||||
// pstars / oldsplus / kov
|
||||
uint16_t m_pstar_e7_value;
|
||||
uint16_t m_pstar_b1_value;
|
||||
uint16_t m_pstar_ce_value;
|
||||
uint16_t m_kov_c0_value;
|
||||
uint16_t m_kov_cb_value;
|
||||
uint16_t m_kov_fe_value;
|
||||
uint16_t m_extra_ram[0x100];
|
||||
// puzzli2
|
||||
int32_t m_puzzli_54_trigger;
|
||||
|
||||
typedef void (pgm_arm_type1_state::*pgm_arm_sim_command_handler)(int pc);
|
||||
|
||||
pgm_arm_sim_command_handler arm_sim_handler;
|
||||
|
||||
/////////////// emulation
|
||||
uint16_t m_pgm_arm_type1_highlatch_arm_w;
|
||||
uint16_t m_pgm_arm_type1_lowlatch_arm_w;
|
||||
uint16_t m_pgm_arm_type1_highlatch_68k_w;
|
||||
uint16_t m_pgm_arm_type1_lowlatch_68k_w;
|
||||
uint32_t m_pgm_arm_type1_counter;
|
||||
optional_shared_ptr<uint32_t> m_arm7_shareram;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
|
||||
void init_photoy2k();
|
||||
void init_kovsh();
|
||||
void init_kovshp();
|
||||
@ -64,36 +30,78 @@ public:
|
||||
void init_kov();
|
||||
void init_kovboot();
|
||||
void init_oldsplus();
|
||||
|
||||
void pgm_arm_type1_sim(machine_config &config);
|
||||
void pgm_arm_type1_cave(machine_config &config);
|
||||
void pgm_arm_type1(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
/////////////// simulations
|
||||
u16 m_value0;
|
||||
u16 m_value1;
|
||||
u16 m_valuekey;
|
||||
u16 m_ddp3lastcommand;
|
||||
u32 m_valueresponse;
|
||||
int m_curslots;
|
||||
u32 m_slots[0x100];
|
||||
|
||||
// pstars / oldsplus / kov
|
||||
u16 m_pstar_e7_value;
|
||||
u16 m_pstar_b1_value;
|
||||
u16 m_pstar_ce_value;
|
||||
u16 m_kov_c0_value;
|
||||
u16 m_kov_cb_value;
|
||||
u16 m_kov_fe_value;
|
||||
u16 m_extra_ram[0x100];
|
||||
// puzzli2
|
||||
s32 m_puzzli_54_trigger;
|
||||
|
||||
typedef void (pgm_arm_type1_state::*pgm_arm_sim_command_handler)(int pc);
|
||||
|
||||
pgm_arm_sim_command_handler arm_sim_handler;
|
||||
|
||||
/////////////// emulation
|
||||
u16 m_arm_type1_highlatch_arm_w;
|
||||
u16 m_arm_type1_lowlatch_arm_w;
|
||||
u16 m_arm_type1_highlatch_68k_w;
|
||||
u16 m_arm_type1_lowlatch_68k_w;
|
||||
u32 m_arm_type1_counter;
|
||||
optional_shared_ptr<u32> m_arm7_shareram;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
DECLARE_MACHINE_START(pgm_arm_type1);
|
||||
|
||||
DECLARE_READ32_MEMBER( pgm_arm7_type1_protlatch_r );
|
||||
DECLARE_WRITE32_MEMBER( pgm_arm7_type1_protlatch_w );
|
||||
DECLARE_READ16_MEMBER( pgm_arm7_type1_68k_protlatch_r );
|
||||
DECLARE_WRITE16_MEMBER( pgm_arm7_type1_68k_protlatch_w );
|
||||
DECLARE_READ16_MEMBER( pgm_arm7_type1_ram_r );
|
||||
DECLARE_WRITE16_MEMBER( pgm_arm7_type1_ram_w );
|
||||
DECLARE_READ32_MEMBER( pgm_arm7_type1_unk_r );
|
||||
DECLARE_READ32_MEMBER( pgm_arm7_type1_exrom_r );
|
||||
DECLARE_READ32_MEMBER( pgm_arm7_type1_shareram_r );
|
||||
DECLARE_WRITE32_MEMBER( pgm_arm7_type1_shareram_w );
|
||||
void pgm_arm7_type1_latch_init();
|
||||
DECLARE_READ16_MEMBER( kovsh_fake_region_r );
|
||||
DECLARE_WRITE16_MEMBER( kovshp_asic27a_write_word );
|
||||
u16 arm7_type1_protlatch_r(offs_t offset);
|
||||
void arm7_type1_protlatch_w(offs_t offset, u16 data);
|
||||
u16 arm7_type1_68k_protlatch_r(offs_t offset);
|
||||
void arm7_type1_68k_protlatch_w(offs_t offset, u16 data);
|
||||
u16 arm7_type1_ram_r(offs_t offset, u16 mem_mask = ~0);
|
||||
void arm7_type1_ram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
u32 arm7_type1_unk_r();
|
||||
u32 arm7_type1_exrom_r();
|
||||
u32 arm7_type1_shareram_r(offs_t offset, u32 mem_mask = ~0);
|
||||
void arm7_type1_shareram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
void arm7_type1_latch_init();
|
||||
u16 kovsh_fake_region_r();
|
||||
void kovshp_asic27a_write_word(offs_t offset, u16 data);
|
||||
void pgm_decode_kovlsqh2_tiles();
|
||||
void pgm_decode_kovlsqh2_sprites(uint8_t *src );
|
||||
void pgm_decode_kovlsqh2_sprites(u8 *src );
|
||||
void pgm_decode_kovlsqh2_samples();
|
||||
void pgm_decode_kovqhsgs_program();
|
||||
void pgm_decode_kovqhsgs2_program();
|
||||
DECLARE_READ16_MEMBER( pgm_arm7_type1_sim_r );
|
||||
DECLARE_READ16_MEMBER( arm7_type1_sim_r );
|
||||
void command_handler_ddp3(int pc);
|
||||
void command_handler_puzzli2(int pc);
|
||||
void command_handler_py2k2(int pc);
|
||||
void command_handler_pstars(int pc);
|
||||
void command_handler_kov(int pc);
|
||||
void command_handler_oldsplus(int pc);
|
||||
DECLARE_WRITE16_MEMBER( pgm_arm7_type1_sim_w );
|
||||
DECLARE_READ16_MEMBER( pgm_arm7_type1_sim_protram_r );
|
||||
DECLARE_READ16_MEMBER( pstars_arm7_type1_sim_protram_r );
|
||||
DECLARE_WRITE16_MEMBER( arm7_type1_sim_w );
|
||||
u16 arm7_type1_sim_protram_r(offs_t offset);
|
||||
u16 pstars_arm7_type1_sim_protram_r(offs_t offset);
|
||||
int m_simregion;
|
||||
|
||||
/* puzzli2 protection internal state stuff */
|
||||
@ -108,7 +116,7 @@ public:
|
||||
int prev_tablloc;
|
||||
int numbercolumns;
|
||||
int depth;
|
||||
uint16_t m_row_bitmask;
|
||||
u16 m_row_bitmask;
|
||||
int hackcount;
|
||||
int hackcount2;
|
||||
int hack_47_value;
|
||||
@ -116,19 +124,16 @@ public:
|
||||
int hack_31_table_offset2;
|
||||
int p2_31_retcounter;
|
||||
|
||||
uint8_t coverage[256]; // coverage is how much of the table we've managed to verify using known facts about the table structure
|
||||
u8 coverage[256]; // coverage is how much of the table we've managed to verify using known facts about the table structure
|
||||
|
||||
int command_31_write_type;
|
||||
|
||||
|
||||
// the maximum level size returned or read by the device appears to be this size
|
||||
uint16_t level_structure[8][10];
|
||||
u16 level_structure[8][10];
|
||||
|
||||
|
||||
int puzzli2_take_leveldata_value(uint8_t datvalue);
|
||||
void pgm_arm_type1_sim(machine_config &config);
|
||||
void pgm_arm_type1_cave(machine_config &config);
|
||||
void pgm_arm_type1(machine_config &config);
|
||||
int puzzli2_take_leveldata_value(u8 datvalue);
|
||||
void _55857E_arm7_map(address_map &map);
|
||||
void cavepgm_mem(address_map &map);
|
||||
void kov_map(address_map &map);
|
||||
|
@ -36,8 +36,9 @@
|
||||
#include "includes/pgm.h"
|
||||
#include "machine/pgmprot_igs027a_type2.h"
|
||||
|
||||
READ32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_r )
|
||||
u32 pgm_arm_type2_state::arm7_latch_arm_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
m_prot->set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
@ -45,7 +46,7 @@ READ32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_r )
|
||||
return m_kov2_latchdata_68k_w;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_w )
|
||||
void pgm_arm_type2_state::arm7_latch_arm_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s ARM7: Latch write: %08x (%08x)\n", machine().describe_context(), data, mem_mask);
|
||||
@ -53,28 +54,28 @@ WRITE32_MEMBER(pgm_arm_type2_state::arm7_latch_arm_w )
|
||||
COMBINE_DATA(&m_kov2_latchdata_arm_w);
|
||||
}
|
||||
|
||||
READ32_MEMBER(pgm_arm_type2_state::arm7_shareram_r )
|
||||
u32 pgm_arm_type2_state::arm7_shareram_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, m_arm7_shareram[offset], mem_mask);
|
||||
return m_arm7_shareram[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type2_state::arm7_shareram_w )
|
||||
void pgm_arm_type2_state::arm7_shareram_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, data, mem_mask);
|
||||
COMBINE_DATA(&m_arm7_shareram[offset]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type2_state::arm7_latch_68k_r )
|
||||
u16 pgm_arm_type2_state::arm7_latch_68k_r(offs_t offset, u16 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s M68K: Latch read: %04x (%04x)\n", machine().describe_context(), m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask);
|
||||
return m_kov2_latchdata_arm_w;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type2_state::arm7_latch_68k_w )
|
||||
void pgm_arm_type2_state::arm7_latch_68k_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s M68K: Latch write: %04x (%04x)\n", machine().describe_context(), data & 0x0000ffff, mem_mask);
|
||||
@ -83,18 +84,18 @@ WRITE16_MEMBER(pgm_arm_type2_state::arm7_latch_68k_w )
|
||||
m_prot->set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type2_state::arm7_ram_r )
|
||||
u16 pgm_arm_type2_state::arm7_ram_r(offs_t offset, u16 mem_mask)
|
||||
{
|
||||
uint16_t *share16 = reinterpret_cast<uint16_t *>(m_arm7_shareram.target());
|
||||
const u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s M68K: ARM7 Shared RAM Read: %04x = %04x (%08x)\n", machine().describe_context(), BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask);
|
||||
return share16[BYTE_XOR_LE(offset)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type2_state::arm7_ram_w )
|
||||
void pgm_arm_type2_state::arm7_ram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
uint16_t *share16 = reinterpret_cast<uint16_t *>(m_arm7_shareram.target());
|
||||
u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("%s M68K: ARM7 Shared RAM Write: %04x = %04x (%04x)\n", machine().describe_context(), BYTE_XOR_LE(offset), data, mem_mask);
|
||||
@ -124,20 +125,12 @@ void pgm_arm_type2_state::_55857F_arm7_map(address_map &map)
|
||||
map(0x50000000, 0x500003ff).ram();
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(pgm_arm_type2_state,pgm_arm_type2)
|
||||
{
|
||||
MACHINE_START_CALL_MEMBER(pgm);
|
||||
/* register type specific Save State stuff here */
|
||||
}
|
||||
|
||||
/******* ARM 55857F *******/
|
||||
|
||||
void pgm_arm_type2_state::pgm_arm_type2(machine_config &config)
|
||||
{
|
||||
pgmbase(config);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(pgm_arm_type2_state, pgm_arm_type2 )
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &pgm_arm_type2_state::kov2_mem);
|
||||
|
||||
/* protection CPU */
|
||||
@ -146,8 +139,6 @@ void pgm_arm_type2_state::pgm_arm_type2(machine_config &config)
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void pgm_arm_type2_state::kov2_latch_init()
|
||||
{
|
||||
m_kov2_latchdata_68k_w = 0;
|
||||
@ -157,18 +148,18 @@ void pgm_arm_type2_state::kov2_latch_init()
|
||||
save_item(NAME(m_kov2_latchdata_arm_w));
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type2_state::kov2_arm_region_w )
|
||||
void pgm_arm_type2_state::kov2_arm_region_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
int regionhack = ioport("RegionHack")->read();
|
||||
const int pc = m_prot->pc();
|
||||
const int regionhack = m_regionhack->read();
|
||||
if (pc == 0x190 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
|
||||
COMBINE_DATA(&m_arm7_shareram[0x138/4]);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type2_state::kov2p_arm_region_w )
|
||||
void pgm_arm_type2_state::kov2p_arm_region_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
int regionhack = ioport("RegionHack")->read();
|
||||
const int pc = m_prot->pc();
|
||||
const int regionhack = m_regionhack->read();
|
||||
// printf("%08x\n", pc);
|
||||
if (pc == 0x1b0 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
|
||||
COMBINE_DATA(&m_arm7_shareram[0x138/4]);
|
||||
@ -182,7 +173,7 @@ void pgm_arm_type2_state::init_kov2()
|
||||
kov2_latch_init();
|
||||
|
||||
// we only have a HK internal ROM dumped for now, allow us to override that for debugging purposes.
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::kov2_arm_region_w),this));
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32s_delegate(FUNC(pgm_arm_type2_state::kov2_arm_region_w),this));
|
||||
}
|
||||
|
||||
|
||||
@ -196,13 +187,13 @@ void pgm_arm_type2_state::init_kov2p()
|
||||
kov2_latch_init();
|
||||
|
||||
// we only have a China internal ROM dumped for now, allow us to override that for debugging purposes.
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::kov2p_arm_region_w),this));
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32s_delegate(FUNC(pgm_arm_type2_state::kov2p_arm_region_w),this));
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type2_state::martmast_arm_region_w )
|
||||
void pgm_arm_type2_state::martmast_arm_region_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
int regionhack = ioport("RegionHack")->read();
|
||||
const int pc = m_prot->pc();
|
||||
const int regionhack = m_regionhack->read();
|
||||
if (pc == 0x170 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
|
||||
COMBINE_DATA(&m_arm7_shareram[0x138/4]);
|
||||
}
|
||||
@ -215,16 +206,14 @@ void pgm_arm_type2_state::init_martmast()
|
||||
kov2_latch_init();
|
||||
|
||||
// we only have a USA / CHINA internal ROMs dumped for now, allow us to override that for debugging purposes.
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32_delegate(FUNC(pgm_arm_type2_state::martmast_arm_region_w),this));
|
||||
m_prot->space(AS_PROGRAM).install_write_handler(0x48000138, 0x4800013b, write32s_delegate(FUNC(pgm_arm_type2_state::martmast_arm_region_w),this));
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
READ32_MEMBER(pgm_arm_type2_state::ddp2_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
uint32_t data = m_arm_ram[0x300c/4];
|
||||
const int pc = m_prot->pc();
|
||||
const u32 data = m_arm_ram[0x300c/4];
|
||||
|
||||
if (pc == 0x080109b4)
|
||||
{
|
||||
@ -234,7 +223,7 @@ READ32_MEMBER(pgm_arm_type2_state::ddp2_speedup_r )
|
||||
|
||||
if (r4 == 0x18002f9e)
|
||||
{
|
||||
uint32_t data2 = m_arm_ram[0x2F9C/4]&0xffff0000;
|
||||
const u32 data2 = m_arm_ram[0x2F9C/4] & 0xffff0000;
|
||||
if ((data == 0x00000000) && (data2 == 0x00000000)) space.device().execute().spin_until_interrupt();
|
||||
}
|
||||
}
|
||||
@ -244,8 +233,8 @@ READ32_MEMBER(pgm_arm_type2_state::ddp2_speedup_r )
|
||||
|
||||
READ16_MEMBER(pgm_arm_type2_state::ddp2_main_speedup_r )
|
||||
{
|
||||
uint16_t data = m_mainram[0x0ee54/2];
|
||||
int pc = m_maincpu->pc();
|
||||
const u16 data = m_mainram[0x0ee54/2];
|
||||
const int pc = m_maincpu->pc();
|
||||
|
||||
if (pc == 0x149dce) m_maincpu->spin_until_interrupt();
|
||||
if (pc == 0x149cfe) m_maincpu->spin_until_interrupt();
|
||||
@ -280,7 +269,6 @@ void pgm_arm_type2_state::init_dwpc()
|
||||
}
|
||||
|
||||
|
||||
|
||||
INPUT_PORTS_START( kov2 )
|
||||
PORT_INCLUDE ( pgm )
|
||||
|
||||
|
@ -10,37 +10,39 @@ public:
|
||||
m_arm7_shareram(*this, "arm7_shareram"),
|
||||
m_prot(*this, "prot") {
|
||||
}
|
||||
// kov2
|
||||
uint32_t m_kov2_latchdata_68k_w;
|
||||
uint32_t m_kov2_latchdata_arm_w;
|
||||
|
||||
required_shared_ptr<uint32_t> m_arm_ram;
|
||||
required_shared_ptr<uint32_t> m_arm7_shareram;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
|
||||
void init_kov2();
|
||||
void init_kov2p();
|
||||
void init_martmast();
|
||||
void init_ddp2();
|
||||
void init_dw2001();
|
||||
void init_dwpc();
|
||||
DECLARE_MACHINE_START(pgm_arm_type2);
|
||||
DECLARE_READ32_MEMBER( arm7_latch_arm_r );
|
||||
DECLARE_WRITE32_MEMBER( arm7_latch_arm_w );
|
||||
DECLARE_READ32_MEMBER( arm7_shareram_r );
|
||||
DECLARE_WRITE32_MEMBER( arm7_shareram_w );
|
||||
DECLARE_READ16_MEMBER( arm7_latch_68k_r );
|
||||
DECLARE_WRITE16_MEMBER( arm7_latch_68k_w );
|
||||
DECLARE_READ16_MEMBER( arm7_ram_r );
|
||||
DECLARE_WRITE16_MEMBER( arm7_ram_w );
|
||||
|
||||
void pgm_arm_type2(machine_config &config);
|
||||
|
||||
private:
|
||||
// kov2
|
||||
u32 m_kov2_latchdata_68k_w;
|
||||
u32 m_kov2_latchdata_arm_w;
|
||||
|
||||
required_shared_ptr<u32> m_arm_ram;
|
||||
required_shared_ptr<u32> m_arm7_shareram;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
|
||||
u32 arm7_latch_arm_r(offs_t offset, u32 mem_mask = ~0);
|
||||
void arm7_latch_arm_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
u32 arm7_shareram_r(offs_t offset, u32 mem_mask = ~0);
|
||||
void arm7_shareram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
u16 arm7_latch_68k_r(offs_t offset, u16 mem_mask = ~0);
|
||||
void arm7_latch_68k_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
u16 arm7_ram_r(offs_t offset, u16 mem_mask = ~0);
|
||||
void arm7_ram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
void kov2_latch_init();
|
||||
DECLARE_WRITE32_MEMBER( martmast_arm_region_w );
|
||||
DECLARE_WRITE32_MEMBER( kov2_arm_region_w );
|
||||
DECLARE_WRITE32_MEMBER( kov2p_arm_region_w );
|
||||
void martmast_arm_region_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
void kov2_arm_region_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
void kov2p_arm_region_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
DECLARE_READ32_MEMBER( ddp2_speedup_r );
|
||||
DECLARE_READ16_MEMBER( ddp2_main_speedup_r );
|
||||
void pgm_arm_type2(machine_config &config);
|
||||
void _55857F_arm7_map(address_map &map);
|
||||
void kov2_mem(address_map &map);
|
||||
};
|
||||
|
@ -47,53 +47,53 @@
|
||||
#include "includes/pgm.h"
|
||||
#include "machine/pgmprot_igs027a_type3.h"
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type3_state::svg_arm7_ram_sel_w )
|
||||
void pgm_arm_type3_state::svg_arm7_ram_sel_w(u32 data)
|
||||
{
|
||||
// printf("svg_arm7_ram_sel_w %08x\n", data);
|
||||
machine().scheduler().synchronize(); // force resync
|
||||
m_svg_ram_sel = data & 1;
|
||||
}
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_r )
|
||||
u32 pgm_arm_type3_state::svg_arm7_shareram_r(offs_t offset)
|
||||
{
|
||||
uint32_t retdata = m_svg_shareram[m_svg_ram_sel & 1][offset];
|
||||
const u32 retdata = m_svg_shareram[m_svg_ram_sel & 1][offset];
|
||||
// logerror("%s ARM7: shared read (bank %02x) offset - %08x retdata - %08x mask - %08x\n", machine().describe_context(), m_svg_ram_sel, offset*4, retdata, mem_mask );
|
||||
return retdata;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_w )
|
||||
void pgm_arm_type3_state::svg_arm7_shareram_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
// logerror("%s ARM7: shared write (bank %02x) offset - %08x retdata - %08x mask - %08x\n", machine().describe_context(), m_svg_ram_sel, offset*4, data, mem_mask );
|
||||
COMBINE_DATA(&m_svg_shareram[m_svg_ram_sel & 1][offset]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type3_state::svg_m68k_ram_r )
|
||||
u16 pgm_arm_type3_state::svg_m68k_ram_r(offs_t offset)
|
||||
{
|
||||
int ram_sel = (m_svg_ram_sel & 1) ^ 1;
|
||||
uint16_t *share16 = (uint16_t *)(m_svg_shareram[ram_sel & 1].get());
|
||||
const int ram_sel = (m_svg_ram_sel & 1) ^ 1;
|
||||
const u16 *share16 = (u16 *)(m_svg_shareram[ram_sel & 1].get());
|
||||
|
||||
return share16[BYTE_XOR_LE(offset)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type3_state::svg_m68k_ram_w )
|
||||
void pgm_arm_type3_state::svg_m68k_ram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
int ram_sel = (m_svg_ram_sel & 1) ^ 1;
|
||||
uint16_t *share16 = (uint16_t *)(m_svg_shareram[ram_sel & 1].get());
|
||||
const int ram_sel = (m_svg_ram_sel & 1) ^ 1;
|
||||
u16 *share16 = (u16 *)(m_svg_shareram[ram_sel & 1].get());
|
||||
|
||||
COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_r )
|
||||
u16 pgm_arm_type3_state::svg_68k_nmi_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_w )
|
||||
void pgm_arm_type3_state::svg_68k_nmi_w(u16 data)
|
||||
{
|
||||
m_prot->pulse_input_line(ARM7_FIRQ_LINE, m_prot->minimum_quantum_time());
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(pgm_arm_type3_state::svg_latch_68k_w )
|
||||
void pgm_arm_type3_state::svg_latch_68k_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch write: %04x (%04x) %s\n", data & 0x0000ffff, mem_mask, machine().describe_context());
|
||||
@ -101,7 +101,7 @@ WRITE16_MEMBER(pgm_arm_type3_state::svg_latch_68k_w )
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(pgm_arm_type3_state::svg_latch_68k_r )
|
||||
u16 pgm_arm_type3_state::svg_latch_68k_r(offs_t offset, u16 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch read: %04x (%04x) %s\n", m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, machine().describe_context());
|
||||
@ -109,15 +109,14 @@ READ16_MEMBER(pgm_arm_type3_state::svg_latch_68k_r )
|
||||
}
|
||||
|
||||
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::svg_latch_arm_r )
|
||||
u32 pgm_arm_type3_state::svg_latch_arm_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: Latch read: %08x (%08x) %s\n", m_svg_latchdata_68k_w, mem_mask, machine().describe_context());
|
||||
return m_svg_latchdata_68k_w;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pgm_arm_type3_state::svg_latch_arm_w )
|
||||
void pgm_arm_type3_state::svg_latch_arm_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: Latch write: %08x (%08x) %s\n", data, mem_mask, machine().describe_context());
|
||||
@ -152,12 +151,10 @@ void pgm_arm_type3_state::_55857G_arm7_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
MACHINE_RESET_MEMBER(pgm_arm_type3_state, pgm_arm_type3_reset)
|
||||
void pgm_arm_type3_state::machine_reset()
|
||||
{
|
||||
// internal roms aren't fully dumped
|
||||
uint16_t *temp16 = (uint16_t *)memregion("prot")->base();
|
||||
u16 *temp16 = (u16 *)memregion("prot")->base();
|
||||
int base = -1;
|
||||
|
||||
if (!strcmp(machine().system().name, "theglad")) base = 0x3316;
|
||||
@ -171,20 +168,14 @@ MACHINE_RESET_MEMBER(pgm_arm_type3_state, pgm_arm_type3_reset)
|
||||
|
||||
if (base != -1)
|
||||
{
|
||||
int regionhack = ioport("RegionHack")->read();
|
||||
const int regionhack = m_regionhack->read();
|
||||
if (regionhack != 0xff)
|
||||
{
|
||||
// printf("%04x\n", temp16[(base) / 2]);
|
||||
temp16[(base) / 2] = regionhack; base += 2;
|
||||
}
|
||||
}
|
||||
MACHINE_RESET_CALL_MEMBER(pgm);
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(pgm_arm_type3_state,pgm_arm_type3)
|
||||
{
|
||||
MACHINE_START_CALL_MEMBER(pgm);
|
||||
/* register type specific Save State stuff here */
|
||||
pgm_state::machine_reset();
|
||||
}
|
||||
|
||||
|
||||
@ -194,24 +185,19 @@ void pgm_arm_type3_state::pgm_arm_type3(machine_config &config)
|
||||
{
|
||||
pgmbase(config);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(pgm_arm_type3_state, pgm_arm_type3 )
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &pgm_arm_type3_state::svg_68k_mem);
|
||||
|
||||
/* protection CPU */
|
||||
ARM7(config, m_prot, XTAL(33'000'000)); // 55857G - 33Mhz Xtal, at least on SVG
|
||||
m_prot->set_addrmap(AS_PROGRAM, &pgm_arm_type3_state::_55857G_arm7_map);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(pgm_arm_type3_state, pgm_arm_type3_reset)
|
||||
}
|
||||
|
||||
|
||||
|
||||
void pgm_arm_type3_state::svg_basic_init()
|
||||
{
|
||||
pgm_basic_init();
|
||||
m_svg_shareram[0] = std::make_unique<uint32_t[]>(0x20000 / 4);
|
||||
m_svg_shareram[1] = std::make_unique<uint32_t[]>(0x20000 / 4);
|
||||
m_svg_shareram[0] = std::make_unique<u32[]>(0x20000 / 4);
|
||||
m_svg_shareram[1] = std::make_unique<u32[]>(0x20000 / 4);
|
||||
m_svg_ram_sel = 0;
|
||||
|
||||
save_pointer(NAME(m_svg_shareram[0]), 0x20000 / 4);
|
||||
@ -221,11 +207,10 @@ void pgm_arm_type3_state::svg_basic_init()
|
||||
|
||||
void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region(int size)
|
||||
{
|
||||
uint16_t *temp16 = (uint16_t *)memregion("prot")->base();
|
||||
u16 *temp16 = (u16 *)memregion("prot")->base();
|
||||
|
||||
// fill with RX 14
|
||||
int i;
|
||||
for (i=0;i<size/2;i+=2)
|
||||
for (int i = 0; i < size / 2; i += 2)
|
||||
{
|
||||
temp16[i] = 0xff1e;
|
||||
temp16[i+1] = 0xe12f;
|
||||
@ -254,7 +239,7 @@ void pgm_arm_type3_state::svg_latch_init()
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::theglad_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0x7c4) m_prot->eat_cycles(500);
|
||||
//else printf("theglad_speedup_r %08x\n", pc);
|
||||
return m_arm_ram2[0x00c/4];
|
||||
@ -263,7 +248,7 @@ READ32_MEMBER(pgm_arm_type3_state::theglad_speedup_r )
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::happy6_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0x0a08) m_prot->eat_cycles(500);
|
||||
//else printf("theglad_speedup_r %08x\n", pc);
|
||||
return m_arm_ram2[0x00c/4];
|
||||
@ -272,14 +257,14 @@ READ32_MEMBER(pgm_arm_type3_state::happy6_speedup_r )
|
||||
// installed over rom
|
||||
READ32_MEMBER(pgm_arm_type3_state::svg_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0xb90) m_prot->eat_cycles(500);
|
||||
return m_armrom[0xb90/4];
|
||||
}
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::svgpcb_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0x9e0) m_prot->eat_cycles(500);
|
||||
return m_armrom[0x9e0/4];
|
||||
}
|
||||
@ -287,13 +272,11 @@ READ32_MEMBER(pgm_arm_type3_state::svgpcb_speedup_r )
|
||||
|
||||
void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region_theglad(int is_svg)
|
||||
{
|
||||
uint16_t *temp16 = (uint16_t *)memregion("prot")->base();
|
||||
int i;
|
||||
for (i=0;i<0x188/2;i+=2)
|
||||
u16 *temp16 = (u16 *)memregion("prot")->base();
|
||||
for (int i = 0; i < 0x188 / 2; i += 2)
|
||||
{
|
||||
temp16[i] = 0xFFFE;
|
||||
temp16[i+1] = 0xEAFF;
|
||||
|
||||
}
|
||||
|
||||
// the interrupt code appears to be at 0x08000010
|
||||
@ -497,8 +480,6 @@ void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region_theglad(int is_sv
|
||||
temp16[(base) / 2] = 0xe59f; base += 2;
|
||||
}
|
||||
|
||||
|
||||
|
||||
base = 0x150;
|
||||
temp16[(base) /2] = 0xff1e; base += 2;
|
||||
temp16[(base) /2] = 0xe12f; base += 2;
|
||||
@ -527,7 +508,7 @@ void pgm_arm_type3_state::init_theglad()
|
||||
void pgm_arm_type3_state::pgm_patch_external_arm_rom_jumptable_theglada(int base)
|
||||
{
|
||||
// we don't have the correct internal ROM for this version, so insead we use the one we have and patch the jump table in the external ROM
|
||||
uint32_t subroutine_addresses[] =
|
||||
u32 subroutine_addresses[] =
|
||||
{
|
||||
0x00FC, 0x00E8, 0x0110, 0x0150, 0x0194, 0x06C8, 0x071C, 0x0728,
|
||||
0x0734, 0x0740, 0x0784, 0x0794, 0x07FC, 0x0840, 0x086C, 0x0988,
|
||||
@ -547,7 +528,7 @@ void pgm_arm_type3_state::pgm_patch_external_arm_rom_jumptable_theglada(int base
|
||||
0x3050, 0x30A4, 0x30F8, 0x3120, 0x249C, 0x24C0, 0x27BC, 0x2B40,
|
||||
0x2BF4, 0x2CD8, 0x2E2C
|
||||
};
|
||||
uint16_t *extprot = (uint16_t *)memregion("user1")->base();
|
||||
u16 *extprot = (u16 *)memregion("user1")->base();
|
||||
/*
|
||||
0x00C8,0x00B4,0x00DC,0x011C,0x0160,0x02DC,0x0330,0x033C,
|
||||
0x0348,0x0354,0x0398,0x03A8,0x0410,0x0454,0x0480,0x059C,
|
||||
@ -571,7 +552,7 @@ void pgm_arm_type3_state::pgm_patch_external_arm_rom_jumptable_theglada(int base
|
||||
|
||||
for (auto & subroutine_addresse : subroutine_addresses)
|
||||
{
|
||||
// uint32_t addr = extprot[(base/2)] | (extprot[(base/2) + 1] << 16);
|
||||
// u32 addr = extprot[(base/2)] | (extprot[(base/2) + 1] << 16);
|
||||
extprot[(base / 2)] = subroutine_addresse;
|
||||
|
||||
base += 4;
|
||||
@ -653,7 +634,7 @@ void pgm_arm_type3_state::init_svg()
|
||||
pgm_svg_decrypt(machine());
|
||||
svg_latch_init();
|
||||
pgm_create_dummy_internal_arm_region_theglad(1);
|
||||
m_armrom = (uint32_t *)memregion("prot")->base();
|
||||
m_armrom = (u32 *)memregion("prot")->base();
|
||||
m_prot->space(AS_PROGRAM).install_read_handler(0xB90, 0xB93, read32_delegate(FUNC(pgm_arm_type3_state::svg_speedup_r),this));
|
||||
|
||||
|
||||
@ -665,7 +646,7 @@ void pgm_arm_type3_state::init_svgpcb()
|
||||
pgm_svgpcb_decrypt(machine());
|
||||
svg_latch_init();
|
||||
pgm_create_dummy_internal_arm_region_theglad(0);
|
||||
m_armrom = (uint32_t *)memregion("prot")->base();
|
||||
m_armrom = (u32 *)memregion("prot")->base();
|
||||
m_prot->space(AS_PROGRAM).install_read_handler(0x9e0, 0x9e3, read32_delegate(FUNC(pgm_arm_type3_state::svgpcb_speedup_r),this));
|
||||
|
||||
}
|
||||
@ -673,7 +654,7 @@ void pgm_arm_type3_state::init_svgpcb()
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::killbldp_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0x7d8) m_prot->eat_cycles(500);
|
||||
//else printf("killbldp_speedup_r %08x\n", pc);
|
||||
return m_arm_ram2[0x00c/4];
|
||||
@ -687,7 +668,7 @@ void pgm_arm_type3_state::init_killbldp()
|
||||
|
||||
m_prot->space(AS_PROGRAM).install_read_handler(0x1000000c, 0x1000000f, read32_delegate(FUNC(pgm_arm_type3_state::killbldp_speedup_r),this));
|
||||
|
||||
// uint16_t *temp16 = (uint16_t *)memregion("prot")->base();
|
||||
// u16 *temp16 = (u16 *)memregion("prot")->base();
|
||||
// int base = 0xfc; // startup table uploads
|
||||
// temp16[(base) /2] = 0x0000; base += 2;
|
||||
// temp16[(base) /2] = 0xE1A0; base += 2;
|
||||
@ -704,7 +685,7 @@ void pgm_arm_type3_state::init_killbldp()
|
||||
|
||||
READ32_MEMBER(pgm_arm_type3_state::dmnfrnt_speedup_r )
|
||||
{
|
||||
int pc = m_prot->pc();
|
||||
const int pc = m_prot->pc();
|
||||
if (pc == 0x8000fea) m_prot->eat_cycles(500);
|
||||
// else printf("dmn_speedup_r %08x\n", pc);
|
||||
return m_arm_ram[0x000444/4];
|
||||
@ -712,8 +693,8 @@ READ32_MEMBER(pgm_arm_type3_state::dmnfrnt_speedup_r )
|
||||
|
||||
READ16_MEMBER(pgm_arm_type3_state::dmnfrnt_main_speedup_r )
|
||||
{
|
||||
uint16_t data = m_mainram[0xa03c/2];
|
||||
int pc = m_maincpu->pc();
|
||||
u16 data = m_mainram[0xa03c/2];
|
||||
const int pc = m_maincpu->pc();
|
||||
if (pc == 0x10193a) m_maincpu->spin_until_interrupt();
|
||||
else if (pc == 0x1019a4) m_maincpu->spin_until_interrupt();
|
||||
return data;
|
||||
@ -736,10 +717,10 @@ void pgm_arm_type3_state::init_dmnfrnt()
|
||||
// the internal rom probably also supplies the region here
|
||||
// we have to copy it to both shared ram regions because it reads from a different one before the attract story?
|
||||
// could be a timing error? or shared ram behavior isn't how we think it is?
|
||||
uint16_t *share16;
|
||||
share16 = (uint16_t *)(m_svg_shareram[1].get());
|
||||
u16 *share16;
|
||||
share16 = (u16 *)(m_svg_shareram[1].get());
|
||||
share16[0x158/2] = 0x0005;
|
||||
share16 = (uint16_t *)(m_svg_shareram[0].get());
|
||||
share16 = (u16 *)(m_svg_shareram[0].get());
|
||||
share16[0x158/2] = 0x0005;
|
||||
}
|
||||
|
||||
@ -748,9 +729,9 @@ void pgm_arm_type3_state::init_dmnfrnt()
|
||||
// buffer[i] = src[j]
|
||||
|
||||
// todo, collapse these to an address swap
|
||||
void pgm_arm_type3_state::pgm_descramble_happy6(uint8_t* src)
|
||||
void pgm_arm_type3_state::pgm_descramble_happy6(u8* src)
|
||||
{
|
||||
std::vector<uint8_t> buffer(0x800000);
|
||||
std::vector<u8> buffer(0x800000);
|
||||
int writeaddress = 0;
|
||||
|
||||
for (int j = 0; j < 0x800; j += 0x200)
|
||||
@ -766,9 +747,9 @@ void pgm_arm_type3_state::pgm_descramble_happy6(uint8_t* src)
|
||||
|
||||
|
||||
|
||||
void pgm_arm_type3_state::pgm_descramble_happy6_2(uint8_t* src)
|
||||
void pgm_arm_type3_state::pgm_descramble_happy6_2(u8* src)
|
||||
{
|
||||
std::vector<uint8_t> buffer(0x800000);
|
||||
std::vector<u8> buffer(0x800000);
|
||||
int writeaddress = 0;
|
||||
for (int k = 0; k < 0x800000; k += 0x100000)
|
||||
{
|
||||
@ -799,23 +780,23 @@ INPUT_PORTS_END
|
||||
|
||||
void pgm_arm_type3_state::init_happy6()
|
||||
{
|
||||
uint8_t *src = (uint8_t *)(machine().root_device().memregion("tiles")->base()) + 0x180000;
|
||||
u8 *src = (u8 *)(machine().root_device().memregion("tiles")->base()) + 0x180000;
|
||||
pgm_descramble_happy6(src);
|
||||
pgm_descramble_happy6_2(src);
|
||||
|
||||
src = (uint8_t *)(machine().root_device().memregion("sprcol")->base()) + 0x000000;
|
||||
src = (u8 *)(machine().root_device().memregion("sprcol")->base()) + 0x000000;
|
||||
pgm_descramble_happy6(src);
|
||||
pgm_descramble_happy6_2(src);
|
||||
|
||||
src = (uint8_t *)(machine().root_device().memregion("sprcol")->base()) + 0x0800000;
|
||||
src = (u8 *)(machine().root_device().memregion("sprcol")->base()) + 0x0800000;
|
||||
pgm_descramble_happy6(src);
|
||||
pgm_descramble_happy6_2(src);
|
||||
|
||||
src = (uint8_t *)(machine().root_device().memregion("sprmask")->base());
|
||||
src = (u8 *)(machine().root_device().memregion("sprmask")->base());
|
||||
pgm_descramble_happy6(src);
|
||||
pgm_descramble_happy6_2(src);
|
||||
|
||||
src = (uint8_t *)(machine().root_device().memregion("ics")->base()) + 0x400000;
|
||||
src = (u8 *)(machine().root_device().memregion("ics")->base()) + 0x400000;
|
||||
pgm_descramble_happy6(src);
|
||||
pgm_descramble_happy6_2(src);
|
||||
|
||||
|
@ -10,19 +10,6 @@ public:
|
||||
m_arm_ram2(*this, "arm_ram2"),
|
||||
m_prot(*this, "prot") {
|
||||
}
|
||||
// svg
|
||||
int m_svg_ram_sel;
|
||||
std::unique_ptr<uint32_t[]> m_svg_shareram[2]; //for 5585G MACHINE
|
||||
|
||||
uint32_t m_svg_latchdata_68k_w;
|
||||
uint32_t m_svg_latchdata_arm_w;
|
||||
required_shared_ptr<uint32_t> m_arm_ram;
|
||||
required_shared_ptr<uint32_t> m_arm_ram2;
|
||||
|
||||
uint32_t* m_armrom;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
|
||||
void init_theglad();
|
||||
void init_theglada();
|
||||
void init_svg();
|
||||
@ -30,24 +17,43 @@ public:
|
||||
void init_killbldp();
|
||||
void init_dmnfrnt();
|
||||
void init_happy6();
|
||||
DECLARE_MACHINE_START(pgm_arm_type3);
|
||||
DECLARE_WRITE32_MEMBER( svg_arm7_ram_sel_w );
|
||||
DECLARE_READ32_MEMBER( svg_arm7_shareram_r );
|
||||
DECLARE_WRITE32_MEMBER( svg_arm7_shareram_w );
|
||||
DECLARE_READ16_MEMBER( svg_m68k_ram_r );
|
||||
DECLARE_WRITE16_MEMBER( svg_m68k_ram_w );
|
||||
DECLARE_READ16_MEMBER( svg_68k_nmi_r );
|
||||
DECLARE_WRITE16_MEMBER( svg_68k_nmi_w );
|
||||
DECLARE_WRITE16_MEMBER( svg_latch_68k_w );
|
||||
DECLARE_READ16_MEMBER( svg_latch_68k_r );
|
||||
DECLARE_READ32_MEMBER( svg_latch_arm_r );
|
||||
DECLARE_WRITE32_MEMBER( svg_latch_arm_w );
|
||||
|
||||
void pgm_arm_type3(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_reset() override;
|
||||
|
||||
private:
|
||||
// svg
|
||||
int m_svg_ram_sel;
|
||||
std::unique_ptr<u32[]> m_svg_shareram[2]; //for 5585G MACHINE
|
||||
|
||||
u32 m_svg_latchdata_68k_w;
|
||||
u32 m_svg_latchdata_arm_w;
|
||||
required_shared_ptr<u32> m_arm_ram;
|
||||
required_shared_ptr<u32> m_arm_ram2;
|
||||
|
||||
u32* m_armrom;
|
||||
|
||||
optional_device<cpu_device> m_prot;
|
||||
|
||||
void svg_arm7_ram_sel_w(u32 data);
|
||||
u32 svg_arm7_shareram_r(offs_t offset);
|
||||
void svg_arm7_shareram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
u16 svg_m68k_ram_r(offs_t offset);
|
||||
void svg_m68k_ram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
u16 svg_68k_nmi_r();
|
||||
void svg_68k_nmi_w(u16 data);
|
||||
void svg_latch_68k_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
u16 svg_latch_68k_r(offs_t offset, u16 mem_mask = ~0);
|
||||
u32 svg_latch_arm_r(offs_t offset, u32 mem_mask = ~0);
|
||||
void svg_latch_arm_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
void svg_basic_init();
|
||||
void pgm_create_dummy_internal_arm_region(int size);
|
||||
void pgm_patch_external_arm_rom_jumptable_theglada(int base);
|
||||
void pgm_create_dummy_internal_arm_region_theglad(int is_svg);
|
||||
void pgm_descramble_happy6(uint8_t* src);
|
||||
void pgm_descramble_happy6_2(uint8_t* src);
|
||||
void pgm_descramble_happy6(u8* src);
|
||||
void pgm_descramble_happy6_2(u8* src);
|
||||
void svg_latch_init();
|
||||
DECLARE_READ32_MEMBER( dmnfrnt_speedup_r );
|
||||
DECLARE_READ16_MEMBER( dmnfrnt_main_speedup_r );
|
||||
@ -56,8 +62,6 @@ public:
|
||||
DECLARE_READ32_MEMBER( happy6_speedup_r );
|
||||
DECLARE_READ32_MEMBER( svg_speedup_r );
|
||||
DECLARE_READ32_MEMBER( svgpcb_speedup_r );
|
||||
DECLARE_MACHINE_RESET(pgm_arm_type3_reset);
|
||||
void pgm_arm_type3(machine_config &config);
|
||||
void _55857G_arm7_map(address_map &map);
|
||||
void svg_68k_mem(address_map &map);
|
||||
};
|
||||
|
@ -18,7 +18,7 @@
|
||||
|
||||
void pgm_asic3_state::asic3_compute_hold(int y, int z)
|
||||
{
|
||||
unsigned short old = m_asic3_hold;
|
||||
const u16 old = m_asic3_hold;
|
||||
|
||||
m_asic3_hold = ((old << 1) | (old >> 15));
|
||||
|
||||
@ -27,7 +27,7 @@ void pgm_asic3_state::asic3_compute_hold(int y, int z)
|
||||
m_asic3_hold ^= BIT(m_asic3_x, 2) << 10;
|
||||
m_asic3_hold ^= BIT(old, 5);
|
||||
|
||||
switch (ioport("Region")->read()) // The mode is dependent on the region
|
||||
switch (m_region->read()) // The mode is dependent on the region
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
@ -52,13 +52,13 @@ READ16_MEMBER(pgm_asic3_state::pgm_asic3_r)
|
||||
switch (m_asic3_reg)
|
||||
{
|
||||
case 0x00: // region is supplied by the protection device
|
||||
return (m_asic3_latch[0] & 0xf7) | ((ioport("Region")->read() << 3) & 0x08);
|
||||
return (m_asic3_latch[0] & 0xf7) | ((m_region->read() << 3) & 0x08);
|
||||
|
||||
case 0x01:
|
||||
return m_asic3_latch[1];
|
||||
|
||||
case 0x02: // region is supplied by the protection device
|
||||
return (m_asic3_latch[2] & 0x7f) | ((ioport("Region")->read() << 6) & 0x80);
|
||||
return (m_asic3_latch[2] & 0x7f) | ((m_region->read() << 6) & 0x80);
|
||||
|
||||
case 0x03:
|
||||
return bitswap<8>(m_asic3_hold, 5,2,9,7,10,13,12,15);
|
||||
@ -95,7 +95,8 @@ READ16_MEMBER(pgm_asic3_state::pgm_asic3_r)
|
||||
|
||||
WRITE16_MEMBER(pgm_asic3_state::pgm_asic3_w)
|
||||
{
|
||||
if (offset == 0) {
|
||||
if (offset == 0)
|
||||
{
|
||||
m_asic3_reg = data;
|
||||
return;
|
||||
}
|
||||
|
@ -9,18 +9,20 @@ public:
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
}
|
||||
|
||||
// ASIC 3 (oriental legends protection)
|
||||
uint8_t m_asic3_reg;
|
||||
uint8_t m_asic3_latch[3];
|
||||
uint8_t m_asic3_x;
|
||||
uint16_t m_asic3_hilo;
|
||||
uint16_t m_asic3_hold;
|
||||
|
||||
void init_orlegend();
|
||||
void pgm_asic3(machine_config &config);
|
||||
|
||||
private:
|
||||
// ASIC 3 (oriental legends protection)
|
||||
u8 m_asic3_reg;
|
||||
u8 m_asic3_latch[3];
|
||||
u8 m_asic3_x;
|
||||
u16 m_asic3_hilo;
|
||||
u16 m_asic3_hold;
|
||||
|
||||
void asic3_compute_hold(int,int);
|
||||
DECLARE_READ16_MEMBER( pgm_asic3_r );
|
||||
DECLARE_WRITE16_MEMBER( pgm_asic3_w );
|
||||
void pgm_asic3(machine_config &config);
|
||||
};
|
||||
|
||||
INPUT_PORTS_EXTERN( orlegend );
|
||||
|
@ -19,9 +19,9 @@
|
||||
// bg pri is 2
|
||||
// sprite already here is 1 / 3
|
||||
|
||||
inline void pgm_state::pgm_draw_pix( int xdrawpos, int pri, uint16_t* dest, uint8_t* destpri, uint16_t srcdat)
|
||||
inline void pgm_state::pgm_draw_pix(int xdrawpos, int pri, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat)
|
||||
{
|
||||
if ((xdrawpos >= 0) && (xdrawpos < 448))
|
||||
if ((xdrawpos >= cliprect.min_x) && (xdrawpos <= cliprect.max_x))
|
||||
{
|
||||
if (!(destpri[xdrawpos] & 1))
|
||||
{
|
||||
@ -42,9 +42,9 @@ inline void pgm_state::pgm_draw_pix( int xdrawpos, int pri, uint16_t* dest, uint
|
||||
}
|
||||
}
|
||||
|
||||
inline void pgm_state::pgm_draw_pix_nopri( int xdrawpos, uint16_t* dest, uint8_t* destpri, uint16_t srcdat)
|
||||
inline void pgm_state::pgm_draw_pix_nopri(int xdrawpos, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat)
|
||||
{
|
||||
if ((xdrawpos >= 0) && (xdrawpos < 448))
|
||||
if ((xdrawpos >= cliprect.min_x) && (xdrawpos <= cliprect.max_x))
|
||||
{
|
||||
if (!(destpri[xdrawpos] & 1))
|
||||
{
|
||||
@ -54,9 +54,9 @@ inline void pgm_state::pgm_draw_pix_nopri( int xdrawpos, uint16_t* dest, uint8_t
|
||||
}
|
||||
}
|
||||
|
||||
inline void pgm_state::pgm_draw_pix_pri( int xdrawpos, uint16_t* dest, uint8_t* destpri, uint16_t srcdat)
|
||||
inline void pgm_state::pgm_draw_pix_pri(int xdrawpos, u16* dest, u8* destpri, const rectangle &cliprect, u16 srcdat)
|
||||
{
|
||||
if ((xdrawpos >= 0) && (xdrawpos < 448))
|
||||
if ((xdrawpos >= cliprect.min_x) && (xdrawpos <= cliprect.max_x))
|
||||
{
|
||||
if (!(destpri[xdrawpos] & 1))
|
||||
{
|
||||
@ -74,41 +74,33 @@ inline void pgm_state::pgm_draw_pix_pri( int xdrawpos, uint16_t* dest, uint8_t*
|
||||
for complex zoomed cases
|
||||
*************************************************************************/
|
||||
|
||||
void pgm_state::draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, int xzoom, int xgrow, int flip, int xpos, int pri, int realxsize, int palt, int draw )
|
||||
void pgm_state::draw_sprite_line(int wide, u16* dest, u8* destpri, const rectangle &cliprect, int xzoom, bool xgrow, int flip, int xpos, int pri, int realxsize, int palt, bool draw)
|
||||
{
|
||||
int xcnt,xcntdraw;
|
||||
int xzoombit;
|
||||
int xoffset = 0;
|
||||
int xdrawpos = 0;
|
||||
|
||||
uint8_t *adata = m_sprite_a_region.get();
|
||||
u8 *adata = m_sprite_a_region.get();
|
||||
size_t adatasize = m_sprite_a_region_size - 1;
|
||||
|
||||
uint16_t msk;
|
||||
uint16_t srcdat;
|
||||
int xcntdraw = 0;
|
||||
|
||||
xcnt = 0;
|
||||
xcntdraw = 0;
|
||||
|
||||
for (xcnt = 0 ; xcnt < wide ; xcnt++)
|
||||
for (int xcnt = 0; xcnt < wide; xcnt++)
|
||||
{
|
||||
int x;
|
||||
u16 msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |(m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |( m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
for (x = 0; x < 16; x++)
|
||||
for (int x = 0; x < 16; x++)
|
||||
{
|
||||
if (!(msk & 0x0001))
|
||||
if (!(BIT(msk, 0)))
|
||||
{
|
||||
srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
const u16 srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
m_aoffset++;
|
||||
|
||||
if (draw)
|
||||
{
|
||||
xzoombit = (xzoom >> (xoffset & 0x1f)) & 1;
|
||||
const bool xzoombit = BIT(xzoom, xoffset & 0x1f);
|
||||
xoffset++;
|
||||
|
||||
if (xzoombit == 1 && xgrow == 1)
|
||||
if (xzoombit && xgrow)
|
||||
{ // double this column
|
||||
|
||||
if (!(flip & 0x01))
|
||||
@ -116,7 +108,7 @@ void pgm_state::draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, in
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, cliprect, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
|
||||
@ -125,11 +117,11 @@ void pgm_state::draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, in
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, cliprect, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
else if (xzoombit == 1 && xgrow == 0)
|
||||
else if (xzoombit && (!xgrow))
|
||||
{
|
||||
/* skip this column */
|
||||
}
|
||||
@ -140,7 +132,7 @@ void pgm_state::draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, in
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, cliprect, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
@ -149,34 +141,25 @@ void pgm_state::draw_sprite_line( int wide, uint16_t* dest, uint8_t* destpri, in
|
||||
}
|
||||
else
|
||||
{
|
||||
xzoombit = (xzoom >> (xoffset & 0x1f)) & 1;
|
||||
const bool xzoombit = BIT(xzoom, xoffset & 0x1f);
|
||||
xoffset++;
|
||||
if (xzoombit == 1 && xgrow == 1) { xcntdraw+=2; }
|
||||
else if (xzoombit == 1 && xgrow == 0) { }
|
||||
if (xzoombit && xgrow) { xcntdraw += 2; }
|
||||
else if (xzoombit && (!xgrow)) { }
|
||||
else { xcntdraw++; }
|
||||
}
|
||||
|
||||
msk >>= 1;
|
||||
|
||||
|
||||
}
|
||||
|
||||
m_boffset += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, uint32_t xzoom, int xgrow, uint32_t yzoom, int ygrow, int pri )
|
||||
void pgm_state::draw_sprite_new_zoomed(int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, u32 xzoom, bool xgrow, u32 yzoom, bool ygrow, int pri)
|
||||
{
|
||||
int ycnt;
|
||||
int ydrawpos;
|
||||
uint16_t *dest;
|
||||
uint8_t* destpri;
|
||||
int ycntdraw;
|
||||
int yzoombit;
|
||||
int xzoombit;
|
||||
int xcnt = 0;
|
||||
|
||||
|
||||
m_aoffset = (m_bdata[(m_boffset + 3) & m_bdata.mask()] << 24) | (m_bdata[(m_boffset + 2) & m_bdata.mask()] << 16) |
|
||||
(m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) | (m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0);
|
||||
m_aoffset = m_aoffset >> 2; m_aoffset *= 3;
|
||||
@ -187,15 +170,15 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
/* if we're to avoid pre-decoding the data for each sprite each time we draw then we have to draw the sprite data
|
||||
in the order it is in ROM due to the nature of the compresson scheme. This means drawing upwards from the end point
|
||||
in the case of flipped sprites */
|
||||
ycnt = 0;
|
||||
ycntdraw = 0;
|
||||
int ycnt = 0;
|
||||
int ycntdraw = 0;
|
||||
int realysize = 0;
|
||||
|
||||
while (ycnt < high)
|
||||
{
|
||||
yzoombit = (yzoom >> (ycnt & 0x1f)) & 1;
|
||||
if (yzoombit == 1 && ygrow == 1) { realysize+=2; }
|
||||
else if (yzoombit == 1 && ygrow == 0) { }
|
||||
const bool yzoombit = BIT(yzoom, ycnt & 0x1f);
|
||||
if (yzoombit && ygrow) { realysize += 2; }
|
||||
else if (yzoombit && (!ygrow)) { }
|
||||
else { realysize++; };
|
||||
|
||||
ycnt++;
|
||||
@ -206,43 +189,42 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
|
||||
while (xcnt < wide * 16)
|
||||
{
|
||||
xzoombit = (xzoom >> (xcnt & 0x1f)) & 1;
|
||||
if (xzoombit == 1 && xgrow == 1) { realxsize+=2; }
|
||||
else if (xzoombit == 1 && xgrow == 0) { }
|
||||
const bool xzoombit = BIT(xzoom, xcnt & 0x1f);
|
||||
if (xzoombit && xgrow) { realxsize += 2; }
|
||||
else if (xzoombit && (!xgrow)) { }
|
||||
else { realxsize++; };
|
||||
|
||||
xcnt++;
|
||||
}
|
||||
realxsize--;
|
||||
|
||||
|
||||
/* now draw it */
|
||||
ycnt = 0;
|
||||
ycntdraw = 0;
|
||||
|
||||
while (ycnt < high)
|
||||
{
|
||||
yzoombit = (yzoom >> (ycnt & 0x1f)) & 1;
|
||||
const bool yzoombit = BIT(yzoom, ycnt & 0x1f);
|
||||
|
||||
if (yzoombit == 1 && ygrow == 1) // double this line
|
||||
if (yzoombit && ygrow) // double this line
|
||||
{
|
||||
int temp_aoffset = m_aoffset;
|
||||
int temp_boffset = m_boffset;
|
||||
const int temp_aoffset = m_aoffset;
|
||||
const int temp_boffset = m_boffset;
|
||||
|
||||
if (!(flip & 0x02))
|
||||
ydrawpos = ypos + ycntdraw;
|
||||
else
|
||||
ydrawpos = ypos + realysize - ycntdraw;
|
||||
|
||||
if ((ydrawpos >= 0) && (ydrawpos < 224))
|
||||
if ((ydrawpos >= cliprect.min_y) && (ydrawpos <= cliprect.max_y))
|
||||
{
|
||||
dest = &bitmap.pix16(ydrawpos);
|
||||
destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
|
||||
u16 *dest = &bitmap.pix16(ydrawpos);
|
||||
u8 *destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, true);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_line(wide, nullptr, nullptr, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
|
||||
draw_sprite_line(wide, nullptr, nullptr, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, false);
|
||||
}
|
||||
|
||||
ycntdraw++;
|
||||
@ -256,24 +238,24 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
else
|
||||
ydrawpos = ypos + realysize - ycntdraw;
|
||||
|
||||
if ((ydrawpos >= 0) && (ydrawpos < 224))
|
||||
if ((ydrawpos >= cliprect.min_y) && (ydrawpos <= cliprect.max_y))
|
||||
{
|
||||
dest = &bitmap.pix16(ydrawpos);
|
||||
destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
|
||||
u16 *dest = &bitmap.pix16(ydrawpos);
|
||||
u8 *destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, true);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_line(wide, nullptr, nullptr, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
|
||||
draw_sprite_line(wide, nullptr, nullptr, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, false);
|
||||
|
||||
if (!(flip & 0x02))
|
||||
{
|
||||
if (ydrawpos>224)
|
||||
if (ydrawpos >= cliprect.max_y)
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ydrawpos<0)
|
||||
if (ydrawpos < cliprect.min_y)
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -281,10 +263,10 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
ycntdraw++;
|
||||
|
||||
}
|
||||
else if (yzoombit == 1 && ygrow == 0)
|
||||
else if (yzoombit && (!ygrow))
|
||||
{
|
||||
/* skip this line */
|
||||
draw_sprite_line(wide, nullptr, nullptr, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
|
||||
draw_sprite_line(wide, nullptr, nullptr, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, false);
|
||||
}
|
||||
else /* normal line */
|
||||
{
|
||||
@ -293,24 +275,24 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
else
|
||||
ydrawpos = ypos + realysize - ycntdraw;
|
||||
|
||||
if ((ydrawpos >= 0) && (ydrawpos < 224))
|
||||
if ((ydrawpos >= cliprect.min_y) && (ydrawpos <= cliprect.max_y))
|
||||
{
|
||||
dest = &bitmap.pix16(ydrawpos);
|
||||
destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 1);
|
||||
u16 *dest = &bitmap.pix16(ydrawpos);
|
||||
u8 *destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line(wide, dest, destpri, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, true);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_line(wide, nullptr, nullptr, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
|
||||
draw_sprite_line(wide, nullptr, nullptr, cliprect, xzoom, xgrow, flip, xpos, pri, realxsize, palt, false);
|
||||
|
||||
if (!(flip & 0x02))
|
||||
{
|
||||
if (ydrawpos>224)
|
||||
if (ydrawpos >= cliprect.max_y)
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ydrawpos<0)
|
||||
if (ydrawpos < cliprect.min_y)
|
||||
return;
|
||||
}
|
||||
|
||||
@ -324,33 +306,26 @@ void pgm_state::draw_sprite_new_zoomed( int wide, int high, int xpos, int ypos,
|
||||
}
|
||||
|
||||
|
||||
void pgm_state::draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destpri, int flip, int xpos, int pri, int realxsize, int palt, int draw )
|
||||
void pgm_state::draw_sprite_line_basic(int wide, u16* dest, u8* destpri, const rectangle &cliprect, int flip, int xpos, int pri, int realxsize, int palt, bool draw)
|
||||
{
|
||||
int xcnt,xcntdraw;
|
||||
int xoffset = 0;
|
||||
int xdrawpos = 0;
|
||||
uint8_t *adata = m_sprite_a_region.get();
|
||||
u8 *adata = m_sprite_a_region.get();
|
||||
size_t adatasize = m_sprite_a_region_size - 1;
|
||||
|
||||
uint16_t msk;
|
||||
uint16_t srcdat;
|
||||
|
||||
xcnt = 0;
|
||||
xcntdraw = 0;
|
||||
int xcntdraw = 0;
|
||||
|
||||
if (!pri)
|
||||
{
|
||||
for (xcnt = 0 ; xcnt < wide ; xcnt++)
|
||||
for (int xcnt = 0; xcnt < wide; xcnt++)
|
||||
{
|
||||
int x;
|
||||
u16 msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |(m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |( m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
for (x = 0; x < 16; x++)
|
||||
for (int x = 0; x < 16; x++)
|
||||
{
|
||||
if (!(msk & 0x0001))
|
||||
if (!(BIT(msk, 0)))
|
||||
{
|
||||
srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
const u16 srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
m_aoffset++;
|
||||
|
||||
if (draw)
|
||||
@ -362,7 +337,7 @@ void pgm_state::draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destp
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix_nopri(xdrawpos, dest, destpri, srcdat);
|
||||
pgm_draw_pix_nopri(xdrawpos, dest, destpri, cliprect, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
@ -382,17 +357,15 @@ void pgm_state::draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destp
|
||||
}
|
||||
else
|
||||
{
|
||||
for (xcnt = 0 ; xcnt < wide ; xcnt++)
|
||||
for (int xcnt = 0; xcnt < wide; xcnt++)
|
||||
{
|
||||
int x;
|
||||
u16 msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |(m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
msk = ((m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) |( m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0));
|
||||
|
||||
for (x = 0; x < 16; x++)
|
||||
for (int x = 0; x < 16; x++)
|
||||
{
|
||||
if (!(msk & 0x0001))
|
||||
if (!(BIT(msk, 0)))
|
||||
{
|
||||
srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
const u16 srcdat = adata[m_aoffset & adatasize] + palt * 32;
|
||||
m_aoffset++;
|
||||
|
||||
if (draw)
|
||||
@ -404,7 +377,7 @@ void pgm_state::draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destp
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix_pri(xdrawpos, dest, destpri, srcdat);
|
||||
pgm_draw_pix_pri(xdrawpos, dest, destpri, cliprect, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
@ -429,13 +402,9 @@ void pgm_state::draw_sprite_line_basic( int wide, uint16_t* dest, uint8_t* destp
|
||||
simplified version for non-zoomed cases, a bit faster
|
||||
*************************************************************************/
|
||||
|
||||
void pgm_state::draw_sprite_new_basic( int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, bitmap_ind8 &priority_bitmap, int pri )
|
||||
void pgm_state::draw_sprite_new_basic(int wide, int high, int xpos, int ypos, int palt, int flip, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, int pri)
|
||||
{
|
||||
int ycnt;
|
||||
int ydrawpos;
|
||||
uint16_t *dest;
|
||||
uint8_t* destpri;
|
||||
int ycntdraw;
|
||||
|
||||
m_aoffset = (m_bdata[(m_boffset + 3) & m_bdata.mask()] << 24) | (m_bdata[(m_boffset + 2) & m_bdata.mask()] << 16) |
|
||||
(m_bdata[(m_boffset + 1) & m_bdata.mask()] << 8) | (m_bdata[(m_boffset + 0) & m_bdata.mask()] << 0);
|
||||
@ -443,12 +412,12 @@ void pgm_state::draw_sprite_new_basic( int wide, int high, int xpos, int ypos, i
|
||||
|
||||
m_boffset += 4;
|
||||
|
||||
int realysize = high-1;
|
||||
int realxsize = (wide * 16)-1;
|
||||
const int realysize = high - 1;
|
||||
const int realxsize = (wide * 16) - 1;
|
||||
|
||||
/* now draw it */
|
||||
ycnt = 0;
|
||||
ycntdraw = 0;
|
||||
int ycnt = 0;
|
||||
int ycntdraw = 0;
|
||||
|
||||
while (ycnt < high)
|
||||
{
|
||||
@ -457,24 +426,24 @@ void pgm_state::draw_sprite_new_basic( int wide, int high, int xpos, int ypos, i
|
||||
else
|
||||
ydrawpos = ypos + realysize - ycntdraw;
|
||||
|
||||
if ((ydrawpos >= 0) && (ydrawpos < 224))
|
||||
if ((ydrawpos >= cliprect.min_y) && (ydrawpos <= cliprect.max_y))
|
||||
{
|
||||
dest = &bitmap.pix16(ydrawpos);
|
||||
destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line_basic(wide, dest, destpri, flip, xpos, pri, realxsize, palt, 1);
|
||||
u16 *dest = &bitmap.pix16(ydrawpos);
|
||||
u8 *destpri = &priority_bitmap.pix8(ydrawpos);
|
||||
draw_sprite_line_basic(wide, dest, destpri, cliprect, flip, xpos, pri, realxsize, palt, true);
|
||||
}
|
||||
else
|
||||
{
|
||||
draw_sprite_line_basic(wide, nullptr, nullptr, flip, xpos, pri, realxsize, palt, 0);
|
||||
draw_sprite_line_basic(wide, nullptr, nullptr, cliprect, flip, xpos, pri, realxsize, palt, false);
|
||||
|
||||
if (!(flip & 0x02))
|
||||
{
|
||||
if (ydrawpos>224)
|
||||
if (ydrawpos >= cliprect.max_y)
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ydrawpos<0)
|
||||
if (ydrawpos < cliprect.min_y)
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -485,7 +454,7 @@ void pgm_state::draw_sprite_new_basic( int wide, int high, int xpos, int ypos, i
|
||||
}
|
||||
|
||||
|
||||
void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_source, bitmap_ind8& priority_bitmap )
|
||||
void pgm_state::draw_sprites(bitmap_ind16& spritebitmap, const rectangle &cliprect, u16 *sprite_source, bitmap_ind8& priority_bitmap)
|
||||
{
|
||||
/* ZZZZ Zxxx xxxx xxxx
|
||||
zzzz z-yy yyyy yyyy
|
||||
@ -494,9 +463,9 @@ void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_sourc
|
||||
wwww wwwh hhhh hhhh
|
||||
*/
|
||||
|
||||
const uint16_t *finish = m_spritebufferram.get() + (0xa00 / 2);
|
||||
const u16 *finish = m_spritebufferram.get() + (0xa00 / 2);
|
||||
|
||||
uint16_t* start = sprite_source;
|
||||
u16* start = sprite_source;
|
||||
|
||||
while (sprite_source < finish)
|
||||
{
|
||||
@ -510,19 +479,17 @@ void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_sourc
|
||||
int xpos = sprite_source[0] & 0x07ff;
|
||||
int ypos = sprite_source[1] & 0x03ff;
|
||||
int xzom = (sprite_source[0] & 0x7800) >> 11;
|
||||
int xgrow = (sprite_source[0] & 0x8000) >> 15;
|
||||
const bool xgrow = (sprite_source[0] & 0x8000) >> 15;
|
||||
int yzom = (sprite_source[1] & 0x7800) >> 11;
|
||||
int ygrow = (sprite_source[1] & 0x8000) >> 15;
|
||||
int palt = (sprite_source[2] & 0x1f00) >> 8;
|
||||
int flip = (sprite_source[2] & 0x6000) >> 13;
|
||||
const bool ygrow = (sprite_source[1] & 0x8000) >> 15;
|
||||
const int palt = (sprite_source[2] & 0x1f00) >> 8;
|
||||
const int flip = (sprite_source[2] & 0x6000) >> 13;
|
||||
int boff = ((sprite_source[2] & 0x007f) << 16) | (sprite_source[3] & 0xffff);
|
||||
int wide = (sprite_source[4] & 0x7e00) >> 9;
|
||||
int high = sprite_source[4] & 0x01ff;
|
||||
int pri = (sprite_source[2] & 0x0080) >> 7;
|
||||
const int wide = (sprite_source[4] & 0x7e00) >> 9;
|
||||
const int high = sprite_source[4] & 0x01ff;
|
||||
const int pri = (sprite_source[2] & 0x0080) >> 7;
|
||||
|
||||
uint32_t xzoom, yzoom;
|
||||
|
||||
uint16_t* sprite_zoomtable = &m_videoregs[0x1000 / 2];
|
||||
const u16* sprite_zoomtable = &m_videoregs[0x1000 / 2];
|
||||
|
||||
if (xgrow)
|
||||
{
|
||||
@ -536,8 +503,8 @@ void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_sourc
|
||||
yzom = 0x10 - yzom;
|
||||
}
|
||||
|
||||
xzoom = (sprite_zoomtable[xzom * 2] << 16) | sprite_zoomtable[xzom * 2 + 1];
|
||||
yzoom = (sprite_zoomtable[yzom * 2] << 16) | sprite_zoomtable[yzom * 2 + 1];
|
||||
u32 xzoom = (sprite_zoomtable[xzom * 2] << 16) | sprite_zoomtable[xzom * 2 + 1];
|
||||
u32 yzoom = (sprite_zoomtable[yzom * 2] << 16) | sprite_zoomtable[yzom * 2 + 1];
|
||||
|
||||
boff *= 2;
|
||||
if (xpos > 0x3ff) xpos -= 0x800;
|
||||
@ -546,21 +513,21 @@ void pgm_state::draw_sprites( bitmap_ind16& spritebitmap, uint16_t *sprite_sourc
|
||||
//if ((priority == 1) && (pri == 0)) break;
|
||||
|
||||
m_boffset = boff;
|
||||
if ((!xzoom) && (!yzoom)) draw_sprite_new_basic(wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, pri );
|
||||
else draw_sprite_new_zoomed(wide, high, xpos, ypos, palt, flip, spritebitmap, priority_bitmap, xzoom, xgrow, yzoom, ygrow, pri );
|
||||
if ((!xzoom) && (!yzoom)) draw_sprite_new_basic(wide, high, xpos, ypos, palt, flip, spritebitmap, cliprect, priority_bitmap, pri);
|
||||
else draw_sprite_new_zoomed(wide, high, xpos, ypos, palt, flip, spritebitmap, cliprect, priority_bitmap, xzoom, xgrow, yzoom, ygrow, pri);
|
||||
|
||||
sprite_source -= 5;
|
||||
}
|
||||
}
|
||||
|
||||
/* TX Layer */
|
||||
WRITE16_MEMBER(pgm_state::pgm_tx_videoram_w)
|
||||
void pgm_state::tx_videoram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
m_tx_videoram[offset] = data;
|
||||
m_tx_tilemap->mark_tile_dirty(offset / 2);
|
||||
}
|
||||
|
||||
TILE_GET_INFO_MEMBER(pgm_state::get_pgm_tx_tilemap_tile_info)
|
||||
TILE_GET_INFO_MEMBER(pgm_state::get_tx_tile_info)
|
||||
{
|
||||
/* 0x904000 - 0x90ffff is the Text Overlay Ram (pgm_tx_videoram)
|
||||
each tile uses 4 bytes, the tilemap is 64x128?
|
||||
@ -576,33 +543,28 @@ TILE_GET_INFO_MEMBER(pgm_state::get_pgm_tx_tilemap_tile_info)
|
||||
p = palette
|
||||
f = flip
|
||||
*/
|
||||
int tileno, colour, flipyx; //,game;
|
||||
|
||||
tileno = m_tx_videoram[tile_index * 2] & 0xffff;
|
||||
colour = (m_tx_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
|
||||
flipyx = (m_tx_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
|
||||
const u32 tileno = m_tx_videoram[tile_index * 2] & 0xffff;
|
||||
const u32 colour = (m_tx_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
|
||||
const u8 flipyx = (m_tx_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
|
||||
|
||||
SET_TILE_INFO_MEMBER(0,tileno,colour,TILE_FLIPYX(flipyx));
|
||||
}
|
||||
|
||||
/* BG Layer */
|
||||
|
||||
WRITE16_MEMBER(pgm_state::pgm_bg_videoram_w)
|
||||
void pgm_state::bg_videoram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
m_bg_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset / 2);
|
||||
}
|
||||
|
||||
TILE_GET_INFO_MEMBER(pgm_state::get_pgm_bg_tilemap_tile_info)
|
||||
TILE_GET_INFO_MEMBER(pgm_state::get_bg_tile_info)
|
||||
{
|
||||
/* pretty much the same as tx layer */
|
||||
|
||||
int tileno, colour, flipyx;
|
||||
|
||||
tileno = m_bg_videoram[tile_index *2] & 0xffff;
|
||||
|
||||
colour = (m_bg_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
|
||||
flipyx = (m_bg_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
|
||||
const u32 tileno = m_bg_videoram[tile_index *2] & 0xffff;
|
||||
const u32 colour = (m_bg_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
|
||||
const u8 flipyx = (m_bg_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
|
||||
|
||||
SET_TILE_INFO_MEMBER(1,tileno,colour,TILE_FLIPYX(flipyx));
|
||||
}
|
||||
@ -611,58 +573,47 @@ TILE_GET_INFO_MEMBER(pgm_state::get_pgm_bg_tilemap_tile_info)
|
||||
|
||||
/*** Video - Start / Update ****************************************************/
|
||||
|
||||
VIDEO_START_MEMBER(pgm_state,pgm)
|
||||
void pgm_state::video_start()
|
||||
{
|
||||
int i;
|
||||
|
||||
m_aoffset = 0;
|
||||
m_boffset = 0;
|
||||
|
||||
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(pgm_state::get_pgm_tx_tilemap_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
|
||||
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(pgm_state::get_tx_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
|
||||
m_tx_tilemap->set_transparent_pen(15);
|
||||
|
||||
m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(pgm_state::get_pgm_bg_tilemap_tile_info),this), TILEMAP_SCAN_ROWS, 32, 32, 64, 16);
|
||||
m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(pgm_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 32, 32, 64, 16);
|
||||
m_bg_tilemap->set_transparent_pen(31);
|
||||
m_bg_tilemap->set_scroll_rows(16 * 32);
|
||||
|
||||
for (i = 0; i < 0x1200 / 2; i++)
|
||||
m_palette->set_pen_color(i, rgb_t(0, 0, 0));
|
||||
|
||||
m_spritebufferram = make_unique_clear<uint16_t[]>(0xa00/2);
|
||||
m_spritebufferram = make_unique_clear<u16[]>(0xa00/2);
|
||||
|
||||
save_pointer(NAME(m_spritebufferram), 0xa00/2);
|
||||
}
|
||||
|
||||
uint32_t pgm_state::screen_update_pgm(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
u32 pgm_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
int y;
|
||||
|
||||
bitmap.fill(0x3ff, cliprect); // ddp2 igs logo needs 0x3ff
|
||||
|
||||
screen.priority().fill(0, cliprect);
|
||||
|
||||
m_bg_tilemap->set_scrolly(0, m_videoregs[0x2000/2]);
|
||||
|
||||
for (y = 0; y < 224; y++)
|
||||
for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
|
||||
m_bg_tilemap->set_scrollx((y + m_videoregs[0x2000 / 2]) & 0x1ff, m_videoregs[0x3000 / 2] + m_rowscrollram[y]);
|
||||
|
||||
|
||||
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 2);
|
||||
|
||||
draw_sprites(bitmap, m_spritebufferram.get(), screen.priority());
|
||||
draw_sprites(bitmap, cliprect, m_spritebufferram.get(), screen.priority());
|
||||
|
||||
m_tx_tilemap->set_scrolly(0, m_videoregs[0x5000/2]);
|
||||
m_tx_tilemap->set_scrollx(0, m_videoregs[0x6000/2]); // Check
|
||||
|
||||
|
||||
m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(pgm_state::screen_vblank_pgm)
|
||||
WRITE_LINE_MEMBER(pgm_state::screen_vblank)
|
||||
{
|
||||
// rising edge
|
||||
if (state)
|
||||
|
Loading…
Reference in New Issue
Block a user