mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
z100: Various improvements
- Render video through CRTC instead of working around it by caching registers - Add cursor - Add video interrupt - Add 8253 timer and associated interrupt - Correct numerous clocks
This commit is contained in:
AJR
parent
93b1422c63
commit
4eb493759e
@ -145,12 +145,15 @@ ZDIPSW EQU 0FFH ; Configuration dip switches
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#include "emu.h"
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#include "cpu/i86/i86.h"
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#include "cpu/i8085/i8085.h"
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#include "cpu/mcs48/mcs48.h"
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//#include "bus/rs232/rs232.h"
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//#include "bus/s100/s100.h"
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#include "imagedev/floppy.h"
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#include "machine/6821pia.h"
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#include "machine/input_merger.h"
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#include "machine/mc2661.h"
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#include "machine/pit8253.h"
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#include "machine/pic8259.h"
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#include "machine/wd_fdc.h"
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#include "video/mc6845.h"
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@ -184,22 +187,28 @@ private:
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virtual void machine_reset() override;
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virtual void video_start() override;
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offs_t vram_map(offs_t offset) const;
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DECLARE_READ8_MEMBER(z100_vram_r);
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DECLARE_WRITE8_MEMBER(z100_vram_w);
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DECLARE_READ8_MEMBER(keyb_data_r);
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DECLARE_READ8_MEMBER(keyb_status_r);
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DECLARE_WRITE8_MEMBER(keyb_command_w);
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DECLARE_WRITE8_MEMBER(z100_6845_address_w);
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DECLARE_WRITE8_MEMBER(z100_6845_data_w);
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DECLARE_WRITE8_MEMBER(floppy_select_w);
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DECLARE_WRITE8_MEMBER(floppy_motor_w);
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uint8_t tmr_status_r();
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void tmr_status_w(uint8_t data);
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DECLARE_WRITE_LINE_MEMBER(timer_flipflop0_w);
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DECLARE_WRITE_LINE_MEMBER(timer_flipflop1_w);
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void sys_pia_A_w(uint8_t data);
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DECLARE_WRITE_LINE_MEMBER(vidint_w);
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DECLARE_READ8_MEMBER(get_slave_ack);
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DECLARE_WRITE8_MEMBER(video_pia_A_w);
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DECLARE_WRITE8_MEMBER(video_pia_B_w);
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DECLARE_WRITE_LINE_MEMBER(video_pia_CA2_w);
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DECLARE_WRITE_LINE_MEMBER(video_pia_CB2_w);
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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MC6845_UPDATE_ROW(update_row);
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void z100_io(address_map &map);
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void z100_mem(address_map &map);
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@ -222,92 +231,71 @@ private:
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uint8_t m_display_mask;
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uint8_t m_flash;
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uint8_t m_clr_val;
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uint8_t m_crtc_vreg[0x100];
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uint8_t m_crtc_index;
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uint16_t m_start_addr;
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uint8_t m_tmr_status;
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uint8_t m_start_addr;
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bool m_vidint_enable;
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floppy_image_device *m_floppy;
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};
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#define mc6845_h_char_total (m_crtc_vreg[0])
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#define mc6845_h_display (m_crtc_vreg[1])
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#define mc6845_h_sync_pos (m_crtc_vreg[2])
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#define mc6845_sync_width (m_crtc_vreg[3])
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#define mc6845_v_char_total (m_crtc_vreg[4])
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#define mc6845_v_total_adj (m_crtc_vreg[5])
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#define mc6845_v_display (m_crtc_vreg[6])
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#define mc6845_v_sync_pos (m_crtc_vreg[7])
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#define mc6845_mode_ctrl (m_crtc_vreg[8])
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#define mc6845_tile_height (m_crtc_vreg[9]+1)
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#define mc6845_cursor_y_start (m_crtc_vreg[0x0a])
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#define mc6845_cursor_y_end (m_crtc_vreg[0x0b])
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#define mc6845_start_addr (((m_crtc_vreg[0x0c]<<8) & 0xff00) | (m_crtc_vreg[0x0d] & 0xff))
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#define mc6845_cursor_addr (((m_crtc_vreg[0x0e]<<8) & 0xff00) | (m_crtc_vreg[0x0f] & 0xff))
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#define mc6845_light_pen_addr (((m_crtc_vreg[0x10]<<8) & 0xff00) | (m_crtc_vreg[0x11] & 0xff))
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#define mc6845_update_addr (((m_crtc_vreg[0x12]<<8) & 0xff00) | (m_crtc_vreg[0x13] & 0xff))
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void z100_state::video_start()
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{
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m_gvram = make_unique_clear<uint8_t[]>(0x30000);
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m_vidint_enable = false;
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}
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uint32_t z100_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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MC6845_UPDATE_ROW(z100_state::update_row)
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{
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int x,y,xi,yi;
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int dot;
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int i;
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uint32_t *const pix = &bitmap.pix32(y);
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bitmap.fill(0, cliprect);
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for(y=0;y<mc6845_v_display;y++)
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for (int x = 0; x < x_count; x++)
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{
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for(x=0;x<mc6845_h_display;x++)
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for (int xi = 0; xi < 8; xi++)
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{
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uint32_t base_offs;
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for(yi=0;yi<mc6845_tile_height;yi++)
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int dot = 0;
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if (m_flash)
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{
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base_offs = y * 0x800 + yi * 0x80 + x;
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for(xi=0;xi<8;xi++)
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{
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dot = 0;
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for(i=0;i<3;i++)
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dot |= ((m_gvram[(base_offs & 0xffff)+0x10000*i] >> (7-xi)) & 1) << i; // b, r, g
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dot &= m_display_mask;
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/* overwrite */
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if(m_flash)
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dot = m_display_mask;
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if(y*mc6845_tile_height+yi < 216 && x*8+xi < 640) /* TODO: safety check */
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bitmap.pix16(y*mc6845_tile_height+yi, x*8+xi) = m_palette->pen(dot);
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}
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dot = m_display_mask;
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}
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else
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{
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for (int i = 0; i < 3; i++)
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dot |= ((m_gvram[((x + ma) & 0xfff) << 4 | (ra & 0xf) | (0x10000*i)] >> (7-xi)) & 1) << i; // b, r, g
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if (x == cursor_x)
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dot ^= 7;
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dot &= m_display_mask;
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}
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pix[x*8+xi] = m_palette->pen(dot);
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}
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}
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}
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return 0;
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offs_t z100_state::vram_map(offs_t offset) const
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{
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// FIXME: part of this calculation is actually done through a ROM
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return (offset & 0x30000) | ((((offset & 0x007f) << 4 | (offset & 0x0780) >> 7) + ((offset & 0xf800) >> 11) * 0x0500 + (uint16_t(m_start_addr) << 8)) & 0xffff);
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}
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READ8_MEMBER( z100_state::z100_vram_r )
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{
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return m_gvram[offset];
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return m_gvram[vram_map(offset)];
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}
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WRITE8_MEMBER( z100_state::z100_vram_w )
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{
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if(m_vram_enable)
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{
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int i;
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offset = vram_map(offset);
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m_gvram[offset] = data;
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for(i=0;i<3;i++)
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for (int i = 0; i < 3; i++)
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{
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if(m_gbank & (1 << i))
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if (BIT(m_gbank, i))
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m_gvram[((offset) & 0xffff)+0x10000*i] = data;
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}
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}
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@ -356,19 +344,6 @@ WRITE8_MEMBER( z100_state::keyb_command_w )
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// ...
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}
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WRITE8_MEMBER( z100_state::z100_6845_address_w )
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{
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data &= 0x1f;
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m_crtc_index = data;
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m_crtc->address_w(data);
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}
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WRITE8_MEMBER( z100_state::z100_6845_data_w )
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{
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m_crtc_vreg[m_crtc_index] = data;
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m_crtc->register_w(data);
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}
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// todo: side select?
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WRITE8_MEMBER( z100_state::floppy_select_w )
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@ -383,6 +358,49 @@ WRITE8_MEMBER( z100_state::floppy_motor_w )
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m_floppy->mon_w(!BIT(data, 1));
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}
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uint8_t z100_state::tmr_status_r()
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{
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return m_tmr_status;
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}
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void z100_state::tmr_status_w(uint8_t data)
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{
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m_tmr_status &= data & 3;
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if (m_tmr_status == 0)
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m_picm->ir2_w(0);
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}
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WRITE_LINE_MEMBER(z100_state::timer_flipflop0_w)
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{
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if (state)
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{
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m_tmr_status |= 1;
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m_picm->ir2_w(1);
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}
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}
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WRITE_LINE_MEMBER(z100_state::timer_flipflop1_w)
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{
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if (state)
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{
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m_tmr_status |= 2;
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m_picm->ir2_w(1);
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}
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}
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void z100_state::sys_pia_A_w(uint8_t data)
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{
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m_vidint_enable = BIT(data, 5);
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if (!m_vidint_enable)
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m_pia[1]->ca2_w(0);
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}
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WRITE_LINE_MEMBER(z100_state::vidint_w)
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{
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if (state && m_vidint_enable)
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m_pia[1]->ca2_w(1);
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}
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void z100_state::z100_io(address_map &map)
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{
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map.unmap_value_high();
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@ -403,11 +421,11 @@ void z100_state::z100_io(address_map &map)
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// AM_RANGE (0xcd, 0xce) ET-100 CRT Controller
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// AM_RANGE (0xd4, 0xd7) ET-100 Trainer Parallel I/O
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map(0xd8, 0xdb).rw(m_pia[0], FUNC(pia6821_device::read), FUNC(pia6821_device::write)); //video board
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map(0xdc, 0xdc).w(FUNC(z100_state::z100_6845_address_w));
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map(0xdd, 0xdd).w(FUNC(z100_state::z100_6845_data_w));
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map(0xdc, 0xdc).w(m_crtc, FUNC(mc6845_device::address_w));
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map(0xdd, 0xdd).w(m_crtc, FUNC(mc6845_device::register_w));
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// AM_RANGE (0xde, 0xde) light pen
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map(0xe0, 0xe3).rw(m_pia[1], FUNC(pia6821_device::read), FUNC(pia6821_device::write)); //main board
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// AM_RANGE (0xe4, 0xe7) 8253 PIT
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map(0xe4, 0xe7).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write));
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map(0xe8, 0xeb).rw(m_epci[0], FUNC(mc2661_device::read), FUNC(mc2661_device::write));
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map(0xec, 0xef).rw(m_epci[1], FUNC(mc2661_device::read), FUNC(mc2661_device::write));
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map(0xf0, 0xf1).rw(m_pics, FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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@ -415,7 +433,7 @@ void z100_state::z100_io(address_map &map)
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map(0xf4, 0xf4).r(FUNC(z100_state::keyb_data_r)); // -> 8041 MCU
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map(0xf5, 0xf5).rw(FUNC(z100_state::keyb_status_r), FUNC(z100_state::keyb_command_w));
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// AM_RANGE (0xf6, 0xf6) expansion ROM is present (bit 0, active low)
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// AM_RANGE (0xfb, 0xfb) timer irq status
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map(0xfb, 0xfb).rw(FUNC(z100_state::tmr_status_r), FUNC(z100_state::tmr_status_w));
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// AM_RANGE (0xfc, 0xfc) memory latch
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// AM_RANGE (0xfd, 0xfd) Hi-address latch
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// AM_RANGE (0xfe, 0xfe) Processor swap port
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@ -626,7 +644,7 @@ WRITE8_MEMBER( z100_state::video_pia_A_w )
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WRITE8_MEMBER( z100_state::video_pia_B_w )
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{
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m_start_addr = data << 4; //<- TODO
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m_start_addr = data;
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}
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/* clear screen */
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@ -667,46 +685,61 @@ static void z100_floppies(device_slot_interface &device)
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void z100_state::z100(machine_config &config)
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{
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/* basic machine hardware */
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I8088(config, m_maincpu, 14.318181_MHz_XTAL / 3);
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I8088(config, m_maincpu, 15_MHz_XTAL / 3); // 5 MHz or 8 MHz depending on XTAL
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m_maincpu->set_addrmap(AS_PROGRAM, &z100_state::z100_mem);
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m_maincpu->set_addrmap(AS_IO, &z100_state::z100_io);
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m_maincpu->set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb));
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I8085A(config, "cpu85", 10_MHz_XTAL).set_disable();
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I8041(config, "upi", 6_MHz_XTAL).set_disable();
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/* video hardware */
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_refresh_hz(50);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
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screen.set_size(640, 480);
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screen.set_visarea(0, 640-1, 0, 480-1);
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screen.set_screen_update(FUNC(z100_state::screen_update));
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screen.set_palette(m_palette);
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screen.set_raw(14.112_MHz_XTAL, 912, 0, 640, 258, 0, 216);
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screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update));
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PALETTE(config, m_palette).set_entries(8);
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/* devices */
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MC6845(config, m_crtc, 14.318181_MHz_XTAL / 8); /* unknown clock, hand tuned to get ~50/~60 fps */
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MC6845(config, m_crtc, 14.112_MHz_XTAL / 8); // 68A45
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m_crtc->set_screen("screen");
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m_crtc->set_show_border_area(false);
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m_crtc->set_char_width(8);
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m_crtc->set_update_row_callback(FUNC(z100_state::update_row), this);
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m_crtc->out_vsync_callback().set(FUNC(z100_state::vidint_w));
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PIC8259(config, m_picm, 0);
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PIC8259(config, m_picm);
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m_picm->out_int_callback().set_inputline(m_maincpu, 0);
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m_picm->in_sp_callback().set_constant(1);
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m_picm->read_slave_ack_callback().set(FUNC(z100_state::get_slave_ack));
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PIC8259(config, m_pics, 0);
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PIC8259(config, m_pics);
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m_pics->out_int_callback().set(m_picm, FUNC(pic8259_device::ir3_w));
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m_pics->in_sp_callback().set_constant(0);
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PIA6821(config, m_pia[0], 0);
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pit8253_device &pit(PIT8253(config, "pit"));
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pit.set_clk<0>(4_MHz_XTAL / 16);
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pit.out_handler<0>().set(FUNC(z100_state::timer_flipflop0_w));
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pit.out_handler<0>().append("pit", FUNC(pit8253_device::write_clk1));
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pit.set_clk<2>(4_MHz_XTAL / 16);
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pit.out_handler<2>().set(FUNC(z100_state::timer_flipflop1_w));
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PIA6821(config, m_pia[0]);
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m_pia[0]->writepa_handler().set(FUNC(z100_state::video_pia_A_w));
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m_pia[0]->writepb_handler().set(FUNC(z100_state::video_pia_B_w));
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m_pia[0]->ca2_handler().set(FUNC(z100_state::video_pia_CA2_w));
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m_pia[0]->cb2_handler().set(FUNC(z100_state::video_pia_CB2_w));
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PIA6821(config, m_pia[1], 0);
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PIA6821(config, m_pia[1]);
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m_pia[1]->irqa_handler().set("keydspyint", FUNC(input_merger_device::in_w<1>));
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m_pia[1]->irqb_handler().set(m_picm, FUNC(pic8259_device::ir7_w));
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m_pia[1]->writepa_handler().set(FUNC(z100_state::sys_pia_A_w));
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FD1797(config, m_fdc, 1_MHz_XTAL);
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input_merger_device &keydspyint(INPUT_MERGER_ANY_HIGH(config, "keydspyint"));
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keydspyint.output_handler().set(m_picm, FUNC(pic8259_device::ir6_w));
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FD1797(config, m_fdc, 4_MHz_XTAL / 4);
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FLOPPY_CONNECTOR(config, m_floppies[0], z100_floppies, "dd", floppy_image_device::default_floppy_formats);
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FLOPPY_CONNECTOR(config, m_floppies[1], z100_floppies, "dd", floppy_image_device::default_floppy_formats);
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@ -733,8 +766,8 @@ ROM_START( z100 )
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ROM_REGION( 0x4000, "ipl", ROMREGION_ERASEFF )
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ROM_LOAD( "intel-d27128-1.bin", 0x0000, 0x4000, CRC(b21f0392) SHA1(69e492891cceb143a685315efe0752981a2d8143))
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ROM_REGION( 0x1000, "mcu", ROMREGION_ERASEFF ) //8041
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ROM_LOAD( "mcu", 0x0000, 0x1000, NO_DUMP )
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ROM_REGION( 0x0400, "upi", ROMREGION_ERASEFF ) // 8041A keyboard controller
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ROM_LOAD( "444-109.u284", 0x0000, 0x0400, NO_DUMP )
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ROM_END
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void z100_state::driver_init()
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