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srcclean (nw)

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This commit is contained in:
Vas Crabb 2019-09-22 13:34:40 +10:00
parent 1b7b678f40
commit 5036387ab4
66 changed files with 881 additions and 881 deletions
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2
scripts/src/osd/mac_cfg.lua
View File

@ -4,7 +4,7 @@
dofile('modules.lua')
forcedincludes {
-- MAME_DIR .. "src/osd/sdl/sdlprefix.h"
-- MAME_DIR .. "src/osd/sdl/sdlprefix.h"
}
if not _OPTIONS["DONT_USE_NETWORK"] then

132
src/devices/bus/spectrum/beta.cpp
View File

@ -3,79 +3,79 @@
/*********************************************************************
Technology Research Beta Disk interface & clones
these are designed for the 48k Spectrum models
these are designed for the 48k Spectrum models
There are multiple versions of this
There are multiple versions of this
'hand made' PCB with V2 ROM:
- possible prototype / low production run
- 4k ROM
- FORMAT, COPY etc. must be loaded from a disk to be used
- disks are password protected
- uses 1771 disk controller
https://www.youtube.com/watch?v=gSJIuZjbFYs
'hand made' PCB with V2 ROM:
- possible prototype / low production run
- 4k ROM
- FORMAT, COPY etc. must be loaded from a disk to be used
- disks are password protected
- uses 1771 disk controller
https://www.youtube.com/watch?v=gSJIuZjbFYs
Original Beta Disk release with V3 ROM:
- same features as above
- uses a 1793 controller
Original Beta Disk release with V3 ROM:
- same features as above
- uses a 1793 controller
Re-release dubbed "Beta Disk plus" with V4 ROM:
- many operations moved into a larger capacity (8k) ROM rather
than requiring a utility disk
- uses a 1793 controller
- adds 'magic button' to dump the running state of the machine
to disk
- disk password system removed
Re-release dubbed "Beta Disk plus" with V4 ROM:
- many operations moved into a larger capacity (8k) ROM rather
than requiring a utility disk
- uses a 1793 controller
- adds 'magic button' to dump the running state of the machine
to disk
- disk password system removed
Many clones exist, some specific to the various Spectrum clones.
(not yet added)
Many clones exist, some specific to the various Spectrum clones.
(not yet added)
Original Beta Disk (V3) clones
- Sandy FDD2 SP-DOS
- AC DOS P.Z.APINA
Original Beta Disk (V3) clones
- Sandy FDD2 SP-DOS
- AC DOS P.Z.APINA
Beta Disk plus (V4) clones
- CAS DOS Cheyenne Advanced System
- CBI-95
- SYNCHRON IDS91
- SYNCHRON IDS2001ne
- ARCADE AR-20
- Vision Desktop Betadisk
Beta Disk plus (V4) clones
- CAS DOS Cheyenne Advanced System
- CBI-95
- SYNCHRON IDS91
- SYNCHRON IDS2001ne
- ARCADE AR-20
- Vision Desktop Betadisk
Some units also exist that allow population of both V3 and V4
ROM types with a switch (unofficial, for compatibility?)
Some units also exist that allow population of both V3 and V4
ROM types with a switch (unofficial, for compatibility?)
---
---
NOTE:
NOTE:
ROMs really need verifying, real dumps appear to be bitswapped
on original boards, so we're using those ones where possible,
however sizes are unconfirmed (some sources state that the data
is duplicated across the 16k in ROM, others state it just mirrors
in memory) and some might be modified or bad.
ROMs really need verifying, real dumps appear to be bitswapped
on original boards, so we're using those ones where possible,
however sizes are unconfirmed (some sources state that the data
is duplicated across the 16k in ROM, others state it just mirrors
in memory) and some might be modified or bad.
beta128.cpp could be modified to expand on this, as it builds
on the features of the betaplus, but for now I've kept them
separate as the enable / disable mechanisms are different and
remaining mappings of devices unconfirmed
beta128.cpp could be modified to expand on this, as it builds
on the features of the betaplus, but for now I've kept them
separate as the enable / disable mechanisms are different and
remaining mappings of devices unconfirmed
---
---
Based on older BDI schematics, it seems the logic is like:
Based on older BDI schematics, it seems the logic is like:
memory access 0x3CXX (any type of access: code or data, read or write) -> temporary use BDI ROM (NOT permanent latch/switch like in beta128)
memory access <0x4000 area and BDI ROM_latch==true -> use BDI ROM
memory access 0x3CXX (any type of access: code or data, read or write) -> temporary use BDI ROM (NOT permanent latch/switch like in beta128)
memory access <0x4000 area and BDI ROM_latch==true -> use BDI ROM
IO write to port 0bxxxxxx00 -> D7 master_latch, 0=enable, 1=disable
IO write to port 0bxxxxxx00 -> D7 master_latch, 0=enable, 1=disable
while master_latch is enabled access to regular Spectrum IO is blocked (output /IORQ forced to 1) but enabled BDI ports:
while master_latch is enabled access to regular Spectrum IO is blocked (output /IORQ forced to 1) but enabled BDI ports:
IO write to port 0b1xxxx111 -> D7 BDI ROM_latch (0=enable, 1=disble), D6 - FDC DDEN, D4 - SIDE, D3 - FDC HLT, D2 - FDC /MR (reset), D0-1 - floppy drive select.
IO read port 0b1xxxx111 <- D7 - FDC INTRQ, D6 - FDC DRQ
IO read/write ports 0b0YYxx111 - access FDC ports YY
IO write to port 0b1xxxx111 -> D7 BDI ROM_latch (0=enable, 1=disble), D6 - FDC DDEN, D4 - SIDE, D3 - FDC HLT, D2 - FDC /MR (reset), D0-1 - floppy drive select.
IO read port 0b1xxxx111 <- D7 - FDC INTRQ, D6 - FDC DRQ
IO read/write ports 0b0YYxx111 - access FDC ports YY
So mostly the same as beta128, except for new BDI ROM_latch bit
So mostly the same as beta128, except for new BDI ROM_latch bit
*********************************************************************/
@ -140,11 +140,11 @@ ROM_START(betav3)
ROM_RELOAD(0x1000,0x1000)
ROM_RELOAD(0x2000,0x1000)
ROM_RELOAD(0x3000,0x1000)
// ROM_SYSTEM_BIOS(1, "trd30a", "TR-DOS v3.0 (set 2)")
// ROMX_LOAD("trd30_alt.bin", 0x0000, 0x1000, CRC(48f9149f) SHA1(52774757096fdc93ea94c55306481f6f41204e96), ROM_BIOS(1))
// ROM_RELOAD(0x1000,0x1000)
// ROM_RELOAD(0x2000,0x1000)
// ROM_RELOAD(0x3000,0x1000)
// ROM_SYSTEM_BIOS(1, "trd30a", "TR-DOS v3.0 (set 2)")
// ROMX_LOAD("trd30_alt.bin", 0x0000, 0x1000, CRC(48f9149f) SHA1(52774757096fdc93ea94c55306481f6f41204e96), ROM_BIOS(1))
// ROM_RELOAD(0x1000,0x1000)
// ROM_RELOAD(0x2000,0x1000)
// ROM_RELOAD(0x3000,0x1000)
ROM_SYSTEM_BIOS(1, "trd30p", "TR-DOS v3.0 (set 2, Profisoft)") // is this a clone device?
ROMX_LOAD("trd30ps.bin", 0x0000, 0x1000, CRC(b0f175a3) SHA1(ac95bb4d89072224deef58a1655e8029f811a7fa), ROM_BIOS(1))
ROM_RELOAD(0x1000,0x1000)
@ -282,7 +282,7 @@ void spectrum_betav2_device::device_reset()
// always paged in on boot? (no mode switch like beta128)
m_romcs = 1;
m_romlatch = 0;
// m_masterportdisable = 1;
// m_masterportdisable = 1;
}
//**************************************************************************
@ -327,7 +327,7 @@ uint8_t spectrum_betav2_device::iorq_r(offs_t offset)
{
uint8_t data = m_exp->iorq_r(offset);
// if (!m_masterportdisable)
// if (!m_masterportdisable)
if (m_romcs)
{
switch (offset & 0xff)
@ -349,12 +349,12 @@ uint8_t spectrum_betav2_device::iorq_r(offs_t offset)
void spectrum_betav2_device::iorq_w(offs_t offset, uint8_t data)
{
// if ((offset & 0x03) == 0x00)
// {
// m_masterportdisable = data & 0x80;
// }
// if ((offset & 0x03) == 0x00)
// {
// m_masterportdisable = data & 0x80;
// }
// if (!m_masterportdisable)
// if (!m_masterportdisable)
if (m_romcs)
{
switch (offset & 0xff)

2
src/devices/bus/spectrum/beta.h
View File

@ -55,7 +55,7 @@ protected:
int m_romcs;
int m_romlatch;
// int m_masterportdisable;
// int m_masterportdisable;
void fetch(offs_t offset);
};

38
src/devices/bus/spectrum/beta128.cpp
View File

@ -4,31 +4,31 @@
Technology Research Beta 128 Disk interface
This hardware type runs TR-DOS 5.xx (official) and newer
unofficial updates. It was designed to work properly with
the 128k machines that had issues with the original Beta Disk
due to changes in the 128k ROM structure etc. (enable address
is moved from 3cxx to 3dxx for example)
This hardware type runs TR-DOS 5.xx (official) and newer
unofficial updates. It was designed to work properly with
the 128k machines that had issues with the original Beta Disk
due to changes in the 128k ROM structure etc. (enable address
is moved from 3cxx to 3dxx for example)
Issues:
Issues:
Using the FD1793 device a 'CAT' operation in the 'spectrum' driver
will always report 'No Disk' but using the Soviet clone KR1818VG93
it properly gives the disk catalogue. Despite this files can still
be loaded from disk.
Using the FD1793 device a 'CAT' operation in the 'spectrum' driver
will always report 'No Disk' but using the Soviet clone KR1818VG93
it properly gives the disk catalogue. Despite this files can still
be loaded from disk.
The 128k Spectrum drivers have a similar issues, although even if
you replace the controller doing a 'CAT' operation seems to have
an adverse effect on the system memory setup as things become
corrupt (LOADing or MERGEing a program afterwards can cause a reset)
The 128k Spectrum drivers have a similar issues, although even if
you replace the controller doing a 'CAT' operation seems to have
an adverse effect on the system memory setup as things become
corrupt (LOADing or MERGEing a program afterwards can cause a reset)
Neither of these issues occur in other Spectrum emulators using
the same ROMs and floppy images.
Neither of these issues occur in other Spectrum emulators using
the same ROMs and floppy images.
TODO:
TODO:
there were many unofficial ROMs available for this, make them
available for use.
there were many unofficial ROMs available for this, make them
available for use.
*********************************************************************/

4
src/devices/bus/ti99/internal/genkbd.cpp
View File

@ -204,7 +204,7 @@ geneve_xt_101_hle_keyboard_device::geneve_xt_101_hle_keyboard_device(const machi
}
/*
Called by the poll timer
Called by the poll timer
*/
void geneve_xt_101_hle_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
@ -244,7 +244,7 @@ void geneve_xt_101_hle_keyboard_device::device_timer(emu_timer &timer, device_ti
/*
Translations
Translations
*/
static const uint8_t MF1_CODE[0xe] =
{

6
src/devices/cpu/tms34010/34010ops.hxx
View File

@ -2076,9 +2076,9 @@ void tms340x0_device::blmove(uint16_t op)
}
/*
TODO: We do not currently emulate precisely how B0 and B2 are modified during the operation:
if D == 0, then B0 and B2 remain fixed during execution and are only incremented after operation completes.
if D == 1, then B2 is incremented during move, B0 remains fixed until operation completes.
TODO: We do not currently emulate precisely how B0 and B2 are modified during the operation:
if D == 0, then B0 and B2 remain fixed during execution and are only incremented after operation completes.
if D == 1, then B2 is incremented during move, B0 remains fixed until operation completes.
*/
BREG(0) = src;

58
src/devices/machine/acorn_vidc.cpp
View File

@ -2,19 +2,19 @@
// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller
/**********************************************************************************************
Acorn VIDC10 (VIDeo Controller) device chip
Acorn VIDC10 (VIDeo Controller) device chip
based off legacy AA VIDC implementation by Angelo Salese, R. Belmont, Juergen Buchmueller
based off legacy AA VIDC implementation by Angelo Salese, R. Belmont, Juergen Buchmueller
TODO:
- subclass screen_device, derive h/vsync signals out there;
- improve timings for raster effects:
* nebulus: 20 lines off with aa310;
* lotustc2: abuses color flipping;
* quazer: needs in-flight DMA;
- improve sound DAC writes;
- subclass this for VIDC20 emulation (RiscPC);
- Are CRTC values correct? VGA modes have a +1 in display line;
TODO:
- subclass screen_device, derive h/vsync signals out there;
- improve timings for raster effects:
* nebulus: 20 lines off with aa310;
* lotustc2: abuses color flipping;
* quazer: needs in-flight DMA;
- improve sound DAC writes;
- subclass this for VIDC20 emulation (RiscPC);
- Are CRTC values correct? VGA modes have a +1 in display line;
**********************************************************************************************/
@ -56,7 +56,7 @@ acorn_vidc10_device::acorn_vidc10_device(const machine_config &mconfig, device_t
, device_memory_interface(mconfig, *this)
, device_palette_interface(mconfig, *this)
, device_video_interface(mconfig, *this)
, m_space_config("regs_space", ENDIANNESS_LITTLE, 32, 8, 0, address_map_constructor(FUNC(acorn_vidc10_device::regs_map), this))
, m_space_config("regs_space", ENDIANNESS_LITTLE, 32, 8, 0, address_map_constructor(FUNC(acorn_vidc10_device::regs_map), this))
, m_lspeaker(*this, "lspeaker")
, m_rspeaker(*this, "rspeaker")
, m_dac(*this, "dac%u", 0)
@ -233,7 +233,7 @@ void acorn_vidc10_device::screen_dynamic_res_change()
if (m_crtc_regs[CRTC_HBER] <= 1 || m_crtc_regs[CRTC_VBER] <= 1)
return;
// total cycles >= border end >= border start
// total cycles >= border end >= border start
if (m_crtc_regs[CRTC_HCR] < m_crtc_regs[CRTC_HBER])
return;
@ -280,7 +280,7 @@ inline void acorn_vidc10_device::update_4bpp_palette(uint16_t index, uint32_t pa
int r,g,b;
// TODO: for TV Tuner we need to output this, also check if cursor mode actually sets this up for offset = 0
// i = (paldata & 0x1000) >> 12; //supremacy bit
// i = (paldata & 0x1000) >> 12; //supremacy bit
b = (paldata & 0x0f00) >> 8;
g = (paldata & 0x00f0) >> 4;
r = (paldata & 0x000f) >> 0;
@ -329,16 +329,16 @@ WRITE32_MEMBER( acorn_vidc10_device::crtc_w )
{
switch(offset)
{
case CRTC_HCR: m_crtc_regs[CRTC_HCR] = ((data >> 14)<<1)+2; break;
// case CRTC_HSWR: m_crtc_regs[CRTC_HSWR] = (data >> 14)+1; break;
case CRTC_HBSR: m_crtc_regs[CRTC_HBSR] = ((data >> 14)<<1)+1; break;
case CRTC_HDSR: m_crtc_regs[CRTC_HDSR] = (data >> 14); break;
case CRTC_HDER: m_crtc_regs[CRTC_HDER] = (data >> 14); break;
case CRTC_HBER: m_crtc_regs[CRTC_HBER] = ((data >> 14)<<1)+1; break;
case CRTC_HCR: m_crtc_regs[CRTC_HCR] = ((data >> 14)<<1)+2; break;
// case CRTC_HSWR: m_crtc_regs[CRTC_HSWR] = (data >> 14)+1; break;
case CRTC_HBSR: m_crtc_regs[CRTC_HBSR] = ((data >> 14)<<1)+1; break;
case CRTC_HDSR: m_crtc_regs[CRTC_HDSR] = (data >> 14); break;
case CRTC_HDER: m_crtc_regs[CRTC_HDER] = (data >> 14); break;
case CRTC_HBER: m_crtc_regs[CRTC_HBER] = ((data >> 14)<<1)+1; break;
case CRTC_HCSR: m_crtc_regs[CRTC_HCSR] = ((data >> 13) & 0x7ff) + 6; return;
// case CRTC_HIR: // ...
case CRTC_VCR: m_crtc_regs[CRTC_VCR] = (data >> 14)+1; break;
case CRTC_VCR: m_crtc_regs[CRTC_VCR] = (data >> 14)+1; break;
case CRTC_VSWR: m_crtc_regs[CRTC_VSWR] = (data >> 14)+1; break;
case CRTC_VBSR:
m_crtc_regs[CRTC_VBSR] = (data >> 14)+1;
@ -363,14 +363,14 @@ WRITE32_MEMBER( acorn_vidc10_device::crtc_w )
inline void acorn_vidc10_device::refresh_stereo_image(uint8_t channel)
{
/*
-111 full right
-110 83% right, 17% left
-101 67% right, 33% left
-100 center
-011 67% left, 33% right
-010 83% left, 17% right
-001 full left
-000 "undefined" TODO: verify what it actually means
-111 full right
-110 83% right, 17% left
-101 67% right, 33% left
-100 center
-011 67% left, 33% right
-010 83% left, 17% right
-001 full left
-000 "undefined" TODO: verify what it actually means
*/
const float left_gain[8] = { 1.0, 2.0, 1.66, 1.34, 1.0, 0.66, 0.34, 0.0 };
const float right_gain[8] = { 1.0, 0.0, 0.34, 0.66, 1.0, 1.34, 1.66, 2.0 };

4
src/devices/machine/acorn_vidc.h
View File

@ -2,7 +2,7 @@
// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller
/***************************************************************************
Acorn VIDC10 (VIDeo Controller) device chip
Acorn VIDC10 (VIDeo Controller) device chip
***************************************************************************/
@ -99,7 +99,7 @@ private:
CRTC_VCR, CRTC_VSWR, CRTC_VBSR, CRTC_VDSR, CRTC_VDER, CRTC_VBER, CRTC_VCSR, CRTC_VCER
};
uint32_t m_crtc_regs[16];
u8 *m_data_vram;
u8 *m_data_vram;
u8 *m_cursor_vram;
// TODO: correct data vram size
const u32 m_data_vram_mask = 0x1fffff;

6
src/devices/machine/vr0uart.cpp
View File

@ -7,9 +7,9 @@
Device by Angelo Salese
TODO:
- The only current example (Trivia R Us touchscreen) expects to read
stuff before transmitting anything, except for loopback test and a
signal break enabling at POST (!?).
- The only current example (Trivia R Us touchscreen) expects to read
stuff before transmitting anything, except for loopback test and a
signal break enabling at POST (!?).
***************************************************************************/

8
src/devices/machine/vrender0.cpp
View File

@ -114,11 +114,11 @@ void vrender0soc_device::device_add_mconfig(machine_config &config)
VRENDER0_UART(config, uart, 3579500);
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
// evolution soccer defaults
// evolution soccer defaults
m_screen->set_raw((XTAL(14'318'180)*2)/4, 455, 0, 320, 262, 0, 240);
m_screen->set_screen_update(FUNC(vrender0soc_device::screen_update));
m_screen->screen_vblank().set(FUNC(vrender0soc_device::screen_vblank));
m_screen->set_palette(m_palette);
m_screen->set_screen_update(FUNC(vrender0soc_device::screen_update));
m_screen->screen_vblank().set(FUNC(vrender0soc_device::screen_vblank));
m_screen->set_palette(m_palette);
VIDEO_VRENDER0(config, m_vr0vid, 14318180);
#ifdef IDLE_LOOP_SPEEDUP

2
src/devices/machine/wd1000.cpp
View File

@ -407,7 +407,7 @@ void wd1000_device::data_w(uint8_t data)
{
// Tranfer completed.
if ((m_command >> 4) == CMD_WRITE_SECTOR ||
(m_command >> 4) == CMD_WRITE_FORMAT)
(m_command >> 4) == CMD_WRITE_FORMAT)
{
m_status |= S_BSY;
set_error(0);

2
src/devices/video/imagetek_i4100.cpp
View File

@ -22,7 +22,7 @@
- Some gfx problems in ladykill, 3kokushi, puzzli, gakusai, seem related to how we handle
windows, wrapping, read-modify-write areas;
- puzzli: emulate hblank irq and fix video routines here (water effect not emulated?);
- Fix flipped screen behavior
- Fix flipped screen behavior
============================================================================

4
src/devices/video/mc6845.cpp
View File

@ -698,7 +698,7 @@ bool mc6845_device::check_cursor_visible(uint16_t ra, uint16_t line_addr)
return false;
if ((m_cursor_addr < line_addr) ||
(m_cursor_addr >= (line_addr + m_horiz_disp)))
(m_cursor_addr >= (line_addr + m_horiz_disp)))
{
// Not a cursor character line.
return false;
@ -737,7 +737,7 @@ bool hd6845s_device::check_cursor_visible(uint16_t ra, uint16_t line_addr)
return false;
if ((m_cursor_addr < line_addr) ||
(m_cursor_addr >= (line_addr + m_horiz_disp)))
(m_cursor_addr >= (line_addr + m_horiz_disp)))
{
// Not a cursor character line.
return false;

14
src/devices/video/vrender0.cpp
View File

@ -12,12 +12,12 @@
It supports alphablend with programmable factors per channel and for source and dest
color.
TODO:
- Dither Mode;
- Draw select to Front buffer is untested, speculatively gonna be used for raster
effects;
- screen_update doesn't honor CRT Display Start registers,
so far only psattack changes it on-the-fly, for unknown reasons;
TODO:
- Dither Mode;
- Draw select to Front buffer is untested, speculatively gonna be used for raster
effects;
- screen_update doesn't honor CRT Display Start registers,
so far only psattack changes it on-the-fly, for unknown reasons;
*****************************************************************************************/
@ -551,7 +551,7 @@ int vr0video_device::vrender0_ProcessPacket(uint32_t PacketPtr)
if (Packet0 & 0x800)
{
m_RenderState.SrcAlphaColor = Packet[17] | ((Packet[18] & 0xff) << 16);
m_RenderState.SrcBlend = (Packet[18] >> 8) & 0x3f;
m_RenderState.SrcBlend = (Packet[18] >> 8) & 0x3f;
m_RenderState.DstAlphaColor = Packet[19] | ((Packet[20] & 0xff) << 16);
m_RenderState.DstBlend = (Packet[20] >> 8) & 0x3f;
}

18
src/devices/video/vrender0.h
View File

@ -77,22 +77,22 @@ private:
DECLARE_READ16_MEMBER( bank1_select_r );
DECLARE_WRITE16_MEMBER( bank1_select_w );
bool m_bank1_select; //!< Select framebuffer bank1 address
bool m_bank1_select; //!< Select framebuffer bank1 address
DECLARE_READ16_MEMBER( display_bank_r );
uint8_t m_display_bank; //!< Current display bank
uint8_t m_display_bank; //!< Current display bank
DECLARE_READ16_MEMBER( render_control_r );
DECLARE_WRITE16_MEMBER( render_control_w );
bool m_draw_select; //!< If true, device draws to Front buffer instead of Back
bool m_render_reset; //!< Reset pipeline FIFO
bool m_render_start; //!< Enable pipeline processing
uint8_t m_dither_mode; //!< applied on RGB888 to RGB565 conversions (00: 2x2, 01:4x4, 1x disable)
uint8_t m_flip_count; //!< number of framebuffer "syncs" loaded in the parameter RAM,
bool m_draw_select; //!< If true, device draws to Front buffer instead of Back
bool m_render_reset; //!< Reset pipeline FIFO
bool m_render_start; //!< Enable pipeline processing
uint8_t m_dither_mode; //!< applied on RGB888 to RGB565 conversions (00: 2x2, 01:4x4, 1x disable)
uint8_t m_flip_count; //!< number of framebuffer "syncs" loaded in the parameter RAM,
//!< a.k.a. how many full (vblank) buffers are ready for the device to parse.
uint16_t *m_DrawDest; //!< frameram pointer to draw buffer area
uint16_t *m_DisplayDest; //!< frameram pointer to display buffer area
uint16_t *m_DrawDest; //!< frameram pointer to draw buffer area
uint16_t *m_DisplayDest; //!< frameram pointer to display buffer area
};
DECLARE_DEVICE_TYPE(VIDEO_VRENDER0, vr0video_device)

2
src/emu/emupal.cpp
View File

@ -535,7 +535,7 @@ void palette_device::device_start()
{
// forcing endianness only makes sense when the RAM is narrower than the palette format and not split
if (share_ext || (m_paletteram.membits() / 8) >= bytes_per_entry)
throw emu_fatalerror("palette_device(%s): Improper use of MCFG_PALETTE_ENDIANNESS", tag());
throw emu_fatalerror("palette_device(%s): Improper use of MCFG_PALETTE_ENDIANNESS", tag());
m_paletteram.set_endianness(m_endianness);
}
}

4
src/emu/natkeyboard.h
View File

@ -72,8 +72,8 @@ private:
// internal keyboard code information
struct keycode_map_entry
{
std::array<ioport_field *, SHIFT_COUNT + 1> field;
unsigned shift;
std::array<ioport_field *, SHIFT_COUNT + 1> field;
unsigned shift;
};
typedef std::unordered_map<char32_t, keycode_map_entry> keycode_map;

12
src/emu/video/generic.cpp
View File

@ -143,9 +143,9 @@ const gfx_layout gfx_16x16x4_packed_lsb =
GFXLAYOUT_RAW(gfx_16x16x8_raw, 16, 16, 16*8, 16*16*8);
/*
16x16; grouped of 4 8x8 tiles (row align)
0 1
2 3
16x16; grouped of 4 8x8 tiles (row align)
0 1
2 3
*/
const gfx_layout gfx_8x8x4_row_2x2_group_packed_msb =
{
@ -173,9 +173,9 @@ const gfx_layout gfx_8x8x4_row_2x2_group_packed_lsb =
};
/*
16x16; grouped of 4 8x8 tiles (col align)
0 2
1 3
16x16; grouped of 4 8x8 tiles (col align)
0 2
1 3
*/
const gfx_layout gfx_8x8x4_col_2x2_group_packed_msb =
{

12
src/lib/netlist/plib/pfmtlog.h
View File

@ -212,18 +212,18 @@ public:
return format_element('o', x);
}
friend std::ostream& operator<<(std::ostream &ostrm, const pfmt &fmt)
{
ostrm << fmt.m_str;
return ostrm;
}
friend std::ostream& operator<<(std::ostream &ostrm, const pfmt &fmt)
{
ostrm << fmt.m_str;
return ostrm;
}
protected:
struct rtype
{
rtype() : ret(0), p(0), sl(0), pend(0), width(0) {}
int ret;
int ret;
pstring::size_type p;
pstring::size_type sl;
char32_t pend;

40
src/lib/netlist/plib/pparser.h
View File

@ -239,29 +239,29 @@ protected:
public:
st(ppreprocessor *strm) : m_strm(strm) { setg(nullptr, nullptr, nullptr); }
st(st &&rhs) noexcept : m_strm(rhs.m_strm) {}
int_type underflow() override
{
//printf("here\n");
if (this->gptr() == this->egptr())
{
/* clang reports sign error - weird */
std::size_t bytes = pstring_mem_t_size(m_strm->m_buf) - static_cast<std::size_t>(m_strm->m_pos);
int_type underflow() override
{
//printf("here\n");
if (this->gptr() == this->egptr())
{
/* clang reports sign error - weird */
std::size_t bytes = pstring_mem_t_size(m_strm->m_buf) - static_cast<std::size_t>(m_strm->m_pos);
if (bytes > m_buf.size())
bytes = m_buf.size();
std::copy(m_strm->m_buf.c_str() + m_strm->m_pos, m_strm->m_buf.c_str() + m_strm->m_pos + bytes, m_buf.data());
//printf("%ld\n", (long int)bytes);
this->setg(m_buf.data(), m_buf.data(), m_buf.data() + bytes);
if (bytes > m_buf.size())
bytes = m_buf.size();
std::copy(m_strm->m_buf.c_str() + m_strm->m_pos, m_strm->m_buf.c_str() + m_strm->m_pos + bytes, m_buf.data());
//printf("%ld\n", (long int)bytes);
this->setg(m_buf.data(), m_buf.data(), m_buf.data() + bytes);
m_strm->m_pos += static_cast</*pos_type*/long>(bytes);
}
return this->gptr() == this->egptr()
? std::char_traits<char>::eof()
: std::char_traits<char>::to_int_type(*this->gptr());
}
m_strm->m_pos += static_cast</*pos_type*/long>(bytes);
}
return this->gptr() == this->egptr()
? std::char_traits<char>::eof()
: std::char_traits<char>::to_int_type(*this->gptr());
}
private:
ppreprocessor *m_strm;
std::array<char_type, 1024> m_buf;
ppreprocessor *m_strm;
std::array<char_type, 1024> m_buf;
};
//friend class st;
#endif

10
src/lib/netlist/plib/pstring.h
View File

@ -197,11 +197,11 @@ public:
bool operator>(const pstring_t &string) const { return (compare(string) > 0); }
bool operator>=(const pstring_t &string) const { return (compare(string) >= 0); }
friend std::ostream& operator<<(std::ostream &ostrm, const pstring_t &str)
{
ostrm << str.m_str;
return ostrm;
}
friend std::ostream& operator<<(std::ostream &ostrm, const pstring_t &str)
{
ostrm << str.m_str;
return ostrm;
}
const_reference at(const size_type pos) const { return *reinterpret_cast<const ref_value_type *>(F::nthcode(m_str.c_str(),pos)); }

2
src/lib/netlist/prg/nltool.cpp
View File

@ -874,7 +874,7 @@ int tool_app_t::execute()
std::cout << plib::pfmt("{:20}")("Общая ком") << "|" << "\n";
//char x = 'a';
auto b= U'щ';
auto b= U'\U0449';
std::cout << "b: <" << b << ">";
#endif
return 0;

2
src/mame/drivers/at.cpp
View File

@ -1866,7 +1866,7 @@ ROM_END
// SUNTAC Chipset, http://toastytech.com/manuals/Magitronic%20B233%20Manual.pdf
// SUNTAC ST62BC002-B, ST62BC005-B, ST62BC003-B, ST62BC001-B, ST62C00B, ST62BC004-B1
ROM_START( magb233 )
ROM_REGION(0x20000, "bios", 0) // BIOS-String: DSUN-1105-043089-K0
ROM_REGION(0x20000, "bios", 0) // BIOS-String: DSUN-1105-043089-K0
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_even_sa027343.bin", 0x10000, 0x8000, CRC(d4a18444) SHA1(d95242104fc9b51cf26de72ef5b6c52d99ccce30), ROM_SKIP(1) )
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_odd_sa027343.bin", 0x10001, 0x8000, CRC(7ac3db56) SHA1(4340140450c4f8b4f6a19eae50a5dc5449edfdf6), ROM_SKIP(1) )
// ROM_LOAD("magitronic_b233_ami_1986_keyboard_bios_plus_a025352.bin", 0x0000, 0x1000), CRC(84fd28fd) SHA1(43da0f49e52c921844e60b6f3d22f2a316d865cc) )

6
src/mame/drivers/cps1.cpp
View File

@ -10648,9 +10648,9 @@ ROM_END
Turbo mode on SW(C):1.
Press start to change character mid-game. (bug: screen goes dark when changing character, happens in attract mode as well).
MSTREET-6 repair info:
Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
May also work for other bootlegs (there are many very similar bootlegs out there), in that case the reference (u104) may vary.
MSTREET-6 repair info:
Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
May also work for other bootlegs (there are many very similar bootlegs out there), in that case the reference (u104) may vary.
*/
ROM_START( sf2cems6a ) /* 920313 USA (this set matches "sf2ceuab4" in FBA) */

204
src/mame/drivers/cps3.cpp
View File

@ -454,111 +454,111 @@ hardware modification to the security cart.....
Hardware registers info
----------------------
PPU registers (read only)
0x040C0000 - 0x040C000D
PPU registers (read only)
0x040C0000 - 0x040C000D
Offset: Bits: Desc:
0C ---- ---- ---- -2-- Palette DMA active |
---- ---- ---- --1- Character DMA active | several parts of game code assume only 1 of these might be active at the same time
---- ---- ---- ---0 Sprite list DMA/copy active, see register 82 description
Offset: Bits: Desc:
0C ---- ---- ---- -2-- Palette DMA active |
---- ---- ---- --1- Character DMA active | several parts of game code assume only 1 of these might be active at the same time
---- ---- ---- ---0 Sprite list DMA/copy active, see register 82 description
PPU registers (write only)
0x040C0000 - 0x040C00AF
PPU registers (write only)
0x040C0000 - 0x040C00AF
Offset: Bits: Desc:
00 ---- --xx xxxx xxxx Global Scroll 0 X
02 ---- --xx xxxx xxxx Global Scroll 0 Y
04-1F Global Scrolls 1-7
20 xxxx xxxx xxxx xxxx Tilemap 0 Scroll X
22 xxxx xxxx xxxx xxxx Tilemap 0 Scroll Y
24 ---- -a98 76-- ---- Tilemap 0 ?? always 0
---- ---- ---4 3210 Tilemap 0 Width (in tiles)
26 f--- ---- ---- ---- Tilemap 0 Enable
-e-- ---- ---- ---- Tilemap 0 Line Scroll Enable
--d- ---- ---- ---- Tilemap 0 Line Zoom Enable (seems unused in games, but might be enabled in jojo dev.menu BG test)
---c ---- ---- ---- Tilemap 0 ?? set together with Zoom
---- b--- ---- ---- Tilemap 0 Flip X (not implemented, Warzard demo fights during special moves)
---- -a-- ---- ---- Tilemap 0 Flip Y (not implemented, Capcom logos background during sfiii2 flashing)
---- --98 7654 3210 Tilemap 0 ?? always 0
28 -edc ba98 ---- ---- Tilemap 0 Line Scroll and Zoom Base address (1st word is scroll, 2nd word is zoom)
---- ---- -654 3210 Tilemap 0 Tiles Base address
2A-2F unused
30-5F Tilemaps 1-3
Values: 384 495 "wide"
60 xxxx xxxx xxxx xxxx H Sync end* 42 35
62 xxxx xxxx xxxx xxxx H Blank end 111 118
64 xxxx xxxx xxxx xxxx H Screen end 495 613
66 xxxx xxxx xxxx xxxx H Total end* 454 454
68 ---- --xx xxxx xxxx H ?? Zoom Master? 0 0 +128 if flip screen, might be not zoom-related but global H scroll
6A xxxx xxxx xxxx xxxx H ?? Zoom Offset? 0 0
6C xxxx xxxx xxxx xxxx H ?? Zoom Size? 1023 1023 (511 at BIOS init)
6E xxxx xxxx xxxx xxxx H Zoom Scale 64 64
70 xxxx xxxx xxxx xxxx V Sync end 3 3
72 xxxx xxxx xxxx xxxx V Blank end 21 21
74 xxxx xxxx xxxx xxxx V Screen end 245 245
76 xxxx xxxx xxxx xxxx V Total end 262 262
78 ---- --xx xxxx xxxx V ?? Zoom Master? 0 0 might be not zoom-related but global V scroll
7A xxxx xxxx xxxx xxxx V ?? Zoom Offset? 0 0
7C xxxx xxxx xxxx xxxx V ?? Zoom Size? 1023 1023 (261 at BIOS init)
7E xxxx xxxx xxxx xxxx V Zoom Scale 64 64
80 ---- ---- ---- -210 Pixel clock 3 5 base clock is 42.954545MHz, 3 = /5 divider, 5 = /4 divider.
---- ---- ---4 3--- Flip screen X/Y (or Y/X)
---- ---- --5- ---- ?? always set to 1, 0 in unused 24KHz mode (pixel clock divider?)
---- ---- -6-- ---- ?? set to 0 by BIOS init, then set to 1 after video mode selection, 0 in unused 24KHz mode (pixel clock divider?)
f--- ---- ---- ---- ?? always 0, but there is code which may set it
82 ---- ---- ---- 3--0 Sprite list DMA/copy to onchip RAM ? after new list upload to sprite RAM games write here 8/9/8/9 pattern, then wait until register 0C bit 0 became 0, then write 0.
84 ---- b--- ---- ---- ?? always set to 0x0800
86 ---- ---- ---- 3210 Character RAM bank
88 ---- ---- --54 3210 Gfx flash ROM bank
8A ---- ---- ---- ---- ?? set to 0 by BIOS init, never writen later
8E ---- ---- 7-5- ---- ?? set to 0x00A0 by BIOS init after Pal/Char DMA registers, never writen later (Char/Pal DMA IRQ enable ?)
96 xxxx xxxx xxxx xxxx Character DMA Source low bits
98 ---- ---- --54 3210 Character DMA Source high bits
---- ---- -6-- ---- Character DMA Start
A0 ---- -a98 7654 3210 Palette DMA Source high bits
A2 xxxx xxxx xxxx xxxx Palette DMA Source low bits
A4 ---- ---- ---- ---0 Palette DMA Destination high bit
A6 xxxx xxxx xxxx xxxx Palette DMA Destination low bits
A8 -edc ba98 -654 3210 Palette DMA Fade low bits
AA ---- ---- -654 3210 Palette DMA Fade high bits
AC xxxx xxxx xxxx xxxx Palette DMA Lenght low bits
AE ---- ---- ---- ---0 Palette DMA Lenght high bit
---- ---- ---- --1- Palette DMA Start
Offset: Bits: Desc:
00 ---- --xx xxxx xxxx Global Scroll 0 X
02 ---- --xx xxxx xxxx Global Scroll 0 Y
04-1F Global Scrolls 1-7
20 xxxx xxxx xxxx xxxx Tilemap 0 Scroll X
22 xxxx xxxx xxxx xxxx Tilemap 0 Scroll Y
24 ---- -a98 76-- ---- Tilemap 0 ?? always 0
---- ---- ---4 3210 Tilemap 0 Width (in tiles)
26 f--- ---- ---- ---- Tilemap 0 Enable
-e-- ---- ---- ---- Tilemap 0 Line Scroll Enable
--d- ---- ---- ---- Tilemap 0 Line Zoom Enable (seems unused in games, but might be enabled in jojo dev.menu BG test)
---c ---- ---- ---- Tilemap 0 ?? set together with Zoom
---- b--- ---- ---- Tilemap 0 Flip X (not implemented, Warzard demo fights during special moves)
---- -a-- ---- ---- Tilemap 0 Flip Y (not implemented, Capcom logos background during sfiii2 flashing)
---- --98 7654 3210 Tilemap 0 ?? always 0
28 -edc ba98 ---- ---- Tilemap 0 Line Scroll and Zoom Base address (1st word is scroll, 2nd word is zoom)
---- ---- -654 3210 Tilemap 0 Tiles Base address
2A-2F unused
30-5F Tilemaps 1-3
Values: 384 495 "wide"
60 xxxx xxxx xxxx xxxx H Sync end* 42 35
62 xxxx xxxx xxxx xxxx H Blank end 111 118
64 xxxx xxxx xxxx xxxx H Screen end 495 613
66 xxxx xxxx xxxx xxxx H Total end* 454 454
68 ---- --xx xxxx xxxx H ?? Zoom Master? 0 0 +128 if flip screen, might be not zoom-related but global H scroll
6A xxxx xxxx xxxx xxxx H ?? Zoom Offset? 0 0
6C xxxx xxxx xxxx xxxx H ?? Zoom Size? 1023 1023 (511 at BIOS init)
6E xxxx xxxx xxxx xxxx H Zoom Scale 64 64
70 xxxx xxxx xxxx xxxx V Sync end 3 3
72 xxxx xxxx xxxx xxxx V Blank end 21 21
74 xxxx xxxx xxxx xxxx V Screen end 245 245
76 xxxx xxxx xxxx xxxx V Total end 262 262
78 ---- --xx xxxx xxxx V ?? Zoom Master? 0 0 might be not zoom-related but global V scroll
7A xxxx xxxx xxxx xxxx V ?? Zoom Offset? 0 0
7C xxxx xxxx xxxx xxxx V ?? Zoom Size? 1023 1023 (261 at BIOS init)
7E xxxx xxxx xxxx xxxx V Zoom Scale 64 64
80 ---- ---- ---- -210 Pixel clock 3 5 base clock is 42.954545MHz, 3 = /5 divider, 5 = /4 divider.
---- ---- ---4 3--- Flip screen X/Y (or Y/X)
---- ---- --5- ---- ?? always set to 1, 0 in unused 24KHz mode (pixel clock divider?)
---- ---- -6-- ---- ?? set to 0 by BIOS init, then set to 1 after video mode selection, 0 in unused 24KHz mode (pixel clock divider?)
f--- ---- ---- ---- ?? always 0, but there is code which may set it
82 ---- ---- ---- 3--0 Sprite list DMA/copy to onchip RAM ? after new list upload to sprite RAM games write here 8/9/8/9 pattern, then wait until register 0C bit 0 became 0, then write 0.
84 ---- b--- ---- ---- ?? always set to 0x0800
86 ---- ---- ---- 3210 Character RAM bank
88 ---- ---- --54 3210 Gfx flash ROM bank
8A ---- ---- ---- ---- ?? set to 0 by BIOS init, never writen later
8E ---- ---- 7-5- ---- ?? set to 0x00A0 by BIOS init after Pal/Char DMA registers, never writen later (Char/Pal DMA IRQ enable ?)
96 xxxx xxxx xxxx xxxx Character DMA Source low bits
98 ---- ---- --54 3210 Character DMA Source high bits
---- ---- -6-- ---- Character DMA Start
A0 ---- -a98 7654 3210 Palette DMA Source high bits
A2 xxxx xxxx xxxx xxxx Palette DMA Source low bits
A4 ---- ---- ---- ---0 Palette DMA Destination high bit
A6 xxxx xxxx xxxx xxxx Palette DMA Destination low bits
A8 -edc ba98 -654 3210 Palette DMA Fade low bits
AA ---- ---- -654 3210 Palette DMA Fade high bits
AC xxxx xxxx xxxx xxxx Palette DMA Lenght low bits
AE ---- ---- ---- ---0 Palette DMA Lenght high bit
---- ---- ---- --1- Palette DMA Start
All CRTC-related values is last clock/line of given area, i.e. actual sizes is +1 to value.
All CRTC-related values is last clock/line of given area, i.e. actual sizes is +1 to value.
(*) H Total value is same for all 15KHz modes, uses fixed clock (not affected by pixel clock modifier) -
42.954545MHz/6 (similar to SSV) /(454+1) = 15734.25Hz /(262+1) = 59.826Hz
unused 24KHz 512x384 mode uses H Total 293 V Total 424 (42.954545MHz/6 /(293+1) = 24350.62Hz /(424+1) = 57.29Hz)
(*) H Total value is same for all 15KHz modes, uses fixed clock (not affected by pixel clock modifier) -
42.954545MHz/6 (similar to SSV) /(454+1) = 15734.25Hz /(262+1) = 59.826Hz
unused 24KHz 512x384 mode uses H Total 293 V Total 424 (42.954545MHz/6 /(293+1) = 24350.62Hz /(424+1) = 57.29Hz)
'SS' foreground tilemap layer generator (presumable located in 'SSU' chip) registers (write only?)
0x05050000 - 0x05050029 area, even bytes only.
'SS' foreground tilemap layer generator (presumable located in 'SSU' chip) registers (write only?)
0x05050000 - 0x05050029 area, even bytes only.
Offset: Bits: Desc: Values: 384 495 "wide"
00 xxxx xxxx H Sync* 42 35 same as PPU
01 xxxx xxxx H Start L
02 xxxx xxxx H Start H 62 64
03 xxxx xxxx H Blank L
04 xxxx xxxx H Blank H 534 671
05 xxxx xxxx H Total L*
06 xxxx xxxx H Total H* 454 454* same as PPU
07 xxxx xxxx H Scroll L
08 xxxx xxxx H Scroll H -101 -107 +128 if flip screen
09 xxxx xxxx V Sync 3 3 same as PPU
0a xxxx xxxx V Start L
0b xxxx xxxx V Start H 21 21 same as PPU
0c xxxx xxxx V Blank L
0d xxxx xxxx V Blank H 247 247 PPU value +2
0e xxxx xxxx V Total L
0f xxxx xxxx V Total H 262 262 same as PPU
10 xxxx xxxx V Scroll L
11 xxxx xxxx V Scroll H -24 -24 +288 if flip screen
12 xxxx xxxx Palette base
13 ---- -210 Pixel clock 3 5 not clear how it works
14 ---- --10 Flip screen X/Y (or Y/X?)
Offset: Bits: Desc: Values: 384 495 "wide"
00 xxxx xxxx H Sync* 42 35 same as PPU
01 xxxx xxxx H Start L
02 xxxx xxxx H Start H 62 64
03 xxxx xxxx H Blank L
04 xxxx xxxx H Blank H 534 671
05 xxxx xxxx H Total L*
06 xxxx xxxx H Total H* 454 454* same as PPU
07 xxxx xxxx H Scroll L
08 xxxx xxxx H Scroll H -101 -107 +128 if flip screen
09 xxxx xxxx V Sync 3 3 same as PPU
0a xxxx xxxx V Start L
0b xxxx xxxx V Start H 21 21 same as PPU
0c xxxx xxxx V Blank L
0d xxxx xxxx V Blank H 247 247 PPU value +2
0e xxxx xxxx V Total L
0f xxxx xxxx V Total H 262 262 same as PPU
10 xxxx xxxx V Scroll L
11 xxxx xxxx V Scroll H -24 -24 +288 if flip screen
12 xxxx xxxx Palette base
13 ---- -210 Pixel clock 3 5 not clear how it works
14 ---- --10 Flip screen X/Y (or Y/X?)
(*) H Total value is same for all 15KHz modes, same as PPU.
(*) H Total value is same for all 15KHz modes, same as PPU.
*/
#include "emu.h"
@ -1019,7 +1019,7 @@ void cps3_state::draw_tilemapsprite_line(u32 *regs, int drawline, bitmap_rgb32 &
int line = drawline + scrolly;
line &= 0x3ff;
if (global_flip_y) line ^= 0x3ff; // these probably needs compensation of our scrolly and tileline tweaks, but it's fine for sfiii2.
if (global_flip_y) line ^= 0x3ff; // these probably needs compensation of our scrolly and tileline tweaks, but it's fine for sfiii2.
int xflip_mask = (global_flip_x) ? 0x3f : 0;
int tileline = (line / 16) + 1;
@ -2029,16 +2029,16 @@ void cps3_state::process_character_dma(u32 address)
switch ((dat1 >> 21) & 7)
{
case 4: /* Sets a table used by the decompression routines */
case 4: /* Sets a table used by the decompression routines */
/* We should probably copy this, but a pointer to it is fine for our purposes as the data doesn't change */
m_current_table_address = real_source;
break;
case 2: /* 6bpp DMA decompression
- this is used for the majority of sprites and backgrounds */
case 2: /* 6bpp DMA decompression
- this is used for the majority of sprites and backgrounds */
do_char_dma(real_source, real_destination, real_length);
break;
case 3: /* 8bpp DMA decompression
- this is used on SFIII NG Sean's Stage ONLY */
case 3: /* 8bpp DMA decompression
- this is used on SFIII NG Sean's Stage ONLY */
do_alt_char_dma(real_source, real_destination, real_length);
break;
default:

46
src/mame/drivers/crospuzl.cpp
View File

@ -2,26 +2,26 @@
// copyright-holders:Angelo Salese
/****************************************************************************
Cross Puzzle
Cross Puzzle
driver by Angelo Salese, based off original crystal.cpp by ElSemi
driver by Angelo Salese, based off original crystal.cpp by ElSemi
TODO:
- Dies at POST with a SPU error,
supposedly it should print a "running system." instead of "Ok" at the
end of the POST routine.
Update: it tries to load a "sdata.bin" file, which is nowhere to be found in the dump.
Considering also that first $20000 block is empty and loading the flash linearly gives
the reference memory size but then game isn't detected at all.
- Hooking up nand_device instead of the custom implementation here
makes the game to print having all memory available and no game
detected, fun
- I2C RTC interface should be correct but still doesn't work, sending
TODO:
- Dies at POST with a SPU error,
supposedly it should print a "running system." instead of "Ok" at the
end of the POST routine.
Update: it tries to load a "sdata.bin" file, which is nowhere to be found in the dump.
Considering also that first $20000 block is empty and loading the flash linearly gives
the reference memory size but then game isn't detected at all.
- Hooking up nand_device instead of the custom implementation here
makes the game to print having all memory available and no game
detected, fun
- I2C RTC interface should be correct but still doesn't work, sending
unrecognized slave address 0x30 (device type might be wrong as well)
Notes:
- Game enables UART1 receive irq, if that irq is enable it just prints
"___sysUART1_ISR<LF>___sysUART1_ISR_END<LF>"
Notes:
- Game enables UART1 receive irq, if that irq is enable it just prints
"___sysUART1_ISR<LF>___sysUART1_ISR_END<LF>"
=============================================================================
@ -71,7 +71,7 @@ private:
uint32_t m_FlashAddr;
uint8_t m_FlashShift;
// DECLARE_WRITE32_MEMBER(Banksw_w);
// DECLARE_WRITE32_MEMBER(Banksw_w);
DECLARE_READ8_MEMBER(FlashCmd_r);
DECLARE_WRITE8_MEMBER(FlashCmd_w);
DECLARE_WRITE8_MEMBER(FlashAddr_w);
@ -119,7 +119,7 @@ READ8_MEMBER(crospuzl_state::FlashCmd_r)
// ee81 has no correspondence in the JEDEC flash vendor ID list,
// and the standard claims that the ID is 7 + 1 parity bit.
// TODO: Retrieve ID from actual HW service mode screen.
// const uint8_t id[5] = { 0xee, 0x81, 0x00, 0x15, 0x00 };
// const uint8_t id[5] = { 0xee, 0x81, 0x00, 0x15, 0x00 };
const uint8_t id[5] = { 0xec, 0xf1, 0x00, 0x95, 0x40 };
uint8_t res = id[m_FlashAddr];
m_FlashAddr ++;
@ -207,13 +207,13 @@ void crospuzl_state::crospuzl_mem(address_map &map)
map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map));
// map(0x05000000, 0x05ffffff).bankr("mainbank");
// map(0x05000000, 0x05000003).rw(FUNC(crospuzl_state::FlashCmd_r), FUNC(crospuzl_state::FlashCmd_w));
// map(0x05000000, 0x05ffffff).bankr("mainbank");
// map(0x05000000, 0x05000003).rw(FUNC(crospuzl_state::FlashCmd_r), FUNC(crospuzl_state::FlashCmd_w));
}
void crospuzl_state::machine_start()
{
// save_item(NAME(m_Bank));
// save_item(NAME(m_Bank));
save_item(NAME(m_FlashCmd));
save_item(NAME(m_PIO));
save_item(NAME(m_ddr));
@ -374,8 +374,8 @@ void crospuzl_state::crospuzl(machine_config &config)
// ROM strings have references to a K9FXX08 device
// TODO: use this device, in machine/smartmed.h (has issues with is_busy() emulation)
// NAND(config, m_nand, 0);
// m_nand->set_nand_type(nand_device::chip::K9F1G08U0B); // TODO: exact flavor
// NAND(config, m_nand, 0);
// m_nand->set_nand_type(nand_device::chip::K9F1G08U0B); // TODO: exact flavor
PCF8583(config, m_rtc, 32.768_kHz_XTAL);
}

28
src/mame/drivers/crystal.cpp
View File

@ -21,21 +21,21 @@
program with the correct data
MAME driver by ElSemi
Additional work and refactoring by Angelo Salese
Additional work and refactoring by Angelo Salese
TODO:
- provide NVRAM defaults where applicable;
- add an actual reset button (helps with inp record/playback);
- donghaer: needs "raster effect" for 2 players mode split screen, but no
interrupt is actually provided for the task so apparently not a timer
related effect;
- wulybuly: strips off main RAM to texture transfers except for text after
the first couple of frames;
- maldaiza: PIC protection.
- urachamu: some animation timings seems off, like bat hit animation before starting a given game.
They were actually too fast before adding 30 Hz vblank for interlace mode, even if the game don't
really read crtc blanking reg or use any other interrupt but the coin ones;
- urachamu: investigate what CDMA in test mode really do, assuming it's not a dud;
TODO:
- provide NVRAM defaults where applicable;
- add an actual reset button (helps with inp record/playback);
- donghaer: needs "raster effect" for 2 players mode split screen, but no
interrupt is actually provided for the task so apparently not a timer
related effect;
- wulybuly: strips off main RAM to texture transfers except for text after
the first couple of frames;
- maldaiza: PIC protection.
- urachamu: some animation timings seems off, like bat hit animation before starting a given game.
They were actually too fast before adding 30 Hz vblank for interlace mode, even if the game don't
really read crtc blanking reg or use any other interrupt but the coin ones;
- urachamu: investigate what CDMA in test mode really do, assuming it's not a dud;
========================================================================================================

28
src/mame/drivers/h01x.cpp
View File

@ -229,7 +229,7 @@ void h01x_state::machine_start()
void h01x_state::machine_reset()
{
m_bank = 0x00;
m_bank = 0x00;
m_rom_ptr = m_rom->base();
m_hzrom_ptr = m_hzrom->base();
@ -251,7 +251,7 @@ void h01x_state::init_h01x()
/*
uint32_t h01x_state::screen_update_h01x(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
return 0;
return 0;
}
*/
@ -268,7 +268,7 @@ WRITE8_MEMBER( h01x_state::port_64_w )
WRITE8_MEMBER( h01x_state::port_70_w )
{
m_bank = data&0xC0;
m_bank = data&0xC0;
// bit5, speaker
m_speaker->level_w(BIT(data,5));
@ -400,23 +400,23 @@ ROM_END
// H-01B中文教育电脑
// 普乐电器公司
// cpu Z-80A 2MHz
// cpu Z-80A 2MHz
// NF500A教学电脑
// 国营八三〇厂制造
// cpu Z-80A 4MHz
// video MC6845P
// sysrom 16KB EPROM
// hzrom 32KB EPROM
// ram 32KB SRAM
// vram 16Kx4bit DRAM
// cpu Z-80A 4MHz
// video MC6845P
// sysrom 16KB EPROM
// hzrom 32KB EPROM
// ram 32KB SRAM
// vram 16Kx4bit DRAM
// JCE
// 广东江门计算机应用设备厂
// video HD6845SP
// sysrom 16KB EPROM
// hzrom 32KB EPROM
// extrom 16KB EPROM
// video HD6845SP
// sysrom 16KB EPROM
// hzrom 32KB EPROM
// extrom 16KB EPROM
// 开机画面
// H-01B : H-01型中文教育电脑 普乐电器公司制造

2
src/mame/drivers/hh_sm510.cpp
View File

@ -698,7 +698,7 @@ public:
// config
static INPUT_PORTS_START( gnw_judge )
PORT_START("IN.0") // R2
PORT_START("IN.0") // R2
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("IN.1") // R3

2
src/mame/drivers/ibmpc.cpp
View File

@ -495,7 +495,7 @@ ROM_START( ibm5160 )
ROMX_LOAD("68x4370.u19", 0x0000, 0x8000, CRC(758ff036) SHA1(045e27a70407d89b7956ecae4d275bd2f6b0f8e2), ROM_BIOS(3))
ROMX_LOAD("62x0890.u18", 0x8000, 0x8000, CRC(4f417635) SHA1(daa61762d3afdd7262e34edf1a3d2df9a05bcebb), ROM_BIOS(3))
ROM_SYSTEM_BIOS( 4, "xtlandmark", "Landmark/Supersoft Diagnostics" )
ROM_SYSTEM_BIOS( 4, "xtlandmark", "Landmark/Supersoft Diagnostics" )
ROMX_LOAD("62x0854.u19", 0x0000, 0x8000, CRC(b5fb0e83) SHA1(937b43759ffd472da4fb0fe775b3842f5fb4c3b3), ROM_BIOS(4) ) /* instructions say to leave this ROM in place */
ROMX_LOAD("5150_or_5160_27256_32kb.bin", 0x8000, 0x8000, CRC(d3603216) SHA1(6691d33f43eddd3b0a6269ef985f5be8705ba55f), ROM_BIOS(4) )

4
src/mame/drivers/igspoker.cpp
View File

@ -2215,10 +2215,10 @@ void igspoker_state::init_cpoker101() // same decryption as cpokert
/* Patch to avoid traps at $0ec5 (cpoker101),
$0ef0 (cpoker201f), $0f20 (cpoker210ks) and
$206e (cpoker101, cpoker201f & cpoker210ks),
$206e (cpoker101, cpoker201f & cpoker210ks),
that run subs in RAM, operate registers,
and finally lock the game at $732e (cpoker101),
$72c2 (cpoker201f) & $72c6 (cpoker210ks).
$72c2 (cpoker201f) & $72c6 (cpoker210ks).
All these are triggered if RAM contents of $ff18
matches the $ff19 (normally 0x20 due to an AND

16
src/mame/drivers/marineb.cpp
View File

@ -129,12 +129,12 @@ static INPUT_PORTS_START( marineb )
PORT_DIPSETTING( 0x03, "6" )
PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4,5") /* coinage doesn't work?? - always 1C / 1C or Free Play?? */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x14, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
// PORT_DIPSETTING( 0x18, DEF_STR( 3C_2C ) )
// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
// PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
// PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
// PORT_DIPSETTING( 0x10, DEF_STR( 1C_6C ) )
// PORT_DIPSETTING( 0x14, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
// PORT_DIPSETTING( 0x18, DEF_STR( 3C_2C ) )
// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
// PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
// PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
// PORT_DIPSETTING( 0x10, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x1c, DEF_STR( Free_Play ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, "20000 50000" )
@ -178,9 +178,9 @@ static INPUT_PORTS_START( changes )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4") /* coinage doesn't work?? - always 1C / 1C or Free Play?? */
// PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
// PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Free_Play ) )
PORT_DIPNAME( 0x10, 0x00, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, "20000" )

12
src/mame/drivers/menghong.cpp
View File

@ -10,10 +10,10 @@
- HY04 protection (controls tile RNG, 8bpp colors, a few program flow bits)
- 8bpp colors are washed, data from flash ROMs is XORed with contents
of NVRAM area 0x1400070b-80f in menghong, might be shared with
HY04 as well.
HY04 as well.
- EEPROM hookup;
- extract password code when entering test mode in-game (assuming the
0x485 workaround isn't enough);
0x485 workaround isn't enough);
=============================================================================
@ -88,7 +88,7 @@ public:
m_mainbank(*this, "mainbank"),
m_maincpu(*this, "maincpu"),
m_vr0soc(*this, "vr0soc"),
// m_nvram(*this, "nvram"),
// m_nvram(*this, "nvram"),
m_ds1302(*this, "rtc"),
m_eeprom(*this, "eeprom"),
m_prot_data(*this, "pic_data")
@ -107,7 +107,7 @@ private:
/* devices */
required_device<se3208_device> m_maincpu;
required_device<vrender0soc_device> m_vr0soc;
// required_device<nvram_device> m_nvram;
// required_device<nvram_device> m_nvram;
required_device<ds1302_device> m_ds1302;
optional_device<eeprom_serial_93cxx_device> m_eeprom;
required_region_ptr <uint8_t> m_prot_data;
@ -316,7 +316,7 @@ void menghong_state::menghong_mem(address_map &map)
map(0x00000000, 0x003fffff).rom().nopw();
map(0x01280000, 0x01280003).w(FUNC(menghong_state::Banksw_w));
// map(0x01400000, 0x0140ffff).ram().share("nvram");
// map(0x01400000, 0x0140ffff).ram().share("nvram");
map(0x01400000, 0x0140ffff).rw(FUNC(menghong_state::menghong_shared_r), FUNC(menghong_state::menghong_shared_w));
map(0x01500000, 0x01500003).portr("P1_P2");
map(0x01500004, 0x01500007).r(FUNC(menghong_state::crzyddz2_key_r));
@ -473,7 +473,7 @@ void menghong_state::menghong(machine_config &config)
// HY04 running at 8 MHz
// NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0);
// NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0);
VRENDER0_SOC(config, m_vr0soc, 14318180 * 3);
m_vr0soc->set_host_cpu_tag(m_maincpu);

6
src/mame/drivers/pc.cpp
View File

@ -1392,6 +1392,6 @@ COMP( 198?, hyo88t, ibm5150, 0, pccga, pccga, pc_state,
COMP( 198?, kyoxt, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Kyocera", "XT", MACHINE_NOT_WORKING )
COMP( 198?, kaypropc, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Kaypro Corporation", "PC", MACHINE_NOT_WORKING )
COMP( 198?, ledgmodm, ibm5150, 0, siemens, pccga, pc_state, empty_init, "Leading Edge", "Model M", MACHINE_NOT_WORKING )
COMP( 198?, eaglepc2, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Eagle", "PC-2", MACHINE_NOT_WORKING )
COMP( 198?, mpx16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Micromint", "MPX-16", MACHINE_NOT_WORKING )
COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )
COMP( 198?, eaglepc2, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Eagle", "PC-2", MACHINE_NOT_WORKING )
COMP( 198?, mpx16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Micromint", "MPX-16", MACHINE_NOT_WORKING )
COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )

8
src/mame/drivers/pmd85.cpp
View File

@ -612,9 +612,9 @@ INPUT_PORTS_END
//static const struct CassetteOptions pmd85_cassette_options =
//{
// 1, /* channels */
// 16, /* bits per sample */
// 7200 /* sample frequency */
// 1, /* channels */
// 16, /* bits per sample */
// 7200 /* sample frequency */
//};
/* machine definition */
@ -670,7 +670,7 @@ void pmd85_state::pmd85(machine_config &config, bool with_uart)
/* cassette */
CASSETTE(config, m_cassette);
m_cassette->set_formats(pmd85_cassette_formats);
// m_cassette->set_create_opts(&pmd85_cassette_options);
// m_cassette->set_create_opts(&pmd85_cassette_options);
m_cassette->set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED);
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
m_cassette->set_interface("pmd85_cass");

8
src/mame/drivers/psattack.cpp
View File

@ -8,10 +8,10 @@
TODO:
- Compact Flash hookup;
- Requires timed based FIFO renderer, loops until both rear and front
are equal.
- Requires timed based FIFO renderer, loops until both rear and front
are equal.
- Enables wavetable IRQ, even if so far no channel enables the submask;
- Unemulated 93C86 EEPROM device;
- Unemulated 93C86 EEPROM device;
=============================================================================
@ -212,7 +212,7 @@ void psattack_state::psattack_mem(address_map &map)
map(0x01500000, 0x01500003).portr("IN0").w(FUNC(psattack_state::output_w));
map(0x01500004, 0x01500007).portr("IN1");
map(0x01500008, 0x0150000b).portr("IN2");
// 0x0150000c is prolly eeprom
// 0x0150000c is prolly eeprom
map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map));
// map(0x01802410, 0x01802413) peripheral chip select for cf?

8
src/mame/drivers/segac2.cpp
View File

@ -1542,10 +1542,10 @@ WRITE_LINE_MEMBER(segac2_state::vdp_lv4irqline_callback_c2)
}
/*
sound output balance (tfrceac)
reference : https://youtu.be/AOmeWp9qe5E
reference 2 : https://youtu.be/Tq8VkJYmij8
reference 3: https://youtu.be/VId_HWdNuyA
sound output balance (tfrceac)
reference : https://youtu.be/AOmeWp9qe5E
reference 2 : https://youtu.be/Tq8VkJYmij8
reference 3: https://youtu.be/VId_HWdNuyA
*/
void segac2_state::segac(machine_config &config)
{

2
src/mame/drivers/sm7238.cpp
View File

@ -141,7 +141,7 @@ void sm7238_state::videobank_map(address_map &map)
void sm7238_state::sm7238_io(address_map &map)
{
map.unmap_value_high();
// map(0x40, 0x4f).ram() // LUT
// map(0x40, 0x4f).ram() // LUT
map(0xa0, 0xa1).rw(m_i8251line, FUNC(i8251_device::read), FUNC(i8251_device::write));
map(0xa4, 0xa5).rw(m_i8251kbd, FUNC(i8251_device::read), FUNC(i8251_device::write));
map(0xa8, 0xab).rw(m_t_color, FUNC(pit8253_device::read), FUNC(pit8253_device::write));

6
src/mame/drivers/trivrus.cpp
View File

@ -5,13 +5,13 @@
Trivia R Us (c) 2009 AGT
driver by Angelo Salese, based off original crystal.cpp by ElSemi
original mods on this driver by Luca Elia
original mods on this driver by Luca Elia
TODO:
- touch panel, according to service mode can be generic, atouch or 3M
(microtouch?). It interfaces thru UART0 port;
(microtouch?). It interfaces thru UART0 port;
- RTC (unknown type);
- Split romset or add a slot option supporting debug terminal mode;
- Split romset or add a slot option supporting debug terminal mode;
=============================================================================

2
src/mame/includes/archimds.h
View File

@ -105,7 +105,7 @@ private:
static const device_timer_id TIMER_IOC = 3;
// void vidc_vblank();
// void vidc_vblank();
void vidc_video_tick();
void vidc_audio_tick();
void ioc_timer(int param);

2
src/mame/machine/archimds.cpp
View File

@ -562,7 +562,7 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
archimedes_request_irq_a((data & 0x80) ? ARCHIMEDES_IRQA_FORCE : 0);
//if(data & 0x08) //set up the VBLANK timer
// m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
// m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
break;

8
src/mame/machine/saa7191.cpp
View File

@ -6,8 +6,8 @@
Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
TODO:
- Actual functionality
TODO:
- Actual functionality
*********************************************************************/
@ -17,8 +17,8 @@
#define LOG_UNKNOWN (1 << 0)
#define LOG_READS (1 << 1)
#define LOG_WRITES (1 << 2)
#define LOG_ERRORS (1 << 3)
#define LOG_I2C_IGNORES (1 << 4)
#define LOG_ERRORS (1 << 3)
#define LOG_I2C_IGNORES (1 << 4)
#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_ERRORS | LOG_I2C_IGNORES | LOG_UNKNOWN)
#define VERBOSE (LOG_DEFAULT)

4
src/mame/machine/saa7191.h
View File

@ -6,8 +6,8 @@
Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
TODO:
- Actual functionality
TODO:
- Actual functionality
*********************************************************************/

24
src/mame/machine/segabill.cpp
View File

@ -5,10 +5,10 @@
Sega Billboard
TODO: Timing, vs298 needs a higher interrupt frequency, but then
the animations seem to fast?
Document and add support for Blast City Billboard with EPR-19158.IC3
( https://www.arcade-projects.com/forums/index.php?attachment/1477-blast-city-billboard-pcb-jpg/ )
TODO: Timing, vs298 needs a higher interrupt frequency, but then
the animations seem to fast?
Document and add support for Blast City Billboard with EPR-19158.IC3
( https://www.arcade-projects.com/forums/index.php?attachment/1477-blast-city-billboard-pcb-jpg/ )
***************************************************************************/
@ -49,14 +49,14 @@ Sega VERSUS CITY BILLBOARD CONTROL BD 837-11854 (C) 1991
EEPROM:
EPR-18022.IC2 Sega VERSUS CITY BILLBOARD
Notes:
SW1 8-DIP switch
CN2 10 pin connector for power input (5v)
CN3 J50 pin connector for two 7-SEG UNITs (VSC-0220, connects at VSC-0221 7SEG BASE)
CN4 J20 pin connector to BLUE(U-P) PANEL
(600-6770-005 WIRE HARN BILLBOARD FLT BD, CN7(?) and CN11 for Model3, CN6 and CN12 for Model2)
CN5 has no connector soldered and as such is unused and has two silkscreened PS2501-4 ICs below,
similar to the ICs under CN4
171-6218B is printed to right of (C) SEGA 1991 on bottom of board
SW1 8-DIP switch
CN2 10 pin connector for power input (5v)
CN3 J50 pin connector for two 7-SEG UNITs (VSC-0220, connects at VSC-0221 7SEG BASE)
CN4 J20 pin connector to BLUE(U-P) PANEL
(600-6770-005 WIRE HARN BILLBOARD FLT BD, CN7(?) and CN11 for Model3, CN6 and CN12 for Model2)
CN5 has no connector soldered and as such is unused and has two silkscreened PS2501-4 ICs below,
similar to the ICs under CN4
171-6218B is printed to right of (C) SEGA 1991 on bottom of board
*/
#include "emu.h"
#include "segabill.h"

18
src/mame/machine/vino.cpp
View File

@ -14,15 +14,15 @@
#define LOG_UNKNOWN (1 << 0)
#define LOG_READS (1 << 1)
#define LOG_WRITES (1 << 2)
#define LOG_DESCS (1 << 3)
#define LOG_DMA (1 << 4)
#define LOG_DMA_DATA (1 << 5)
#define LOG_FIFO (1 << 6)
#define LOG_FIELDS (1 << 7)
#define LOG_COORDS (1 << 8)
#define LOG_INPUTS (1 << 9)
#define LOG_INTERRUPTS (1 << 10)
#define LOG_INDICES (1 << 11)
#define LOG_DESCS (1 << 3)
#define LOG_DMA (1 << 4)
#define LOG_DMA_DATA (1 << 5)
#define LOG_FIFO (1 << 6)
#define LOG_FIELDS (1 << 7)
#define LOG_COORDS (1 << 8)
#define LOG_INPUTS (1 << 9)
#define LOG_INTERRUPTS (1 << 10)
#define LOG_INDICES (1 << 11)
#define LOG_DEFAULT (LOG_WRITES | LOG_FIELDS | LOG_DMA | LOG_DESCS | LOG_READS | LOG_INTERRUPTS | LOG_INDICES | LOG_COORDS)
#define VERBOSE (0)

2
src/mame/machine/vino.h
View File

@ -98,7 +98,7 @@ private:
ISR_CHB_EOF = (1 << 3),
ISR_CHB_FIFO = (1 << 4),
ISR_CHB_DESC = (1 << 5),
ISR_MASK = 0x3f,
ISR_MASK = 0x3f,
ALPHA_MASK = 0xff,

90
src/mame/mame.lst
View File

@ -2453,62 +2453,62 @@ pcd4x // Siemens-Nixdorf PCD-4H and other 486 desktops
pcd4nl // 1995 Siemens-Nixdorf PCD-4NL 486 subnotebook
pcd4nd // 1993 Siemens-Nixdorf 486 notebook
ct386sx //
wy220001 // WYSEpc
wy220001 // WYSEpc
cxsxd //
ec1842 //
ec1849 //
ev1806 // Everex EV-1806
ev1815 // Everex EV-1815
ev1815 // Everex EV-1815
ews286 // 1986 Ericsson WS286
ficpio2 // 1995 FIC 486-PIO-2
ficvipio // FIC 486-VIP-IO
ficvipio2 // FIC 486-VIP-IO2
ftsserv // 1991 Apricot FTs (Scorpion)
aubam12s2 // AUVA COMPUTER, INC. BAM/12-S2 motherboard (286)
bi025c // BI-025C HT 12 286 motherboard (286)
kma202f // KMA-202F-12R motherboard (286)
cdtekg2 // CDTEK motherboard with Headland G2 chipset (286)
octekg2 // Octek motherboard with Headland G2 chipset (286)
olim203 // Olivetti 286 motherboard
headg2 // 286 motherboards with Headland G2 chipset
mb1212c // Biostar MB-1212C motherboard (286)
bam16a0 // VIP-M21502A BAM16-A0 motherboard (286)
cmpa286 // CMP enterprise CO.LTD. motherboard (286)
suntac5 // 286 motherboards using the 5-chip SUNTAC chipset
aubam12s2 // AUVA COMPUTER, INC. BAM/12-S2 motherboard (286)
bi025c // BI-025C HT 12 286 motherboard (286)
kma202f // KMA-202F-12R motherboard (286)
cdtekg2 // CDTEK motherboard with Headland G2 chipset (286)
octekg2 // Octek motherboard with Headland G2 chipset (286)
olim203 // Olivetti 286 motherboard
headg2 // 286 motherboards with Headland G2 chipset
mb1212c // Biostar MB-1212C motherboard (286)
bam16a0 // VIP-M21502A BAM16-A0 motherboard (286)
cmpa286 // CMP enterprise CO.LTD. motherboard (286)
suntac5 // 286 motherboards using the 5-chip SUNTAC chipset
ht12a // 286 motherboards using the Headland HT12/A chipset
vlsi5 // 286 motherboards using the 5-chip VLSI chipset
sy012 // SY-012 16/25 386MB VER: 5.2 motherboard (386)
frxc402 // 386 motherboards using FOREX FRX46C402/FRX36C300/SIS85C206 chips
gs611606a // Goldstar P/N 611-606A Rev 1.0A motherboard (386)
dfi386 // DFI 386-20.REV0 motherboard (386)
386sc // 386 SC Rev A2 motherboard
386sc2c //
opti495xlc // Motherboards using the OPTi 82C495XLC chipset (386)
isa386u30 // Asus ISA-386U30 REV.2.2 motherboard (386)
isa386c // Asus ISA-386C motherboard (386)
pt581392 // Motherboard using the Forex FRX46C402 + FRX46C411 + SiS 85C206 chipset (386)
pem2530 // DTK PEM 2530 motherboard (386)
tam3340ma0 // TAM/33/40-MA0 (CM318R00,M31-R00)
alim1429 // Motherboards using the ALi M1429 A1 and M1431 A2 chipset (386)
u3911v3 // Uniron U3911-V3 motherboard (286)
mkp286 // Morse KP-286 motherboard (286)
mba009 // HLB-286 MBA-009 motherboard (286)
pccm205 // PC-Chips M205 motherboard (286)
pccm321 // PC-Chips M321 motherboard (386)
pccm326 // PC-Chips M326 motherboard (386)
pccm919 // PC-Chips M919 motherboard (486)
snomi286 // Snobol Mini 286 motherboard (286)
sy019hi // Soyo SY-019H and SY-019I motherboards (386)
sm38640f // SM 386-40F motherboard (386)
4nd04a // 386-4N-D04A motherboard (386)
hot304 // Shuttle HOT-304
vlsi5 // 286 motherboards using the 5-chip VLSI chipset
sy012 // SY-012 16/25 386MB VER: 5.2 motherboard (386)
frxc402 // 386 motherboards using FOREX FRX46C402/FRX36C300/SIS85C206 chips
gs611606a // Goldstar P/N 611-606A Rev 1.0A motherboard (386)
dfi386 // DFI 386-20.REV0 motherboard (386)
386sc // 386 SC Rev A2 motherboard
386sc2c //
opti495xlc // Motherboards using the OPTi 82C495XLC chipset (386)
isa386u30 // Asus ISA-386U30 REV.2.2 motherboard (386)
isa386c // Asus ISA-386C motherboard (386)
pt581392 // Motherboard using the Forex FRX46C402 + FRX46C411 + SiS 85C206 chipset (386)
pem2530 // DTK PEM 2530 motherboard (386)
tam3340ma0 // TAM/33/40-MA0 (CM318R00,M31-R00)
alim1429 // Motherboards using the ALi M1429 A1 and M1431 A2 chipset (386)
u3911v3 // Uniron U3911-V3 motherboard (286)
mkp286 // Morse KP-286 motherboard (286)
mba009 // HLB-286 MBA-009 motherboard (286)
pccm205 // PC-Chips M205 motherboard (286)
pccm321 // PC-Chips M321 motherboard (386)
pccm326 // PC-Chips M326 motherboard (386)
pccm919 // PC-Chips M919 motherboard (486)
snomi286 // Snobol Mini 286 motherboard (286)
sy019hi // Soyo SY-019H and SY-019I motherboards (386)
sm38640f // SM 386-40F motherboard (386)
4nd04a // 386-4N-D04A motherboard (386)
hot304 // Shuttle HOT-304
hot409 // Shuttle HOT-409
ibm5162 // 1986 IBM XT 5162 (XT w/80286)
ibm5170 // 1984 IBM PC/AT 5170, original 6 MHz model
ibm5170a // 1985 IBM PC/AT 5170, enhanced 8 MHz model
ibmps1es // IBM PS/1 (Spanish)
k286i // 1985 Kaypro 286i
elanht286 // Leanord Elan High Tech 286
elanht286 // Leanord Elan High Tech 286
kt216wb5 // KT216WB5-HI Rev.2
lm103s //
m290 // Olivetti M290
@ -2541,7 +2541,7 @@ xb42664 // 1989 Apricot XEN-S (Venus I Motherboard 386)
xb42664a // 1990 Apricot XEN-S (Venus II Motherboard 386) (Bios:1.02.17)
lion3500 // 1993 Lion 3500C/T notebook
o286foxii // Octek Fox II motherboard (286)
ocjagv // Octek Jaguar V motherboard (386)
ocjagv // Octek Jaguar V motherboard (386)
@source:atari_s1.cpp
aavenger //
@ -31684,10 +31684,10 @@ sicpc1605 // Siemens Sicomp PC16-05
ssam88s //
sx16 // Sanyo SX-16
zdsupers //
ledgmodm // Leading Edge Model M
eaglepc2 // Eagle PC-2
mpx16 // Ciarcia's Circuit Cellar Micromint MPX-16
hstrtpls // Vendex HeadStart Plus
ledgmodm // Leading Edge Model M
eaglepc2 // Eagle PC-2
mpx16 // Ciarcia's Circuit Cellar Micromint MPX-16
hstrtpls // Vendex HeadStart Plus
@source:pc100.cpp
pc100 //

2
src/mame/video/deco_mlc.cpp
View File

@ -100,7 +100,7 @@ void deco_mlc_state::drawgfxzoomline(u32* dest, u8* pri,const rectangle &clip,gf
const u8 *source2 = code_base2 + (srcline) * gfx->rowbytes();
// alphaMode & 0xc0 = 0xc0 : Shadow, 0 : Alpha or Pre-shadowed, Other bits unknown
if (shadowMode && (alphaMode & 0xc0))
{ /* TODO : 8bpp and shadow can use simultaneously? */
{ /* TODO : 8bpp and shadow can use simultaneously? */
int x, x_index = x_index_base;
for (x = sx; x < ex; x++)
{

2
src/osd/modules/lib/osdlib.h
View File

@ -54,7 +54,7 @@ int osd_setenv(const char *name, const char *value, int overwrite);
/*-----------------------------------------------------------------------------
osd_get_clipboard_text: retrieves text from the clipboard
osd_get_clipboard_text: retrieves text from the clipboard
-----------------------------------------------------------------------------*/
std::string osd_get_clipboard_text(void);

6
src/osd/modules/monitor/monitor_mac.cpp
View File

@ -84,11 +84,11 @@ public:
std::shared_ptr<osd_monitor_info> monitor_from_window(const osd_window& window) override
{
// if (!m_initialized)
// if (!m_initialized)
return nullptr;
// std::uint64_t display = SDL_GetWindowDisplayIndex(static_cast<const mac_window_info &>(window).platform_window());
// return monitor_from_handle(display);
// std::uint64_t display = SDL_GetWindowDisplayIndex(static_cast<const mac_window_info &>(window).platform_window());
// return monitor_from_handle(display);
}
protected: