Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-05 16:50:57 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

Cleanups and version bump.

Browse Source
This commit is contained in:
Aaron Giles 2008-10-02 05:34:21 +00:00
parent cf63e2baa8
commit 5123b07115
28 changed files with 271 additions and 271 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/emu/cpu/dsp56k/dsp56ops.c
View File

@ -8,11 +8,11 @@
// NOTES For register setting:
// FM.3-4 : When A2 or B2 is read, the register contents occupy the low-order portion
// (bits 7-0) of the word; the high-order portion (bits 16-8) is sign-extended. When A2 or B2
// is written, the register receives the low-order portion of the word; the high-order portion is not used
// : ...much more!
// : ...shifter/limiter/overflow notes too.
//
// (bits 7-0) of the word; the high-order portion (bits 16-8) is sign-extended. When A2 or B2
// is written, the register receives the low-order portion of the word; the high-order portion is not used
// : ...much more!
// : ...shifter/limiter/overflow notes too.
//
//
// Helper functions and macros

2
src/emu/cpu/dsp56k/dsp56pcu.c
View File

@ -211,7 +211,7 @@ static void pcu_reset(void)
IPR = 0x0000;
// FM.5-4
// I_bits_set(0x03); This is what the manual says, but i'm dubious! Polygonet's HI interrupt wouldn't happen with the I bits set.
// I_bits_set(0x03); This is what the manual says, but i'm dubious! Polygonet's HI interrupt wouldn't happen with the I bits set.
I_bits_set(0x00);
S_bits_set(0);
L_bit_set(0);

2
src/emu/cpu/m68000/m68kcpu.c
View File

@ -789,7 +789,7 @@ int m68k_execute(int num_cycles)
/* See if interrupts came in */
m68ki_check_interrupts();
/* Make sure we're not stopped */
if(!CPU_STOPPED)
{

4
src/emu/cpu/z80/z80daisy.c
View File

@ -25,7 +25,7 @@ z80_daisy_state *z80daisy_init(running_machine *machine, const z80_daisy_chain *
z80_daisy_state *head = NULL;
z80_daisy_state **tailptr = &head;
/* create a linked list of devices */
/* create a linked list of devices */
for ( ; daisy->devtype != NULL; daisy++)
{
*tailptr = auto_malloc(sizeof(**tailptr));
@ -36,7 +36,7 @@ z80_daisy_state *z80daisy_init(running_machine *machine, const z80_daisy_chain *
(*tailptr)->irq_reti = (z80_daisy_irq_reti)device_get_info_fct((*tailptr)->device, DEVINFO_FCT_IRQ_RETI);
tailptr = &(*tailptr)->next;
}
return head;
}

2
src/emu/cpuint.c
View File

@ -331,7 +331,7 @@ void cpunum_set_input_line_and_vector(running_machine *machine, int cpunum, int
case CPU_TMS32026:
fatalerror("CPU %s: PULSE_LINE used with level-detected IRQ %d\n", machine->config->cpu[cpunum].tag, line);
break;
default:
break;
}

2
src/emu/machine/ldcore.c
View File

@ -1520,7 +1520,7 @@ static void init_video(const device_config *device)
ldcore->videotex = render_texture_alloc(NULL, NULL);
if (ldcore->videotex == NULL)
fatalerror("Out of memory allocating video texture");
/* allocate palette for applying brightness/contrast/gamma */
ldcore->videopalette = palette_alloc(256, 1);
if (ldcore->videopalette == NULL)

12
src/emu/machine/ldv1000.c
View File

@ -104,15 +104,15 @@ static WRITE8_HANDLER( ld_controls )
case 0:
// write $00 at startup/reject
break;
case 2:
// write $06 at startup/reject
break;
case 3:
// write $8A at startup
break;
case 5:
// write $9F at startup/reject
break;
@ -120,7 +120,7 @@ static WRITE8_HANDLER( ld_controls )
case 6:
// write $C3 at startup/reject
break;
case 7:
// write $90 at startup
break;
@ -133,7 +133,7 @@ static READ8_HANDLER( ld_controls )
switch (offset)
{
case 4:
}
}
@ -142,7 +142,7 @@ static WRITE8_HANDLER( unknown_port_w )
{
// Writes to $00/$02/$00
// Values:
// $04/$09/$0F
// $04/$09/$0F
// $04/$0E/$0F
// $04/ /$0F
}

30
src/emu/render.c
View File

@ -2478,7 +2478,7 @@ void render_texture_free(render_texture *texture)
/* release palette references */
if (texture->palette != NULL)
palette_deref(texture->palette);
/* free any B/C/G lookup tables */
if (texture->bcglookup != NULL)
free(texture->bcglookup);
@ -2500,7 +2500,7 @@ void render_texture_free(render_texture *texture)
void render_texture_set_bitmap(render_texture *texture, bitmap_t *bitmap, const rectangle *sbounds, int format, palette_t *palette)
{
int scalenum;
/* ensure we have a valid palette for palettized modes */
if (format == TEXFORMAT_PALETTE16 || format == TEXFORMAT_PALETTEA16)
assert(palette != NULL);
@ -2508,7 +2508,7 @@ void render_texture_set_bitmap(render_texture *texture, bitmap_t *bitmap, const
/* invalidate references to the old bitmap */
if (bitmap != texture->bitmap && texture->bitmap != NULL)
invalidate_all_render_ref(texture->bitmap);
/* if the palette is different, adjust references */
if (palette != texture->palette)
{
@ -2647,23 +2647,23 @@ static const rgb_t *texture_get_adjusted_palette(render_texture *texture, render
const rgb_t *adjusted;
int numentries;
int index;
/* override the palette with our adjusted palette */
switch (texture->format)
{
case TEXFORMAT_PALETTE16:
case TEXFORMAT_PALETTEA16:
/* if no adjustment necessary, return the raw palette */
assert(texture->palette != NULL);
adjusted = palette_entry_list_adjusted(texture->palette);
if (container->brightness == 1.0f && container->contrast == 1.0f && container->gamma == 1.0f)
return adjusted;
/* if this is the machine palette, return our precomputed adjusted palette */
if (container->palclient != NULL && palette_client_get_palette(container->palclient) == texture->palette)
return container->bcglookup;
/* otherwise, ensure we have memory allocated and compute the adjusted result ourself */
numentries = palette_get_num_colors(texture->palette) * palette_get_num_groups(texture->palette);
if (texture->bcglookup == NULL || texture->bcglookup_entries < numentries)
@ -2681,15 +2681,15 @@ static const rgb_t *texture_get_adjusted_palette(render_texture *texture, render
return texture->bcglookup;
case TEXFORMAT_RGB15:
/* if no adjustment necessary, return NULL */
if (container->brightness == 1.0f && container->contrast == 1.0f && container->gamma == 1.0f && texture->palette == NULL)
return NULL;
/* if no palette, return the standard lookups */
if (texture->palette == NULL)
return container->bcglookup32;
/* otherwise, ensure we have memory allocated and compute the adjusted result ourself */
assert(palette_get_num_colors(texture->palette) == 32);
adjusted = palette_entry_list_adjusted(texture->palette);
@ -2709,19 +2709,19 @@ static const rgb_t *texture_get_adjusted_palette(render_texture *texture, render
texture->bcglookup[0x60 + index] = val << 24;
}
return texture->bcglookup;
case TEXFORMAT_RGB32:
case TEXFORMAT_ARGB32:
case TEXFORMAT_YUY16:
/* if no adjustment necessary, return NULL */
if (container->brightness == 1.0f && container->contrast == 1.0f && container->gamma == 1.0f && texture->palette == NULL)
return NULL;
/* if no palette, return the standard lookups */
if (texture->palette == NULL)
return container->bcglookup256;
/* otherwise, ensure we have memory allocated and compute the adjusted result ourself */
assert(palette_get_num_colors(texture->palette) == 256);
adjusted = palette_entry_list_adjusted(texture->palette);
@ -2745,7 +2745,7 @@ static const rgb_t *texture_get_adjusted_palette(render_texture *texture, render
default:
assert(FALSE);
}
return NULL;
}

2
src/lib/util/aviio.c
View File

@ -1718,7 +1718,7 @@ static avi_error chunk_write(avi_file *file, UINT32 type, const void *data, UINT
avi_error avierr;
UINT32 idxreserve;
UINT32 written;
/* if we are the first RIFF, we must reserve enough space for the IDX chunk */
idxreserve = 0;
if (file->riffbase == 0 && type != CHUNKTYPE_IDX1)

16
src/lib/util/palette.c
View File

@ -111,7 +111,7 @@ palette_t *palette_alloc(UINT32 numcolors, UINT32 numgroups)
if (palette == NULL)
goto error;
memset(palette, 0, sizeof(*palette));
/* initialize overall controls */
palette->brightness = 0.0f;
palette->contrast = 1.0f;
@ -475,7 +475,7 @@ const rgb_t *palette_entry_list_adjusted_rgb15(palette_t *palette)
***************************************************************************/
/*-------------------------------------------------
palette_set_brightness - set the overall
palette_set_brightness - set the overall
brightness for the palette
-------------------------------------------------*/
@ -499,7 +499,7 @@ void palette_set_brightness(palette_t *palette, float brightness)
/*-------------------------------------------------
palette_set_contrast - set the overall
palette_set_contrast - set the overall
contrast for the palette
-------------------------------------------------*/
@ -520,7 +520,7 @@ void palette_set_contrast(palette_t *palette, float contrast)
/*-------------------------------------------------
palette_set_gamma - set the overall
palette_set_gamma - set the overall
gamma for the palette
-------------------------------------------------*/
@ -532,7 +532,7 @@ void palette_set_gamma(palette_t *palette, float gamma)
if (palette->gamma == gamma)
return;
palette->gamma = gamma;
/* recompute the gamma map */
gamma = 1.0f / gamma;
for (index = 0; index < 256; index++)
@ -590,7 +590,7 @@ float palette_entry_get_contrast(palette_t *palette, UINT32 index)
void palette_group_set_brightness(palette_t *palette, UINT32 group, float brightness)
{
int index;
/* convert incoming value to normalized result */
brightness = (brightness - 1.0f) * 256.0f;
@ -723,8 +723,8 @@ static void update_adjusted_color(palette_t *palette, UINT32 group, UINT32 index
rgb_t adjusted;
/* compute the adjusted value */
adjusted = adjust_palette_entry(palette->entry_color[index],
palette->group_bright[group] + palette->brightness,
adjusted = adjust_palette_entry(palette->entry_color[index],
palette->group_bright[group] + palette->brightness,
palette->group_contrast[group] * palette->entry_contrast[index] * palette->contrast,
palette->gamma_map);

2
src/mame/audio/cinemat.c
View File

@ -1559,7 +1559,7 @@ MACHINE_DRIVER_START( demon_sound )
MDRV_CPU_CONFIG(daisy_chain)
MDRV_CPU_PROGRAM_MAP(demon_sound_map,0)
MDRV_CPU_IO_MAP(demon_sound_ports,0)
MDRV_Z80CTC_ADD("ctc", demon_z80ctc_interface)
MDRV_MACHINE_RESET(demon_sound)

6
src/mame/drivers/8080bw.c
View File

@ -228,11 +228,11 @@ static MACHINE_DRIVER_START( invadpt2 )
MDRV_IMPORT_FROM(mw8080bw_root)
MDRV_CPU_MODIFY("main")
MDRV_CPU_IO_MAP(invadpt2_io_map,0)
/* 60 Hz signal clocks two LS161. Ripple carry will */
/* reset circuit, if LS161 not cleared before. */
MDRV_WATCHDOG_VBLANK_INIT(255)
MDRV_WATCHDOG_VBLANK_INIT(255)
/* video hardware */
MDRV_VIDEO_UPDATE(invadpt2)

2
src/mame/drivers/astrocde.c
View File

@ -1461,7 +1461,7 @@ static MACHINE_DRIVER_START( tenpindx )
MDRV_CPU_CONFIG(tenpin_daisy_chain)
MDRV_CPU_PROGRAM_MAP(tenpin_sub_map,0)
MDRV_CPU_IO_MAP(tenpin_sub_io_map,0)
MDRV_Z80CTC_ADD("ctc", ctc_intf)
/* sound hardware */

2
src/mame/drivers/dlair.c
View File

@ -701,7 +701,7 @@ static MACHINE_DRIVER_START( dlair_base )
MDRV_CPU_PROGRAM_MAP(dlus_map,0)
MDRV_CPU_VBLANK_INT("main", vblank_callback)
MDRV_CPU_PERIODIC_INT(irq0_line_hold, (double)MASTER_CLOCK_US/8/16/16/16/16)
MDRV_MACHINE_START(dlair)
MDRV_MACHINE_RESET(dlair)

2
src/mame/drivers/expro02.c
View File

@ -1,4 +1,4 @@
/*
/*
Kaneko EXPRO-02 board

2
src/mame/drivers/mcr.c
View File

@ -532,7 +532,7 @@ static READ8_HANDLER( nflfoot_ip2_r )
static WRITE8_HANDLER( nflfoot_op4_w )
{
const device_config *sio = devtag_get_device(machine, Z80SIO, "ipu_sio");
/* bit 7 = J3-7 on IPU board = /RXDA on SIO */
logerror("%04X:op4_w(%d%d%d)\n", activecpu_get_pc(), (data >> 7) & 1, (data >> 6) & 1, (data >> 5) & 1);

2
src/mame/drivers/mcr3.c
View File

@ -1055,7 +1055,7 @@ static MACHINE_DRIVER_START( mcr3_base )
MDRV_CPU_ADD("main", Z80, MASTER_CLOCK/4)
MDRV_CPU_CONFIG(mcr_daisy_chain)
MDRV_CPU_VBLANK_INT_HACK(mcr_interrupt,2)
MDRV_Z80CTC_ADD("ctc", mcr_ctc_intf)
MDRV_WATCHDOG_VBLANK_INIT(16)

30
src/mame/drivers/merit.c
View File

@ -9,9 +9,9 @@
TODO:
- add flipscreen according to schematics
- pitboss: dip switches
- pitboss: dip switches
- general - add named output notifiers
Notes: it's important that "user1" is 0xa0000 bytes with empty space filled
with 0xff, because the built-in roms test checks how many question roms
the games has and the type of each one.
@ -62,7 +62,7 @@ static MACHINE_START(merit)
{
question_address = 0;
ram_palette = auto_malloc(RAM_PALETTE_SIZE);
state_save_register_global_pointer(ram_palette, RAM_PALETTE_SIZE);
state_save_register_global(lscnblk);
state_save_register_global(extra_video_bank_bit);
@ -154,13 +154,13 @@ static READ8_HANDLER( palette_r )
static WRITE8_HANDLER( palette_w )
{
int co;
video_screen_update_now(machine->primary_screen);
data &= 0x0f;
co = ((ram_attr[offset] & 0x7F) << 3) | (offset & 0x07);
ram_palette[co] = data;
}
@ -177,7 +177,7 @@ static MC6845_BEGIN_UPDATE( begin_update )
bit2 = BIT(i,2);
pens[i] = MAKE_RGB(dim*bit0, dim*bit1, dim*bit2);
}
return pens;
}
@ -189,12 +189,12 @@ static MC6845_UPDATE_ROW( update_row )
pen_t *pens = (pen_t *)param;
UINT8 *gfx[2];
UINT16 x = 0;
int rlen;
int rlen;
gfx[0] = memory_region(device->machine, "gfx1");
gfx[1] = memory_region(device->machine, "gfx2");
rlen = memory_region_length(device->machine, "gfx2");
//ma = ma ^ 0x7ff;
for (cx = 0; cx < x_count; cx++)
{
@ -220,7 +220,7 @@ static MC6845_UPDATE_ROW( update_row )
}
else
col |= 0x03;
col = ram_palette[col & 0x3ff];
*BITMAP_ADDR32(bitmap, y, x) = pens[col ? col : (lscnblk ? 8 : 0)];
@ -319,7 +319,7 @@ static ADDRESS_MAP_START( trvwhiz_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4c00, 0x4cff) AM_READWRITE(questions_r, high_offset_w)
AM_RANGE(0x5400, 0x54ff) AM_WRITE(low_offset_w)
AM_RANGE(0x5800, 0x58ff) AM_WRITE(med_offset_w)
AM_RANGE(0x6000, 0x67ff) AM_RAM
AM_RANGE(0x6000, 0x67ff) AM_RAM
AM_RANGE(0xa000, 0xa003) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc000, 0xc003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xe000, 0xe000) AM_DEVWRITE(MC6845, "crtc", mc6845_address_w)
@ -337,7 +337,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( phrcraze_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xc00c, 0xc00f) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
@ -358,7 +358,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tictac_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_RAM
AM_RANGE(0x8000, 0x9fff) AM_RAM
AM_RANGE(0xc004, 0xc007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
@ -379,7 +379,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( trvwhziv_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xc004, 0xc007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
@ -877,7 +877,7 @@ static const ay8910_interface merit_ay8912_interface =
static MACHINE_DRIVER_START( pitboss )
MDRV_CPU_ADD("main",Z80, CPU_CLOCK)
MDRV_CPU_ADD("main",Z80, CPU_CLOCK)
MDRV_CPU_PROGRAM_MAP(pitboss_map,0)
MDRV_CPU_IO_MAP(trvwhiz_io_map,0)
@ -886,7 +886,7 @@ static MACHINE_DRIVER_START( pitboss )
MDRV_MACHINE_START(merit)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
MDRV_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 512, 0, 512, 256, 0, 256) /* temporary, CRTC will configure screen */

2
src/mame/drivers/nbmj9195.c
View File

@ -3656,7 +3656,7 @@ static MACHINE_DRIVER_START( NBMJDRV1 )
MDRV_CPU_CONFIG(daisy_chain_sound)
MDRV_CPU_PROGRAM_MAP(sound_readmem, sound_writemem)
MDRV_CPU_IO_MAP(sound_readport, sound_writeport)
MDRV_Z80CTC_ADD("main_ctc", ctc_intf_main)
MDRV_Z80CTC_ADD("audio_ctc", ctc_intf_audio)

294
src/mame/drivers/neodrvr.c
View File

@ -344,12 +344,12 @@ INPUT_PORTS_END
/******************************************************************************
The current Neo-Geo MVS system set (SFIX/SM1/000-LO) used is from a NEO-MVH MV1FS board.
Other boards (MV1xx / MV2x / MV4 /MV6) other system sets?
Zoom ROM (LO) 128K TC531000CP 1x 128Kx8 Zoom look-up table ROM
Fix ROM (SFIX) 128K 27C1000 1x 128Kx8 Text layer graphics ROM
Sound ROM (SM1) 128K 27C1000/23C1000 1x 128Kx8 Z80 program ROM
The current Neo-Geo MVS system set (SFIX/SM1/000-LO) used is from a NEO-MVH MV1FS board.
Other boards (MV1xx / MV2x / MV4 /MV6) other system sets?
Zoom ROM (LO) 128K TC531000CP 1x 128Kx8 Zoom look-up table ROM
Fix ROM (SFIX) 128K 27C1000 1x 128Kx8 Text layer graphics ROM
Sound ROM (SM1) 128K 27C1000/23C1000 1x 128Kx8 Z80 program ROM
******************************************************************************/
@ -460,157 +460,157 @@ INPUT_PORTS_END
/***************************************************************************
Neo-Geo game pcb infos:
=======================
Neo-Geo game pcb infos:
=======================
The Neo-Geo games for AES (home) and MVS (arcade) systems are cartridge based.
The Neo-Geo games for AES (home) and MVS (arcade) systems are cartridge based.
Each cartridge consists of two pcb's: CHA and PROG.
Each cartridge consists of two pcb's: CHA and PROG.
CHA pcb contains gfx data ('C' - rom), text layer data ('S' - rom) and sound driver ('M' - rom).
PROG pcb contains sample data ('V' - rom) and program code ('P' - rom).
CHA pcb contains gfx data ('C' - rom), text layer data ('S' - rom) and sound driver ('M' - rom).
PROG pcb contains sample data ('V' - rom) and program code ('P' - rom).
On most pcb's various custom/protection chips can also be found:
On most pcb's various custom/protection chips can also be found:
CHA:
. NEO-273
. NEO-CMC
. NEO-ZMC
. NEO-ZMC2
. PRO-CT0
. SNK-9201
CHA:
. NEO-273
. NEO-CMC
. NEO-ZMC
. NEO-ZMC2
. PRO-CT0
. SNK-9201
PROG:
. 0103 (QFP144)
. ALTERA (EPM7128SQC100-15)
. NEO-COMA
. NEO-PCM2 (SNK 1999)
. NEO-PCM2 (PLAYMORE 2002)
. NEO-PVC
. NEO-SMA
. PCM
. PRO-CT0
. SNK-9201
PROG:
. 0103 (QFP144)
. ALTERA (EPM7128SQC100-15)
. NEO-COMA
. NEO-PCM2 (SNK 1999)
. NEO-PCM2 (PLAYMORE 2002)
. NEO-PVC
. NEO-SMA
. PCM
. PRO-CT0
. SNK-9201
Known pcb's:
============
Known pcb's:
============
MVS CHA:
-- SNK --
. NEO-MVS CHA-32
. NEO-MVS CHA-8M
. NEO-MVS CHA42G
. NEO-MVS CHA42G-1
. NEO-MVS CHA 42G-2
. NEO-MVS CHA 42G-3
. NEO-MVS CHA42G-3B
. NEO-MVS CHA256
. NEO-MVS CHA256B
. NEO-MVS PSTM CHA136
. NEO-MVS CHA512Y
. NEO-MVS CHAFIO (1999.6.14)
. MVS CHAFIO REV1.0 (KOF-2001)
. NEO-MVS CHAFIO (SNK 2002) - MADE IN KOREA
-- SNKPLAYMORE --
. NEO-MVS CHAFIO (2003.7.24)
MVS CHA:
-- SNK --
. NEO-MVS CHA-32
. NEO-MVS CHA-8M
. NEO-MVS CHA42G
. NEO-MVS CHA42G-1
. NEO-MVS CHA 42G-2
. NEO-MVS CHA 42G-3
. NEO-MVS CHA42G-3B
. NEO-MVS CHA256
. NEO-MVS CHA256B
. NEO-MVS PSTM CHA136
. NEO-MVS CHA512Y
. NEO-MVS CHAFIO (1999.6.14)
. MVS CHAFIO REV1.0 (KOF-2001)
. NEO-MVS CHAFIO (SNK 2002) - MADE IN KOREA
-- SNKPLAYMORE --
. NEO-MVS CHAFIO (2003.7.24)
MVS PROG:
-- SNK --
. NEO-MVS PROG-HERO
. NEO-MVS PROG-EP
. NEO-MVS PROG8M42
. NEO-MVS PROG16
. NEO-MVS PROG42G
. NEO-MVS PROG42G-1
. NEO-MVS PROG-G2
. NEO-MVS PROG 4096
. NEO-MVS PROG 4096 B
. NEO-MVS PROGGSC
. NEO-MVS PROGSM
. NEO-MVS PROGSS3
. NEO-MVS PROGTOP
. NEO-MVS PROGSF1 (1998.6.17)
. NEO-MVS PROGEOP (1999.2.2)
. NEO-MVS PROGLBA (1999.4.12) - LBA-SUB (2000.2.24)
. NEO-MVS PROGBK1
. NEO-MVS PROGBK2 (2000.3.21)
. MVS PROGBK2 REV1.0 (KOF-2001)
. NEO-MVS PROGBK2 (SNK 2002) - MADE IN KOREA
-- SNKPLAYMORE --
. NEO-MVS PROGBK2R (2003.8.26) - NEO-HYCS (2003.9.29)
. NEO-MVS PROGBK3R (2003.9.2) - NEO-HYCS (2003.9.29)
. NEO-MVS PROGBK3S (2003.10.1)
. NEO-MVS PROGBK2S (2003.10.xx)
MVS PROG:
-- SNK --
. NEO-MVS PROG-HERO
. NEO-MVS PROG-EP
. NEO-MVS PROG8M42
. NEO-MVS PROG16
. NEO-MVS PROG42G
. NEO-MVS PROG42G-1
. NEO-MVS PROG-G2
. NEO-MVS PROG 4096
. NEO-MVS PROG 4096 B
. NEO-MVS PROGGSC
. NEO-MVS PROGSM
. NEO-MVS PROGSS3
. NEO-MVS PROGTOP
. NEO-MVS PROGSF1 (1998.6.17)
. NEO-MVS PROGEOP (1999.2.2)
. NEO-MVS PROGLBA (1999.4.12) - LBA-SUB (2000.2.24)
. NEO-MVS PROGBK1
. NEO-MVS PROGBK2 (2000.3.21)
. MVS PROGBK2 REV1.0 (KOF-2001)
. NEO-MVS PROGBK2 (SNK 2002) - MADE IN KOREA
-- SNKPLAYMORE --
. NEO-MVS PROGBK2R (2003.8.26) - NEO-HYCS (2003.9.29)
. NEO-MVS PROGBK3R (2003.9.2) - NEO-HYCS (2003.9.29)
. NEO-MVS PROGBK3S (2003.10.1)
. NEO-MVS PROGBK2S (2003.10.xx)
AES CHA:
-- SNK --
. NEO-AEG CHA-32
. NEO-AEG CHA-8M
. NEO-AEG CHA42G
. NEO-AEG CHA42G-1
. NEO-AEG CHA42G-2B
. NEO-AEG CHA42G-3
. NEO-AEG CHA42G-4
. NEO-AEG CHA256
. NEO-AEG CHA256[B]
. NEO-AEG CHA256RY
. NEO-AEG CHA512Y
. NEO-AEG CHAFIO (1999.8.10)
-- SNKPLAYMORE --
. NEO-AEG CHAFIO (2003.7.24)
AES CHA:
-- SNK --
. NEO-AEG CHA-32
. NEO-AEG CHA-8M
. NEO-AEG CHA42G
. NEO-AEG CHA42G-1
. NEO-AEG CHA42G-2B
. NEO-AEG CHA42G-3
. NEO-AEG CHA42G-4
. NEO-AEG CHA256
. NEO-AEG CHA256[B]
. NEO-AEG CHA256RY
. NEO-AEG CHA512Y
. NEO-AEG CHAFIO (1999.8.10)
-- SNKPLAYMORE --
. NEO-AEG CHAFIO (2003.7.24)
AES PROG:
-- SNK --
. NEO-AEG PROG-NAM
. NEO-AEG PROG-HERO
. NEO-AEG PROG-4A
. NEO-AEG PROG-4B
. NEO-AEG PROG 8M42
. NEO-AEG PROG B
. NEO-AEG PROG16
. NEO-AEG PROG42G
. NEO-AEG PROG42G-COM
. NEO-AEG PROG42G-1
. NEO-AEG PROG-G2
. NEO-AEG PROG4096 B
. NEO-AEG PROGGS
. NEO-AEG PROGTOP2
. NEO-AEG PROGLBA (1999.7.6)
. NEO-AEG PROGRK
. NEO-AEG PROGRKB
. NEO-AEG PROGBK1Y
. NEO-AEG PROGBK1F
-- PLAYMORE --
. NEO-AEG PROGBK2 (2002.4.1)
-- SNKPLAYMORE --
. NEO-AEG PROGBK3R (2003.8.29) - NEO-HYCS (2003.9.29)
. NEO-AEG PROGBK2S (2003.10.16)
AES PROG:
-- SNK --
. NEO-AEG PROG-NAM
. NEO-AEG PROG-HERO
. NEO-AEG PROG-4A
. NEO-AEG PROG-4B
. NEO-AEG PROG 8M42
. NEO-AEG PROG B
. NEO-AEG PROG16
. NEO-AEG PROG42G
. NEO-AEG PROG42G-COM
. NEO-AEG PROG42G-1
. NEO-AEG PROG-G2
. NEO-AEG PROG4096 B
. NEO-AEG PROGGS
. NEO-AEG PROGTOP2
. NEO-AEG PROGLBA (1999.7.6)
. NEO-AEG PROGRK
. NEO-AEG PROGRKB
. NEO-AEG PROGBK1Y
. NEO-AEG PROGBK1F
-- PLAYMORE --
. NEO-AEG PROGBK2 (2002.4.1)
-- SNKPLAYMORE --
. NEO-AEG PROGBK3R (2003.8.29) - NEO-HYCS (2003.9.29)
. NEO-AEG PROGBK2S (2003.10.16)
Cartridge colours:
==================
Cartridge colours:
==================
MVS cartridges were produced in different colours.
Known cartridge colours:
. Black
. Blue
. Green
. Grey
. Red
. Transparent
. Transparent Blue
. Transparent Green
. White
. Yellow
MVS cartridges were produced in different colours.
The above listed only covers SNK / PLAYMORE / SNKPLAYMORE pcb's. There also exists a
wide range of 'bootleg' pcb's.
Known cartridge colours:
. Black
. Blue
. Green
. Grey
. Red
. Transparent
. Transparent Blue
. Transparent Green
. White
. Yellow
The above listed only covers SNK / PLAYMORE / SNKPLAYMORE pcb's. There also exists a
wide range of 'bootleg' pcb's.
Neo-Geo game pcb infos by Johnboy
Neo-Geo game pcb infos by Johnboy
****************************************************************************/
@ -6360,19 +6360,19 @@ ROM_END
/* Jamma PCB sets */
/******************************************************************************
The following Jamma PCB boards are known:
The following Jamma PCB boards are known:
SNK vs. CAPCOM SVC CHAOS (svcpcb)
NEO-MVH MVO 2003.6.5
SNK vs. CAPCOM SVC CHAOS (svcpcb)
NEO-MVH MVO 2003.6.5
SNK vs. CAPCOM SVC CHAOS (svcpcba)
NEO-MVH MVOB 2003.7.9
SNK vs. CAPCOM SVC CHAOS (svcpcba)
NEO-MVH MVOB 2003.7.9
Metal Slug 5
NEO-MVH MVOBR 2003.8.4
Metal Slug 5
NEO-MVH MVOBR 2003.8.4
The King of Fighters 2003
NEO-MVH MVOC 2003.11.3
The King of Fighters 2003
NEO-MVH MVOC 2003.11.3
******************************************************************************/

2
src/mame/drivers/niyanpai.c
View File

@ -875,7 +875,7 @@ static MACHINE_DRIVER_START( niyanpai )
MDRV_CPU_CONFIG(daisy_chain_sound)
MDRV_CPU_PROGRAM_MAP(sound_readmem, sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_Z80CTC_ADD("ctc", ctc_intf)
MDRV_MACHINE_RESET(niyanpai)

2
src/mame/drivers/pipeline.c
View File

@ -378,7 +378,7 @@ static MACHINE_DRIVER_START( pipeline )
MDRV_CPU_ADD("mcu", M68705, 7372800/2)
MDRV_CPU_PROGRAM_MAP(mcu_mem, 0)
MDRV_Z80CTC_ADD( "ctc", ctc_intf )
MDRV_PPI8255_ADD( "ppi8255_0", ppi8255_intf[0] )

2
src/mame/drivers/segaxbd.c
View File

@ -92,7 +92,7 @@ static void update_main_irqs(running_machine *machine)
irq |= 2;
else
cpunum_set_input_line(machine, 0, 2, CLEAR_LINE);
if (vblank_irq_state)
irq |= 4;
else

4
src/mame/machine/mcr.c
View File

@ -412,7 +412,7 @@ MACHINE_RESET( zwackery )
INTERRUPT_GEN( mcr_interrupt )
{
const device_config *ctc = devtag_get_device(machine, Z80CTC, "ctc");
/* CTC line 2 is connected to VBLANK, which is once every 1/2 frame */
/* for the 30Hz interlaced display */
z80ctc_trg2_w(ctc, 0, 1);
@ -431,7 +431,7 @@ INTERRUPT_GEN( mcr_interrupt )
INTERRUPT_GEN( mcr_ipu_interrupt )
{
const device_config *ctc = devtag_get_device(machine, Z80CTC, "ipu_ctc");
/* CTC line 3 is connected to 493, which is signalled once every */
/* frame at 30Hz */
if (cpu_getiloops() == 0)

92
src/mame/machine/snes.c
View File

@ -60,7 +60,7 @@ static struct
/*************************************
Timers
Timers
*************************************/
@ -278,7 +278,7 @@ static TIMER_CALLBACK( snes_hblank_tick )
/*************************************
Input Handlers
Input Handlers
*************************************/
@ -1090,13 +1090,13 @@ WRITE8_HANDLER( snes_w_io )
/*************************************
Memory Handlers
Memory Handlers
*************************************/
/*
There are at least 4 different kind of boards for SNES carts, which we denote with
mode_20, mode_21, mode_22 and mode_25. Below is a layout of the memory for each of
mode_20, mode_21, mode_22 and mode_25. Below is a layout of the memory for each of
them, as described on the SNES dev manual. Notice we mirror ROM at loading time
where necessary (e.g. banks 0x80 to 0xff at address 0x8000 for mode_20).
@ -1105,21 +1105,21 @@ MODE_20
address | | | | | | | |
0xffff ------------------------------------------------------------------------------|
ROM | ROM / | ROM | ROM | ROM / | | 0x00 | 0x40 |
| DSP | | | SRAM? | | to | to |
| DSP | | | SRAM? | | to | to |
0x8000 ----------------------------------------------------------| | 0x3f | 0x7f |
Reserv | | | | W | | |
| | | S | R | m | m |
| | | S | R | m | m |
0x6000 ----------------------------| | DSP / | R | A | i | i |
I/O | Reserv | | A | M | r | r |
0x2000 ----------------------------| | Reserv | M | | r | r |
Low RAM (from 0x7e) | | | | | o | o |
| | | | | r | r |
Low RAM (from 0x7e) | | | | | o | o |
| | | | | r | r |
0x0000 -------------------------------------------------------------------------------
MODE_22 is the same, but banks 0x40 to 0x7e at address 0x000 to 0x7fff contain ROM (of
course mirrored also at 0xc0 to 0xff). Mode 22 is quite similar to the board SHVC-2P3B
shown on SNES Dev manual. It is used also in SDD-1 games (only for the first blocks of
data). DSP data & status can be either at banks 0x20 to 0x40 at address 0x8000 or at
data). DSP data & status can be either at banks 0x20 to 0x40 at address 0x8000 or at
banks 0x60 to 0x6f at address 0x0000.
@ -1128,16 +1128,16 @@ MODE_21
address | | | | | | |
0xffff --------------------------------------------------------------------|
mirror | 0xc0 | | mirror | |
upper half ROM | to | | up half | |
from 0xc0 to 0xff | 0xff | | ROM | |
upper half ROM | to | | up half | |
from 0xc0 to 0xff | 0xff | | ROM | |
0x8000 --------------------------------------| | |---------| |
DSP / | Reserv | SRAM | | W | | |
Reserv | | | m | R | 0x00 | R |
Reserv | | | m | R | 0x00 | R |
0x6000 --------------------------------------| i | A | to | O |
I/O | r | M | 0x3f | M |
I/O | r | M | 0x3f | M |
0x2000 --------------------------------------| r | | mirror | |
Low RAM (from 0x7e) | o | | | |
| r | | | |
Low RAM (from 0x7e) | o | | | |
| r | | | |
0x0000 ---------------------------------------------------------------------
@ -1147,17 +1147,17 @@ the available banks at 0xc0 to 0xff.
banks 0x00 0x20 0x3e 0x40 0x7e 0x80 0xb0 0xc0 0xff
address | | | | | | | |
0xffff ----------------------------------------------------------------------------|
mirror | Last | | | ROM | |
upper half ROM | 0.5Mbits | | | mirror | |
from 0x40 to 0x7e | ROM | ROM | | up half | ROM |
mirror | Last | | | ROM | |
upper half ROM | 0.5Mbits | | | mirror | |
from 0x40 to 0x7e | ROM | ROM | | up half | ROM |
0x8000 -----------------------------------| | |------------------| |
DSP / | Reserv | next | W | Reserv | SRAM | first |
Reserv | | | R | | | |
Reserv | | | R | | | |
0x6000 -----------------------------------| 31 | A |------------------| 32 |
I/O | Mbits | M | 0x00 | Mbits |
I/O | Mbits | M | 0x00 | Mbits |
0x2000 -----------------------------------| | | to | |
Low RAM (from 0x7e) | | | 0x3f | |
| | | mirror | |
Low RAM (from 0x7e) | | | 0x3f | |
| | | mirror | |
0x0000 -----------------------------------------------------------------------------
@ -1373,7 +1373,7 @@ WRITE8_HANDLER( snes_w_bank2 )
}
else
logerror("Attempt to write to reserved address: %X\n", offset + 0x300000);
}
}
/* some dsp1 games use these banks 0x30 to 0x3f at address 0x8000 */
else if ((snes_cart.mode == SNES_MODE_20) && has_dsp1)
DSP1_setDr(data);
@ -1430,7 +1430,7 @@ WRITE8_HANDLER( snes_w_bank6 )
{
if (offset < 0x300000)
snes_w_bank1(machine, offset, data);
else
else
snes_w_bank2(machine, offset - 0x300000, data);
}
else /* Mode 25 has SRAM not mirrored from lower banks */
@ -1439,7 +1439,7 @@ WRITE8_HANDLER( snes_w_bank6 )
{
if (offset < 0x300000)
snes_w_bank1(machine, offset, data);
else
else
snes_w_bank2(machine, offset - 0x300000, data);
}
else if ((offset >= 0x300000) && (snes_cart.sram > 0))
@ -1449,7 +1449,7 @@ WRITE8_HANDLER( snes_w_bank6 )
snes_ram[0xb06000 + (offset & mask)] = data;
}
else /* Area in 0x6000-0x8000 && offset < 0x300000 is Reserved! */
logerror("Attempt to write to reserved address: %X\n", offset + 0x800000);
logerror("Attempt to write to reserved address: %X\n", offset + 0x800000);
}
}
else
@ -1483,7 +1483,7 @@ WRITE8_HANDLER( snes_w_bank7 )
/*************************************
Driver Init
Driver Init
*************************************/
@ -1643,21 +1643,21 @@ DRIVER_INIT( snes )
total_blocks = (memory_region_length(machine, "user3") / 0x8000);
read_blocks = 0;
/* Loading all the data blocks from cart, we only partially cover banks 0x00 to 0x7f. Therefore, we
* have to mirror the blocks until we reach the end. E.g. for a 11Mbits image (44 blocks), we proceed
* as follows:
* 11 Mbits = 8 Mbits (blocks 1->32) + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44).
* Hence, we fill memory up to 16 Mbits (banks 0x00 to 0x3f) mirroring the final part:
* 8 Mbits (blocks 1->32) + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44) + 1 Mbit (blocks 41->44)
* + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44) + 1 Mbit (blocks 41->44).
* And we repeat the same blocks in the second half of the banks (banks 0x40 to 0x7f).
* This is likely what happens in the real SNES as well, because the unit cannot be aware of the exact
* size of data in the cart (procedure confirmed by byuu)
*/
/* Loading all the data blocks from cart, we only partially cover banks 0x00 to 0x7f. Therefore, we
* have to mirror the blocks until we reach the end. E.g. for a 11Mbits image (44 blocks), we proceed
* as follows:
* 11 Mbits = 8 Mbits (blocks 1->32) + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44).
* Hence, we fill memory up to 16 Mbits (banks 0x00 to 0x3f) mirroring the final part:
* 8 Mbits (blocks 1->32) + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44) + 1 Mbit (blocks 41->44)
* + 2 Mbits (blocks 33->40) + 1 Mbit (blocks 41->44) + 1 Mbit (blocks 41->44).
* And we repeat the same blocks in the second half of the banks (banks 0x40 to 0x7f).
* This is likely what happens in the real SNES as well, because the unit cannot be aware of the exact
* size of data in the cart (procedure confirmed by byuu)
*/
/* LoROM carts load data in banks 0x00 to 0x7f at address 0x8000 (actually up to 0x7d, because 0x7e and
* 0x7f are overwritten by WRAM). Each block is also mirrored in banks 0x80 to 0xff (up to 0xff for real)
*/
/* LoROM carts load data in banks 0x00 to 0x7f at address 0x8000 (actually up to 0x7d, because 0x7e and
* 0x7f are overwritten by WRAM). Each block is also mirrored in banks 0x80 to 0xff (up to 0xff for real)
*/
while (read_blocks < 128 && read_blocks < total_blocks)
{
/* Loading data */
@ -1708,10 +1708,10 @@ DRIVER_INIT( snes_hirom )
/* See above for details about the way we fill banks 0x00 to 0x7f */
/* HiROM carts load data in banks 0xc0 to 0xff. Each bank is fully mirrored in banks 0x40 to 0x7f
* (actually up to 0x7d, because 0x7e and 0x7f are overwritten by WRAM). The top half (address
* range 0x8000 - 0xffff) of each bank is also mirrored in banks 0x00 to 0x3f and 0x80 to 0xbf.
*/
/* HiROM carts load data in banks 0xc0 to 0xff. Each bank is fully mirrored in banks 0x40 to 0x7f
* (actually up to 0x7d, because 0x7e and 0x7f are overwritten by WRAM). The top half (address
* range 0x8000 - 0xffff) of each bank is also mirrored in banks 0x00 to 0x3f and 0x80 to 0xbf.
*/
while (read_blocks < 64 && read_blocks < total_blocks)
{
/* Loading data */
@ -1750,7 +1750,7 @@ DRIVER_INIT( snes_hirom )
/*************************************
HDMA
HDMA
*************************************/

2
src/mame/video/gottlieb.c
View File

@ -96,7 +96,7 @@ WRITE8_HANDLER( gottlieb_laserdisc_video_control_w )
/* bit 3 genlock control (1 = show laserdisc image) */
laserdisc_overlay_enable(laserdisc, (data & 0x04) ? TRUE : FALSE);
laserdisc_video_enable(laserdisc, ((data & 0x0c) == 0x0c) ? TRUE : FALSE);
/* configure the palette if the laserdisc is enabled */
transparent0 = (data >> 3) & 1;
gottlieb_paletteram_w(machine, 0, paletteram[0]);

10
src/tools/ldverify.c
View File

@ -233,7 +233,7 @@ static int read_chd(void *file, int frame, bitmap_t *bitmap, INT16 *lsound, INT1
*samples = 0;
for (fieldnum = 0; fieldnum < interlace_factor; fieldnum++)
{
/* make a fake bitmap for this field */
/* make a fake bitmap for this field */
fakebitmap = *bitmap;
fakebitmap.base = BITMAP_ADDR16(&fakebitmap, fieldnum, 0);
fakebitmap.rowpixels *= interlace_factor;
@ -253,7 +253,7 @@ static int read_chd(void *file, int frame, bitmap_t *bitmap, INT16 *lsound, INT1
chderr = chd_read(file, frame * interlace_factor + fieldnum, NULL);
if (chderr != CHDERR_NONE)
return FALSE;
/* account for samples read */
*samples += numsamples;
}
@ -377,7 +377,7 @@ static void verify_video(int frame, bitmap_t *bitmap)
/* remember the frame number */
video_last_frame = framenum;
/* if we've seen a white flag before, but it's not here, warn */
if (video_first_whitefield != -1 && !metadata.white)
printf("%6d.%d: detected frame number but no white flag (WARNING)\n", frame, fieldnum);
@ -392,12 +392,12 @@ static void verify_video(int frame, bitmap_t *bitmap)
video_first_whitefield = field;
printf("%6d.%d: first white flag seen\n", frame, fieldnum);
}
/* if we've seen frame numbers before, but not here, warn */
if (video_last_frame != -1 && (metadata.line1718 & VBI_MASK_CAV_PICTURE) != VBI_CODE_CAV_PICTURE)
printf("%6d.%d: detected white flag but no frame number (WARNING)\n", frame, fieldnum);
}
/* if this is the start of a frame, handle cadence */
if (metadata.white || (metadata.line1718 & VBI_MASK_CAV_PICTURE) == VBI_CODE_CAV_PICTURE)
{

2
src/version.c
View File

@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.127u5 ("__DATE__")";
const char build_version[] = "0.127u6 ("__DATE__")";