diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index db3a00a065b..c1383247490 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -3350,6 +3350,7 @@ files { MAME_DIR .. "src/mame/drivers/saitek_exchess.cpp", MAME_DIR .. "src/mame/drivers/saitek_leonardo.cpp", MAME_DIR .. "src/mame/drivers/saitek_mark5.cpp", + MAME_DIR .. "src/mame/drivers/saitek_minichess.cpp", MAME_DIR .. "src/mame/drivers/saitek_prschess.cpp", MAME_DIR .. "src/mame/drivers/saitek_renaissance.cpp", MAME_DIR .. "src/mame/drivers/saitek_risc2500.cpp", diff --git a/src/mame/drivers/chessmst.cpp b/src/mame/drivers/chessmst.cpp index 1cd0e29c19e..a99b9fb9695 100644 --- a/src/mame/drivers/chessmst.cpp +++ b/src/mame/drivers/chessmst.cpp @@ -386,27 +386,28 @@ void chessmst_state::chessmstdm(machine_config &config) /* ROM definition */ ROM_START( chessmst ) ROM_REGION( 0x2800, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD( "056.bin", 0x0000, 0x0400, CRC(2b90e5d3) SHA1(c47445964b2e6cb11bd1f27e395cf980c97af196) ) - ROM_LOAD( "057.bin", 0x0400, 0x0400, CRC(e666fc56) SHA1(3fa75b82cead81973bea94191a5c35f0acaaa0e6) ) - ROM_LOAD( "058.bin", 0x0800, 0x0400, CRC(6a17fbec) SHA1(019051e93a5114477c50eaa87e1ff01b02eb404d) ) - ROM_LOAD( "059.bin", 0x0c00, 0x0400, CRC(e96e3d07) SHA1(20fab75f206f842231f0414ebc473ce2a7371e7f) ) - ROM_LOAD( "060.bin", 0x1000, 0x0400, CRC(0e31f000) SHA1(daac924b79957a71a4b276bf2cef44badcbe37d3) ) - ROM_LOAD( "061.bin", 0x1400, 0x0400, CRC(69ad896d) SHA1(25d999b59d4cc74bd339032c26889af00e64df60) ) - ROM_LOAD( "062.bin", 0x1800, 0x0400, CRC(c42925fe) SHA1(c42d8d7c30a9b6d91ac994cec0cc2723f41324e9) ) - ROM_LOAD( "063.bin", 0x1c00, 0x0400, CRC(86be4cdb) SHA1(741f984c15c6841e227a8722ba30cf9e6b86d878) ) - ROM_LOAD( "064.bin", 0x2000, 0x0400, CRC(e82f5480) SHA1(38a939158052f5e6484ee3725b86e522541fe4aa) ) - ROM_LOAD( "065.bin", 0x2400, 0x0400, CRC(4ec0e92c) SHA1(0b748231a50777391b04c1778750fbb46c21bee8) ) + ROM_LOAD("056.bin", 0x0000, 0x0400, CRC(2b90e5d3) SHA1(c47445964b2e6cb11bd1f27e395cf980c97af196) ) + ROM_LOAD("057.bin", 0x0400, 0x0400, CRC(e666fc56) SHA1(3fa75b82cead81973bea94191a5c35f0acaaa0e6) ) + ROM_LOAD("058.bin", 0x0800, 0x0400, CRC(6a17fbec) SHA1(019051e93a5114477c50eaa87e1ff01b02eb404d) ) + ROM_LOAD("059.bin", 0x0c00, 0x0400, CRC(e96e3d07) SHA1(20fab75f206f842231f0414ebc473ce2a7371e7f) ) + ROM_LOAD("060.bin", 0x1000, 0x0400, CRC(0e31f000) SHA1(daac924b79957a71a4b276bf2cef44badcbe37d3) ) + ROM_LOAD("061.bin", 0x1400, 0x0400, CRC(69ad896d) SHA1(25d999b59d4cc74bd339032c26889af00e64df60) ) + ROM_LOAD("062.bin", 0x1800, 0x0400, CRC(c42925fe) SHA1(c42d8d7c30a9b6d91ac994cec0cc2723f41324e9) ) + ROM_LOAD("063.bin", 0x1c00, 0x0400, CRC(86be4cdb) SHA1(741f984c15c6841e227a8722ba30cf9e6b86d878) ) + ROM_LOAD("064.bin", 0x2000, 0x0400, CRC(e82f5480) SHA1(38a939158052f5e6484ee3725b86e522541fe4aa) ) + ROM_LOAD("065.bin", 0x2400, 0x0400, CRC(4ec0e92c) SHA1(0b748231a50777391b04c1778750fbb46c21bee8) ) ROM_END ROM_START( chessmsta ) ROM_REGION( 0x2800, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD( "2764.bin", 0x0000, 0x2000, CRC(6be28876) SHA1(fd7d77b471e7792aef3b2b3f7ff1de4cdafc94c9) ) - ROM_LOAD( "u2616bm108.bin", 0x2000, 0x0800, BAD_DUMP CRC(6e69ace3) SHA1(e099b6b6cc505092f64b8d51ab9c70aa64f58f70) ) + ROM_LOAD("2764.bin", 0x0000, 0x2000, CRC(6be28876) SHA1(fd7d77b471e7792aef3b2b3f7ff1de4cdafc94c9) ) + ROM_LOAD("u2616bm108.bin", 0x2000, 0x0800, BAD_DUMP CRC(6e69ace3) SHA1(e099b6b6cc505092f64b8d51ab9c70aa64f58f70) ) ROM_END ROM_START( chessmstdm ) ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD("cmd_bm002_bm201.bin", 0x0000, 0x4000, CRC(47858079) SHA1(eeae1126b514e4853d056690e72e7f5c6dfb3008)) + ROM_LOAD("002", 0x0000, 0x2000, CRC(bed56fef) SHA1(dad0f8ddbd9b10013a5bdcc09ee6db39cfb26b78) ) // U2364D45 + ROM_LOAD("201", 0x2000, 0x2000, CRC(c9dc7f29) SHA1(a3e1b66d0e15ffe83a9165d15c4a83013852c2fe) ) // " ROM_END diff --git a/src/mame/drivers/cxg_scptchess.cpp b/src/mame/drivers/cxg_scptchess.cpp index 5e1b3092495..875699454c4 100644 --- a/src/mame/drivers/cxg_scptchess.cpp +++ b/src/mame/drivers/cxg_scptchess.cpp @@ -19,13 +19,13 @@ Hardware notes: Sensor Computachess: - PCB label WA 001 600 002 -- 44801A50 MCU @ ~400kHz +- Hitachi 44801A50 MCU @ ~400kHz - buzzer, 16 leds, button sensors chessboard Portachess II: - PCB label CXG223-600-001 (main pcb), CXG 211 600 101 (led pcb taken from Advanced Star Chess, extra led row unused here) -- HD44801C89 MCU @ ~400kHz (serial 202: from Portachess 1985 version) +- Hitachi HD44801C89 MCU @ ~400kHz (serial 202: from Portachess 1985 version) - rest same as above HD44801A50 used in: diff --git a/src/mame/drivers/fidel_chesster.cpp b/src/mame/drivers/fidel_chesster.cpp index e98b4df7a1a..448d26692f2 100644 --- a/src/mame/drivers/fidel_chesster.cpp +++ b/src/mame/drivers/fidel_chesster.cpp @@ -83,9 +83,9 @@ private: DECLARE_WRITE8_MEMBER(control_w); DECLARE_READ8_MEMBER(input_r); - int m_numbanks; - u8 m_speech_bank; - u8 m_select; + int m_numbanks = 0; + u8 m_speech_bank = 0; + u8 m_select = 0; }; void chesster_state::init_chesster() @@ -96,10 +96,6 @@ void chesster_state::init_chesster() void chesster_state::machine_start() { - // zerofill - m_speech_bank = 0; - m_select = 0; - // register for savestates save_item(NAME(m_speech_bank)); save_item(NAME(m_select)); diff --git a/src/mame/drivers/hh_hmcs40.cpp b/src/mame/drivers/hh_hmcs40.cpp index c2383257f99..d7708092ffd 100644 --- a/src/mame/drivers/hh_hmcs40.cpp +++ b/src/mame/drivers/hh_hmcs40.cpp @@ -65,15 +65,16 @@ @A88 HD38820 1984, Bandai Pair Match (PT-460) (1/2) @A89 HD38820 1984, Bandai Pair Match (PT-460) (2/2) - *A34 HD44801 1981, Scisys Mini Chess / Graduate Chess / Chesspartner 3000/4000 + A34 HD44801 1981, SciSys Mini Chess -> saitek_minichess.cpp A50 HD44801 1981, CXG Sensor Computachess -> cxg_scptchess.cpp A75 HD44801 1982, Alpha 8201 protection MCU -> machine/alpha8201.* - *A85 HD44801 1982, Scisys Travel Sensor / Travel Mate / Chesspartner 5000/6000 + *A85 HD44801 1982, SciSys Travel Sensor / Travel Mate / Chesspartner 5000/6000 + *A92 HD44801 1982, SciSys Play Bridge Computer B35 HD44801 1983, Alpha 8302 protection MCU (see 8201) B42 HD44801 1983, Alpha 8303 protection MCU (see 8201) *B43 HD44801 1983, Alpha 8304 protection MCU (see 8201) C57 HD44801 1985, Alpha 8505 protection MCU (see 8201) - C89 HD44801 1985, CXG Portachess II / Computachess IV -> cxg_scptchess.cpp + C89 HD44801 1985, CXG Portachess (1985 version) -> cxg_scptchess.cpp *A86 HD44820 1983, Chess King Pocket Micro *B63 HD44820 1985, CXG Pocket Chess (12 buttons) diff --git a/src/mame/drivers/mephisto_berlin.cpp b/src/mame/drivers/mephisto_berlin.cpp index 72c9bbf40e1..6e3a9a479c3 100644 --- a/src/mame/drivers/mephisto_berlin.cpp +++ b/src/mame/drivers/mephisto_berlin.cpp @@ -128,9 +128,11 @@ INPUT_PORTS_END void berlin_state::berlin(machine_config &config) { /* basic machine hardware */ - M68000(config, m_maincpu, 12_MHz_XTAL); + M68000(config, m_maincpu, 12.288_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &berlin_state::berlin_mem); - m_maincpu->set_periodic_int(FUNC(berlin_state::irq2_line_hold), attotime::from_hz(750)); + + const attotime irq_period = attotime::from_hz(12.288_MHz_XTAL / 0x4000); // 750Hz + m_maincpu->set_periodic_int(FUNC(berlin_state::irq2_line_hold), irq_period); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); ADDRESS_MAP_BANK(config, "nvram_map").set_map(&berlin_state::nvram_map).set_options(ENDIANNESS_BIG, 8, 13); diff --git a/src/mame/drivers/mephisto_modular.cpp b/src/mame/drivers/mephisto_modular.cpp index 3ad6a8e9737..da7625f4977 100644 --- a/src/mame/drivers/mephisto_modular.cpp +++ b/src/mame/drivers/mephisto_modular.cpp @@ -8,43 +8,54 @@ Hegener + Glaser Mephisto chesscomputers with plugin modules After Roma, H+G started naming the different versions 16 Bit/32 Bit instead of 68000/68020. With Genius and the TM versions, they still applied "68030". -Almeria 16 Bit 12MHz -Almeria 32 Bit 12MHz -Portorose 16 Bit 12MHz -Portorose 32 Bit 12MHz -Lyon 16 Bit 12MHz -Lyon 32 Bit 12MHz -Vancouver 16 Bit 12MHz -Vancouver 32 Bit 12MHz -Genius 68030 33.3330MHz - The London program (1994 competition) is not a dedicated module, but an EPROM upgrade released by Richard Lang for Almeria, Lyon, Portorose and Vancouver modules, and also -available as upgrades for Berlin/Berlin Pro and Genius. -No Mephisto modules were released anymore after Saitek took over H+G, engine is the -same as Saitek's 1996 Mephisto London 68030 (limited release TM version). +available as upgrades for Berlin/Berlin Pro and Genius. The engine is the same as +Saitek's 1996 Mephisto London 68030 (limited release TM version). + +Hardware notes: + +Almeria 16 Bit, Lyon 16 Bit: +- MC68HC000FN12, 12.288MHz XTAL +- 128KB ROM (2*27C512) +- 512KB RAM (4*TC514256AP-10, or equivalent) + +Portorose 32 Bit: +- MC68020RC12E, 12.288MHz XTAL +- 128KB ROM (TC5710000-20) +- 1MB RAM (8*TC514256AP-70) + +Genius 68030: +- M68EC030RP40B, 33.3330MHz XTAL, 6.144MHz XTAL +- 256KB ROM (M27C2001) +- 512+256 KB RAM (TC518512PL-10, 8*TC55465P-20) + +Display Modul: +- HD44780, 2-line LCD display +- 8KB RAM (TC5565APL-15L), battery +- piezo speaker For the dedicated tournament machines, see mephisto_modular_tm.cpp -TODO: -- match I/S= diag speed test with real hardware (good test for proper waitstates), - especially gen32 is way too fast when comparing sound pitch - Undocumented buttons: - holding ENTER and LEFT cursor on boot runs diagnostics - holding CLEAR on boot will clear the battery backed RAM +TODO: +- match I/S= diag speed test with real hardware (good test for proper waitstates), + especially gen32 is way too fast when comparing sound pitch + =============================================================================== Bavaria piece recognition board: -------------------------------------------------- + _______________________________________________ | | | 74HC21 74HC74 74HC238 | | 74HC4040 74HC574 74HC173 74HC374 | | ROM XTAL 74HC368 74HC374 | | 74HC4024 74HC32 74HC139 74HC374 | -| | -------------------------------------------------- +|_______________________________________________| + XTAL = 7.37280MHz ROM = TC57256AD-12, sine table (not used in MAME) @@ -391,7 +402,7 @@ INPUT_PORTS_END void mmodular_state::alm16(machine_config &config) { /* basic machine hardware */ - M68000(config, m_maincpu, 12_MHz_XTAL); + M68000(config, m_maincpu, 12.288_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &mmodular_state::alm16_mem); m_maincpu->set_periodic_int(FUNC(mmodular_state::irq2_line_hold), attotime::from_hz(600)); @@ -426,9 +437,11 @@ void mmodular_state::alm32(machine_config &config) alm16(config); /* basic machine hardware */ - M68020(config.replace(), m_maincpu, 12_MHz_XTAL); + M68020(config.replace(), m_maincpu, 12.288_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &mmodular_state::alm32_mem); - m_maincpu->set_periodic_int(FUNC(mmodular_state::irq2_line_hold), attotime::from_hz(750)); + + const attotime irq_period = attotime::from_hz(12.288_MHz_XTAL / 0x4000); // 750Hz + m_maincpu->set_periodic_int(FUNC(mmodular_state::irq2_line_hold), irq_period); config.set_default_layout(layout_mephisto_alm32); } @@ -450,7 +463,7 @@ void mmodular_state::gen32(machine_config &config) van32(config); /* basic machine hardware */ - M68EC030(config.replace(), m_maincpu, 33.333_MHz_XTAL); // M68EC030RP40B + M68EC030(config.replace(), m_maincpu, 33.333_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &mmodular_state::gen32_mem); const attotime irq_period = attotime::from_hz(6.144_MHz_XTAL / 0x4000); // through 4060, 375Hz @@ -473,8 +486,8 @@ ROM_END ROM_START( alm16 ) // U013 65CE 2FCE ROM_REGION16_BE( 0x20000, "maincpu", 0 ) - ROM_LOAD16_BYTE("alm16eve.bin", 0x00000, 0x10000, CRC(ee5b6ec4) SHA1(30920c1b9e16ffae576da5afa0b56da59ada3dbb) ) - ROM_LOAD16_BYTE("alm16odd.bin", 0x00001, 0x10000, CRC(d0be4ee4) SHA1(d36c074802d2c9099cd44e75f9de3fc7d1fd9908) ) + ROM_LOAD16_BYTE("almeria_16bit_v013_even", 0x00000, 0x10000, CRC(ee5b6ec4) SHA1(30920c1b9e16ffae576da5afa0b56da59ada3dbb) ) + ROM_LOAD16_BYTE("almeria_16bit_v013_odd", 0x00001, 0x10000, CRC(d0be4ee4) SHA1(d36c074802d2c9099cd44e75f9de3fc7d1fd9908) ) ROM_END ROM_START( port32 ) // V103 C734 1CD7 @@ -512,8 +525,8 @@ ROM_END ROM_START( lyon16 ) // V207 EC82 5805 ROM_REGION16_BE( 0x20000, "maincpu", 0 ) - ROM_LOAD16_BYTE("lyon16ev.bin", 0x00000, 0x10000, CRC(497bd41a) SHA1(3ffefeeac694f49997c10d248ec6a7aa932898a4) ) - ROM_LOAD16_BYTE("lyon16od.bin", 0x00001, 0x10000, CRC(f9de3f54) SHA1(4060e29566d2f40122ccde3c1f84c94a9c1ed54f) ) + ROM_LOAD16_BYTE("lyon_16bit_even_v207", 0x00000, 0x10000, CRC(497bd41a) SHA1(3ffefeeac694f49997c10d248ec6a7aa932898a4) ) + ROM_LOAD16_BYTE("lyon_16bit_odd_v207", 0x00001, 0x10000, CRC(f9de3f54) SHA1(4060e29566d2f40122ccde3c1f84c94a9c1ed54f) ) ROM_REGION( 0x8000, "bavaria", 0 ) ROM_LOAD("sinus_15_bavaria", 0x0000, 0x8000, CRC(84421306) SHA1(5aab13bf38d80a4233c11f6eb5657f2749c14547) ) @@ -529,8 +542,8 @@ ROM_END ROM_START( van16 ) // V309 C8F3 18D3 ROM_REGION16_BE( 0x40000, "maincpu", 0 ) - ROM_LOAD16_BYTE("va16even.bin", 0x00000, 0x20000, CRC(e87602d5) SHA1(90cb2767b4ae9e1b265951eb2569b9956b9f7f44) ) - ROM_LOAD16_BYTE("va16odd.bin", 0x00001, 0x20000, CRC(585f3bdd) SHA1(90bb94a12d3153a91e3760020e1ea2a9eaa7ec0a) ) + ROM_LOAD16_BYTE("vancouver_16_even_v309", 0x00000, 0x20000, CRC(e87602d5) SHA1(90cb2767b4ae9e1b265951eb2569b9956b9f7f44) ) + ROM_LOAD16_BYTE("vancouver_16_odd_v309", 0x00001, 0x20000, CRC(585f3bdd) SHA1(90bb94a12d3153a91e3760020e1ea2a9eaa7ec0a) ) ROM_REGION( 0x8000, "bavaria", 0 ) ROM_LOAD("sinus_15_bavaria", 0x0000, 0x8000, CRC(84421306) SHA1(5aab13bf38d80a4233c11f6eb5657f2749c14547) ) diff --git a/src/mame/drivers/saitek_leonardo.cpp b/src/mame/drivers/saitek_leonardo.cpp index 05bab3145ec..b81413f3bdf 100644 --- a/src/mame/drivers/saitek_leonardo.cpp +++ b/src/mame/drivers/saitek_leonardo.cpp @@ -42,10 +42,12 @@ Expansion modules released: - Sparc (SPARClite, Spracklen's) TODO: -- game locks up when you get checkmated -- 1.4 version: It locks up a short time after you make an input error (eg. on - computer's turn, enter the wrong move so it will give a low pitch error beep, - then hold INS to fast forward and it will lock up) +- It locks up a short time after you make an input error (eg. on computer's + turn, enter the wrong move so it will give a low pitch error beep, then hold + INS to fast-forward and it will lock up) - happens with leonardoa too, but + after a longer delay. At first glance, it looks like it's caused by inaccurate + 6801 timer emulation. It also locks up when you get checkmated, seems to be + the same problem as above. - OSA module support (softwarelist, devices/bus) - OSA PC link (probably uses MCU serial interface) - unsure about white/black/check/end/module/comm leds @@ -192,7 +194,7 @@ void leo_state::p2_w(u8 data) u8 leo_state::p5_r() { // ? - return 0xff; + return 0xff ^ 0x10; } void leo_state::p5_w(u8 data) diff --git a/src/mame/drivers/saitek_minichess.cpp b/src/mame/drivers/saitek_minichess.cpp new file mode 100644 index 00000000000..8c60779f436 --- /dev/null +++ b/src/mame/drivers/saitek_minichess.cpp @@ -0,0 +1,217 @@ +// license:BSD-3-Clause +// copyright-holders:hap +// thanks-to:Sean Riddle +/****************************************************************************** + +SciSys Mini Chess, pocket calculator style chesscomputer +It's the first chess program on HMCS40, the engine was written by Mark Taylor. + +Hardware notes: +- Hitachi 44801A34 MCU @ ~400kHz +- 4-digit LCD screen + +Excluding resellers with same title, this MCU was used in: +- SciSys Mini Chess - 1st use +- SciSys Junior Chess +- SciSys Graduate Chess +- SciSys Chess Partner 3000 +- SciSys Chess Partner 4000 + +On CP3000/4000 they added a level slider. This will oscillate the level switch +input pin, so the highest level setting is the same as level 2 on Mini Chess. +It works on the old A34 MCU because the game keeps reading D0 while computing. + +******************************************************************************/ + +#include "emu.h" +#include "cpu/hmcs40/hmcs40.h" +#include "machine/timer.h" +#include "sound/dac.h" +#include "sound/volt_reg.h" +#include "video/pwm.h" +#include "speaker.h" + +// internal artwork +#include "saitek_minichess.lh" // clickable + + +namespace { + +class mini_state : public driver_device +{ +public: + mini_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_display(*this, "display"), + m_comp_timer(*this, "comp_timer"), + m_computing(*this, "computing"), + m_inputs(*this, "IN.%u", 0) + { } + + void smchess(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + // devices/pointers + required_device m_maincpu; + required_device m_display; + required_device m_comp_timer; + output_finder<> m_computing; + required_ioport_array<5> m_inputs; + + TIMER_DEVICE_CALLBACK_MEMBER(computing) { m_computing = 1; } + + void update_display(); + template void seg_w(u8 data); + void mux_w(u16 data); + u16 input_r(offs_t offset); + + u8 m_inp_mux = 0; + u8 m_lcd_select = 0; + u8 m_lcd_data = 0; +}; + +void mini_state::machine_start() +{ + m_computing.resolve(); + + // register for savestates + save_item(NAME(m_inp_mux)); + save_item(NAME(m_lcd_select)); + save_item(NAME(m_lcd_data)); +} + + + +/****************************************************************************** + I/O +******************************************************************************/ + +void mini_state::update_display() +{ + u8 data = (m_lcd_select & 1) ? (m_lcd_data ^ 0xff) : m_lcd_data; + data = bitswap<8>(data,2,4,6,7,5,1,0,3); + m_display->matrix(m_lcd_select >> 2, data); +} + +template +void mini_state::seg_w(u8 data) +{ + // R2x,R3x: lcd segment data + m_lcd_data = (m_lcd_data & ~(0xf << (N*4))) | (data << (N*4)); + update_display(); +} + +void mini_state::mux_w(u16 data) +{ + // D9-D12: input mux + m_inp_mux = ~data >> 9 & 0xf; + + // D3,D5-D8: CD4066 to LCD + u8 sel = data >> 3 & 0x3f; + + // "computing" segment goes on when LCD isn't driven + if (~m_lcd_select & sel & 1) + { + m_computing = 0; + m_comp_timer->adjust(attotime::from_msec(100)); + } + + m_lcd_select = sel; + update_display(); +} + +u16 mini_state::input_r(offs_t offset) +{ + // D0,D2: switches + u16 data = m_inputs[4]->read() & 5; + + // D13-D15: multiplexed inputs + for (int i = 0; i < 4; i++) + if (BIT(m_inp_mux, i)) + data |= m_inputs[i]->read() << 13; + + return ~data; +} + + + +/****************************************************************************** + Input Ports +******************************************************************************/ + +static INPUT_PORTS_START( smchess ) + PORT_START("IN.0") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_A) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("A 1 / Pawn") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_B) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("B 2 / Knight") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_C) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("C 3 / Bishop") + + PORT_START("IN.1") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_D) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("D 4 / Rook") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("E 5 / Queen") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_F) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("F 6 / King") + + PORT_START("IN.2") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("G 7 / White") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("H 8 / Black") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_O) PORT_NAME("FP") // find position + + PORT_START("IN.3") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("New Game") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_DEL) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("CE") // clear entry + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("Enter") + + PORT_START("IN.4") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_TOGGLE PORT_CODE(KEYCODE_L) PORT_NAME("Level") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_TOGGLE PORT_CODE(KEYCODE_M) PORT_NAME("MM") // multi move +INPUT_PORTS_END + + + +/****************************************************************************** + Machine Configs +******************************************************************************/ + +void mini_state::smchess(machine_config &config) +{ + /* basic machine hardware */ + HD44801(config, m_maincpu, 400000); + m_maincpu->write_r<2>().set(FUNC(mini_state::seg_w<0>)); + m_maincpu->write_r<3>().set(FUNC(mini_state::seg_w<1>)); + m_maincpu->write_d().set(FUNC(mini_state::mux_w)); + m_maincpu->read_d().set(FUNC(mini_state::input_r)); + + /* video hardware */ + PWM_DISPLAY(config, m_display).set_size(4, 8); + m_display->set_segmask(0xf, 0x7f); + m_display->set_refresh(attotime::from_hz(30)); + + TIMER(config, m_comp_timer).configure_generic(FUNC(mini_state::computing)); + + config.set_default_layout(layout_saitek_minichess); +} + + + +/****************************************************************************** + ROM Definitions +******************************************************************************/ + +ROM_START( smchess ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD("44801a34_proj_t", 0x0000, 0x2000, CRC(be71f1c0) SHA1(6b4d5c8f8491c82bdec1938bd83c14e826ff3e30) ) +ROM_END + +} // anonymous namespace + + + +/****************************************************************************** + Drivers +******************************************************************************/ + +// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS +CONS( 1981, smchess, 0, 0, smchess, smchess, mini_state, empty_init, "SciSys", "Mini Chess", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/drivers/saitek_renaissance.cpp b/src/mame/drivers/saitek_renaissance.cpp index 4641d78b5ff..601c5a694a1 100644 --- a/src/mame/drivers/saitek_renaissance.cpp +++ b/src/mame/drivers/saitek_renaissance.cpp @@ -12,7 +12,7 @@ Hardware notes: - 6301Y0(mode 1) or HD6303YP MCU @ 10MHz - 8KB RAM, 32KB ROM - "HELIOS" I/O (NEC gate array) -- LCD screen +- Seiko Epson SED1502F, LCD screen - magnet sensors chessboard with 81 leds The 6301Y0 seen on one of them, was a SX8A 6301Y0G84P, this is in fact the @@ -22,7 +22,6 @@ The LCD screen is fairly large, it's the same one as in Saitek Simultano, so a chessboard display + 7seg info. TODO: -- unknown LCD hardware, possibly MCU? - WIP ******************************************************************************/ diff --git a/src/mame/layout/saitek_chesstrv.lay b/src/mame/layout/saitek_chesstrv.lay index b9ec82a0bf2..90f5e8673e1 100644 --- a/src/mame/layout/saitek_chesstrv.lay +++ b/src/mame/layout/saitek_chesstrv.lay @@ -20,22 +20,16 @@ license:CC0 - - - - - - @@ -49,6 +43,13 @@ license:CC0 + + + + + + + @@ -505,6 +506,14 @@ license:CC0 + + + + + + + + @@ -539,13 +548,6 @@ license:CC0 - - - - - - - @@ -578,7 +580,7 @@ license:CC0 - + diff --git a/src/mame/layout/saitek_minichess.lay b/src/mame/layout/saitek_minichess.lay new file mode 100644 index 00000000000..6ab80312962 --- /dev/null +++ b/src/mame/layout/saitek_minichess.lay @@ -0,0 +1,182 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e3cefad6663..c1f0cbdfcb9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -35156,6 +35156,9 @@ leonardoa ccmk5 ccmk6 +@source:saitek_minichess.cpp +smchess + @source:saitek_prschess.cpp prschess diff --git a/src/mame/mess.flt b/src/mame/mess.flt index 299c05b17c8..ab06924b7ed 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -796,6 +796,7 @@ saitek_delta1.cpp saitek_exchess.cpp saitek_leonardo.cpp saitek_mark5.cpp +saitek_minichess.cpp saitek_prschess.cpp saitek_renaissance.cpp saitek_risc2500.cpp