mirror of
https://github.com/holub/mame
synced 2025-07-04 17:38:08 +03:00
upd765: Explicitly emulate reset line
* hx5102: Add addressable latches
This commit is contained in:
parent
d95c5b097a
commit
51a4222299
@ -121,7 +121,9 @@ void hx5102_device::memmap(address_map &map)
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*/
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void hx5102_device::crumap(address_map &map)
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{
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map(0x17e0, 0x17ff).rw(FUNC(hx5102_device::cruread), FUNC(hx5102_device::cruwrite));
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map(0x17e0, 0x17ff).r(FUNC(hx5102_device::cruread));
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map(0x17e0, 0x17ef).w(m_crulatch[0], FUNC(ls259_device::write_d0));
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map(0x17f0, 0x17ff).w(m_crulatch[1], FUNC(ls259_device::write_d0));
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}
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hx5102_device::hx5102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock):
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@ -140,6 +142,7 @@ hx5102_device::hx5102_device(const machine_config &mconfig, const char *tag, dev
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m_floppy_select_last(UNDEF),
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m_hexbus_ctrl(*this, IBC_TAG),
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m_floppy_ctrl(*this, FDC_TAG),
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m_crulatch(*this, "crulatch%u", 0U),
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m_motormf(*this, MTRD_TAG),
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m_speedmf(*this, MTSPD_TAG),
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m_readyff(*this, READYFF_TAG),
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@ -480,92 +483,81 @@ uint8_t hx5102_device::cruread(offs_t offset)
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/*
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CRU write access.
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*/
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void hx5102_device::cruwrite(offs_t offset, uint8_t data)
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WRITE_LINE_MEMBER(hx5102_device::nocomp_w)
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{
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// LOG("Writing CRU address %04x: %x\n", 0x17e0 + (offset<<1), data);
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switch (offset)
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{
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case 0:
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// unused right now
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LOGMASKED(LOG_CRU, "Set precompensation = %d\n", data);
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break;
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case 1:
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if (data==1)
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{
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LOGMASKED(LOG_CRU, "Trigger motor monoflop\n");
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}
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m_motormf->b_w(data);
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break;
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case 2:
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LOGMASKED(LOG_CRU, "Set undefined CRU bit 2 to %d\n", data);
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break;
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case 3:
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LOGMASKED(LOG_CRU, "Set step direction = %d\n", data);
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if (m_current_floppy != nullptr) m_current_floppy->dir_w((data==0)? 1 : 0);
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break;
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case 4:
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if (data==1)
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{
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LOGMASKED(LOG_CRU, "Assert DACK*\n");
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m_dacken = (data != 0);
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}
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break;
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case 5:
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if (data==1)
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{
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LOGMASKED(LOG_CRU, "Step pulse\n");
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}
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if (m_current_floppy != nullptr) m_current_floppy->stp_w((data==0)? 1 : 0);
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break;
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case 6:
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if (data==1)
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{
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LOGMASKED(LOG_CRU, "Start watchdog\n");
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}
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m_speedmf->b_w(data);
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break;
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case 7:
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if (data==0)
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{
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LOGMASKED(LOG_CRU, "Reset i8272A controller\n");
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m_floppy_ctrl->soft_reset();
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}
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break;
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case 8:
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LOGMASKED(LOG_CRU, "Set drive select 0 to %d\n", data);
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if (data == 1) m_floppy_select |= 1;
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else m_floppy_select &= ~1;
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break;
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case 9:
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LOGMASKED(LOG_CRU, "Set drive select 1 to %d\n", data);
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if (data == 1) m_floppy_select |= 2;
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else m_floppy_select &= ~2;
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break;
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case 10:
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set drive select 2 to %d\n", data);
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break;
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case 11:
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set drive select 3 to %d\n", data);
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break;
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case 12:
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set auxiliary motor line to %d\n", data);
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break;
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case 13:
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LOGMASKED(LOG_CRU, "Set CRU bit 13 to %d (unused)\n", data);
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break;
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case 14:
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m_wait = (data!=0);
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LOGMASKED(LOG_CRU, "READY circuit %s\n", m_wait? "active" : "inactive" );
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update_readyff_input();
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break;
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case 15:
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LOGMASKED(LOG_CRU, "Set CRU bit 15 to %d (unused)\n", data);
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break;
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}
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// unused right now
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LOGMASKED(LOG_CRU, "Set precompensation = %d\n", state);
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}
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WRITE_LINE_MEMBER(hx5102_device::diren_w)
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{
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LOGMASKED(LOG_CRU, "Set step direction = %d\n", state);
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if (m_current_floppy != nullptr)
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m_current_floppy->dir_w((state==0)? 1 : 0);
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}
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WRITE_LINE_MEMBER(hx5102_device::dacken_w)
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{
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if (state==1)
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LOGMASKED(LOG_CRU, "Assert DACK*\n");
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m_dacken = (state != 0);
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}
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WRITE_LINE_MEMBER(hx5102_device::stepen_w)
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{
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if (state==1)
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LOGMASKED(LOG_CRU, "Step pulse\n");
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if (m_current_floppy != nullptr)
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m_current_floppy->stp_w((state==0)? 1 : 0);
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}
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WRITE_LINE_MEMBER(hx5102_device::ds1_w)
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{
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LOGMASKED(LOG_CRU, "Set drive select 0 to %d\n", state);
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if (state == 1)
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m_floppy_select |= 1;
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else
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m_floppy_select &= ~1;
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update_drive_select();
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}
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WRITE_LINE_MEMBER(hx5102_device::ds2_w)
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{
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LOGMASKED(LOG_CRU, "Set drive select 1 to %d\n", state);
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if (state == 1)
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m_floppy_select |= 2;
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else
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m_floppy_select &= ~2;
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update_drive_select();
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}
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WRITE_LINE_MEMBER(hx5102_device::ds3_w)
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{
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set drive select 2 to %d\n", state);
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}
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WRITE_LINE_MEMBER(hx5102_device::ds4_w)
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{
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set drive select 3 to %d\n", state);
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}
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WRITE_LINE_MEMBER(hx5102_device::aux_motor_w)
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{
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// External drive; not implemented
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LOGMASKED(LOG_CRU, "Set auxiliary motor line to %d\n", state);
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}
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WRITE_LINE_MEMBER(hx5102_device::wait_w)
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{
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m_wait = (state!=0);
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LOGMASKED(LOG_CRU, "READY circuit %s\n", m_wait? "active" : "inactive" );
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update_readyff_input();
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}
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void hx5102_device::update_drive_select()
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{
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if (m_floppy_select != m_floppy_select_last)
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{
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if (m_floppy_select == 1)
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@ -677,7 +669,7 @@ void hx5102_device::device_add_mconfig(machine_config& config)
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HEXBUS(config, "hexbus", 0, hexbus_options, nullptr);
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// TMS9995 CPU @ 12.0 MHz
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TMS9995(config, m_flopcpu, XTAL(12'000'000));
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TMS9995(config, m_flopcpu, 12_MHz_XTAL);
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m_flopcpu->set_addrmap(AS_PROGRAM, &hx5102_device::memmap);
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m_flopcpu->set_addrmap(AS_IO, &hx5102_device::crumap);
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m_flopcpu->extop_cb().set(FUNC(hx5102_device::external_operation));
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@ -687,27 +679,41 @@ void hx5102_device::device_add_mconfig(machine_config& config)
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// Not connected: Select lines (DS0, DS1), Head load (HDL), VCO
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// Tied to 1: READY
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// Tied to 0: TC
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I8272A(config, m_floppy_ctrl, 8'000'000, false);
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I8272A(config, m_floppy_ctrl, 8_MHz_XTAL / 2, false);
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m_floppy_ctrl->intrq_wr_callback().set(FUNC(hx5102_device::fdc_irq_w));
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m_floppy_ctrl->drq_wr_callback().set(FUNC(hx5102_device::fdc_drq_w));
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FLOPPY_CONNECTOR(config, "d0", hx5102_drive, "525dd", hx5102_device::floppy_formats).enable_sound(true);
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FLOPPY_CONNECTOR(config, "d1", hx5102_drive, nullptr, hx5102_device::floppy_formats).enable_sound(true);
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// Addressable latches
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LS259(config, m_crulatch[0]); // U18
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m_crulatch[0]->q_out_cb<0>().set(FUNC(hx5102_device::nocomp_w));
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m_crulatch[0]->q_out_cb<1>().set(m_motormf, FUNC(ttl74123_device::b_w));
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m_crulatch[0]->q_out_cb<3>().set(FUNC(hx5102_device::diren_w));
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m_crulatch[0]->q_out_cb<4>().set(FUNC(hx5102_device::dacken_w));
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m_crulatch[0]->q_out_cb<5>().set(FUNC(hx5102_device::stepen_w));
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m_crulatch[0]->q_out_cb<6>().set(m_speedmf, FUNC(ttl74123_device::b_w));
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m_crulatch[0]->q_out_cb<7>().set(m_floppy_ctrl, FUNC(i8272a_device::reset_w)).invert();
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LS259(config, m_crulatch[1]); // U10
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m_crulatch[1]->q_out_cb<0>().set(FUNC(hx5102_device::ds1_w));
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m_crulatch[1]->q_out_cb<1>().set(FUNC(hx5102_device::ds2_w));
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m_crulatch[1]->q_out_cb<2>().set(FUNC(hx5102_device::ds3_w));
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m_crulatch[1]->q_out_cb<3>().set(FUNC(hx5102_device::ds4_w));
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m_crulatch[1]->q_out_cb<4>().set(FUNC(hx5102_device::aux_motor_w));
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m_crulatch[1]->q_out_cb<6>().set(FUNC(hx5102_device::wait_w));
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// Monoflops
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TTL74123(config, m_motormf, 0);
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TTL74123(config, m_motormf, RES_K(200), CAP_U(47));
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m_motormf->set_connection_type(TTL74123_GROUNDED);
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m_motormf->set_resistor_value(RES_K(200));
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m_motormf->set_capacitor_value(CAP_U(47));
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m_motormf->set_a_pin_value(0);
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m_motormf->set_b_pin_value(1);
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m_motormf->set_clear_pin_value(1);
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m_motormf->out_cb().set(FUNC(hx5102_device::motor_w));
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TTL74123(config, m_speedmf, 0);
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TTL74123(config, m_speedmf, RES_K(200), CAP_U(10));
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m_speedmf->set_connection_type(TTL74123_GROUNDED);
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m_speedmf->set_resistor_value(RES_K(200));
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m_speedmf->set_capacitor_value(CAP_U(10));
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m_speedmf->set_a_pin_value(0);
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m_speedmf->set_b_pin_value(1);
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m_speedmf->set_clear_pin_value(1);
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@ -22,6 +22,7 @@
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#include "machine/upd765.h"
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#include "machine/7474.h"
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#include "machine/74123.h"
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#include "machine/74259.h"
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#include "machine/rescap.h"
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#include "machine/ram.h"
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#include "imagedev/floppy.h"
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@ -71,7 +72,17 @@ private:
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DECLARE_WRITE_LINE_MEMBER(hsklatch_out);
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uint8_t cruread(offs_t offset);
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void cruwrite(offs_t offset, uint8_t data);
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DECLARE_WRITE_LINE_MEMBER(nocomp_w);
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DECLARE_WRITE_LINE_MEMBER(diren_w);
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DECLARE_WRITE_LINE_MEMBER(dacken_w);
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DECLARE_WRITE_LINE_MEMBER(stepen_w);
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DECLARE_WRITE_LINE_MEMBER(ds1_w);
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DECLARE_WRITE_LINE_MEMBER(ds2_w);
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DECLARE_WRITE_LINE_MEMBER(ds3_w);
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DECLARE_WRITE_LINE_MEMBER(ds4_w);
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DECLARE_WRITE_LINE_MEMBER(aux_motor_w);
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DECLARE_WRITE_LINE_MEMBER(wait_w);
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void update_drive_select();
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// Operate the floppy motors
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bool m_motor_on;
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@ -96,6 +107,7 @@ private:
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required_device<ibc_device> m_hexbus_ctrl;
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required_device<i8272a_device> m_floppy_ctrl;
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required_device_array<ls259_device, 2> m_crulatch;
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required_device<ttl74123_device> m_motormf;
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required_device<ttl74123_device> m_speedmf;
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required_device<ttl7474_device> m_readyff;
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@ -45,10 +45,6 @@ isa8_fdc_device::isa8_fdc_device(const machine_config &mconfig, device_type type
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{
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}
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void isa8_fdc_device::device_reset()
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{
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}
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WRITE_LINE_MEMBER( isa8_fdc_device::irq_w )
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{
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m_isa->irq6_w(state ? ASSERT_LINE : CLEAR_LINE);
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@ -80,7 +76,9 @@ void isa8_fdc_device::eop_w(int state)
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}
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isa8_upd765_fdc_device::isa8_upd765_fdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, type, tag, owner, clock)
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isa8_upd765_fdc_device::isa8_upd765_fdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: isa8_fdc_device(mconfig, type, tag, owner, clock)
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, dor(0x00)
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{
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}
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@ -94,7 +92,11 @@ void isa8_upd765_fdc_device::device_start()
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irq = drq = false;
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fdc_irq = fdc_drq = false;
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dor = 0x00;
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}
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void isa8_upd765_fdc_device::device_reset()
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{
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dor_w(0x00);
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}
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// Bits 0-1 select one of the 4 drives, but only if the associated
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@ -109,7 +111,6 @@ void isa8_upd765_fdc_device::device_start()
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void isa8_upd765_fdc_device::dor_w(uint8_t data)
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{
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LOG("dor = %02x\n", data);
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uint8_t pdor = dor;
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dor = data;
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for(int i=0; i<4; i++)
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@ -124,8 +125,7 @@ void isa8_upd765_fdc_device::dor_w(uint8_t data)
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check_irq();
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check_drq();
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if((pdor^dor) & 4)
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m_fdc->soft_reset();
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m_fdc->reset_w(!BIT(dor, 2));
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}
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uint8_t isa8_upd765_fdc_device::dor_r()
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@ -34,9 +34,6 @@ protected:
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// construction/destruction
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isa8_fdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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// device-level overrides
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virtual void device_reset() override;
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virtual uint8_t dack_r(int line) override;
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virtual void dack_w(int line, uint8_t data) override;
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virtual void dack_line_w(int line, int state) override;
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@ -53,6 +50,7 @@ protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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uint8_t dor_r();
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void dor_w(uint8_t data);
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@ -1333,8 +1333,7 @@ void omti8621_device::fd_moten_w(uint8_t data)
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m_moten = data;
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if (!BIT(data, 2))
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m_fdc->soft_reset();
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m_fdc->reset_w(!BIT(data, 2));
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for (int i = 0; i < 2; i++)
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{
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@ -174,6 +174,7 @@ upd765_family_device::upd765_family_device(const machine_config &mconfig, device
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ready_polled(true),
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select_connected(true),
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select_multiplexed(true),
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has_dor(true),
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external_ready(false),
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recalibrate_steps(77),
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mode(mode_t::AT),
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@ -181,8 +182,7 @@ upd765_family_device::upd765_family_device(const machine_config &mconfig, device
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drq_cb(*this),
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hdl_cb(*this),
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idx_cb(*this),
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us_cb(*this),
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dor_reset(0x00)
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us_cb(*this)
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{
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}
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@ -245,6 +245,7 @@ void upd765_family_device::device_start()
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cur_rate = 250000;
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tc = false;
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selected_drive = -1;
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dor = 0x0c;
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// reset at upper levels may cause a write to tc ending up with
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// live_sync, which will crash if the live structure isn't
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@ -267,7 +268,8 @@ void upd765_family_device::device_start()
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void upd765_family_device::device_reset()
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{
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dor = dor_reset;
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if(has_dor)
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dor = 0x00;
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locked = false;
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soft_reset();
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}
|
||||
@ -304,6 +306,14 @@ void upd765_family_device::soft_reset()
|
||||
set_ds(select_multiplexed ? 0 : -1);
|
||||
|
||||
check_irq();
|
||||
if(BIT(dor, 2))
|
||||
end_reset();
|
||||
else if(ready_polled)
|
||||
poll_timer->adjust(attotime::never);
|
||||
}
|
||||
|
||||
void upd765_family_device::end_reset()
|
||||
{
|
||||
if(ready_polled)
|
||||
poll_timer->adjust(attotime::from_usec(100), 0, attotime::from_usec(1024));
|
||||
}
|
||||
@ -333,6 +343,25 @@ bool upd765_family_device::get_ready(int fid)
|
||||
return !external_ready;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(upd765_family_device::reset_w)
|
||||
{
|
||||
// This implementation is not valid for devices with DOR and possibly other extra registers.
|
||||
// The working assumption is that no need to manipulate the RESET line directly when software can use DOR instead.
|
||||
assert(!has_dor);
|
||||
if(bool(state) == !BIT(dor, 2))
|
||||
return;
|
||||
|
||||
LOGREGS("reset = %d\n", state);
|
||||
if(state) {
|
||||
dor &= 0xfb;
|
||||
soft_reset();
|
||||
}
|
||||
else {
|
||||
dor |= 0x04;
|
||||
end_reset();
|
||||
}
|
||||
}
|
||||
|
||||
void upd765_family_device::set_ds(int fid)
|
||||
{
|
||||
if(selected_drive == fid)
|
||||
@ -399,11 +428,16 @@ uint8_t upd765_family_device::dor_r()
|
||||
|
||||
void upd765_family_device::dor_w(uint8_t data)
|
||||
{
|
||||
assert(has_dor);
|
||||
LOGREGS("dor = %02x\n", data);
|
||||
uint8_t diff = dor ^ data;
|
||||
dor = data;
|
||||
if(diff & 4)
|
||||
soft_reset();
|
||||
if(BIT(diff, 2)) {
|
||||
if(BIT(data, 2))
|
||||
end_reset();
|
||||
else
|
||||
soft_reset();
|
||||
}
|
||||
|
||||
for(int i=0; i<4; i++) {
|
||||
floppy_info &fi = flopi[i];
|
||||
@ -513,6 +547,9 @@ uint8_t upd765_family_device::fifo_r()
|
||||
|
||||
void upd765_family_device::fifo_w(uint8_t data)
|
||||
{
|
||||
if(!BIT(dor, 2))
|
||||
LOGWARN("%s: fifo_w(%02x) in reset\n", machine().describe_context(), data);
|
||||
|
||||
switch(main_phase) {
|
||||
case PHASE_CMD: {
|
||||
command[command_pos++] = data;
|
||||
@ -780,7 +817,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
if(read_one_bit(limit))
|
||||
return;
|
||||
|
||||
LOGSHIFT("%s: shift = %04x data=%02x c=%d\n", tts(cur_live.tm), cur_live.shift_reg,
|
||||
LOGSHIFT("%s: shift = %04x data=%02x c=%d\n", cur_live.tm.to_string(), cur_live.shift_reg,
|
||||
(cur_live.shift_reg & 0x4000 ? 0x80 : 0x00) |
|
||||
(cur_live.shift_reg & 0x1000 ? 0x40 : 0x00) |
|
||||
(cur_live.shift_reg & 0x0400 ? 0x20 : 0x00) |
|
||||
@ -796,7 +833,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
cur_live.data_separator_phase = false;
|
||||
cur_live.bit_counter = 0;
|
||||
cur_live.state = READ_HEADER_BLOCK_HEADER;
|
||||
LOGLIVE("%s: Found A1\n", tts(cur_live.tm));
|
||||
LOGLIVE("%s: Found A1\n", cur_live.tm.to_string());
|
||||
}
|
||||
|
||||
if(!mfm && cur_live.shift_reg == 0xf57e) {
|
||||
@ -804,7 +841,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
cur_live.data_separator_phase = false;
|
||||
cur_live.bit_counter = 0;
|
||||
cur_live.state = READ_ID_BLOCK;
|
||||
LOGLIVE("%s: Found IDAM\n", tts(cur_live.tm));
|
||||
LOGLIVE("%s: Found IDAM\n", cur_live.tm.to_string());
|
||||
}
|
||||
break;
|
||||
|
||||
@ -812,7 +849,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
if(read_one_bit(limit))
|
||||
return;
|
||||
|
||||
LOGSHIFT("%s: shift = %04x data=%02x counter=%d\n", tts(cur_live.tm), cur_live.shift_reg,
|
||||
LOGSHIFT("%s: shift = %04x data=%02x counter=%d\n", cur_live.tm.to_string(), cur_live.shift_reg,
|
||||
(cur_live.shift_reg & 0x4000 ? 0x80 : 0x00) |
|
||||
(cur_live.shift_reg & 0x1000 ? 0x40 : 0x00) |
|
||||
(cur_live.shift_reg & 0x0400 ? 0x20 : 0x00) |
|
||||
@ -832,11 +869,11 @@ void upd765_family_device::live_run(attotime limit)
|
||||
if(cur_live.shift_reg != 0x4489)
|
||||
cur_live.state = SEARCH_ADDRESS_MARK_HEADER;
|
||||
else
|
||||
LOGLIVE("%s: Found A1\n", tts(cur_live.tm));
|
||||
LOGLIVE("%s: Found A1\n", cur_live.tm.to_string());
|
||||
break;
|
||||
}
|
||||
if(cur_live.data_reg != 0xfe) {
|
||||
LOGLIVE("%s: No ident byte found after triple-A1, continue search\n", tts(cur_live.tm));
|
||||
LOGLIVE("%s: No ident byte found after triple-A1, continue search\n", cur_live.tm.to_string());
|
||||
cur_live.state = SEARCH_ADDRESS_MARK_HEADER;
|
||||
break;
|
||||
}
|
||||
@ -854,7 +891,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
break;
|
||||
int slot = (cur_live.bit_counter >> 4)-1;
|
||||
|
||||
LOGLIVE("%s: slot=%d data=%02x crc=%04x\n", tts(cur_live.tm), slot, cur_live.data_reg, cur_live.crc);
|
||||
LOGLIVE("%s: slot=%d data=%02x crc=%04x\n", cur_live.tm.to_string(), slot, cur_live.data_reg, cur_live.crc);
|
||||
cur_live.idbuf[slot] = cur_live.data_reg;
|
||||
if(slot == 5) {
|
||||
live_delay(IDLE);
|
||||
@ -867,7 +904,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
if(read_one_bit(limit))
|
||||
return;
|
||||
|
||||
LOGSHIFT("%s: shift = %04x data=%02x c=%d.%x\n", tts(cur_live.tm), cur_live.shift_reg,
|
||||
LOGSHIFT("%s: shift = %04x data=%02x c=%d.%x\n", cur_live.tm.to_string(), cur_live.shift_reg,
|
||||
(cur_live.shift_reg & 0x4000 ? 0x80 : 0x00) |
|
||||
(cur_live.shift_reg & 0x1000 ? 0x40 : 0x00) |
|
||||
(cur_live.shift_reg & 0x0400 ? 0x20 : 0x00) |
|
||||
@ -912,7 +949,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
if(read_one_bit(limit))
|
||||
return;
|
||||
|
||||
LOGSHIFT("%s: shift = %04x data=%02x counter=%d\n", tts(cur_live.tm), cur_live.shift_reg,
|
||||
LOGSHIFT("%s: shift = %04x data=%02x counter=%d\n", cur_live.tm.to_string(), cur_live.shift_reg,
|
||||
(cur_live.shift_reg & 0x4000 ? 0x80 : 0x00) |
|
||||
(cur_live.shift_reg & 0x1000 ? 0x40 : 0x00) |
|
||||
(cur_live.shift_reg & 0x0400 ? 0x20 : 0x00) |
|
||||
@ -1218,7 +1255,7 @@ void upd765_family_device::live_run(attotime limit)
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGWARN("%s: Unknown live state %d\n", tts(cur_live.tm), cur_live.state);
|
||||
LOGWARN("%s: Unknown live state %d\n", cur_live.tm.to_string(), cur_live.state);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -2412,17 +2449,6 @@ bool upd765_family_device::get_irq() const
|
||||
return cur_irq;
|
||||
}
|
||||
|
||||
std::string upd765_family_device::tts(attotime t)
|
||||
{
|
||||
const char *sign = "";
|
||||
if(t.seconds() < 0) {
|
||||
t = attotime::zero - t;
|
||||
sign = "-";
|
||||
}
|
||||
int const nsec = t.attoseconds() / ATTOSECONDS_PER_NANOSECOND;
|
||||
return util::string_format("%s%04d.%03d,%03d,%03d", sign, int(t.seconds()), nsec/1000000, (nsec/1000)%1000, nsec % 1000);
|
||||
}
|
||||
|
||||
std::string upd765_family_device::results() const
|
||||
{
|
||||
std::ostringstream stream;
|
||||
@ -2440,7 +2466,7 @@ std::string upd765_family_device::results() const
|
||||
|
||||
std::string upd765_family_device::ttsn() const
|
||||
{
|
||||
return tts(machine().time());
|
||||
return machine().time().to_string();
|
||||
}
|
||||
|
||||
void upd765_family_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
@ -2623,7 +2649,7 @@ bool upd765_family_device::write_one_bit(const attotime &limit)
|
||||
|
||||
void upd765_family_device::live_write_raw(uint16_t raw)
|
||||
{
|
||||
LOGLIVE("%s: write %04x %04x\n", tts(cur_live.tm), raw, cur_live.crc);
|
||||
LOGLIVE("%s: write %04x %04x\n", cur_live.tm.to_string(), raw, cur_live.crc);
|
||||
cur_live.shift_reg = raw;
|
||||
cur_live.data_bit_context = raw & 1;
|
||||
}
|
||||
@ -2643,7 +2669,7 @@ void upd765_family_device::live_write_mfm(uint8_t mfm)
|
||||
cur_live.data_reg = mfm;
|
||||
cur_live.shift_reg = raw;
|
||||
cur_live.data_bit_context = context;
|
||||
LOGLIVE("%s: write %02x %04x %04x\n", tts(cur_live.tm), mfm, cur_live.crc, raw);
|
||||
LOGLIVE("%s: write %02x %04x %04x\n", cur_live.tm.to_string(), mfm, cur_live.crc, raw);
|
||||
}
|
||||
|
||||
void upd765_family_device::live_write_fm(uint8_t fm)
|
||||
@ -2655,7 +2681,7 @@ void upd765_family_device::live_write_fm(uint8_t fm)
|
||||
cur_live.data_reg = fm;
|
||||
cur_live.shift_reg = raw;
|
||||
cur_live.data_bit_context = fm & 1;
|
||||
LOGLIVE("%s: write %02x %04x %04x\n", tts(cur_live.tm), fm, cur_live.crc, raw);
|
||||
LOGLIVE("%s: write %02x %04x %04x\n", cur_live.tm.to_string(), fm, cur_live.crc, raw);
|
||||
}
|
||||
|
||||
bool upd765_family_device::sector_matches() const
|
||||
@ -2672,17 +2698,17 @@ bool upd765_family_device::sector_matches() const
|
||||
|
||||
upd765a_device::upd765a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, UPD765A, tag, owner, clock)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = false;
|
||||
}
|
||||
|
||||
upd765b_device::upd765b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, UPD765B, tag, owner, clock)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = false;
|
||||
}
|
||||
|
||||
i8272a_device::i8272a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, I8272A, tag, owner, clock)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = false;
|
||||
}
|
||||
|
||||
upd72065_device::upd72065_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd72065_device(mconfig, UPD72065, tag, owner, clock)
|
||||
@ -2691,7 +2717,7 @@ upd72065_device::upd72065_device(const machine_config &mconfig, const char *tag,
|
||||
|
||||
upd72065_device::upd72065_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, type, tag, owner, clock)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = false;
|
||||
recalibrate_steps = 255;
|
||||
}
|
||||
|
||||
@ -2713,7 +2739,7 @@ upd72069_device::upd72069_device(const machine_config &mconfig, const char *tag,
|
||||
|
||||
i82072_device::i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, I82072, tag, owner, clock)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = false;
|
||||
recalibrate_steps = 255;
|
||||
}
|
||||
|
||||
@ -3089,7 +3115,7 @@ mcs3201_device::mcs3201_device(const machine_config &mconfig, const char *tag, d
|
||||
upd765_family_device(mconfig, MCS3201, tag, owner, clock),
|
||||
m_input_handler(*this)
|
||||
{
|
||||
dor_reset = 0x0c;
|
||||
has_dor = true;
|
||||
ready_polled = false;
|
||||
ready_connected = false;
|
||||
select_connected = true;
|
||||
|
@ -49,6 +49,7 @@ public:
|
||||
void ready_w(bool val);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(tc_line_w) { tc_w(state == ASSERT_LINE); }
|
||||
DECLARE_WRITE_LINE_MEMBER(reset_w);
|
||||
|
||||
void set_rate(int rate); // rate in bps, to be used when the fdc is externally frequency-controlled
|
||||
|
||||
@ -231,7 +232,7 @@ protected:
|
||||
|
||||
static constexpr int rates[4] = { 500000, 300000, 250000, 1000000 };
|
||||
|
||||
bool ready_connected, ready_polled, select_connected, select_multiplexed;
|
||||
bool ready_connected, ready_polled, select_connected, select_multiplexed, has_dor;
|
||||
|
||||
bool external_ready;
|
||||
|
||||
@ -250,7 +251,7 @@ protected:
|
||||
bool fifo_write;
|
||||
uint8_t dor, dsr, msr, fifo[16], command[16], result[16];
|
||||
uint8_t st1, st2, st3;
|
||||
uint8_t fifocfg, dor_reset;
|
||||
uint8_t fifocfg;
|
||||
uint8_t precomp;
|
||||
uint16_t spec;
|
||||
int sector_size;
|
||||
@ -259,7 +260,6 @@ protected:
|
||||
|
||||
emu_timer *poll_timer;
|
||||
|
||||
static std::string tts(attotime t);
|
||||
std::string results() const;
|
||||
std::string ttsn() const;
|
||||
|
||||
@ -288,6 +288,8 @@ protected:
|
||||
C_INCOMPLETE
|
||||
};
|
||||
|
||||
void end_reset();
|
||||
|
||||
void delay_cycles(emu_timer *tm, int cycles);
|
||||
void check_irq();
|
||||
void fifo_expect(int size, bool write);
|
||||
|
@ -111,8 +111,7 @@ void duet16_state::fdcctrl_w(u8 data)
|
||||
|
||||
m_fd[0]->get_device()->mon_w(!BIT(data, 0));
|
||||
m_fd[1]->get_device()->mon_w(!BIT(data, 0));
|
||||
if(!BIT(data, 1))
|
||||
m_fdc->soft_reset();
|
||||
m_fdc->reset_w(!BIT(data, 1));
|
||||
|
||||
// TODO: bit 3 = LSPD
|
||||
}
|
||||
|
@ -343,9 +343,9 @@ void fs3216_state::floppy_control_w(u8 data)
|
||||
m_floppy_status &= 0xef;
|
||||
}
|
||||
|
||||
m_fdc->reset_w(!BIT(data, 1));
|
||||
if (!BIT(data, 1))
|
||||
{
|
||||
m_fdc->soft_reset();
|
||||
m_fdc_dma_count = 0;
|
||||
m_fdc->tc_w(0);
|
||||
}
|
||||
|
@ -404,8 +404,7 @@ void pcjr_state::pcjr_fdc_dor_w(uint8_t data)
|
||||
else
|
||||
m_fdc->set_floppy(nullptr);
|
||||
|
||||
if((pdor^m_pcjr_dor) & 0x80)
|
||||
m_fdc->soft_reset();
|
||||
m_fdc->reset_w(!BIT(m_pcjr_dor, 7));
|
||||
|
||||
if(m_pcjr_dor & 0x20) {
|
||||
if((pdor & 0x40) && !(m_pcjr_dor & 0x40))
|
||||
|
@ -72,7 +72,6 @@ private:
|
||||
|
||||
void bank_switch_w(u8 data);
|
||||
void panel_led_w(u8 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(fdc_reset_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(fdc_tc_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(sed9420c_trgin_w);
|
||||
u8 fdc_r(offs_t offset);
|
||||
@ -156,12 +155,6 @@ void korg_dss1_state::panel_led_w(u8 data)
|
||||
// TODO
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(korg_dss1_state::fdc_reset_w)
|
||||
{
|
||||
if (!state)
|
||||
m_fdc->soft_reset();
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(korg_dss1_state::fdc_tc_w)
|
||||
{
|
||||
if (m_cpu1.found())
|
||||
@ -444,7 +437,7 @@ void korg_dss1_state::klm780(machine_config &config)
|
||||
m_io1->out_pc_callback().set(m_lcdc, FUNC(hd44780_device::e_w)).bit(0);
|
||||
m_io1->out_pc_callback().append(m_lcdc, FUNC(hd44780_device::rw_w)).bit(1);
|
||||
m_io1->out_pc_callback().append(m_lcdc, FUNC(hd44780_device::rs_w)).bit(2);
|
||||
m_io1->out_pc_callback().append(FUNC(korg_dss1_state::fdc_reset_w)).bit(3);
|
||||
m_io1->out_pc_callback().append(m_fdc, FUNC(upd765a_device::reset_w)).bit(3).invert();
|
||||
m_io1->out_pc_callback().append(FUNC(korg_dss1_state::fdc_tc_w)).bit(4);
|
||||
m_io1->out_pc_callback().append(FUNC(korg_dss1_state::sed9420c_trgin_w)).bit(5);
|
||||
|
||||
|
@ -154,7 +154,7 @@ WRITE_LINE_MEMBER( mm1_state::recall_w )
|
||||
{
|
||||
LOG("RECALL %u\n", state);
|
||||
m_recall = state;
|
||||
if (state) m_fdc->soft_reset();
|
||||
m_fdc->reset_w(state);
|
||||
}
|
||||
|
||||
|
||||
|
@ -995,12 +995,7 @@ void pc1512_base_state::drive_select_w(uint8_t data)
|
||||
img->mon_w((data & 0x03) == n && BIT(data, n + 4) ? 0 : 1);
|
||||
}
|
||||
|
||||
if (m_dreset != BIT(data, 2))
|
||||
{
|
||||
m_dreset = BIT(data, 2);
|
||||
m_fdc->soft_reset();
|
||||
}
|
||||
|
||||
m_fdc->reset_w(!BIT(data, 2));
|
||||
m_nden = BIT(data, 3);
|
||||
update_fdc_int();
|
||||
update_fdc_drq();
|
||||
@ -1091,7 +1086,6 @@ void pc1512_base_state::machine_start()
|
||||
save_item(NAME(m_nden));
|
||||
save_item(NAME(m_dint));
|
||||
save_item(NAME(m_ddrq));
|
||||
save_item(NAME(m_dreset));
|
||||
save_item(NAME(m_neop));
|
||||
save_item(NAME(m_ack_int_enable));
|
||||
save_item(NAME(m_centronics_ack));
|
||||
|
@ -439,11 +439,9 @@ uint8_t pc9801_state::fdc_2hd_ctrl_r()
|
||||
void pc9801_state::fdc_2hd_ctrl_w(uint8_t data)
|
||||
{
|
||||
//logerror("%02x ctrl\n",data);
|
||||
if(((m_fdc_2hd_ctrl & 0x80) == 0) && (data & 0x80))
|
||||
m_fdc_2hd->soft_reset();
|
||||
m_fdc_2hd->reset_w(BIT(data, 7));
|
||||
|
||||
m_fdc_2hd_ctrl = data;
|
||||
|
||||
if(data & 0x40)
|
||||
{
|
||||
m_fdc_2hd->set_ready_line_connected(0);
|
||||
@ -475,8 +473,7 @@ uint8_t pc9801_state::fdc_2dd_ctrl_r()
|
||||
void pc9801_state::fdc_2dd_ctrl_w(uint8_t data)
|
||||
{
|
||||
logerror("%02x ctrl\n",data);
|
||||
if(((m_fdc_2dd_ctrl & 0x80) == 0) && (data & 0x80))
|
||||
m_fdc_2dd->soft_reset();
|
||||
m_fdc_2dd->reset_w(BIT(data, 7));
|
||||
|
||||
m_fdc_2dd_ctrl = data;
|
||||
m_fdc_2dd->subdevice<floppy_connector>("0")->get_device()->mon_w(data & 8 ? CLEAR_LINE : ASSERT_LINE);
|
||||
|
@ -94,15 +94,9 @@ WRITE_LINE_MEMBER(prof80_state::select_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE_LINE_MEMBER(prof80_state::resf_w)
|
||||
{
|
||||
if (state)
|
||||
m_fdc->soft_reset();
|
||||
}
|
||||
|
||||
|
||||
WRITE_LINE_MEMBER(prof80_state::mini_w)
|
||||
{
|
||||
m_fdc->set_unscaled_clock(16_MHz_XTAL / (state ? 4 : 2));
|
||||
}
|
||||
|
||||
|
||||
@ -453,7 +447,7 @@ void prof80_state::machine_start()
|
||||
void prof80_state::prof80(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
Z80(config, m_maincpu, XTAL(6'000'000));
|
||||
Z80(config, m_maincpu, 6_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &prof80_state::prof80_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &prof80_state::prof80_io);
|
||||
|
||||
@ -465,7 +459,7 @@ void prof80_state::prof80(machine_config &config)
|
||||
UPD1990A(config, m_rtc);
|
||||
|
||||
// FDC
|
||||
UPD765A(config, m_fdc, 8'000'000, true, true);
|
||||
UPD765A(config, m_fdc, 16_MHz_XTAL / 2, true, true); // clocked through FDC9229B
|
||||
FLOPPY_CONNECTOR(config, UPD765_TAG ":0", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, UPD765_TAG ":1", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, UPD765_TAG ":2", prof80_floppies, nullptr, floppy_image_device::default_floppy_formats);
|
||||
@ -483,7 +477,7 @@ void prof80_state::prof80(machine_config &config)
|
||||
m_flra->q_out_cb<6>().set(FUNC(prof80_state::motor_w)); // _MOTOR
|
||||
m_flra->q_out_cb<7>().set(FUNC(prof80_state::select_w)); // SELECT
|
||||
LS259(config, m_flrb);
|
||||
m_flrb->q_out_cb<0>().set(FUNC(prof80_state::resf_w)); // RESF
|
||||
m_flrb->q_out_cb<0>().set(m_fdc, FUNC(upd765a_device::reset_w)); // RESF
|
||||
m_flrb->q_out_cb<1>().set(FUNC(prof80_state::mini_w)); // MINI
|
||||
m_flrb->q_out_cb<2>().set(m_rs232a, FUNC(rs232_port_device::write_rts)); // _RTS
|
||||
m_flrb->q_out_cb<3>().set(m_rs232a, FUNC(rs232_port_device::write_txd)); // TX
|
||||
|
@ -157,10 +157,7 @@ void tandy2k_state::enable_w(uint8_t data)
|
||||
m_pit->write_gate2(BIT(data, 4));
|
||||
|
||||
// FDC reset
|
||||
if (!BIT(data, 5))
|
||||
{
|
||||
m_fdc->soft_reset();
|
||||
}
|
||||
m_fdc->reset_w(!BIT(data, 5));
|
||||
|
||||
// timer 0 enable
|
||||
m_maincpu->tmrin0_w(BIT(data, 6));
|
||||
|
@ -75,7 +75,6 @@ public:
|
||||
m_nden(1),
|
||||
m_dint(0),
|
||||
m_ddrq(0),
|
||||
m_dreset(1),
|
||||
m_fdc_dsr(0),
|
||||
m_neop(0),
|
||||
m_ack_int_enable(1),
|
||||
@ -178,7 +177,6 @@ public:
|
||||
int m_nden;
|
||||
int m_dint;
|
||||
int m_ddrq;
|
||||
int m_dreset;
|
||||
uint8_t m_fdc_dsr;
|
||||
int m_neop;
|
||||
|
||||
|
@ -86,7 +86,6 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(inuse_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(motor_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(select_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(resf_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(mini_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(mstop_w);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user