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More PPC GCC warning fixes.

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This commit is contained in:
R. Belmont 2010-01-15 23:48:40 +00:00
parent 971151c8d7
commit 51fd1fa822
9 changed files with 20 additions and 20 deletions
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2
src/emu/cpu/i86/i286.c
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@ -206,7 +206,7 @@ static void set_irq_line(i80286_state *cpustate, int irqline, int state)
/* if the IF is set, signal an interrupt */
if (state != CLEAR_LINE && cpustate->IF)
PREFIX(_interrupt)(cpustate, -1);
PREFIX(_interrupt)(cpustate, (UINT32)-1);
}
}

2
src/emu/cpu/i86/i86.c
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@ -295,7 +295,7 @@ static void set_irq_line(i8086_state *cpustate, int irqline, int state)
/* if the IF is set, signal an interrupt */
if (state != CLEAR_LINE && cpustate->IF)
PREFIX(_interrupt)(cpustate, -1);
PREFIX(_interrupt)(cpustate, (UINT32)-1);
}
}

6
src/emu/cpu/i86/instr86.c
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@ -2058,7 +2058,7 @@ static void PREFIX86(_popf)(i8086_state *cpustate) /* Opcode 0x9d */
/* if the IF is set, and an interrupt is pending, signal an interrupt */
if (cpustate->IF && cpustate->irq_state)
PREFIX(_interrupt)(cpustate, -1);
PREFIX(_interrupt)(cpustate, (UINT32)-1);
}
static void PREFIX86(_sahf)(i8086_state *cpustate) /* Opcode 0x9e */
@ -2468,7 +2468,7 @@ static void PREFIX86(_iret)(i8086_state *cpustate) /* Opcode 0xcf */
/* if the IF is set, and an interrupt is pending, signal an interrupt */
if (cpustate->IF && cpustate->irq_state)
PREFIX(_interrupt)(cpustate, -1);
PREFIX(_interrupt)(cpustate, (UINT32)-1);
}
static void PREFIX86(_rotshft_b)(i8086_state *cpustate) /* Opcode 0xd0 */
@ -3030,7 +3030,7 @@ static void PREFIX86(_sti)(i8086_state *cpustate) /* Opcode 0xfb */
/* if an interrupt is pending, signal an interrupt */
if (cpustate->irq_state)
PREFIX(_interrupt)(cpustate, -1);
PREFIX(_interrupt)(cpustate, (UINT32)-1);
}
static void PREFIX86(_cld)(i8086_state *cpustate) /* Opcode 0xfc */

12
src/emu/cpu/m68000/m68kcpu.h
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@ -784,24 +784,24 @@ INLINE unsigned int m68k_read_pcrelative_8(m68ki_cpu_core *m68k, unsigned int ad
{
if (address >= m68k->encrypted_start && address < m68k->encrypted_end)
return (((*m68k->memory.readimm16)(m68k->program, address&~1)>>(8*(1-(address & 1))))&0xff);
else
return (*m68k->memory.read8)(m68k->program, address);
return (*m68k->memory.read8)(m68k->program, address);
}
INLINE unsigned int m68k_read_pcrelative_16(m68ki_cpu_core *m68k, unsigned int address)
{
if (address >= m68k->encrypted_start && address < m68k->encrypted_end)
return (*m68k->memory.readimm16)(m68k->program, address);
else
return (*m68k->memory.read16)(m68k->program, address);
return (*m68k->memory.read16)(m68k->program, address);
}
INLINE unsigned int m68k_read_pcrelative_32(m68ki_cpu_core *m68k, unsigned int address)
{
if (address >= m68k->encrypted_start && address < m68k->encrypted_end)
return m68k_read_immediate_32(m68k, address);
else
return (*m68k->memory.read32)(m68k->program, address);
return (*m68k->memory.read32)(m68k->program, address);
}

2
src/emu/cpu/nec/nec.c
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@ -386,7 +386,7 @@ static void external_int(nec_state_t *nec_state)
{
/* the actual vector is retrieved after pushing flags */
/* and clearing the IF */
nec_interrupt(nec_state, -1,0);
nec_interrupt(nec_state, (UINT32)-1,0);
}
}

6
src/emu/cpu/pdp1/tx0.c
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@ -108,9 +108,9 @@ static int tx0_read(tx0_state *cpustate, offs_t address)
else if ((cpustate->lr_sel >> address) & 1)
/* live register (LR) */
return LR;
else
/* toggle switch storage (TSS) */
return cpustate->tss[address];
/* toggle switch storage (TSS) */
return cpustate->tss[address];
}
static void tx0_write(tx0_state *cpustate, offs_t address, int data)

4
src/emu/cpu/powerpc/ppcdrc.c
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@ -3024,7 +3024,7 @@ static int generate_instruction_1f(powerpc_state *ppc, drcuml_block *block, comp
case 0x0ea: /* ADDMEx */
case 0x2ea: /* ADDMEOx */
UML_CARRY(block, SPR32(SPR_XER), IMM(29)); // carry [xer],XER_CA
UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), IMM(-1)); // addc rd,ra,-1
UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), IMM((UINT32)-1)); // addc rd,ra,-1
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
@ -3065,7 +3065,7 @@ static int generate_instruction_1f(powerpc_state *ppc, drcuml_block *block, comp
case 0x2e8: /* SUBFMEOx */
UML_XOR(block, IREG(0), SPR32(SPR_XER), IMM(XER_CA)); // xor i0,[xer],XER_CA
UML_CARRY(block, IREG(0), IMM(29)); // carry i0,XER_CA
UML_SUBB(block, R32(G_RD(op)), IMM(-1), R32(G_RA(op))); // subc rd,-1,ra
UML_SUBB(block, R32(G_RD(op)), IMM((UINT32)-1), R32(G_RA(op))); // subc rd,-1,ra
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;

4
src/emu/cpu/tms57002/tms57002.c
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@ -1031,8 +1031,8 @@ INLINE int xmode(UINT32 opcode, char type)
return 1;
} else if(opcode & 0x200)
return 2;
else
return 1;
return 1;
}
INLINE int sfao(UINT32 st1)

2
src/emu/cpu/v30mz/v30mz.c
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@ -207,7 +207,7 @@ static void external_int(v30mz_state *cpustate)
{
/* the actual vector is retrieved after pushing flags */
/* and clearing the IF */
nec_interrupt(cpustate,-1,0);
nec_interrupt(cpustate,(UINT32)-1,0);
}
}