From 528d5b652819528346102db07a38b1ea02ef057e Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Tue, 30 Dec 2008 00:24:06 +0000 Subject: [PATCH] Merged i8x41 (UPI-41) core into MCS-48 core: * all code now lives in mcs48.c * rewrote disassembler as unified MCS-48/UPI-41 disassembler * changed UPI-41 interfaces to match MCS-48 * added new master read/write interfaces for external access * unified interface to 8243 expander chip * converted tnzs and decocass to the new interfaces DECO Cassette fixes/cleanups: * converted tape handling to a device * changed tape handling to use a timer callback * updated to work with new UPI-41 core * corrected clock speeds for all chips (esp. the 8041) * fixed very wrong CRC implementation (how did it ever work?) * corrected sound IRQ rate * corrected video timing Burger Time hardware fixes: * corrected sound IRQ rate and handling * removed lnc audio reset hack * full audio memory maps based on schematics * corrected video timing --- .gitattributes | 4 - src/emu/cpu/cpu.mak | 21 - src/emu/cpu/i8x41/8x41dasm.c | 523 ------------ src/emu/cpu/i8x41/i8x41.c | 1354 ------------------------------- src/emu/cpu/i8x41/i8x41.h | 100 --- src/emu/cpu/i8x41/i8x41ops.c | 1085 ------------------------- src/emu/cpu/mcs48/mcs48.c | 1463 ++++++++++++++++++++-------------- src/emu/cpu/mcs48/mcs48.h | 68 +- src/emu/cpu/mcs48/mcs48dsm.c | 587 +++++++------- src/mame/drivers/btime.c | 253 ++++-- src/mame/drivers/decocass.c | 246 +++--- src/mame/drivers/tnzs.c | 11 +- src/mame/includes/btime.h | 3 - src/mame/machine/decocass.c | 1217 ++++++++++++++-------------- src/mame/machine/decocass.h | 20 +- src/mame/machine/tnzs.c | 19 +- src/mame/mame.mak | 5 - src/mame/video/btime.c | 42 +- src/mame/video/decocass.c | 24 +- 19 files changed, 2161 insertions(+), 4884 deletions(-) delete mode 100644 src/emu/cpu/i8x41/8x41dasm.c delete mode 100644 src/emu/cpu/i8x41/i8x41.c delete mode 100644 src/emu/cpu/i8x41/i8x41.h delete mode 100644 src/emu/cpu/i8x41/i8x41ops.c diff --git a/.gitattributes b/.gitattributes index b47f39aa57b..eb90ff59870 100644 --- a/.gitattributes +++ b/.gitattributes @@ -166,10 +166,6 @@ src/emu/cpu/i86/table86.h svneol=native#text/plain src/emu/cpu/i860/i860.c svneol=native#text/plain src/emu/cpu/i860/i860.h svneol=native#text/plain src/emu/cpu/i860/i860dasm.c svneol=native#text/plain -src/emu/cpu/i8x41/8x41dasm.c svneol=native#text/plain -src/emu/cpu/i8x41/i8x41.c svneol=native#text/plain -src/emu/cpu/i8x41/i8x41.h svneol=native#text/plain -src/emu/cpu/i8x41/i8x41ops.c svneol=native#text/plain src/emu/cpu/i960/i960.c svneol=native#text/plain src/emu/cpu/i960/i960.h svneol=native#text/plain src/emu/cpu/i960/i960dis.c svneol=native#text/plain diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index 645c0617fb0..66417a64fe1 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -671,27 +671,6 @@ $(CPUOBJ)/mcs48/mcs48.o: $(CPUSRC)/mcs48/mcs48.c \ -#------------------------------------------------- -# Intel 8x41 -#------------------------------------------------- - -CPUDEFS += -DHAS_I8041=$(if $(filter I8041,$(CPUS)),1,0) -CPUDEFS += -DHAS_I8741=$(if $(filter I8741,$(CPUS)),1,0) -CPUDEFS += -DHAS_I8042=$(if $(filter I8042,$(CPUS)),1,0) -CPUDEFS += -DHAS_I8242=$(if $(filter I8242,$(CPUS)),1,0) -CPUDEFS += -DHAS_I8742=$(if $(filter I8742,$(CPUS)),1,0) - -ifneq ($(filter I8041 I8741 I8042 I8242 I8742 ,$(CPUS)),) -OBJDIRS += $(CPUOBJ)/i8x41 -CPUOBJS += $(CPUOBJ)/i8x41/i8x41.o -DBGOBJS += $(CPUOBJ)/i8x41/8x41dasm.o -endif - -$(CPUOBJ)/i8x41/i8x41.o: $(CPUSRC)/i8x41/i8x41.c \ - $(CPUSRC)/i8x41/i8x41.h - - - #------------------------------------------------- # Intel 8051 and derivatives #------------------------------------------------- diff --git a/src/emu/cpu/i8x41/8x41dasm.c b/src/emu/cpu/i8x41/8x41dasm.c deleted file mode 100644 index ccc3f3be13f..00000000000 --- a/src/emu/cpu/i8x41/8x41dasm.c +++ /dev/null @@ -1,523 +0,0 @@ -#include "debugger.h" -#include "i8x41.h" - -CPU_DISASSEMBLE( i8x41 ) -{ - UINT32 flags = 0; - unsigned PC = pc; - UINT8 op; - UINT8 arg; - - op = oprom[PC++ - pc]; - switch( op ) - { - case 0x00: /* 1: 0000 0000 */ - sprintf(buffer, "nop"); - break; - case 0x01: /* 1: 0000 0001 */ - sprintf(buffer, "ill"); - break; - case 0x02: /* 1: 0000 0010 */ - sprintf(buffer, "out dbb,a"); - break; - case 0x03: /* 2: 0000 0011 */ - sprintf(buffer, "add a,#$%02X", opram[PC++ - pc]); - break; - case 0x04: /* 2: aaa0 0100 */ - case 0x24: /* 2: aaa0 0100 */ - case 0x44: /* 2: aaa0 0100 */ - case 0x64: /* 2: aaa0 0100 */ - case 0x84: /* 2: aaa0 0100 */ - case 0xa4: /* 2: aaa0 0100 */ - case 0xc4: /* 2: aaa0 0100 */ - case 0xe4: /* 2: aaa0 0100 */ - sprintf(buffer, "jmp $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]); - break; - case 0x05: /* 1: 0000 0101 */ - sprintf(buffer, "en i"); - break; - case 0x06: /* 1: 0000 0110 */ - sprintf(buffer, "ill"); - break; - case 0x07: /* 1: 0000 0111 */ - sprintf(buffer, "dec a"); - break; - case 0x08: /* 2: 0000 10pp */ - case 0x09: /* 2: 0000 10pp */ - case 0x0a: /* 2: 0000 10pp */ - case 0x0b: /* 2: 0000 10pp */ - sprintf(buffer, "in a,p%d", op&3); - break; - case 0x0c: /* 2: 0000 11pp */ - case 0x0d: /* 2: 0000 11pp */ - case 0x0e: /* 2: 0000 11pp */ - case 0x0f: /* 2: 0000 11pp */ - sprintf(buffer, "movd a,p%d", op&3); - break; - case 0x10: /* 1: 0001 000r */ - case 0x11: /* 1: 0001 000r */ - sprintf(buffer, "inc @r%d", op&1); - break; - case 0x12: /* 2: bbb1 0010 */ - case 0x32: /* 2: bbb1 0010 */ - case 0x52: /* 2: bbb1 0010 */ - case 0x72: /* 2: bbb1 0010 */ - case 0x92: /* 2: bbb1 0010 */ - case 0xb2: /* 2: bbb1 0010 */ - case 0xd2: /* 2: bbb1 0010 */ - case 0xf2: /* 2: bbb1 0010 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jb%d $%04X", op >> 5, (PC & 0x700) | arg); - break; - case 0x13: /* 2: 0001 0011 */ - sprintf(buffer, "addc $%02X", opram[PC++ - pc]); - break; - case 0x14: /* 2: aaa1 0100 */ - case 0x34: /* 2: aaa1 0100 */ - case 0x54: /* 2: aaa1 0100 */ - case 0x74: /* 2: aaa1 0100 */ - case 0x94: /* 2: aaa1 0100 */ - case 0xb4: /* 2: aaa1 0100 */ - case 0xd4: /* 2: aaa1 0100 */ - case 0xf4: /* 2: aaa1 0100 */ - sprintf(buffer, "call $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]); - flags = DASMFLAG_STEP_OVER; - break; - case 0x15: /* 1: 0001 0101 */ - sprintf(buffer, "dis i"); - break; - case 0x16: /* 2: 0001 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jtf $%04X", (PC & 0x700) | arg); - break; - case 0x17: /* 1: 0001 0111 */ - sprintf(buffer, "inc a"); - break; - case 0x18: /* 1: 0001 1rrr */ - case 0x19: /* 1: 0001 1rrr */ - case 0x1a: /* 1: 0001 1rrr */ - case 0x1b: /* 1: 0001 1rrr */ - case 0x1c: /* 1: 0001 1rrr */ - case 0x1d: /* 1: 0001 1rrr */ - case 0x1e: /* 1: 0001 1rrr */ - case 0x1f: /* 1: 0001 1rrr */ - sprintf(buffer, "inc r%d", op&7); - break; - case 0x20: /* 1: 0010 000r */ - case 0x21: /* 1: 0010 000r */ - sprintf(buffer, "xch a,@r%d", op&1); - break; - case 0x22: /* 1: 0010 0010 */ - sprintf(buffer, "in a,ddb"); - break; - case 0x23: /* 2: 0010 0011 */ - sprintf(buffer, "mov a,#$%02X", opram[PC++ - pc]); - break; - case 0x25: /* 1: 0010 0101 */ - sprintf(buffer, "en tcnti"); - break; - case 0x26: /* 2: 0010 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jnt0 $%04X", (PC & 0x700) | arg); - break; - case 0x27: /* 1: 0010 0111 */ - sprintf(buffer, "clr a"); - break; - case 0x28: /* 1: 0010 1rrr */ - case 0x29: /* 1: 0010 1rrr */ - case 0x2a: /* 1: 0010 1rrr */ - case 0x2b: /* 1: 0010 1rrr */ - case 0x2c: /* 1: 0010 1rrr */ - case 0x2d: /* 1: 0010 1rrr */ - case 0x2e: /* 1: 0010 1rrr */ - case 0x2f: /* 1: 0010 1rrr */ - sprintf(buffer, "xch a,r%d", op&7); - break; - case 0x30: /* 1: 0011 000r */ - case 0x31: /* 1: 0011 000r */ - sprintf(buffer, "xchd a,@r%d", op&1); - break; - case 0x33: /* 1: 0011 0101 */ - sprintf(buffer, "ill"); - break; - case 0x35: /* 1: 0000 0101 */ - sprintf(buffer, "dis tcnti"); - break; - case 0x36: /* 2: 0011 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jt0 $%04X", (PC & 0x700) | arg); - break; - case 0x37: /* 1: 0011 0111 */ - sprintf(buffer, "cpl a"); - break; - case 0x38: /* 2: 0011 10pp */ - case 0x39: /* 2: 0011 10pp */ - case 0x3a: /* 2: 0011 10pp */ - case 0x3b: /* 2: 0011 10pp */ - sprintf(buffer, "out p%d,a", op&3); - break; - case 0x3c: /* 2: 0011 11pp */ - case 0x3d: /* 2: 0011 11pp */ - case 0x3e: /* 2: 0011 11pp */ - case 0x3f: /* 2: 0011 11pp */ - sprintf(buffer, "movd p%d,a", op&7); - break; - case 0x40: /* 1: 0100 000r */ - case 0x41: /* 1: 0100 000r */ - sprintf(buffer, "orl a,@r%d", op&1); - break; - case 0x42: /* 1: 0100 0010 */ - sprintf(buffer, "mov a,t"); - break; - case 0x43: /* 2: 0100 0011 */ - sprintf(buffer, "orl a,#$%02X", opram[PC++ - pc]); - break; - case 0x45: /* 1: 0100 0101 */ - sprintf(buffer, "strt cnt"); - break; - case 0x46: /* 2: 0100 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jnt1 $%04X", (PC & 0x700) | arg); - break; - case 0x47: /* 1: 0100 0111 */ - sprintf(buffer, "swap a"); - break; - case 0x48: /* 1: 0100 1rrr */ - case 0x49: /* 1: 0100 1rrr */ - case 0x4a: /* 1: 0100 1rrr */ - case 0x4b: /* 1: 0100 1rrr */ - case 0x4c: /* 1: 0100 1rrr */ - case 0x4d: /* 1: 0100 1rrr */ - case 0x4e: /* 1: 0100 1rrr */ - case 0x4f: /* 1: 0100 1rrr */ - sprintf(buffer, "orl a,r%d", op&7); - break; - case 0x50: /* 1: 0101 000r */ - case 0x51: /* 1: 0101 000r */ - sprintf(buffer, "anl a,@r%d", op&1); - break; - case 0x53: /* 2: 0101 0011 */ - sprintf(buffer, "anl a,#$%02X", opram[PC++ - pc]); - break; - case 0x55: /* 1: 0101 0101 */ - sprintf(buffer, "strt t"); - break; - case 0x56: /* 2: 0101 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jt1 $%04X", (PC & 0x700) | arg); - break; - case 0x57: /* 1: 0101 0111 */ - sprintf(buffer, "da a"); - break; - case 0x58: /* 1: 0101 1rrr */ - case 0x59: /* 1: 0101 1rrr */ - case 0x5a: /* 1: 0101 1rrr */ - case 0x5b: /* 1: 0101 1rrr */ - case 0x5c: /* 1: 0101 1rrr */ - case 0x5d: /* 1: 0101 1rrr */ - case 0x5e: /* 1: 0101 1rrr */ - case 0x5f: /* 1: 0101 1rrr */ - sprintf(buffer, "anl a,r%d", op&7); - break; - case 0x60: /* 1: 0110 000r */ - case 0x61: /* 1: 0110 000r */ - sprintf(buffer, "add a,@r%d", op&1); - break; - case 0x62: /* 1: 0110 0010 */ - sprintf(buffer, "mov t,a"); - break; - case 0x63: /* 1: 0110 0011 */ - sprintf(buffer, "ill"); - break; - case 0x65: /* 1: 0110 0101 */ - sprintf(buffer, "stop tcnt"); - break; - case 0x66: /* 1: 0110 0110 */ - sprintf(buffer, "ill"); - break; - case 0x67: /* 1: 0110 0111 */ - sprintf(buffer, "rrc a"); - break; - case 0x68: /* 1: 0110 1rrr */ - case 0x69: /* 1: 0110 1rrr */ - case 0x6a: /* 1: 0110 1rrr */ - case 0x6b: /* 1: 0110 1rrr */ - case 0x6c: /* 1: 0110 1rrr */ - case 0x6d: /* 1: 0110 1rrr */ - case 0x6e: /* 1: 0110 1rrr */ - case 0x6f: /* 1: 0110 1rrr */ - sprintf(buffer, "add a,r%d", op&7); - break; - case 0x70: /* 1: 0111 000r */ - case 0x71: /* 1: 0111 000r */ - sprintf(buffer, "addc a,@r%d", op&1); - break; - case 0x73: /* 1: 0111 0011 */ - sprintf(buffer, "ill"); - break; - case 0x75: /* 1: 0111 0101 */ - sprintf(buffer, "ill"); - break; - case 0x76: /* 2: 0111 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jf1 $%04X", (PC & 0x700) | arg); - break; - case 0x77: /* 1: 0111 0111 */ - sprintf(buffer, "rl a"); - break; - case 0x78: /* 1: 0111 1rrr */ - case 0x79: /* 1: 0111 1rrr */ - case 0x7a: /* 1: 0111 1rrr */ - case 0x7b: /* 1: 0111 1rrr */ - case 0x7c: /* 1: 0111 1rrr */ - case 0x7d: /* 1: 0111 1rrr */ - case 0x7e: /* 1: 0111 1rrr */ - case 0x7f: /* 1: 0111 1rrr */ - sprintf(buffer, "addc a,r%d", op&7); - break; - case 0x80: /* 1: 1000 0000 */ - sprintf(buffer, "ill "); - break; - case 0x81: /* 1: 1000 0001 */ - sprintf(buffer, "ill "); - break; - case 0x82: /* 1: 1000 0010 */ - sprintf(buffer, "ill "); - break; - case 0x83: /* 2: 1000 0011 */ - sprintf(buffer, "ret"); - flags = DASMFLAG_STEP_OUT; - break; - case 0x85: /* 1: 1000 0101 */ - sprintf(buffer, "clr f0"); - break; - case 0x86: /* 2: 1000 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jobf $%04X", (PC & 0x700) | arg); - break; - case 0x87: /* 1: 1000 0111 */ - sprintf(buffer, "ill"); - break; - case 0x88: /* 2: 1000 10pp */ - case 0x89: /* 2: 1000 10pp */ - case 0x8a: /* 2: 1000 10pp */ - case 0x8b: /* 2: 1000 10pp */ - sprintf(buffer, "orl p%d,#$%02X", op&3, opram[PC++ - pc]); - break; - case 0x8c: /* 2: 1000 11pp */ - case 0x8d: /* 2: 1000 11pp */ - case 0x8e: /* 2: 1000 11pp */ - case 0x8f: /* 2: 1000 11pp */ - sprintf(buffer, "orld p%d,a", op&7); - break; - case 0x90: /* 1: 1001 0000 */ - sprintf(buffer, "mov sts,a"); - break; - case 0x91: /* 1: 1001 0001 */ - sprintf(buffer, "ill"); - break; - case 0x93: /* 2: 1001 0011 */ - sprintf(buffer, "retr"); - flags = DASMFLAG_STEP_OVER; - break; - case 0x95: /* 1: 1001 0101 */ - sprintf(buffer, "cpl f0"); - break; - case 0x96: /* 2: 1001 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jnz $%04X", (PC & 0x700) | arg); - break; - case 0x97: /* 1: 1001 0111 */ - sprintf(buffer, "clr c"); - break; - case 0x98: /* 2: 1001 10pp */ - case 0x99: /* 2: 1001 10pp */ - case 0x9a: /* 2: 1001 10pp */ - case 0x9b: /* 2: 1001 10pp */ - sprintf(buffer, "anl p%d,#$%02X", op&3, opram[PC++ - pc]); - break; - case 0x9c: /* 2: 1001 11pp */ - case 0x9d: /* 2: 1001 11pp */ - case 0x9e: /* 2: 1001 11pp */ - case 0x9f: /* 2: 1001 11pp */ - sprintf(buffer, "anld p%d,a", op&7); - break; - case 0xa0: /* 1: 1010 000r */ - case 0xa1: /* 1: 1010 000r */ - sprintf(buffer, "mov @r%d,a", op&1); - break; - case 0xa2: /* 1: 1010 0010 */ - sprintf(buffer, "ill"); - break; - case 0xa3: /* 2: 1010 0011 */ - sprintf(buffer, "movp a,@a"); - break; - case 0xa5: /* 1: 1010 0101 */ - sprintf(buffer, "clr f1"); - break; - case 0xa6: /* 1: 1010 0110 */ - sprintf(buffer, "ill"); - break; - case 0xa7: /* 1: 1010 0111 */ - sprintf(buffer, "cpl c"); - break; - case 0xa8: /* 1: 1010 1rrr */ - case 0xa9: /* 1: 1010 1rrr */ - case 0xaa: /* 1: 1010 1rrr */ - case 0xab: /* 1: 1010 1rrr */ - case 0xac: /* 1: 1010 1rrr */ - case 0xad: /* 1: 1010 1rrr */ - case 0xae: /* 1: 1010 1rrr */ - case 0xaf: /* 1: 1010 1rrr */ - sprintf(buffer, "mov r%d,a", op&7); - break; - case 0xb0: /* 2: 1011 000r */ - case 0xb1: /* 2: 1011 000r */ - sprintf(buffer, "mov @r%d,#$%02X", op&1, opram[PC++ - pc]); - break; - case 0xb3: /* 2: 1011 0011 */ - sprintf(buffer, "jmpp @a"); - break; - case 0xb5: /* 1: 1011 0101 */ - sprintf(buffer, "cpl f1"); - break; - case 0xb6: /* 2: 1011 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jf0 $%04X", (PC & 0x700) | arg); - break; - case 0xb7: /* 1: 1011 0111 */ - sprintf(buffer, "ill"); - break; - case 0xb8: /* 1: 1011 1rrr */ - case 0xb9: /* 1: 1011 1rrr */ - case 0xba: /* 1: 1011 1rrr */ - case 0xbb: /* 1: 1011 1rrr */ - case 0xbc: /* 1: 1011 1rrr */ - case 0xbd: /* 1: 1011 1rrr */ - case 0xbe: /* 1: 1011 1rrr */ - case 0xbf: /* 1: 1011 1rrr */ - sprintf(buffer, "mov r%d,#$%02X", op&7, opram[PC++ - pc]); - break; - case 0xc0: /* 1: 1100 0000 */ - sprintf(buffer, "ill"); - break; - case 0xc1: /* 1: 1100 0001 */ - sprintf(buffer, "ill"); - break; - case 0xc2: /* 1: 1100 0010 */ - sprintf(buffer, "ill"); - break; - case 0xc3: /* 1: 1100 0011 */ - sprintf(buffer, "ill"); - break; - case 0xc5: /* 1: 1100 0101 */ - sprintf(buffer, "sel rb0"); - break; - case 0xc6: /* 2: 1100 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jz $%04X", (PC & 0x700) | arg); - break; - case 0xc7: /* 1: 1100 0111 */ - sprintf(buffer, "mov a,psw"); - break; - case 0xc8: /* 1: 1100 1rrr */ - case 0xc9: /* 1: 1100 1rrr */ - case 0xca: /* 1: 1100 1rrr */ - case 0xcb: /* 1: 1100 1rrr */ - case 0xcc: /* 1: 1100 1rrr */ - case 0xcd: /* 1: 1100 1rrr */ - case 0xce: /* 1: 1100 1rrr */ - case 0xcf: /* 1: 1100 1rrr */ - sprintf(buffer, "dec r%d", op&7); - break; - case 0xd0: /* 1: 1101 000r */ - case 0xd1: /* 1: 1101 000r */ - sprintf(buffer, "xrl a,@r%d", op&1); - break; - case 0xd3: /* 1: 1101 0011 */ - sprintf(buffer, "xrl a,#$%02X", opram[PC++ - pc]); - break; - case 0xd5: /* 1: 1101 0101 */ - sprintf(buffer, "sel rb1"); - break; - case 0xd6: /* 2: 1101 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jnibf $%04X", (PC & 0x700) | arg); - break; - case 0xd7: /* 1: 1101 0111 */ - sprintf(buffer, "mov psw,a"); - break; - case 0xd8: /* 1: 1101 1rrr */ - case 0xd9: /* 1: 1101 1rrr */ - case 0xda: /* 1: 1101 1rrr */ - case 0xdb: /* 1: 1101 1rrr */ - case 0xdc: /* 1: 1101 1rrr */ - case 0xdd: /* 1: 1101 1rrr */ - case 0xde: /* 1: 1101 1rrr */ - case 0xdf: /* 1: 1101 1rrr */ - sprintf(buffer, "xrl a,r%d", op&7); - break; - case 0xe0: /* 1: 1110 0000 */ - sprintf(buffer, "ill"); - break; - case 0xe1: /* 1: 1110 0001 */ - sprintf(buffer, "ill"); - break; - case 0xe2: /* 1: 1110 0010 */ - sprintf(buffer, "ill"); - break; - case 0xe3: /* 2: 1110 0011 */ - sprintf(buffer, "movp3 a,@a"); - break; - case 0xe5: /* 1: 1110 0101 */ - sprintf(buffer, "en dma"); - break; - case 0xe6: /* 2: 1110 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jnc $%04X", (PC & 0x700) | arg); - break; - case 0xe7: /* 1: 1110 0111 */ - sprintf(buffer, "rl a"); - break; - case 0xe8: /* 2: 1110 1rrr */ - case 0xe9: /* 2: 1110 1rrr */ - case 0xea: /* 2: 1110 1rrr */ - case 0xeb: /* 2: 1110 1rrr */ - case 0xec: /* 2: 1110 1rrr */ - case 0xed: /* 2: 1110 1rrr */ - case 0xee: /* 2: 1110 1rrr */ - case 0xef: /* 2: 1110 1rrr */ - arg = opram[PC++ - pc]; - sprintf(buffer, "djnz r%d,$%04X", op&7, (PC & 0x700) | arg); - flags = DASMFLAG_STEP_OVER; - break; - case 0xf0: /* 1: 1111 000r */ - case 0xf1: /* 1: 1111 000r */ - sprintf(buffer, "mov a,@r%d", op&1); - break; - case 0xf3: /* 1: 1111 0011 */ - sprintf(buffer, "ill"); - break; - case 0xf5: /* 1: 1111 0101 */ - sprintf(buffer, "en flags"); - break; - case 0xf6: /* 2: 1111 0110 */ - arg = opram[PC++ - pc]; - sprintf(buffer, "jc $%04X", (PC & 0x700) | arg); - break; - case 0xf7: /* 1: 1111 0111 */ - sprintf(buffer, "rlc a"); - break; - case 0xf8: /* 1: 1111 1rrr */ - case 0xf9: /* 1: 1111 1rrr */ - case 0xfa: /* 1: 1111 1rrr */ - case 0xfb: /* 1: 1111 1rrr */ - case 0xfc: /* 1: 1111 1rrr */ - case 0xfd: /* 1: 1111 1rrr */ - case 0xfe: /* 1: 1111 1rrr */ - case 0xff: /* 1: 1111 1rrr */ - sprintf(buffer, "mov a,r%d", op&7); - break; - } - return (PC - pc) | flags | DASMFLAG_SUPPORTED; -} diff --git a/src/emu/cpu/i8x41/i8x41.c b/src/emu/cpu/i8x41/i8x41.c deleted file mode 100644 index 6753362a038..00000000000 --- a/src/emu/cpu/i8x41/i8x41.c +++ /dev/null @@ -1,1354 +0,0 @@ -/***************************************************************************** - * - * i8x41.c - * Portable UPI-41/8041/8741/8042/8742 emulator V0.2 - * - * Copyright Juergen Buchmueller, all rights reserved. - * You can contact me at juergen@mame.net or pullmoll@stop1984.com - * - * - This source code is released as freeware for non-commercial purposes - * as part of the M.A.M.E. (Multiple Arcade Machine Emulator) project. - * The licensing terms of MAME apply to this piece of code for the MAME - * project and derviative works, as defined by the MAME license. You - * may opt to make modifications, improvements or derivative works under - * that same conditions, and the MAME project may opt to keep - * modifications, improvements or derivatives under their terms exclusively. - * - * - Alternatively you can choose to apply the terms of the "GPL" (see - * below) to this - and only this - piece of code or your derivative works. - * Note that in no case your choice can have any impact on any other - * source code of the MAME project, or binary, or executable, be it closely - * or losely related to this piece of code. - * - * - At your choice you are also free to remove either licensing terms from - * this file and continue to use it under only one of the two licenses. Do this - * if you think that licenses are not compatible (enough) for you, or if you - * consider either license 'too restrictive' or 'too free'. - * - * - GPL (GNU General Public License) - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * - * This work is solely based on the - * 'Intel(tm) UPI(tm)-41AH/42AH Users Manual' - * - * - * **** Change Log **** - * Wilbert Pol (24-Jun-2008) changed version to 0.6 - * - Updated the ram sizes. 8041 uses 128 bytes, 8042 - * uses 256 bytes. - * - Added support for re-enabling interrupts inside - * an interrupt handler. - * - Fixed cycle count for DJNZ instruction. - * - * Wilbert Pol (23-Jun-2008) changed version to 0.5 - * - Added configurable i8x41/i8x42 subtype support. - * - Fixed disassembly for opcode 0x67. - * - Fixed carry flag handling in ADDC A,#N instruction. - * - Fixed carry flag handling in RLC A instruction. - * - * Wilbert Pol (22-Jun-2008) changed version to 0.4 - * - Removed i8x41.ram hack. - * - * HJB (19-Dec-2004) changed version to 0.3 - * - Tried to handle accesses to registers in get_info/set_info - * before i8x41.ram is is initialized. - * - cosmetics: readability in get_info/set_info, replaced non-ASCII - * codes in comments, add 'ex' tabstop definition - * - * TLP (10-Jan-2003) Changed ver from 0.1 to 0.2 - * - Changed the internal RAM mask from 3Fh to FFh . The i8x41/i8x42 have - * 128/256 bytes of internal RAM respectively. - * - Added output port data to the debug register view window. - * - Added some missing break commands to the set_reg switch function. - * - Changed Ports 1 and 2 to latched types (Quasi-bidirectional). - * - Stopped illegal access to Port 0 and 3 (they don't exist). - * - Changed ANLD, ORLD and MOVD instructions to act through Port 2 in - * nibble mode. - * - Copied F0 and moved F1 flags to the STATE flag bits where they belong. - * - Corrected the 'addr' field by changing it from UINT8 to UINT16 for: - * 'INC @Rr' 'MOV @Rr,A' 'MOV @Rr,#N' 'XCH A,@Rr' 'XCHD A,@Rr' - * - Added mask to TIMER when the TEST1 Counter overflows. - * - Seperated the prescaler out of the timer/counter, in order to correct - * the TEST1 input counter step. - * - Moved TEST0 and TEST1 status flags out of the STATE register. - * STATE register uses these upper bits for user definable purposes. - * - TEST0 and TEST1 input lines are now sampled during the JTx/JNTx - * instructions. - * - Two methods for updating TEST1 input during counter mode are now - * supported depending on the mode of use required. - * You can use the Interrupt method, or input port read method. - * - TIMER is now only controlled by the timer or counter (not both) - * ie, When Starting the Counter, Stop the Timer and viceversa. - * - Nested IRQs of any sort are no longer allowed, however IRQs can - * become pending while a current interrupt is being serviced. - * - IBF Interrupt now has priority over the Timer Interrupt, when they - * occur simultaneously. - * - Add the external Interrupt FLAGS (Port 24, Port 25). - * To Do: - * - Add the external DMA FLAGS (Port 26, Port 27). Page 4 and 37 - * - *****************************************************************************/ - -/* - Chip RAM ROM - ---- --- --- - 8041 128 1k (ROM) - 8741 128 1k (EPROM) - 8042 256 2k (ROM) - 8742 256 2k (EPROM) - - http://cpucharts.wallsoferyx.net/icmatrix0.html - -*/ - -#include "debugger.h" -#include "i8x41.h" - -typedef struct _upi41_state_t upi41_state_t; -struct _upi41_state_t { - UINT16 ppc; - UINT16 pc; - UINT8 timer; - UINT8 prescaler; - UINT16 subtype; - UINT8 a; - UINT8 psw; - UINT8 state; - UINT8 enable; - UINT8 control; - UINT8 dbbi; - UINT8 dbbo; - UINT8 p1; - UINT8 p2; - UINT8 p2_hs; - UINT8 ram_mask; - cpu_irq_callback irq_callback; - const device_config *device; - const address_space *program; - const address_space *data; - const address_space *io; - int icount; -}; - -#define RM(s,a) memory_read_byte_8le((s)->program, a) - -#define IRAM_R(s,a) memory_read_byte_8le((s)->data, (a) & upi41_state->ram_mask) -#define IRAM_W(s,a,v) memory_write_byte_8le((s)->data, (a) & upi41_state->ram_mask, v) - -#define RP(s,a) memory_read_byte_8le((s)->io, a) -#define WP(s,a,v) memory_write_byte_8le((s)->io, a,v) - -#define ROP(s,pc) memory_decrypted_read_byte((s)->program, pc) -#define ROP_ARG(s,pc) memory_raw_read_byte((s)->program, pc) - -/* PC vectors */ -#define V_RESET 0x000 /* power on address */ -#define V_IBF 0x003 /* input buffer full interrupt vector */ -#define V_TIMER 0x007 /* timer/counter interrupt vector */ - -/* - * Memory locations - * Note: - * 000-3ff internal ROM for 8x41 (1K) - * 400-7ff (more) internal for 8x42 type (2K) - * 800-8ff internal RAM - */ -#define M_BANK0 0x000 /* register bank 0 (8 times 8 bits) */ -#define M_STACK 0x008 /* stack (8 times 16 bits) */ -#define M_BANK1 0x018 /* register bank 1 (8 times 8 bits) */ -#define M_USER 0x020 /* user memory (224 times 8 bits) */ - -/* PSW flag bits */ -#define FC 0x80 /* carry flag */ -#define FA 0x40 /* auxiliary carry flag */ -#define Ff0 0x20 /* flag 0 - same flag as F0 below */ -#define BS 0x10 /* bank select */ -#define FU 0x08 /* unused */ -#define SP 0x07 /* lower three bits are used as stack pointer */ - -/* STATE flag bits */ -#define OBF 0x01 /* output buffer full */ -#define IBF 0x02 /* input buffer full */ -#define F0 0x04 /* flag 0 - same flag as Ff0 above */ -#define F1 0x08 /* flag 1 */ - -/* ENABLE flag bits */ -#define IBFI 0x01 /* input buffer full interrupt */ -#define TCNTI 0x02 /* timer/counter interrupt */ -#define DMA 0x04 /* DMA mode */ -#define FLAGS 0x08 /* FLAGS mode */ -#define T 0x10 /* timer */ -#define CNT 0x20 /* counter */ - -/* CONTROL flag bits */ -#define IBFI_IGNR 0x01 /* IBFI interrupt should be ignored */ -#define IBFI_PEND 0x02 /* IBFI is pending */ -#define TIRQ_IGNR 0x04 /* Timer interrupt should be ignored */ -#define TIRQ_PEND 0x08 /* Timer interrupt is pending */ -#define TEST1 0x10 /* Test1 line mode */ -#define TOVF 0x20 /* Timer Overflow Flag */ - -#define IRQ_IGNR 0x05 /* Mask for IRQs being serviced */ -#define IRQ_PEND 0x0a /* Mask for IRQs pending */ - - -/* shorter names for the I8x41 structure elements */ -#define PPC upi41_state->ppc -#define PC upi41_state->pc -#define A upi41_state->a -#define PSW upi41_state->psw -#define DBBI upi41_state->dbbi -#define DBBO upi41_state->dbbo -#define STATE upi41_state->state -#define ENABLE upi41_state->enable -#define PRESCALER upi41_state->prescaler -#define P1 upi41_state->p1 -#define P2 upi41_state->p2 -#define P2_HS upi41_state->p2_hs /* Port 2 Hand Shaking */ -#define CONTROL upi41_state->control - - -#define GETR(s,n) (IRAM_R((s), ((PSW & BS) ? M_BANK1:M_BANK0)+(n))) -#define SETR(s,n,v) (IRAM_W((s), ((PSW & BS) ? M_BANK1:M_BANK0)+(n), (v))) - -static void set_irq_line(upi41_state_t *upi41_state, int irqline, int state); - -/************************************************************************ - * Shortcuts - ************************************************************************/ - -INLINE void push_pc_to_stack(upi41_state_t *upi41_state) -{ - IRAM_W( upi41_state, M_STACK + (PSW&SP) * 2 + 0, PC & 0xff); - IRAM_W( upi41_state, M_STACK + (PSW&SP) * 2 + 1, ((PC >> 8) & 0x0f) | (PSW & 0xf0) ); - PSW = (PSW & ~SP) | ((PSW + 1) & SP); -} - -#define PUSH_PC_TO_STACK() push_pc_to_stack(upi41_state) - -/*********************************************************************** - * Opcodes - ***********************************************************************/ - -#include "i8x41ops.c" - -/*********************************************************************** - * Execute a single opcode - ***********************************************************************/ - -INLINE void execute_op(upi41_state_t *upi41_state, UINT8 op) -{ - switch( op ) - { - /* opcode cycles bitmask */ - case 0x00: /* 1: 0000 0000 */ - nop(upi41_state, op); - break; - case 0x01: /* 1: 0000 0001 */ - illegal(upi41_state, op); - break; - case 0x02: /* 1: 0000 0010 */ - out_dbb_a(upi41_state, op); - break; - case 0x03: /* 2: 0000 0011 */ - add_i(upi41_state, op); - break; - case 0x04: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0x05: /* 1: 0000 0101 */ - en_i(upi41_state, op); - break; - case 0x06: /* 1: 0000 0110 */ - illegal(upi41_state, op); - break; - case 0x07: /* 1: 0000 0111 */ - dec_a(upi41_state, op); - break; - case 0x08: /* 2: 0000 10pp */ - case 0x09: /* 2: 0000 10pp */ - case 0x0a: /* 2: 0000 10pp */ - case 0x0b: /* 2: 0000 10pp */ - in_a_p(upi41_state, op & 3); - break; - case 0x0c: /* 2: 0000 11pp */ - case 0x0d: /* 2: 0000 11pp */ - case 0x0e: /* 2: 0000 11pp */ - case 0x0f: /* 2: 0000 11pp */ - movd_a_p(upi41_state, op & 3); - break; - case 0x10: /* 1: 0001 000r */ - inc_rm(upi41_state, 0); - break; - case 0x11: /* 1: 0001 000r */ - inc_rm(upi41_state, 1); - break; - case 0x12: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 0); - break; - case 0x13: /* 2: 0001 0011 */ - addc_i(upi41_state, op); - break; - case 0x14: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0x15: /* 1: 0001 0101 */ - dis_i(upi41_state, op); - break; - case 0x16: /* 2: 0001 0110 */ - jtf_i(upi41_state, op); - break; - case 0x17: /* 1: 0001 0111 */ - inc_a(upi41_state, op); - break; - case 0x18: /* 1: 0001 1rrr */ - case 0x19: /* 1: 0001 1rrr */ - case 0x1a: /* 1: 0001 1rrr */ - case 0x1b: /* 1: 0001 1rrr */ - case 0x1c: /* 1: 0001 1rrr */ - case 0x1d: /* 1: 0001 1rrr */ - case 0x1e: /* 1: 0001 1rrr */ - case 0x1f: /* 1: 0001 1rrr */ - inc_r(upi41_state, op & 7); - break; - case 0x20: /* 1: 0010 000r */ - xch_a_rm(upi41_state, 0); - break; - case 0x21: /* 1: 0010 000r */ - xch_a_rm(upi41_state, 1); - break; - case 0x22: /* 1: 0010 0010 */ - in_a_dbb(upi41_state, op); - break; - case 0x23: /* 2: 0010 0011 */ - mov_a_i(upi41_state, op); - break; - case 0x24: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0x25: /* 1: 0010 0101 */ - en_tcnti(upi41_state, op); - break; - case 0x26: /* 2: 0010 0110 */ - jnt0_i(upi41_state, op); - break; - case 0x27: /* 1: 0010 0111 */ - clr_a(upi41_state, op); - break; - case 0x28: /* 1: 0010 1rrr */ - case 0x29: /* 1: 0010 1rrr */ - case 0x2a: /* 1: 0010 1rrr */ - case 0x2b: /* 1: 0010 1rrr */ - case 0x2c: /* 1: 0010 1rrr */ - case 0x2d: /* 1: 0010 1rrr */ - case 0x2e: /* 1: 0010 1rrr */ - case 0x2f: /* 1: 0010 1rrr */ - xch_a_r(upi41_state, op & 7); - break; - case 0x30: /* 1: 0011 000r */ - xchd_a_rm(upi41_state, 0); - break; - case 0x31: /* 1: 0011 000r */ - xchd_a_rm(upi41_state, 1); - break; - case 0x32: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 1); - break; - case 0x33: /* 1: 0011 0101 */ - illegal(upi41_state, op); - break; - case 0x34: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0x35: /* 1: 0000 0101 */ - dis_tcnti(upi41_state, op); - break; - case 0x36: /* 2: 0011 0110 */ - jt0_i(upi41_state, op); - break; - case 0x37: /* 1: 0011 0111 */ - cpl_a(upi41_state, op); - break; - case 0x38: /* 2: 0011 10pp */ - case 0x39: /* 2: 0011 10pp */ - case 0x3a: /* 2: 0011 10pp */ - case 0x3b: /* 2: 0011 10pp */ - out_p_a(upi41_state, op & 3); - break; - case 0x3c: /* 2: 0011 11pp */ - case 0x3d: /* 2: 0011 11pp */ - case 0x3e: /* 2: 0011 11pp */ - case 0x3f: /* 2: 0011 11pp */ - movd_p_a(upi41_state, op & 3); - break; - case 0x40: /* 1: 0100 000r */ - orl_rm(upi41_state, 0); - break; - case 0x41: /* 1: 0100 000r */ - orl_rm(upi41_state, 1); - break; - case 0x42: /* 1: 0100 0010 */ - mov_a_t(upi41_state, op); - break; - case 0x43: /* 2: 0100 0011 */ - orl_i(upi41_state, op); - break; - case 0x44: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0x45: /* 1: 0100 0101 */ - strt_cnt(upi41_state, op); - break; - case 0x46: /* 2: 0100 0110 */ - jnt1_i(upi41_state, op); - break; - case 0x47: /* 1: 0100 0111 */ - swap_a(upi41_state, op); - break; - case 0x48: /* 1: 0100 1rrr */ - case 0x49: /* 1: 0100 1rrr */ - case 0x4a: /* 1: 0100 1rrr */ - case 0x4b: /* 1: 0100 1rrr */ - case 0x4c: /* 1: 0100 1rrr */ - case 0x4d: /* 1: 0100 1rrr */ - case 0x4e: /* 1: 0100 1rrr */ - case 0x4f: /* 1: 0100 1rrr */ - orl_r(upi41_state, op & 7); - break; - case 0x50: /* 1: 0101 000r */ - anl_rm(upi41_state, 0); - break; - case 0x51: /* 1: 0101 000r */ - anl_rm(upi41_state, 1); - break; - case 0x52: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 2); - break; - case 0x53: /* 2: 0101 0011 */ - anl_i(upi41_state, op); - break; - case 0x54: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0x55: /* 1: 0101 0101 */ - strt_t(upi41_state, op); - break; - case 0x56: /* 2: 0101 0110 */ - jt1_i(upi41_state, op); - break; - case 0x57: /* 1: 0101 0111 */ - da_a(upi41_state, op); - break; - case 0x58: /* 1: 0101 1rrr */ - case 0x59: /* 1: 0101 1rrr */ - case 0x5a: /* 1: 0101 1rrr */ - case 0x5b: /* 1: 0101 1rrr */ - case 0x5c: /* 1: 0101 1rrr */ - case 0x5d: /* 1: 0101 1rrr */ - case 0x5e: /* 1: 0101 1rrr */ - case 0x5f: /* 1: 0101 1rrr */ - anl_r(upi41_state, op & 7); - break; - case 0x60: /* 1: 0110 000r */ - add_rm(upi41_state, 0); - break; - case 0x61: /* 1: 0110 000r */ - add_rm(upi41_state, 1); - break; - case 0x62: /* 1: 0110 0010 */ - mov_t_a(upi41_state, op); - break; - case 0x63: /* 1: 0110 0011 */ - illegal(upi41_state, op); - break; - case 0x64: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0x65: /* 1: 0110 0101 */ - stop_tcnt(upi41_state, op); - break; - case 0x66: /* 1: 0110 0110 */ - illegal(upi41_state, op); - break; - case 0x67: /* 1: 0110 0111 */ - rrc_a(upi41_state, op); - break; - case 0x68: /* 1: 0110 1rrr */ - case 0x69: /* 1: 0110 1rrr */ - case 0x6a: /* 1: 0110 1rrr */ - case 0x6b: /* 1: 0110 1rrr */ - case 0x6c: /* 1: 0110 1rrr */ - case 0x6d: /* 1: 0110 1rrr */ - case 0x6e: /* 1: 0110 1rrr */ - case 0x6f: /* 1: 0110 1rrr */ - add_r(upi41_state, op & 7); - break; - case 0x70: /* 1: 0111 000r */ - addc_rm(upi41_state, 0); - break; - case 0x71: /* 1: 0111 000r */ - addc_rm(upi41_state, 1); - break; - case 0x72: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 3); - break; - case 0x73: /* 1: 0111 0011 */ - illegal(upi41_state, op); - break; - case 0x74: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0x75: /* 1: 0111 0101 */ - illegal(upi41_state, op); - break; - case 0x76: /* 2: 0111 0110 */ - jf1_i(upi41_state, op); - break; - case 0x77: /* 1: 0111 0111 */ - rr_a(upi41_state, op); - break; - case 0x78: /* 1: 0111 1rrr */ - case 0x79: /* 1: 0111 1rrr */ - case 0x7a: /* 1: 0111 1rrr */ - case 0x7b: /* 1: 0111 1rrr */ - case 0x7c: /* 1: 0111 1rrr */ - case 0x7d: /* 1: 0111 1rrr */ - case 0x7e: /* 1: 0111 1rrr */ - case 0x7f: /* 1: 0111 1rrr */ - addc_r(upi41_state, op & 7); - break; - case 0x80: /* 1: 1000 0000 */ - illegal(upi41_state, op); - break; - case 0x81: /* 1: 1000 0001 */ - illegal(upi41_state, op); - break; - case 0x82: /* 1: 1000 0010 */ - illegal(upi41_state, op); - break; - case 0x83: /* 2: 1000 0011 */ - ret(upi41_state, op); - break; - case 0x84: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0x85: /* 1: 1000 0101 */ - clr_f0(upi41_state, op); - break; - case 0x86: /* 2: 1000 0110 */ - jobf_i(upi41_state, op); - break; - case 0x87: /* 1: 1000 0111 */ - illegal(upi41_state, op); - break; - case 0x88: /* 2: 1000 10pp */ - case 0x89: /* 2: 1000 10pp */ - case 0x8a: /* 2: 1000 10pp */ - case 0x8b: /* 2: 1000 10pp */ - orl_p_i(upi41_state, op & 3); - break; - case 0x8c: /* 2: 1000 11pp */ - case 0x8d: /* 2: 1000 11pp */ - case 0x8e: /* 2: 1000 11pp */ - case 0x8f: /* 2: 1000 11pp */ - orld_p_a(upi41_state, op & 7); - break; - case 0x90: /* 1: 1001 0000 */ - mov_sts_a(upi41_state, op); - break; - case 0x91: /* 1: 1001 0001 */ - illegal(upi41_state, op); - break; - case 0x92: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 4); - break; - case 0x93: /* 2: 1001 0011 */ - retr(upi41_state, op); - break; - case 0x94: /* 1: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0x95: /* 1: 1001 0101 */ - cpl_f0(upi41_state, op); - break; - case 0x96: /* 2: 1001 0110 */ - jnz_i(upi41_state, op); - break; - case 0x97: /* 1: 1001 0111 */ - clr_c(upi41_state, op); - break; - case 0x98: /* 2: 1001 10pp , illegal port */ - case 0x99: /* 2: 1001 10pp */ - case 0x9a: /* 2: 1001 10pp */ - case 0x9b: /* 2: 1001 10pp , illegal port */ - anl_p_i(upi41_state, op & 3); - break; - case 0x9c: /* 2: 1001 11pp */ - case 0x9d: /* 2: 1001 11pp */ - case 0x9e: /* 2: 1001 11pp */ - case 0x9f: /* 2: 1001 11pp */ - anld_p_a(upi41_state, op & 7); - break; - case 0xa0: /* 1: 1010 000r */ - mov_rm_a(upi41_state, 0); - break; - case 0xa1: /* 1: 1010 000r */ - mov_rm_a(upi41_state, 1); - break; - case 0xa2: /* 1: 1010 0010 */ - illegal(upi41_state, op); - break; - case 0xa3: /* 2: 1010 0011 */ - movp_a_am(upi41_state, op); - break; - case 0xa4: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0xa5: /* 1: 1010 0101 */ - clr_f1(upi41_state, op); - break; - case 0xa6: /* 1: 1010 0110 */ - illegal(upi41_state, op); - break; - case 0xa7: /* 1: 1010 0111 */ - cpl_c(upi41_state, op); - break; - case 0xa8: /* 1: 1010 1rrr */ - case 0xa9: /* 1: 1010 1rrr */ - case 0xaa: /* 1: 1010 1rrr */ - case 0xab: /* 1: 1010 1rrr */ - case 0xac: /* 1: 1010 1rrr */ - case 0xad: /* 1: 1010 1rrr */ - case 0xae: /* 1: 1010 1rrr */ - case 0xaf: /* 1: 1010 1rrr */ - mov_r_a(upi41_state, op & 7); - break; - case 0xb0: /* 2: 1011 000r */ - mov_rm_i(upi41_state, 0); - break; - case 0xb1: /* 2: 1011 000r */ - mov_rm_i(upi41_state, 1); - break; - case 0xb2: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 5); - break; - case 0xb3: /* 2: 1011 0011 */ - jmpp_a(upi41_state, op); - break; - case 0xb4: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0xb5: /* 1: 1011 0101 */ - cpl_f1(upi41_state, op); - break; - case 0xb6: /* 2: 1011 0110 */ - jf0_i(upi41_state, op); - break; - case 0xb7: /* 1: 1011 0111 */ - illegal(upi41_state, op); - break; - case 0xb8: /* 2: 1011 1rrr */ - case 0xb9: /* 2: 1011 1rrr */ - case 0xba: /* 2: 1011 1rrr */ - case 0xbb: /* 2: 1011 1rrr */ - case 0xbc: /* 2: 1011 1rrr */ - case 0xbd: /* 2: 1011 1rrr */ - case 0xbe: /* 2: 1011 1rrr */ - case 0xbf: /* 2: 1011 1rrr */ - mov_r_i(upi41_state, op & 7); - break; - case 0xc0: /* 1: 1100 0000 */ - illegal(upi41_state, op); - break; - case 0xc1: /* 1: 1100 0001 */ - illegal(upi41_state, op); - break; - case 0xc2: /* 1: 1100 0010 */ - illegal(upi41_state, op); - break; - case 0xc3: /* 1: 1100 0011 */ - illegal(upi41_state, op); - break; - case 0xc4: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0xc5: /* 1: 1100 0101 */ - sel_rb0(upi41_state, op); - break; - case 0xc6: /* 2: 1100 0110 */ - jz_i(upi41_state, op); - break; - case 0xc7: /* 1: 1100 0111 */ - mov_a_psw(upi41_state, op); - break; - case 0xc8: /* 1: 1100 1rrr */ - case 0xc9: /* 1: 1100 1rrr */ - case 0xca: /* 1: 1100 1rrr */ - case 0xcb: /* 1: 1100 1rrr */ - case 0xcc: /* 1: 1100 1rrr */ - case 0xcd: /* 1: 1100 1rrr */ - case 0xcf: /* 1: 1100 1rrr */ - dec_r(upi41_state, op & 7); - break; - case 0xd0: /* 1: 1101 000r */ - xrl_rm(upi41_state, 0); - break; - case 0xd1: /* 1: 1101 000r */ - xrl_rm(upi41_state, 1); - break; - case 0xd2: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 6); - break; - case 0xd3: /* 1: 1101 0011 */ - xrl_i(upi41_state, op); - break; - case 0xd4: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0xd5: /* 1: 1101 0101 */ - sel_rb1(upi41_state, op); - break; - case 0xd6: /* 2: 1101 0110 */ - jnibf_i(upi41_state, op); - break; - case 0xd7: /* 1: 1101 0111 */ - mov_psw_a(upi41_state, op); - break; - case 0xd8: /* 1: 1101 1rrr */ - case 0xd9: /* 1: 1101 1rrr */ - case 0xda: /* 1: 1101 1rrr */ - case 0xdb: /* 1: 1101 1rrr */ - case 0xdc: /* 1: 1101 1rrr */ - case 0xdd: /* 1: 1101 1rrr */ - case 0xde: /* 1: 1101 1rrr */ - case 0xdf: /* 1: 1101 1rrr */ - xrl_r(upi41_state, op & 7); - break; - case 0xe0: /* 1: 1110 0000 */ - illegal(upi41_state, op); - break; - case 0xe1: /* 1: 1110 0001 */ - illegal(upi41_state, op); - break; - case 0xe2: /* 1: 1110 0010 */ - illegal(upi41_state, op); - break; - case 0xe3: /* 2: 1110 0011 */ - movp3_a_am(upi41_state, op); - break; - case 0xe4: /* 2: aaa0 0100 */ - jmp_i(upi41_state, op); - break; - case 0xe5: /* 1: 1110 0101 */ - en_dma(upi41_state, op); - break; - case 0xe6: /* 2: 1110 0110 */ - jnc_i(upi41_state, op); - break; - case 0xe7: /* 1: 1110 0111 */ - rl_a(upi41_state, op); - break; - case 0xe8: /* 2: 1110 1rrr */ - case 0xe9: /* 2: 1110 1rrr */ - case 0xea: /* 2: 1110 1rrr */ - case 0xeb: /* 2: 1110 1rrr */ - case 0xec: /* 2: 1110 1rrr */ - case 0xed: /* 2: 1110 1rrr */ - case 0xee: /* 2: 1110 1rrr */ - case 0xef: /* 2: 1110 1rrr */ - djnz_r_i(upi41_state, op & 7); - break; - case 0xf0: /* 1: 1111 000r */ - mov_a_rm(upi41_state, 0); - break; - case 0xf1: /* 1: 1111 000r */ - mov_a_rm(upi41_state, 1); - break; - case 0xf2: /* 2: bbb1 0010 */ - jbb_i(upi41_state, 7); - break; - case 0xf3: /* 1: 1111 0011 */ - illegal(upi41_state, op); - break; - case 0xf4: /* 2: aaa1 0100 */ - call_i(upi41_state, op); - break; - case 0xf5: /* 1: 1111 0101 */ - en_flags(upi41_state, op); - break; - case 0xf6: /* 2: 1111 0110 */ - jc_i(upi41_state, op); - break; - case 0xf7: /* 1: 1111 0111 */ - rlc_a(upi41_state, op); - break; - case 0xf8: /* 1: 1111 1rrr */ - case 0xf9: /* 1: 1111 1rrr */ - case 0xfa: /* 1: 1111 1rrr */ - case 0xfb: /* 1: 1111 1rrr */ - case 0xfc: /* 1: 1111 1rrr */ - case 0xfd: /* 1: 1111 1rrr */ - case 0xfe: /* 1: 1111 1rrr */ - case 0xff: /* 1: 1111 1rrr */ - mov_a_r(upi41_state, op & 7); - break; - } -} - -/*********************************************************************** - * Cycle Timings - ***********************************************************************/ - -static const UINT8 i8x41_cycles[] = { - 1,1,1,2,2,1,1,1,2,2,2,2,2,2,2,2, - 1,1,2,2,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,1,2,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,2,1,2,1,2,1,2,2,2,2,2,2,2,2, - 1,1,1,2,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,2,2,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,1,1,2,1,1,1,1,1,1,1,1,1,1,1, - 1,1,2,1,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,1,2,2,1,2,1,2,2,2,2,2,2,2,2, - 1,1,2,2,1,1,2,1,2,2,2,2,2,2,2,2, - 1,1,1,2,2,1,1,1,1,1,1,1,1,1,1,1, - 2,2,2,2,2,1,2,1,2,2,2,2,2,2,2,2, - 1,1,1,1,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,2,1,2,1,2,1,1,1,1,1,1,1,1,1, - 1,1,1,2,2,1,2,1,2,2,2,2,2,2,2,2, - 1,1,2,1,2,1,2,1,2,2,2,2,2,2,2,2 -}; - - -/**************************************************************************** - * Inits CPU emulation - ****************************************************************************/ - -static CPU_INIT( i8x41 ) -{ - upi41_state_t *upi41_state = device->token; - - upi41_state->irq_callback = irqcallback; - upi41_state->device = device; - upi41_state->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); - upi41_state->data = memory_find_address_space(device, ADDRESS_SPACE_DATA); - upi41_state->io = memory_find_address_space(device, ADDRESS_SPACE_IO); - upi41_state->subtype = 8041; - upi41_state->ram_mask = I8X41_intRAM_MASK; - - state_save_register_device_item(device, 0, upi41_state->ppc); - state_save_register_device_item(device, 0, upi41_state->pc); - state_save_register_device_item(device, 0, upi41_state->timer); - state_save_register_device_item(device, 0, upi41_state->prescaler); - state_save_register_device_item(device, 0, upi41_state->subtype); - state_save_register_device_item(device, 0, upi41_state->a); - state_save_register_device_item(device, 0, upi41_state->psw); - state_save_register_device_item(device, 0, upi41_state->state); - state_save_register_device_item(device, 0, upi41_state->enable); - state_save_register_device_item(device, 0, upi41_state->control); - state_save_register_device_item(device, 0, upi41_state->dbbi); - state_save_register_device_item(device, 0, upi41_state->dbbo); - state_save_register_device_item(device, 0, upi41_state->p1); - state_save_register_device_item(device, 0, upi41_state->p2); - state_save_register_device_item(device, 0, upi41_state->p2_hs); -} - -static CPU_INIT( i8042 ) -{ - upi41_state_t *upi41_state = device->token; - CPU_INIT_CALL(i8x41); - upi41_state->subtype = 8042; - upi41_state->ram_mask = I8X42_intRAM_MASK; -} - - - -/**************************************************************************** - * Reset registers to their initial values - ****************************************************************************/ - -static CPU_RESET( i8x41 ) -{ - upi41_state_t *upi41_state = device->token; - - upi41_state->ppc = 0; - upi41_state->pc = 0; - upi41_state->timer = 0; - upi41_state->prescaler = 0; - upi41_state->a = 0; - upi41_state->psw = 0; - upi41_state->state = 0; - upi41_state->enable = 0; - - ENABLE = IBFI | TCNTI; - DBBI = 0xff; - DBBO = 0xff; - /* Set Ports 1 and 2 to input mode */ - P1 = 0xff; - P2 = 0xff; - P2_HS= 0xff; -} - - -/**************************************************************************** - * Shut down CPU emulation - ****************************************************************************/ - -static CPU_EXIT( i8x41 ) -{ - /* nothing to do */ -} - - -/**************************************************************************** - * Execute cycles - returns number of cycles actually run - ****************************************************************************/ - -static CPU_EXECUTE( i8x41 ) -{ - upi41_state_t *upi41_state = device->token; - int inst_cycles, T1_level; - - upi41_state->icount = cycles; - - do - { - UINT8 op = memory_decrypted_read_byte(upi41_state->program, PC); - - PPC = PC; - - debugger_instruction_hook(device, PC); - - PC += 1; - upi41_state->icount -= i8x41_cycles[op]; - - execute_op(upi41_state, op); - - if( ENABLE & CNT ) - { - inst_cycles = i8x41_cycles[op]; - for ( ; inst_cycles > 0; inst_cycles-- ) - { - T1_level = RP(upi41_state, I8X41_t1); - if( (CONTROL & TEST1) && (T1_level == 0) ) /* Negative Edge */ - { - upi41_state->timer++; - if (upi41_state->timer == 0) - { - CONTROL |= TOVF; - if( ENABLE & TCNTI ) - CONTROL |= TIRQ_PEND; - } - } - if( T1_level ) CONTROL |= TEST1; - else CONTROL &= ~TEST1; - } - } - - if( ENABLE & T ) - { - PRESCALER += i8x41_cycles[op]; - /**** timer is prescaled by 32 ****/ - if( PRESCALER >= 32 ) - { - PRESCALER -= 32; - upi41_state->timer++; - if( upi41_state->timer == 0 ) - { - CONTROL |= TOVF; - if( ENABLE & TCNTI ) - CONTROL |= TIRQ_PEND; - } - } - } - - if( CONTROL & IRQ_PEND ) /* Are any Interrupts Pending ? */ - { - if( 0 == (CONTROL & IBFI_IGNR) ) /* Should we ignore IBFI interrupts ? */ - { - if( (ENABLE & IBFI) && (CONTROL & IBFI_PEND) ) - { - PUSH_PC_TO_STACK(); - PC = V_IBF; - CONTROL &= ~IBFI_PEND; - CONTROL |= IBFI_IGNR; - upi41_state->icount -= 2; - } - } - if( 0 == (CONTROL & TIRQ_IGNR) ) /* Should we ignore Timer interrupts ? */ - { - if( (ENABLE & TCNTI) && (CONTROL & TIRQ_PEND) ) - { - PUSH_PC_TO_STACK(); - PC = V_TIMER; - CONTROL &= ~TIRQ_PEND; - CONTROL |= IRQ_IGNR; - if( ENABLE & T ) PRESCALER += 2; /* 2 states */ - upi41_state->icount -= 2; /* 2 states to take interrupt */ - } - } - } - - - } while( upi41_state->icount > 0 ); - - return cycles - upi41_state->icount ; -} - - -/**************************************************************************** - * Set IRQ line state - ****************************************************************************/ - -static void set_irq_line(upi41_state_t *upi41_state, int irqline, int state) -{ - switch( irqline ) - { - case I8X41_INT_IBF: - if (state != CLEAR_LINE) - { - STATE |= IBF; - if (ENABLE & IBFI) - { - CONTROL |= IBFI_PEND; - } - } - else - { - STATE &= ~IBF; - } - break; - - case I8X41_INT_TEST1: - if( state != CLEAR_LINE ) - { - CONTROL |= TEST1; - } - else - { - /* high to low transition? */ - if( CONTROL & TEST1 ) - { - /* counting enabled? */ - if( ENABLE & CNT ) - { - upi41_state->timer++; - if( upi41_state->timer == 0 ) - { - CONTROL |= TOVF; - CONTROL |= TIRQ_PEND; - } - } - } - CONTROL &= ~TEST1; - } - break; - } -} - - -/************************************************************************** - * Generic set_info - **************************************************************************/ - -/*************************************************************************** - ADDRESS MAPS -***************************************************************************/ - -static ADDRESS_MAP_START(program_10bit, ADDRESS_SPACE_PROGRAM, 8) - AM_RANGE(0x00, 0x3ff) AM_ROM -ADDRESS_MAP_END - -static ADDRESS_MAP_START(program_11bit, ADDRESS_SPACE_PROGRAM, 8) - AM_RANGE(0x00, 0x7ff) AM_ROM -ADDRESS_MAP_END - -static ADDRESS_MAP_START(data_7bit, ADDRESS_SPACE_DATA, 8) - AM_RANGE(0x00, 0x7f) AM_RAM -ADDRESS_MAP_END - -static ADDRESS_MAP_START(data_8bit, ADDRESS_SPACE_DATA, 8) - AM_RANGE(0x00, 0xff) AM_RAM -ADDRESS_MAP_END - -static CPU_SET_INFO( i8x41 ) -{ - upi41_state_t *upi41_state = device->token; - - switch (state) - { - /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + I8X41_INT_IBF: set_irq_line(upi41_state, I8X41_INT_IBF, info->i); break; - case CPUINFO_INT_INPUT_STATE + I8X41_INT_TEST1: set_irq_line(upi41_state, I8X41_INT_TEST1, info->i); break; - - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + I8X41_PC: PC = info->i & 0x7ff; break; - - case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + I8X41_SP: PSW = (PSW & ~SP) | (info->i & SP); break; - - case CPUINFO_INT_REGISTER + I8X41_PSW: PSW = info->i; break; - case CPUINFO_INT_REGISTER + I8X41_A: A = info->i; break; - case CPUINFO_INT_REGISTER + I8X41_T: upi41_state->timer = info->i & 0x1fff; break; - case CPUINFO_INT_REGISTER + I8X41_R0: SETR(upi41_state, 0, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R1: SETR(upi41_state, 1, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R2: SETR(upi41_state, 2, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R3: SETR(upi41_state, 3, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R4: SETR(upi41_state, 4, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R5: SETR(upi41_state, 5, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R6: SETR(upi41_state, 6, info->i); break; - case CPUINFO_INT_REGISTER + I8X41_R7: SETR(upi41_state, 7, info->i); break; - - case CPUINFO_INT_REGISTER + I8X41_DATA: - DBBI = info->i; - if( upi41_state->subtype == 8041 ) /* plain 8041 had no split input/output DBB buffers */ - DBBO = info->i; - STATE &= ~F1; - STATE |= IBF; - if( ENABLE & IBFI ) - CONTROL |= IBFI_PEND; - if( ENABLE & FLAGS) - { - P2_HS |= 0x20; - if( 0 == (STATE & OBF) ) P2_HS |= 0x10; - else P2_HS &= 0xef; - WP(upi41_state, 0x02, (P2 & P2_HS) ); /* Assert the DBBI IRQ out on P25 */ - } - break; - - case CPUINFO_INT_REGISTER + I8X41_DATA_DASM: - /* Same as I8X41_DATA, except this is used by the */ - /* debugger and does not upset the flag states */ - DBBI = info->i; - if( upi41_state->subtype == 8041 ) /* plain 8041 had no split input/output DBB buffers */ - DBBO = info->i; - break; - - case CPUINFO_INT_REGISTER + I8X41_CMND: - DBBI = info->i; - if( upi41_state->subtype == 8041 ) /* plain 8041 had no split input/output DBB buffers */ - DBBO = info->i; - STATE |= F1; - STATE |= IBF; - if( ENABLE & IBFI ) - CONTROL |= IBFI_PEND; - if( ENABLE & FLAGS) - { - P2_HS |= 0x20; - if( 0 == (STATE & OBF) ) P2_HS |= 0x10; - else P2_HS &= 0xef; - WP(upi41_state, 0x02, (P2 & P2_HS) ); /* Assert the DBBI IRQ out on P25 */ - } - break; - - case CPUINFO_INT_REGISTER + I8X41_CMND_DASM: - /* Same as I8X41_CMND, except this is used by the */ - /* debugger and does not upset the flag states */ - DBBI = info->i; - if( upi41_state->subtype == 8041 ) /* plain 8041 had no split input/output DBB buffers */ - DBBO = info->i; - break; - - case CPUINFO_INT_REGISTER + I8X41_STAT: - logerror("i8x41 '%s':%03x Setting STAT DBBI to %02x\n", upi41_state->device->tag, PC, (UINT8)info->i); - /* writing status.. hmm, should we issue interrupts here too? */ - STATE = info->i; - break; - } -} - - - -/************************************************************************** - * Generic get_info - **************************************************************************/ - -CPU_GET_INFO( i8041 ) -{ - upi41_state_t *upi41_state = (device != NULL) ? device->token : NULL; - - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(upi41_state_t); break; - case CPUINFO_INT_INPUT_LINES: info->i = 2; break; - case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break; - case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; - case CPUINFO_INT_CLOCK_DIVIDER: info->i = I8X41_CLOCK_DIVIDER; break; - case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break; - case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break; - case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; - case CPUINFO_INT_MAX_CYCLES: info->i = 2; break; - - case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; - - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break; - - case CPUINFO_INT_INPUT_STATE + I8X41_INT_IBF: info->i = (STATE & IBF) ? ASSERT_LINE : CLEAR_LINE; break; - case CPUINFO_INT_INPUT_STATE + I8X41_INT_TEST1: info->i = (STATE & TEST1) ? ASSERT_LINE : CLEAR_LINE; break; - - case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break; - - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + I8X41_PC: info->i = PC; break; - - case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + I8X41_SP: info->i = PSW & SP; break; - - case CPUINFO_INT_REGISTER + I8X41_PSW: info->i = PSW; break; - case CPUINFO_INT_REGISTER + I8X41_A: info->i = A; break; - case CPUINFO_INT_REGISTER + I8X41_T: info->i = upi41_state->timer; break; - case CPUINFO_INT_REGISTER + I8X41_R0: info->i = GETR(upi41_state, 0); break; - case CPUINFO_INT_REGISTER + I8X41_R1: info->i = GETR(upi41_state, 1); break; - case CPUINFO_INT_REGISTER + I8X41_R2: info->i = GETR(upi41_state, 2); break; - case CPUINFO_INT_REGISTER + I8X41_R3: info->i = GETR(upi41_state, 3); break; - case CPUINFO_INT_REGISTER + I8X41_R4: info->i = GETR(upi41_state, 4); break; - case CPUINFO_INT_REGISTER + I8X41_R5: info->i = GETR(upi41_state, 5); break; - case CPUINFO_INT_REGISTER + I8X41_R6: info->i = GETR(upi41_state, 6); break; - case CPUINFO_INT_REGISTER + I8X41_R7: info->i = GETR(upi41_state, 7); break; - - case CPUINFO_INT_REGISTER + I8X41_DATA: - STATE &= ~OBF; /* reset the output buffer full flag */ - if( ENABLE & FLAGS) - { - P2_HS &= 0xef; - if( STATE & IBF ) P2_HS |= 0x20; - else P2_HS &= 0xdf; - WP(upi41_state, 0x02, (P2 & P2_HS) ); /* Clear the DBBO IRQ out on P24 */ - } - info->i = DBBO; - break; - - case CPUINFO_INT_REGISTER + I8X41_DATA_DASM: - /* Same as I8X41_DATA, except this is used by the */ - /* debugger and does not upset the flag states */ - info->i = DBBO; - break; - - case CPUINFO_INT_REGISTER + I8X41_STAT: - logerror("i8x41 '%s':%03x Reading STAT %02x\n", upi41_state->device->tag, PC, STATE); - info->i = STATE; - break; - - /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8x41); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8x41); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i8x41); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i8x41); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8x41); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8x41); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &upi41_state->icount ; break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, "I8041"); break; - case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "UPI-41/42"); break; - case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "0.6"); break; - case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break; - case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break; - - case CPUINFO_STR_FLAGS: - sprintf(info->s, "%c%c%c%c%c%c%c%c", - upi41_state->psw & 0x80 ? 'C':'.', - upi41_state->psw & 0x40 ? 'A':'.', - upi41_state->psw & 0x20 ? '0':'.', - upi41_state->psw & 0x10 ? 'B':'.', - upi41_state->psw & 0x08 ? '?':'.', - upi41_state->psw & 0x04 ? 's':'.', - upi41_state->psw & 0x02 ? 's':'.', - upi41_state->psw & 0x01 ? 's':'.'); - break; - - case CPUINFO_STR_REGISTER + I8X41_PC: sprintf(info->s, "PC:%04X", upi41_state->pc); break; - case CPUINFO_STR_REGISTER + I8X41_SP: sprintf(info->s, "S:%X", upi41_state->psw & SP); break; - case CPUINFO_STR_REGISTER + I8X41_PSW: sprintf(info->s, "PSW:%02X", upi41_state->psw); break; - case CPUINFO_STR_REGISTER + I8X41_A: sprintf(info->s, "A:%02X", upi41_state->a); break; - case CPUINFO_STR_REGISTER + I8X41_T: sprintf(info->s, "T:%02X.%02X", upi41_state->timer, (upi41_state->prescaler & 0x1f) ); break; - case CPUINFO_STR_REGISTER + I8X41_R0: sprintf(info->s, "R0:%02X", GETR(upi41_state, 0));break; - case CPUINFO_STR_REGISTER + I8X41_R1: sprintf(info->s, "R1:%02X", GETR(upi41_state, 1));break; - case CPUINFO_STR_REGISTER + I8X41_R2: sprintf(info->s, "R2:%02X", GETR(upi41_state, 2));break; - case CPUINFO_STR_REGISTER + I8X41_R3: sprintf(info->s, "R3:%02X", GETR(upi41_state, 3));break; - case CPUINFO_STR_REGISTER + I8X41_R4: sprintf(info->s, "R4:%02X", GETR(upi41_state, 4));break; - case CPUINFO_STR_REGISTER + I8X41_R5: sprintf(info->s, "R5:%02X", GETR(upi41_state, 5));break; - case CPUINFO_STR_REGISTER + I8X41_R6: sprintf(info->s, "R6:%02X", GETR(upi41_state, 6));break; - case CPUINFO_STR_REGISTER + I8X41_R7: sprintf(info->s, "R7:%02X", GETR(upi41_state, 7));break; - case CPUINFO_STR_REGISTER + I8X41_P1: sprintf(info->s, "P1:%02X", upi41_state->p1); break; - case CPUINFO_STR_REGISTER + I8X41_P2: sprintf(info->s, "P2:%02X", upi41_state->p2); break; - case CPUINFO_STR_REGISTER + I8X41_DATA_DASM: sprintf(info->s, "DBBI:%02X", upi41_state->dbbi); break; - case CPUINFO_STR_REGISTER + I8X41_CMND_DASM: sprintf(info->s, "DBBO:%02X", upi41_state->dbbo); break; - case CPUINFO_STR_REGISTER + I8X41_STAT: sprintf(info->s, "STAT:%02X", upi41_state->state); break; - } -} - - -#if (HAS_I8741) -CPU_GET_INFO( i8741 ) -{ - switch (state) - { - case CPUINFO_STR_NAME: strcpy(info->s, "I8741"); break; - default: CPU_GET_INFO_CALL(i8041); break; - } -} -#endif - -#if (HAS_I8042) -CPU_GET_INFO( i8042 ) -{ - switch (state) - { - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8042); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8042"); break; - default: CPU_GET_INFO_CALL(i8041); break; - } -} - -#endif - -#if (HAS_I8242) -CPU_GET_INFO( i8242 ) -{ - switch (state) - { - case CPUINFO_STR_NAME: strcpy(info->s, "I8242"); break; - default: CPU_GET_INFO_CALL(i8042); break; - } -} - -#endif - -#if (HAS_I8742) -CPU_GET_INFO( i8742 ) -{ - switch (state) - { - case CPUINFO_STR_NAME: strcpy(info->s, "I8742"); break; - default: CPU_GET_INFO_CALL(i8042); break; - } -} - -#endif diff --git a/src/emu/cpu/i8x41/i8x41.h b/src/emu/cpu/i8x41/i8x41.h deleted file mode 100644 index 7e88a5feaf2..00000000000 --- a/src/emu/cpu/i8x41/i8x41.h +++ /dev/null @@ -1,100 +0,0 @@ -/***************************************************************************** - * - * i8x41.h - * Portable UPI-41/8041/8741/8042/8742 emulator interface - * - * Copyright Juergen Buchmueller, all rights reserved. - * - * - This source code is released as freeware for non-commercial purposes. - * - You are free to use and redistribute this code in modified or - * unmodified form, provided you list me in the credits. - * - If you modify this source code, you must add a notice to each modified - * source file that it has been changed. If you're a nice person, you - * will clearly mark each change too. :) - * - If you wish to use this for commercial purposes, please contact me at - * pullmoll@t-online.de - * - The author of this copywritten work reserves the right to change the - * terms of its usage and license at any time, including retroactively - * - This entire notice must remain in the source code. - * - * TLP (10-Jan-2003) - * Added output ports registers to the debug viewer - * Added the Clock Divider - * - *****************************************************************************/ - -#pragma once - -#ifndef __I8X41_H__ -#define __I8X41_H__ - -#include "cpuintrf.h" - - -/* The i8x41/i8x42 input clock is divided by 15 */ -#define I8X41_CLOCK_DIVIDER 15 - -/* Note: - * I8X41_DATA is A0 = 0 and R/W - * I8X41_CMND is A0 = 1 and W only - * I8X41_STAT is A0 = 1 and R only - */ - -/**************************************************************************** - * Interrupt constants - */ - -#define I8X41_INT_IBF 0 /* input buffer full interrupt */ -#define I8X41_INT_TEST1 1 /* test1 line (also counter interrupt; taken on cntr overflow) */ - - -/**************************************************************************** - * Use these in the I/O port fields of your driver for the test lines - i.e, - * { I8X41_t0, I8X41_t0, i8041_test0_r }, - * { I8X41_t1, I8X41_t1, i8041_test1_r }, - * { I8X41_ps, I8X41_ps, i8041_port_strobe_w }, - */ - -#define I8X41_p1 0x01 -#define I8X41_p2 0x02 -#define I8X41_t0 0x80 /* TEST0 input port handle */ -#define I8X41_t1 0x81 /* TEST1 input port handle */ -#define I8X41_ps 0x82 /* Prog pin strobe for expanded port sync */ - - -/**************************************************************************** - * The i8x41/i8x42 have 128/256 bytes of internal memory respectively - */ - -#define I8X41_intRAM_MASK 0x7f -#define I8X42_intRAM_MASK 0xff - - -enum -{ - I8X41_PC=1, I8X41_SP, I8X41_PSW, I8X41_T, I8X41_DATA, I8X41_DATA_DASM, - I8X41_CMND, I8X41_CMND_DASM, I8X41_STAT, I8X41_P1, I8X41_P2,I8X41_A, - I8X41_R0, I8X41_R1, I8X41_R2, I8X41_R3, I8X41_R4, I8X41_R5, I8X41_R6, I8X41_R7 -}; - - - -/**************************************************************************** - * Public Functions - */ - -extern CPU_GET_INFO( i8041 ); -extern CPU_GET_INFO( i8741 ); -extern CPU_GET_INFO( i8042 ); -extern CPU_GET_INFO( i8242 ); -extern CPU_GET_INFO( i8742 ); - -#define CPU_I8041 CPU_GET_INFO_NAME( i8041 ) -#define CPU_I8741 CPU_GET_INFO_NAME( i8741 ) -#define CPU_I8042 CPU_GET_INFO_NAME( i8042 ) -#define CPU_I8242 CPU_GET_INFO_NAME( i8242 ) -#define CPU_I8742 CPU_GET_INFO_NAME( i8742 ) - -extern CPU_DISASSEMBLE( i8x41 ); - -#endif /* __I8X41_H__ */ diff --git a/src/emu/cpu/i8x41/i8x41ops.c b/src/emu/cpu/i8x41/i8x41ops.c deleted file mode 100644 index 1115037342a..00000000000 --- a/src/emu/cpu/i8x41/i8x41ops.c +++ /dev/null @@ -1,1085 +0,0 @@ - -/************************************************************************ - * Emulate the Instructions - ************************************************************************/ - -#define OP_HANDLER( _name ) INLINE void _name (upi41_state_t *upi41_state, UINT8 r) - -/*********************************** - * illegal opcodes - ***********************************/ -OP_HANDLER( illegal ) -{ - logerror("i8x41 '%s': illegal opcode at 0x%03x: %02x\n", upi41_state->device->tag, PC, ROP(upi41_state, PC)); -} - -/*********************************** - * 0110 1rrr * ADD A,Rr - ***********************************/ -OP_HANDLER( add_r ) -{ - UINT8 res = A + GETR(upi41_state, r); - if( res < A ) PSW |= FC; - if( (res & 0x0f) < (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0110 000r - * ADD A,@Rr - ***********************************/ -OP_HANDLER( add_rm ) -{ - UINT8 res = A + IRAM_R(upi41_state, GETR(upi41_state, r)); - if( res < A ) PSW |= FC; - if( (res & 0x0f) < (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0000 0011 7654 3210 - * ADD A,#n - ***********************************/ -OP_HANDLER( add_i ) -{ - UINT8 res = A + ROP_ARG(upi41_state, PC); - PC++; - if( res < A ) PSW |= FC; - if( (res & 0x0f) < (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0111 1rrr - * ADDC A,Rr - ***********************************/ -OP_HANDLER( addc_r ) -{ - UINT8 res = A + GETR(upi41_state, r) + (PSW >> 7); - if( res <= A ) PSW |= FC; - if( (res & 0x0f) <= (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0111 000r - * ADDC A,@Rr - ***********************************/ -OP_HANDLER( addc_rm ) -{ - UINT8 res = A + IRAM_R(upi41_state, GETR(upi41_state, r)) + (PSW >> 7); - if( res <= A ) PSW |= FC; - if( (res & 0x0f) <= (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0001 0011 7654 3210 - * ADDC A,#n - ***********************************/ -OP_HANDLER( addc_i ) -{ - UINT8 res = A + ROP_ARG(upi41_state, PC) + (PSW >> 7); - PC++; - if( res <= A ) PSW |= FC; - if( (res & 0x0f) < (A & 0x0f) ) PSW |= FA; - A = res; -} - -/*********************************** - * 0101 1rrr - * ANL A,Rr - ***********************************/ -OP_HANDLER( anl_r ) -{ - A = A & GETR(upi41_state, r); -} - -/*********************************** - * 0101 000r - * ANL A,@Rr - ***********************************/ -OP_HANDLER( anl_rm ) -{ - A = A & IRAM_R(upi41_state, GETR(upi41_state, r)); -} - -/*********************************** - * 0101 0011 7654 3210 - * ANL A,#n - ***********************************/ -OP_HANDLER( anl_i ) -{ - A = A & ROP_ARG(upi41_state, PC); - PC++; -} - -/*********************************** - * 1001 10pp 7654 3210 - * ANL Pp,#n - ***********************************/ -OP_HANDLER( anl_p_i ) -{ - UINT8 p = r; - UINT8 val = ROP_ARG(upi41_state, PC); - PC++; - /* changed to latched port scheme */ - switch (p) - { - case 00: break; /* invalid port */ - case 01: P1 &= val; WP(upi41_state, p, P1); break; - case 02: P2 &= val; WP(upi41_state, p, (P2 & P2_HS) ); break; - case 03: break; /* invalid port */ - default: break; - } -} - -/*********************************** - * 1001 11pp 7654 3210 - * ANLD Pp,A - ***********************************/ -OP_HANDLER( anld_p_a ) -{ - UINT8 p = r; - /* added proper expanded port setup */ - WP(upi41_state, 2, (P2 & 0xf0) | 0x0c | p); /* AND mode */ - WP(upi41_state, I8X41_ps, 0); /* activate command strobe */ - WP(upi41_state, 2, (A & 0x0f)); /* Expander to take care of AND function */ - WP(upi41_state, I8X41_ps, 1); /* release command strobe */ -} - -/*********************************** - * aaa1 0100 7654 3210 - * CALL addr - ***********************************/ -OP_HANDLER( call_i ) -{ - UINT16 page = (r & 0xe0) << 3; - UINT8 adr = ROP_ARG(upi41_state, PC); - PC++; - PUSH_PC_TO_STACK(); - PC = page | adr; -} - -/*********************************** - * 0010 0111 - * CLR A - ***********************************/ -OP_HANDLER( clr_a ) -{ - A = 0; -} - -/*********************************** - * 1001 0111 - * CLR C - ***********************************/ -OP_HANDLER( clr_c ) -{ - PSW &= ~FC; -} - -/*********************************** - * 1000 0101 - * CLR F0 - ***********************************/ -OP_HANDLER( clr_f0 ) -{ - PSW &= ~Ff0; - STATE &= ~F0; -} - -/*********************************** - * 1010 0101 - * CLR F1 - ***********************************/ -OP_HANDLER( clr_f1 ) -{ - STATE &= ~F1; -} - -/*********************************** - * 0011 0111 - * CPL A - ***********************************/ -OP_HANDLER( cpl_a ) -{ - A = ~A; -} - -/*********************************** - * 1010 0111 - * CPL C - ***********************************/ -OP_HANDLER( cpl_c ) -{ - PSW ^= FC; -} - -/*********************************** - * 1001 0101 - * CPL F0 - ***********************************/ -OP_HANDLER( cpl_f0 ) -{ - PSW ^= Ff0; - STATE ^= F0; -} - -/*********************************** - * 1011 0101 - * CPL F1 - ***********************************/ -OP_HANDLER( cpl_f1 ) -{ - STATE ^= F1; -} - -/*********************************** - * 0101 0111 - * DA A - ***********************************/ -OP_HANDLER( da_a ) -{ - UINT8 res = A + ((PSW & FA) || ((A & 0x0f) > 0x09)) ? 0x06 : 0x00; - if( (PSW & FC) || ((res & 0xf0) > 0x90) ) - res += 0x60; - if( res < A ) - PSW |= FC; - else - PSW &= ~FC; - A = res; -} - -/*********************************** - * 0000 0111 - * DEC A - ***********************************/ -OP_HANDLER( dec_a ) -{ - A -= 1; -} - -/*********************************** - * 1100 1rrr - * DEC Rr - ***********************************/ -OP_HANDLER( dec_r ) -{ - SETR(upi41_state, r, GETR(upi41_state, r) - 1); -} - -/*********************************** - * 0001 0101 - * DIS I - ***********************************/ -OP_HANDLER( dis_i ) -{ - ENABLE &= ~IBFI; /* disable input buffer full interrupt */ -} - -/*********************************** - * 0011 0101 - * DIS TCNTI - ***********************************/ -OP_HANDLER( dis_tcnti ) -{ - ENABLE &= ~TCNTI; /* disable timer/counter interrupt */ -} - -/*********************************** - * 0111 1rrr 7654 3210 - * DJNZ Rr,addr - ***********************************/ -OP_HANDLER( djnz_r_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC++; - SETR(upi41_state, r, GETR(upi41_state, r) - 1); - if( GETR(upi41_state, r) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1110 0101 - * EN DMA - ***********************************/ -OP_HANDLER( en_dma ) -{ - ENABLE |= DMA; /* enable DMA handshake lines */ - P2_HS &= 0xbf; - WP(upi41_state, 0x02, (P2 & P2_HS) ); -} - -/*********************************** - * 1111 0101 - * EN FLAGS - ***********************************/ -OP_HANDLER( en_flags ) -{ - if( 0 == (ENABLE & FLAGS) ) - { - /* Configure upper lines on Port 2 for IRQ handshaking (P24 and P25) */ - - ENABLE |= FLAGS; - if( STATE & OBF ) P2_HS |= 0x10; - else P2_HS &= 0xef; - if( STATE & IBF ) P2_HS |= 0x20; - else P2_HS &= 0xdf; - WP(upi41_state, 0x02, (P2 & P2_HS) ); - } -} - -/*********************************** - * 0000 0101 - * EN I - ***********************************/ -OP_HANDLER( en_i ) -{ - if( 0 == (ENABLE & IBFI) ) - { - ENABLE |= IBFI; /* enable input buffer full interrupt */ - CONTROL &= ~IBFI_IGNR; - if( STATE & IBF ) /* already got data in the buffer? */ - set_irq_line(upi41_state, I8X41_INT_IBF, HOLD_LINE); - } -} - -/*********************************** - * 0010 0101 - * EN TCNTI - ***********************************/ -OP_HANDLER( en_tcnti ) -{ - ENABLE |= TCNTI; /* enable timer/counter interrupt */ - CONTROL &= ~TIRQ_IGNR; -} - -/*********************************** - * 0010 0010 - * IN A,DBB - ***********************************/ -OP_HANDLER( in_a_dbb ) -{ - if( upi41_state->irq_callback ) - (upi41_state->irq_callback)(upi41_state->device, I8X41_INT_IBF); - - STATE &= ~IBF; /* clear input buffer full flag */ - if( ENABLE & FLAGS ) - { - P2_HS &= 0xdf; - if( STATE & OBF ) P2_HS |= 0x10; - else P2_HS &= 0xef; - WP(upi41_state, 0x02, (P2 & P2_HS) ); /* Clear the DBBI IRQ out on P25 */ - } - A = DBBI; -} - -/*********************************** - * 0000 10pp - * IN A,Pp - ***********************************/ -OP_HANDLER( in_a_p ) -{ - UINT8 p = r; - /* changed to latched port scheme */ - switch( p ) - { - case 00: break; /* invalid port */ - case 01: A = (RP(upi41_state, p) & P1); break; - case 02: A = (RP(upi41_state, p) & P2); break; - case 03: break; /* invalid port */ - default: break; - } -} - -/*********************************** - * 0001 0111 - * INC A - ***********************************/ -OP_HANDLER( inc_a ) -{ - A += 1; -} - -/*********************************** - * 0001 1rrr - * INC Rr - ***********************************/ -OP_HANDLER( inc_r ) -{ - SETR(upi41_state, r, GETR(upi41_state, r) + 1); -} - -/*********************************** - * 0001 000r - * INC @ Rr - ***********************************/ -OP_HANDLER( inc_rm ) -{ - UINT16 addr = GETR(upi41_state, r); - IRAM_W(upi41_state, addr, IRAM_R(upi41_state, addr) + 1 ); -} - -/*********************************** - * bbb1 0010 - * JBb addr - ***********************************/ -OP_HANDLER( jbb_i ) -{ - UINT8 bit = r; - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( A & (1 << bit) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1111 0110 - * JC addr - ***********************************/ -OP_HANDLER( jc_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( PSW & FC ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1011 0110 - * JF0 addr - ***********************************/ -OP_HANDLER( jf0_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( STATE & F0 ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0111 0110 - * JF1 addr - ***********************************/ -OP_HANDLER( jf1_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( STATE & F1 ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * aaa0 0100 - * JMP addr - ***********************************/ -OP_HANDLER( jmp_i ) -{ - /* err.. do we have 10 or 11 PC bits? - * CALL is said to use 0aa1 (4 pages) - * JMP is said to use aaa0 (8 pages) - */ - UINT16 page = ((r & 0xe0) << 3); - UINT8 adr = ROP_ARG(upi41_state, PC); - PC = page | adr; -} - -/*********************************** - * 1011 0011 - * JMP @ A - ***********************************/ -OP_HANDLER( jmpp_a ) -{ - UINT16 adr = (PC & 0x700) | A; - PC = (PC & 0x700) | RM(upi41_state, adr); -} - -/*********************************** - * 1110 0110 - * JNC addr - ***********************************/ -OP_HANDLER( jnc_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( !(PSW & FC) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1101 0110 - * JNIBF addr - ***********************************/ -OP_HANDLER( jnibf_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( 0 == (STATE & IBF) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0010 0110 - * JNT0 addr - ***********************************/ -OP_HANDLER( jnt0_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( 0 == RP(upi41_state, I8X41_t0) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0100 0110 - * JNT1 addr - ***********************************/ -OP_HANDLER( jnt1_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( !(ENABLE & CNT) ) - { - UINT8 level = RP(upi41_state, I8X41_t1); - if( level ) CONTROL |= TEST1; - else CONTROL &= ~TEST1; - } - if( !(CONTROL & TEST1) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1001 0110 - * JNZ addr - ***********************************/ -OP_HANDLER( jnz_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( A ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1000 0110 - * JOBF addr - ***********************************/ -OP_HANDLER( jobf_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( STATE & OBF ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0001 0110 - * JTF addr - ***********************************/ -OP_HANDLER( jtf_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( CONTROL & TOVF ) - PC = (PC & 0x700) | adr; - CONTROL &= ~TOVF; -} - -/*********************************** - * 0011 0110 - * JT0 addr - ***********************************/ -OP_HANDLER( jt0_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( RP(upi41_state, I8X41_t0) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0101 0110 - * JT1 addr - ***********************************/ -OP_HANDLER( jt1_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( !(ENABLE & CNT) ) - { - UINT8 level = RP(upi41_state, I8X41_t1); - if( level ) CONTROL |= TEST1; - else CONTROL &= ~TEST1; - } - if( (CONTROL & TEST1) ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 1100 0110 - * JZ addr - ***********************************/ -OP_HANDLER( jz_i ) -{ - UINT8 adr = ROP_ARG(upi41_state, PC); - PC += 1; - if( !A ) - PC = (PC & 0x700) | adr; -} - -/*********************************** - * 0010 0011 - * MOV A,#n - ***********************************/ -OP_HANDLER( mov_a_i ) -{ - A = ROP(upi41_state, PC); - PC += 1; -} - -/*********************************** - * 1100 0111 - * MOV A,PSW - ***********************************/ -OP_HANDLER( mov_a_psw ) -{ - A = PSW; -} - -/*********************************** - * 1111 1rrr - * MOV A,Rr - ***********************************/ -OP_HANDLER( mov_a_r ) -{ - A = GETR(upi41_state, r); -} - -/*********************************** - * 1111 000r - * MOV A,Rr - ***********************************/ -OP_HANDLER( mov_a_rm ) -{ - A = IRAM_R(upi41_state, GETR(upi41_state, r)); -} - -/*********************************** - * 0100 0010 - * MOV A,T - ***********************************/ -OP_HANDLER( mov_a_t ) -{ - A = upi41_state->timer; -} - -/*********************************** - * 1101 0111 - * MOV PSW,A - ***********************************/ -OP_HANDLER( mov_psw_a ) -{ - PSW = A; -} - -/*********************************** - * 1010 1rrr - * MOV Rr,A - ***********************************/ -OP_HANDLER( mov_r_a ) -{ - SETR(upi41_state, r, A); -} - -/*********************************** - * 1011 1rrr - * MOV Rr,#n - ***********************************/ -OP_HANDLER( mov_r_i ) -{ - UINT8 val = ROP_ARG(upi41_state, PC); - PC += 1; - SETR(upi41_state, r, val); -} - -/*********************************** - * 1010 000r - * MOV @Rr,A - ***********************************/ -OP_HANDLER( mov_rm_a ) -{ - IRAM_W(upi41_state, GETR(upi41_state, r), A ); -} - -/*********************************** - * 1011 000r - * MOV @Rr,#n - ***********************************/ -OP_HANDLER( mov_rm_i ) -{ - UINT8 val = ROP_ARG(upi41_state, PC); - PC += 1; - IRAM_W(upi41_state, GETR(upi41_state, r), val ); -} - -/*********************************** - * 1001 0000 - * MOV STS,A - ***********************************/ -OP_HANDLER( mov_sts_a ) -{ - STATE = (STATE & 0x0f) | (A & 0xf0); -} - -/*********************************** - * 0110 0010 - * MOV T,A - ***********************************/ -OP_HANDLER( mov_t_a ) -{ - upi41_state->timer = A; -} - -/*********************************** - * 0000 11pp - * MOVD A,Pp - ***********************************/ -OP_HANDLER( movd_a_p ) -{ - UINT8 p = r; - /* added proper expanded port setup */ - WP(upi41_state, 2, (P2 & 0xf0) | 0x00 | p); /* READ mode */ - WP(upi41_state, I8X41_ps, 0); /* activate command strobe */ - A = RP(upi41_state, 2) & 0xf; - WP(upi41_state, I8X41_ps, 1); /* release command strobe */ -} - -/*********************************** - * 0011 11pp - * MOVD Pp,A - ***********************************/ -OP_HANDLER( movd_p_a ) -{ - UINT8 p = r; - /* added proper expanded port setup */ - WP(upi41_state, 2, (P2 & 0xf0) | 0x04 | p); /* WRITE mode */ - WP(upi41_state, I8X41_ps, 0); /* activate command strobe */ - WP(upi41_state, 2, A & 0x0f); - WP(upi41_state, I8X41_ps, 1); /* release command strobe */ -} - -/*********************************** - * 1010 0011 - * MOVP A,@A - ***********************************/ -OP_HANDLER( movp_a_am ) -{ - UINT16 addr = (PC & 0x700) | A; - A = RM(upi41_state, addr); -} - -/*********************************** - * 1110 0011 - * MOVP3 A,@A - ***********************************/ -OP_HANDLER( movp3_a_am ) -{ - UINT16 addr = 0x300 | A; - A = RM(upi41_state, addr); -} - -/*********************************** - * 0000 0000 - * NOP - ***********************************/ -OP_HANDLER( nop ) -{ -} - -/*********************************** - * 0100 1rrr - * ORL A,Rr - ***********************************/ -OP_HANDLER( orl_r ) -{ - A = A | GETR(upi41_state, r); -} - -/*********************************** - * 0100 000r - * ORL A,@Rr - ***********************************/ -OP_HANDLER( orl_rm ) -{ - A = A | IRAM_R(upi41_state, GETR(upi41_state, r)); -} - -/*********************************** - * 0100 0011 7654 3210 - * ORL A,#n - ***********************************/ -OP_HANDLER( orl_i ) -{ - UINT8 val = ROP_ARG(upi41_state, PC); - PC++; - A = A | val; -} - -/*********************************** - * 1000 10pp 7654 3210 - * ORL Pp,#n - ***********************************/ -OP_HANDLER( orl_p_i ) -{ - UINT8 p = r; - UINT8 val = ROP_ARG(upi41_state, PC); - PC++; - /* changed to latched port scheme */ - switch (p) - { - case 00: break; /* invalid port */ - case 01: P1 |= val; WP(upi41_state, p, P1); break; - case 02: P2 |= val; WP(upi41_state, p, P2); break; - case 03: break; /* invalid port */ - default: break; - } -} - -/*********************************** - * 1000 11pp 7654 3210 - * ORLD Pp,A - ***********************************/ -OP_HANDLER( orld_p_a ) -{ - UINT8 p = r; - /* added proper expanded port setup */ - WP(upi41_state, 2, (P2 & 0xf0) | 0x08 | p); /* OR mode */ - WP(upi41_state, I8X41_ps, 0); /* activate command strobe */ - WP(upi41_state, 2, A & 0x0f); /* Expander to take care of OR function */ - WP(upi41_state, I8X41_ps, 1); /* release command strobe */ -} - -/*********************************** - * 0000 0010 - * OUT DBB,A - ***********************************/ -OP_HANDLER( out_dbb_a ) -{ - DBBO = A; /* DBB output buffer */ - STATE |= OBF; /* assert the output buffer full flag */ - if( ENABLE & FLAGS ) - { - P2_HS |= 0x10; - if( STATE & IBF ) P2_HS |= 0x20; - else P2_HS &= 0xdf; - WP(upi41_state, 0x02, (P2 & P2_HS) ); /* Assert the DBBO IRQ out on P24 */ - } -} - -/*********************************** - * 0011 10pp - * OUT Pp,A - ***********************************/ -OP_HANDLER( out_p_a ) -{ - UINT8 p = r; - /* changed to latched port scheme */ - switch (p) - { - case 00: break; /* invalid port */ - case 01: WP(upi41_state, p, A); P1 = A; break; - case 02: WP(upi41_state, p, A); P2 = A; break; - case 03: break; /* invalid port */ - default: break; - } -} - -/*********************************** - * 1000 0011 - * RET - ***********************************/ -OP_HANDLER( ret ) -{ - UINT8 msb; - PSW = (PSW & ~SP) | ((PSW - 1) & SP); - msb = IRAM_R(upi41_state, M_STACK + (PSW&SP) * 2 + 1); - PC = IRAM_R(upi41_state, M_STACK + (PSW&SP) * 2 + 0); - PC |= (msb << 8) & 0x700; -} - -/*********************************** - * 1001 0011 - * RETR - ***********************************/ -OP_HANDLER( retr ) -{ - UINT8 msb; - PSW = (PSW & ~SP) | ((PSW - 1) & SP); - msb = IRAM_R(upi41_state, M_STACK + (PSW&SP) * 2 + 1); - PC = IRAM_R(upi41_state, M_STACK + (PSW&SP) * 2 + 0); - PC |= (msb << 8) & 0x700; - PSW = (PSW & 0x0f) | (msb & 0xf0); - CONTROL &= ~IRQ_IGNR; -} - -/*********************************** - * 1110 0111 - * RL A - ***********************************/ -OP_HANDLER( rl_a ) -{ - A = (A << 1) | (A >> 7); -} - -/*********************************** - * 1111 0111 - * RLC A - ***********************************/ -OP_HANDLER( rlc_a ) -{ - UINT8 c = PSW >> 7; - PSW = (PSW & ~FC) | (A & FC); - A = (A << 1) | c; -} - -/*********************************** - * 0111 0111 - * RR A - ***********************************/ -OP_HANDLER( rr_a ) -{ - A = (A >> 1) | (A << 7); -} - -/*********************************** - * 0110 0111 - * RRC A - ***********************************/ -OP_HANDLER( rrc_a ) -{ - UINT8 c = PSW & 0x80; - PSW = (PSW & ~FC) | (A << 7); - A = (A >> 1) | c; -} - -/*********************************** - * 1100 0101 - * SEL RB0 - ***********************************/ -OP_HANDLER( sel_rb0 ) -{ - PSW &= ~BS; -} - -/*********************************** - * 1101 0101 - * SEL RB1 - ***********************************/ -OP_HANDLER( sel_rb1 ) -{ - PSW |= BS; -} - -/*********************************** - * 0110 0101 - * STOP TCNT - ***********************************/ -OP_HANDLER( stop_tcnt ) -{ - ENABLE &= ~(T|CNT); -} - -/*********************************** - * 0100 0101 - * STRT CNT - ***********************************/ -OP_HANDLER( strt_cnt ) -{ - ENABLE |= CNT; - ENABLE &= ~T; -} - -/*********************************** - * 0101 0101 - * STRT T - ***********************************/ -OP_HANDLER( strt_t ) -{ - ENABLE |= T; - ENABLE &= ~CNT; -} - -/*********************************** - * 0100 0111 - * SWAP A - ***********************************/ -OP_HANDLER( swap_a ) -{ - A = (A << 4) | (A >> 4); -} - -/*********************************** - * 0010 1rrr - * XCH A,Rr - ***********************************/ -OP_HANDLER( xch_a_r ) -{ - UINT8 tmp = GETR(upi41_state, r); - SETR(upi41_state, r, A); - A = tmp; -} - -/*********************************** - * 0010 000r - * XCH A,@Rr - ***********************************/ -OP_HANDLER( xch_a_rm ) -{ - UINT16 addr = GETR(upi41_state, r); - UINT8 tmp = IRAM_R(upi41_state, addr); - IRAM_W(upi41_state, addr, A ); - A = tmp; -} - -/*********************************** - * 0011 000r - * XCHD A,@Rr - ***********************************/ -OP_HANDLER( xchd_a_rm ) -{ - UINT16 addr = GETR(upi41_state, r); - UINT8 tmp = IRAM_R(upi41_state, addr); - IRAM_W(upi41_state, addr, (tmp & 0xf0) | (A & 0x0f) ); - A = (A & 0xf0) | (tmp & 0x0f); -} - -/*********************************** - * 1101 1rrr - * XRL A,Rr - ***********************************/ -OP_HANDLER( xrl_r ) -{ - A = A ^ GETR(upi41_state, r); -} - -/*********************************** - * 1101 000r - * XRL A,@Rr - ***********************************/ -OP_HANDLER( xrl_rm ) -{ - A = A ^ IRAM_R(upi41_state, GETR(upi41_state, r)); -} - -/*********************************** - * 1101 0011 7654 3210 - * XRL A,#n - ***********************************/ -OP_HANDLER( xrl_i ) -{ - UINT8 val = ROP_ARG(upi41_state, PC); - PC++; - A = A ^ val; -} - diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c index 8d17f249887..ce23a3894da 100644 --- a/src/emu/cpu/mcs48/mcs48.c +++ b/src/emu/cpu/mcs48/mcs48.c @@ -9,7 +9,7 @@ T0 output clock mcs48.c - Intel MCS-48 Portable Emulator + Intel MCS-48/UPI-41 Portable Emulator Copyright Mirko Buffoni Based on the original work Copyright Dan Boris, an 8048 emulator @@ -38,9 +38,42 @@ T0 output clock 8749 128 2k 27 (EPROM) M58715 128 0 (external ROM) +**************************************************************************** + + UPI-41/42 chips are MCS-48 derived, with some opcode changes: + + MCS-48 opcode UPI-41/42 opcode + ------------- ---------------- + 02: OUTL BUS,A OUT DBB,A + 08: INS BUS,A + 22: IN DBB,A + 75: ENT0 CLK + 80: MOVX A,@R0 + 81: MOVX A,@R1 + 86: JNI JOBF + 88: ORL BUS,#n + 90: MOVX @R0,A MOV STS,A + 91: MOVX @R1,A + 98: ANL BUS,#n + D6: JNIBF + E5: SEL MB0 EN DMA + F5: SEL MB1 EN FLAGS + + Chip numbers are similar to the MCS-48 series: + + Chip RAM ROM I/O + ---- --- --- --- + 8041 128 1k + 8741 128 1k (EPROM) + + 8042 256 2k + 8242 256 2k + 8242 256 2k + ***************************************************************************/ #include "debugger.h" +#include "timer.h" #include "mcs48.h" @@ -58,6 +91,26 @@ T0 output clock #define F_FLAG 0x20 #define B_FLAG 0x10 +/* status bits (UPI-41) */ +#define STS_F1 0x08 +#define STS_F0 0x04 +#define STS_IBF 0x02 +#define STS_OBF 0x01 + +/* port 2 bits (UPI-41) */ +#define P2_OBF 0x10 +#define P2_NIBF 0x20 +#define P2_DRQ 0x40 +#define P2_NDACK 0x80 + +/* enable bits (UPI-41) */ +#define ENABLE_FLAGS 0x01 +#define ENABLE_DMA 0x02 + +/* feature masks */ +#define MCS48_FEATURE 0x01 +#define UPI41_FEATURE 0x02 + /*************************************************************************** @@ -68,18 +121,21 @@ T0 output clock typedef struct _mcs48_state mcs48_state; struct _mcs48_state { - PAIR prevpc; /* 16-bit previous program counter */ - PAIR pc; /* 16-bit program counter */ + UINT16 prevpc; /* 16-bit previous program counter */ + UINT16 pc; /* 16-bit program counter */ + UINT8 a; /* 8-bit accumulator */ UINT8 * regptr; /* pointer to r0-r7 */ - UINT8 psw; /* 8-bit PSW */ + UINT8 psw; /* 8-bit cpustate->psw */ UINT8 p1; /* 8-bit latched port 1 */ UINT8 p2; /* 8-bit latched port 2 */ - UINT8 f1; /* 1-bit flag 1 */ UINT8 ea; /* 1-bit latched ea input */ UINT8 timer; /* 8-bit timer */ UINT8 prescaler; /* 5-bit timer prescaler */ UINT8 t1_history; /* 8-bit history of the T1 input */ + UINT8 sts; /* 8-bit status register (UPI-41 only, except for F1) */ + UINT8 dbbi; /* 8-bit input data buffer (UPI-41 only) */ + UINT8 dbbo; /* 8-bit output data buffer (UPI-41 only) */ UINT8 irq_state; /* TRUE if an IRQ is pending */ UINT8 irq_in_progress; /* TRUE if an IRQ is in progress */ @@ -88,6 +144,8 @@ struct _mcs48_state UINT8 tirq_enabled; /* TRUE if the timer IRQ is enabled */ UINT8 xirq_enabled; /* TRUE if the external IRQ is enabled */ UINT8 timecount_enabled; /* bitmask of timer/counter enabled */ + UINT8 flags_enabled; /* TRUE if I/O flags have been enabled (UPI-41 only) */ + UINT8 dma_enabled; /* TRUE if DMA has been enabled (UPI-41 only) */ UINT16 a11; /* A11 value, either 0x000 or 0x800 */ @@ -100,18 +158,66 @@ struct _mcs48_state const address_space *data; const address_space *io; - int inst_cycles; /* cycles for the current instruction */ - UINT8 cpu_feature; /* processor feature flags */ + UINT8 feature_mask; /* processor feature flags */ UINT16 int_rom_size; /* internal rom size */ + + cpu_state_table state; /* state table */ + UINT8 rtemp; /* temporary for import/export */ }; /* opcode table entry */ -typedef struct _mcs48_opcode mcs48_opcode; -struct _mcs48_opcode +typedef int (*mcs48_ophandler)(mcs48_state *state); + + + +/*************************************************************************** + CPU STATE DESCRIPTION +***************************************************************************/ + +#define MCS48_STATE_ENTRY(_name, _format, _member, _datamask, _flags) \ + CPU_STATE_ENTRY(MCS48_##_name, #_name, _format, mcs48_state, _member, _datamask, MCS48_FEATURE | UPI41_FEATURE, _flags) + +#define UPI41_STATE_ENTRY(_name, _format, _member, _datamask, _flags) \ + CPU_STATE_ENTRY(MCS48_##_name, #_name, _format, mcs48_state, _member, _datamask, UPI41_FEATURE, _flags) + +static const cpu_state_entry state_array[] = { - UINT8 cycles; - void (*function)(mcs48_state *); + MCS48_STATE_ENTRY(PC, "%03X", pc, 0xfff, 0) + MCS48_STATE_ENTRY(GENPC, "%03X", pc, 0xfff, CPUSTATE_NOSHOW) + MCS48_STATE_ENTRY(GENPCBASE, "%03X", prevpc, 0xfff, CPUSTATE_NOSHOW) + + MCS48_STATE_ENTRY(GENSP, "%1X", psw, 0x7, CPUSTATE_NOSHOW) + + MCS48_STATE_ENTRY(A, "%02X", a, 0xff, 0) + MCS48_STATE_ENTRY(TC, "%02X", timer, 0xff, 0) + MCS48_STATE_ENTRY(TPRE, "%02X", prescaler, 0x1f, 0) + + MCS48_STATE_ENTRY(P1, "%02X", p1, 0xff, 0) + MCS48_STATE_ENTRY(P2, "%02X", p2, 0xff, 0) + + MCS48_STATE_ENTRY(R0, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R1, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R2, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R3, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R4, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R5, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R6, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + MCS48_STATE_ENTRY(R7, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT) + + MCS48_STATE_ENTRY(EA, "%1u", ea, 0x1, 0) + + UPI41_STATE_ENTRY(STS, "%02X", sts, 0xff, 0) + UPI41_STATE_ENTRY(DBBI, "%02X", dbbi, 0xff, 0) + UPI41_STATE_ENTRY(DBBO, "%02X", dbbo, 0xff, 0) +}; + +static const cpu_state_table state_table_template = +{ + NULL, /* pointer to the base of state (offsets are relative to this) */ + 0, /* subtype this table refers to */ + ARRAY_LENGTH(state_array), /* number of entries */ + state_array /* array of entries */ }; @@ -120,19 +226,6 @@ struct _mcs48_opcode MACROS ***************************************************************************/ -/*** Cycle times for the jump on condition instructions, are unusual. - Condition is tested during the first cycle, so if condition is not - met, second address fetch cycle may not really be taken. For now we - just use the cycle counts as listed in the i8048 user manual. -***/ - -#if 0 -#define ADJUST_CYCLES { inst_cycles -= 1; } /* Possible real cycles setting */ -#else -#define ADJUST_CYCLES { } /* User Manual cycles setting */ -#endif - - /* ROM is mapped to ADDRESS_SPACE_PROGRAM */ #define program_r(a) memory_read_byte_8le(cpustate->program, a) @@ -150,27 +243,17 @@ struct _mcs48_opcode #define bus_r() memory_read_byte_8le(cpustate->io, MCS48_PORT_BUS) #define bus_w(V) memory_write_byte_8le(cpustate->io, MCS48_PORT_BUS, V) #define ea_r() memory_read_byte_8le(cpustate->io, MCS48_PORT_EA) - -/* simplfied access to common bits */ -#undef A -#define A cpustate->a -#undef PC -#define PC cpustate->pc.w.l -#undef PSW -#define PSW cpustate->psw +#define prog_w(V) memory_write_byte_8le(cpustate->io, MCS48_PORT_PROG, V) /* r0-r7 map to memory via the regptr */ -#define R0 cpustate->regptr[0] -#define R1 cpustate->regptr[1] -#define R2 cpustate->regptr[2] -#define R3 cpustate->regptr[3] -#define R4 cpustate->regptr[4] -#define R5 cpustate->regptr[5] -#define R6 cpustate->regptr[6] -#define R7 cpustate->regptr[7] - -/* the carry flag as 0 or 1, used for carry-in */ -#define CARRYIN ((PSW & C_FLAG) >> 7) +#define R0 regptr[0] +#define R1 regptr[1] +#define R2 regptr[2] +#define R3 regptr[3] +#define R4 regptr[4] +#define R5 regptr[5] +#define R6 regptr[6] +#define R7 regptr[7] @@ -178,7 +261,7 @@ struct _mcs48_opcode FUNCTION PROTOTYPES ***************************************************************************/ -static void check_irqs( mcs48_state *cpustate); +static int check_irqs(mcs48_state *cpustate); @@ -190,9 +273,9 @@ static void check_irqs( mcs48_state *cpustate); opcode_fetch - fetch an opcode byte -------------------------------------------------*/ -INLINE UINT8 opcode_fetch(mcs48_state *cpustate, offs_t address) +INLINE UINT8 opcode_fetch(mcs48_state *cpustate) { - return memory_decrypted_read_byte(cpustate->program, address); + return memory_decrypted_read_byte(cpustate->program, cpustate->pc++); } @@ -201,9 +284,9 @@ INLINE UINT8 opcode_fetch(mcs48_state *cpustate, offs_t address) byte -------------------------------------------------*/ -INLINE UINT8 argument_fetch(mcs48_state *cpustate, offs_t address) +INLINE UINT8 argument_fetch(mcs48_state *cpustate) { - return memory_raw_read_byte(cpustate->program, address); + return memory_raw_read_byte(cpustate->program, cpustate->pc++); } @@ -214,21 +297,21 @@ INLINE UINT8 argument_fetch(mcs48_state *cpustate, offs_t address) INLINE void update_regptr(mcs48_state *cpustate) { - cpustate->regptr = memory_get_write_ptr(cpustate->data, (PSW & B_FLAG) ? 24 : 0); + cpustate->regptr = memory_get_write_ptr(cpustate->data, (cpustate->psw & B_FLAG) ? 24 : 0); } /*------------------------------------------------- - push_pc_psw - push the PC and PSW values onto + push_pc_psw - push the cpustate->pc and cpustate->psw values onto the stack -------------------------------------------------*/ INLINE void push_pc_psw(mcs48_state *cpustate) { - UINT8 sp = PSW & 0x07; - ram_w(8 + 2*sp, cpustate->pc.b.l); - ram_w(9 + 2*sp, (cpustate->pc.b.h & 0x0f) | (PSW & 0xf0)); - PSW = (PSW & 0xf8) | ((sp + 1) & 0x07); + UINT8 sp = cpustate->psw & 0x07; + ram_w(8 + 2*sp, cpustate->pc); + ram_w(9 + 2*sp, ((cpustate->pc >> 8) & 0x0f) | (cpustate->psw & 0xf0)); + cpustate->psw = (cpustate->psw & 0xf8) | ((sp + 1) & 0x07); } @@ -239,26 +322,27 @@ INLINE void push_pc_psw(mcs48_state *cpustate) INLINE void pull_pc_psw(mcs48_state *cpustate) { - UINT8 sp = (PSW - 1) & 0x07; - cpustate->pc.b.l = ram_r(8 + 2*sp); - cpustate->pc.b.h = ram_r(9 + 2*sp); - PSW = (cpustate->pc.b.h & 0xf0) | 0x08 | sp; - cpustate->pc.b.h &= 0x0f; + UINT8 sp = (cpustate->psw - 1) & 0x07; + cpustate->pc = ram_r(8 + 2*sp); + cpustate->pc |= ram_r(9 + 2*sp) << 8; + cpustate->psw = ((cpustate->pc >> 8) & 0xf0) | 0x08 | sp; + cpustate->pc &= 0xfff; update_regptr(cpustate); } /*------------------------------------------------- - pull_pc - pull the PC value from the stack, + pull_pc - pull the PC value from the stack, leaving the upper part of PSW intact -------------------------------------------------*/ INLINE void pull_pc(mcs48_state *cpustate) { - UINT8 sp = (PSW - 1) & 0x07; - cpustate->pc.b.l = ram_r(8 + 2*sp); - cpustate->pc.b.h = ram_r(9 + 2*sp) & 0x0f; - PSW = (PSW & 0xf0) | 0x08 | sp; + UINT8 sp = (cpustate->psw - 1) & 0x07; + cpustate->pc = ram_r(8 + 2*sp); + cpustate->pc |= ram_r(9 + 2*sp) << 8; + cpustate->pc &= 0xfff; + cpustate->psw = (cpustate->psw & 0xf0) | 0x08 | sp; } @@ -269,13 +353,13 @@ INLINE void pull_pc(mcs48_state *cpustate) INLINE void execute_add(mcs48_state *cpustate, UINT8 dat) { - UINT16 temp = A + dat; - UINT16 temp4 = (A & 0x0f) + (dat & 0x0f); + UINT16 temp = cpustate->a + dat; + UINT16 temp4 = (cpustate->a & 0x0f) + (dat & 0x0f); - PSW &= ~(C_FLAG | A_FLAG); - PSW |= (temp4 << 2) & A_FLAG; - PSW |= (temp >> 1) & C_FLAG; - A = temp; + cpustate->psw &= ~(C_FLAG | A_FLAG); + cpustate->psw |= (temp4 << 2) & A_FLAG; + cpustate->psw |= (temp >> 1) & C_FLAG; + cpustate->a = temp; } @@ -286,13 +370,14 @@ INLINE void execute_add(mcs48_state *cpustate, UINT8 dat) INLINE void execute_addc(mcs48_state *cpustate, UINT8 dat) { - UINT16 temp = A + dat + CARRYIN; - UINT16 temp4 = (A & 0x0f) + (dat & 0x0f) + CARRYIN; + UINT8 carryin = (cpustate->psw & C_FLAG) >> 7; + UINT16 temp = cpustate->a + dat + carryin; + UINT16 temp4 = (cpustate->a & 0x0f) + (dat & 0x0f) + carryin; - PSW &= ~(C_FLAG | A_FLAG); - PSW |= (temp4 << 2) & A_FLAG; - PSW |= (temp >> 1) & C_FLAG; - A = temp; + cpustate->psw &= ~(C_FLAG | A_FLAG); + cpustate->psw |= (temp4 << 2) & A_FLAG; + cpustate->psw |= (temp >> 1) & C_FLAG; + cpustate->a = temp; } @@ -304,7 +389,7 @@ INLINE void execute_addc(mcs48_state *cpustate, UINT8 dat) INLINE void execute_jmp(mcs48_state *cpustate, UINT16 address) { UINT16 a11 = (cpustate->irq_in_progress) ? 0 : cpustate->a11; - PC = address | a11; + cpustate->pc = address | a11; } @@ -327,13 +412,51 @@ INLINE void execute_call(mcs48_state *cpustate, UINT16 address) INLINE void execute_jcc(mcs48_state *cpustate, UINT8 result) { - UINT8 offset = argument_fetch(cpustate, PC++); + UINT8 offset = argument_fetch(cpustate); if (result != 0) - { - PC = ((PC - 1) & 0xf00) | offset; - } + cpustate->pc = ((cpustate->pc - 1) & 0xf00) | offset; +} + + +/*------------------------------------------------- + p2_mask - return the mask of bits that the + code can directly affect +-------------------------------------------------*/ + +INLINE UINT8 p2_mask(mcs48_state *cpustate) +{ + UINT8 result = 0xff; + if ((cpustate->feature_mask & UPI41_FEATURE) == 0) + return result; + if (cpustate->flags_enabled) + result &= ~(P2_OBF | P2_NIBF); + if (cpustate->dma_enabled) + result &= ~(P2_DRQ | P2_NDACK); + return result; +} + + +/*------------------------------------------------- + expander_operation - perform an operation via + the 8243 expander chip +-------------------------------------------------*/ + +INLINE void expander_operation(mcs48_state *cpustate, UINT8 operation, UINT8 port) +{ + /* put opcode/data on low 4 bits of P2 */ + port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (operation << 2) | (port & 3)); + + /* generate high-to-low transition on PROG line */ + prog_w(0); + + /* put data on low 4 bits of P2 */ + if (operation != 0) + port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (cpustate->a & 0x0f)); else - ADJUST_CYCLES; + cpustate->a = port_r(2) | 0x0f; + + /* generate low-to-high transition on PROG line */ + prog_w(1); } @@ -342,304 +465,355 @@ INLINE void execute_jcc(mcs48_state *cpustate, UINT8 result) OPCODE HANDLERS ***************************************************************************/ -#define OPHANDLER(_name) static void _name (mcs48_state *cpustate) +#define OPHANDLER(_name) static int _name(mcs48_state *cpustate) + +#define SPLIT_OPHANDLER(_name, _mcs48name, _upi41name) \ +OPHANDLER(_name) { return (!(cpustate->feature_mask & UPI41_FEATURE)) ? _mcs48name(cpustate) : _upi41name(cpustate); } + OPHANDLER( illegal ) { - logerror("I8039: pc = %04x, Illegal opcode = %02x\n", PC-1, program_r(PC-1)); + logerror("MCS-48 PC:%04X - Illegal opcode = %02x\n", cpustate->pc - 1, program_r(cpustate->pc - 1)); + return 1; } -OPHANDLER( add_a_r0 ) { execute_add(cpustate, R0); } -OPHANDLER( add_a_r1 ) { execute_add(cpustate, R1); } -OPHANDLER( add_a_r2 ) { execute_add(cpustate, R2); } -OPHANDLER( add_a_r3 ) { execute_add(cpustate, R3); } -OPHANDLER( add_a_r4 ) { execute_add(cpustate, R4); } -OPHANDLER( add_a_r5 ) { execute_add(cpustate, R5); } -OPHANDLER( add_a_r6 ) { execute_add(cpustate, R6); } -OPHANDLER( add_a_r7 ) { execute_add(cpustate, R7); } -OPHANDLER( add_a_xr0 ) { execute_add(cpustate, ram_r(R0)); } -OPHANDLER( add_a_xr1 ) { execute_add(cpustate, ram_r(R1)); } -OPHANDLER( add_a_n ) { execute_add(cpustate, argument_fetch(cpustate, PC++)); } +OPHANDLER( add_a_r0 ) { execute_add(cpustate, cpustate->R0); return 1; } +OPHANDLER( add_a_r1 ) { execute_add(cpustate, cpustate->R1); return 1; } +OPHANDLER( add_a_r2 ) { execute_add(cpustate, cpustate->R2); return 1; } +OPHANDLER( add_a_r3 ) { execute_add(cpustate, cpustate->R3); return 1; } +OPHANDLER( add_a_r4 ) { execute_add(cpustate, cpustate->R4); return 1; } +OPHANDLER( add_a_r5 ) { execute_add(cpustate, cpustate->R5); return 1; } +OPHANDLER( add_a_r6 ) { execute_add(cpustate, cpustate->R6); return 1; } +OPHANDLER( add_a_r7 ) { execute_add(cpustate, cpustate->R7); return 1; } +OPHANDLER( add_a_xr0 ) { execute_add(cpustate, ram_r(cpustate->R0)); return 1; } +OPHANDLER( add_a_xr1 ) { execute_add(cpustate, ram_r(cpustate->R1)); return 1; } +OPHANDLER( add_a_n ) { execute_add(cpustate, argument_fetch(cpustate)); return 2; } -OPHANDLER( adc_a_r0 ) { execute_addc(cpustate, R0); } -OPHANDLER( adc_a_r1 ) { execute_addc(cpustate, R1); } -OPHANDLER( adc_a_r2 ) { execute_addc(cpustate, R2); } -OPHANDLER( adc_a_r3 ) { execute_addc(cpustate, R3); } -OPHANDLER( adc_a_r4 ) { execute_addc(cpustate, R4); } -OPHANDLER( adc_a_r5 ) { execute_addc(cpustate, R5); } -OPHANDLER( adc_a_r6 ) { execute_addc(cpustate, R6); } -OPHANDLER( adc_a_r7 ) { execute_addc(cpustate, R7); } -OPHANDLER( adc_a_xr0 ) { execute_addc(cpustate, ram_r(R0)); } -OPHANDLER( adc_a_xr1 ) { execute_addc(cpustate, ram_r(R1)); } -OPHANDLER( adc_a_n ) { execute_addc(cpustate, argument_fetch(cpustate, PC++)); } +OPHANDLER( adc_a_r0 ) { execute_addc(cpustate, cpustate->R0); return 1; } +OPHANDLER( adc_a_r1 ) { execute_addc(cpustate, cpustate->R1); return 1; } +OPHANDLER( adc_a_r2 ) { execute_addc(cpustate, cpustate->R2); return 1; } +OPHANDLER( adc_a_r3 ) { execute_addc(cpustate, cpustate->R3); return 1; } +OPHANDLER( adc_a_r4 ) { execute_addc(cpustate, cpustate->R4); return 1; } +OPHANDLER( adc_a_r5 ) { execute_addc(cpustate, cpustate->R5); return 1; } +OPHANDLER( adc_a_r6 ) { execute_addc(cpustate, cpustate->R6); return 1; } +OPHANDLER( adc_a_r7 ) { execute_addc(cpustate, cpustate->R7); return 1; } +OPHANDLER( adc_a_xr0 ) { execute_addc(cpustate, ram_r(cpustate->R0)); return 1; } +OPHANDLER( adc_a_xr1 ) { execute_addc(cpustate, ram_r(cpustate->R1)); return 1; } +OPHANDLER( adc_a_n ) { execute_addc(cpustate, argument_fetch(cpustate)); return 2; } -OPHANDLER( anl_a_r0 ) { A &= R0; } -OPHANDLER( anl_a_r1 ) { A &= R1; } -OPHANDLER( anl_a_r2 ) { A &= R2; } -OPHANDLER( anl_a_r3 ) { A &= R3; } -OPHANDLER( anl_a_r4 ) { A &= R4; } -OPHANDLER( anl_a_r5 ) { A &= R5; } -OPHANDLER( anl_a_r6 ) { A &= R6; } -OPHANDLER( anl_a_r7 ) { A &= R7; } -OPHANDLER( anl_a_xr0 ) { A &= ram_r(R0); } -OPHANDLER( anl_a_xr1 ) { A &= ram_r(R1); } -OPHANDLER( anl_a_n ) { A &= argument_fetch(cpustate, PC++); } -OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch(cpustate, PC++)); } -OPHANDLER( anl_p1_n ) { port_w(1, cpustate->p1 &= argument_fetch(cpustate, PC++)); } -OPHANDLER( anl_p2_n ) { port_w(2, cpustate->p2 &= argument_fetch(cpustate, PC++)); } +OPHANDLER( anl_a_r0 ) { cpustate->a &= cpustate->R0; return 1; } +OPHANDLER( anl_a_r1 ) { cpustate->a &= cpustate->R1; return 1; } +OPHANDLER( anl_a_r2 ) { cpustate->a &= cpustate->R2; return 1; } +OPHANDLER( anl_a_r3 ) { cpustate->a &= cpustate->R3; return 1; } +OPHANDLER( anl_a_r4 ) { cpustate->a &= cpustate->R4; return 1; } +OPHANDLER( anl_a_r5 ) { cpustate->a &= cpustate->R5; return 1; } +OPHANDLER( anl_a_r6 ) { cpustate->a &= cpustate->R6; return 1; } +OPHANDLER( anl_a_r7 ) { cpustate->a &= cpustate->R7; return 1; } +OPHANDLER( anl_a_xr0 ) { cpustate->a &= ram_r(cpustate->R0); return 1; } +OPHANDLER( anl_a_xr1 ) { cpustate->a &= ram_r(cpustate->R1); return 1; } +OPHANDLER( anl_a_n ) { cpustate->a &= argument_fetch(cpustate); return 2; } -OPHANDLER( anld_p4_a ) { port_w(4, port_r(4) & A & 0x0f); } -OPHANDLER( anld_p5_a ) { port_w(5, port_r(5) & A & 0x0f); } -OPHANDLER( anld_p6_a ) { port_w(6, port_r(6) & A & 0x0f); } -OPHANDLER( anld_p7_a ) { port_w(7, port_r(7) & A & 0x0f); } +OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch(cpustate)); return 2; } +OPHANDLER( anl_p1_n ) { port_w(1, cpustate->p1 &= argument_fetch(cpustate)); return 2; } +OPHANDLER( anl_p2_n ) { port_w(2, cpustate->p2 &= argument_fetch(cpustate) | ~p2_mask(cpustate)); return 2; } +OPHANDLER( anld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 4); return 2; } +OPHANDLER( anld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 5); return 2; } +OPHANDLER( anld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 6); return 2; } +OPHANDLER( anld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 7); return 2; } -OPHANDLER( call_0 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x000); } -OPHANDLER( call_1 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x100); } -OPHANDLER( call_2 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x200); } -OPHANDLER( call_3 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x300); } -OPHANDLER( call_4 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x400); } -OPHANDLER( call_5 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x500); } -OPHANDLER( call_6 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x600); } -OPHANDLER( call_7 ) { execute_call(cpustate, argument_fetch(cpustate, PC++) | 0x700); } +OPHANDLER( call_0 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x000); return 2; } +OPHANDLER( call_1 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x100); return 2; } +OPHANDLER( call_2 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x200); return 2; } +OPHANDLER( call_3 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x300); return 2; } +OPHANDLER( call_4 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x400); return 2; } +OPHANDLER( call_5 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x500); return 2; } +OPHANDLER( call_6 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x600); return 2; } +OPHANDLER( call_7 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x700); return 2; } -OPHANDLER( clr_a ) { A = 0; } -OPHANDLER( clr_c ) { PSW &= ~C_FLAG; } -OPHANDLER( clr_f0 ) { PSW &= ~F_FLAG; } -OPHANDLER( clr_f1 ) { cpustate->f1 = 0; } +OPHANDLER( clr_a ) { cpustate->a = 0; return 1; } +OPHANDLER( clr_c ) { cpustate->psw &= ~C_FLAG; return 1; } +OPHANDLER( clr_f0 ) { cpustate->psw &= ~F_FLAG; cpustate->sts &= ~STS_F0; return 1; } +OPHANDLER( clr_f1 ) { cpustate->sts &= ~STS_F1; return 1; } -OPHANDLER( cpl_a ) { A ^= 0xff; } -OPHANDLER( cpl_c ) { PSW ^= C_FLAG; } -OPHANDLER( cpl_f0 ) { PSW ^= F_FLAG; } -OPHANDLER( cpl_f1 ) { cpustate->f1 ^= 1; } +OPHANDLER( cpl_a ) { cpustate->a ^= 0xff; return 1; } +OPHANDLER( cpl_c ) { cpustate->psw ^= C_FLAG; return 1; } +OPHANDLER( cpl_f0 ) { cpustate->psw ^= F_FLAG; cpustate->sts ^= STS_F0; return 1; } +OPHANDLER( cpl_f1 ) { cpustate->sts ^= STS_F1; return 1; } OPHANDLER( da_a ) { - if ((A & 0x0f) > 0x09 || (PSW & A_FLAG)) + if ((cpustate->a & 0x0f) > 0x09 || (cpustate->psw & A_FLAG)) { - A += 0x06; - if ((A & 0xf0) == 0x00) - PSW |= C_FLAG; + cpustate->a += 0x06; + if ((cpustate->a & 0xf0) == 0x00) + cpustate->psw |= C_FLAG; } - if ((A & 0xf0) > 0x90 || (PSW & C_FLAG)) + if ((cpustate->a & 0xf0) > 0x90 || (cpustate->psw & C_FLAG)) { - A += 0x60; - PSW |= C_FLAG; + cpustate->a += 0x60; + cpustate->psw |= C_FLAG; } else - PSW &= ~C_FLAG; + cpustate->psw &= ~C_FLAG; + return 1; } -OPHANDLER( dec_a ) { A--; } -OPHANDLER( dec_r0 ) { R0--; } -OPHANDLER( dec_r1 ) { R1--; } -OPHANDLER( dec_r2 ) { R2--; } -OPHANDLER( dec_r3 ) { R3--; } -OPHANDLER( dec_r4 ) { R4--; } -OPHANDLER( dec_r5 ) { R5--; } -OPHANDLER( dec_r6 ) { R6--; } -OPHANDLER( dec_r7 ) { R7--; } +OPHANDLER( dec_a ) { cpustate->a--; return 1; } +OPHANDLER( dec_r0 ) { cpustate->R0--; return 1; } +OPHANDLER( dec_r1 ) { cpustate->R1--; return 1; } +OPHANDLER( dec_r2 ) { cpustate->R2--; return 1; } +OPHANDLER( dec_r3 ) { cpustate->R3--; return 1; } +OPHANDLER( dec_r4 ) { cpustate->R4--; return 1; } +OPHANDLER( dec_r5 ) { cpustate->R5--; return 1; } +OPHANDLER( dec_r6 ) { cpustate->R6--; return 1; } +OPHANDLER( dec_r7 ) { cpustate->R7--; return 1; } -OPHANDLER( dis_i ) { cpustate->xirq_enabled = FALSE; } -OPHANDLER( dis_tcnti ) { cpustate->tirq_enabled = FALSE; cpustate->timer_overflow = FALSE; } +OPHANDLER( dis_i ) { cpustate->xirq_enabled = FALSE; return 1; } +OPHANDLER( dis_tcnti ) { cpustate->tirq_enabled = FALSE; cpustate->timer_overflow = FALSE; return 1; } -OPHANDLER( djnz_r0 ) { execute_jcc(cpustate, --R0 != 0); } -OPHANDLER( djnz_r1 ) { execute_jcc(cpustate, --R1 != 0); } -OPHANDLER( djnz_r2 ) { execute_jcc(cpustate, --R2 != 0); } -OPHANDLER( djnz_r3 ) { execute_jcc(cpustate, --R3 != 0); } -OPHANDLER( djnz_r4 ) { execute_jcc(cpustate, --R4 != 0); } -OPHANDLER( djnz_r5 ) { execute_jcc(cpustate, --R5 != 0); } -OPHANDLER( djnz_r6 ) { execute_jcc(cpustate, --R6 != 0); } -OPHANDLER( djnz_r7 ) { execute_jcc(cpustate, --R7 != 0); } +OPHANDLER( djnz_r0 ) { execute_jcc(cpustate, --cpustate->R0 != 0); return 2; } +OPHANDLER( djnz_r1 ) { execute_jcc(cpustate, --cpustate->R1 != 0); return 2; } +OPHANDLER( djnz_r2 ) { execute_jcc(cpustate, --cpustate->R2 != 0); return 2; } +OPHANDLER( djnz_r3 ) { execute_jcc(cpustate, --cpustate->R3 != 0); return 2; } +OPHANDLER( djnz_r4 ) { execute_jcc(cpustate, --cpustate->R4 != 0); return 2; } +OPHANDLER( djnz_r5 ) { execute_jcc(cpustate, --cpustate->R5 != 0); return 2; } +OPHANDLER( djnz_r6 ) { execute_jcc(cpustate, --cpustate->R6 != 0); return 2; } +OPHANDLER( djnz_r7 ) { execute_jcc(cpustate, --cpustate->R7 != 0); return 2; } -OPHANDLER( en_i ) { cpustate->xirq_enabled = TRUE; check_irqs(cpustate); } -OPHANDLER( en_tcnti ) { cpustate->tirq_enabled = TRUE; check_irqs(cpustate); } - -OPHANDLER( ento_clk ) +OPHANDLER( en_i ) { cpustate->xirq_enabled = TRUE; return 1 + check_irqs(cpustate); } +OPHANDLER( en_tcnti ) { cpustate->tirq_enabled = TRUE; return 1 + check_irqs(cpustate); } +OPHANDLER( en_dma ) { cpustate->dma_enabled = TRUE; port_w(2, cpustate->p2); return 1; } +OPHANDLER( en_flags ) { cpustate->flags_enabled = TRUE; port_w(2, cpustate->p2); return 1; } +OPHANDLER( ent0_clk ) { - logerror("I8039: pc = %04x, Unimplemented opcode = %02x\n", PC-1, program_r(PC-1)); + logerror("MCS-48 PC:%04X - Unimplemented opcode = %02x\n", cpustate->pc - 1, program_r(cpustate->pc - 1)); + return 1; } -OPHANDLER( in_a_p1 ) { A = port_r(1) & cpustate->p1; } -OPHANDLER( in_a_p2 ) { A = port_r(2) & cpustate->p2; } -OPHANDLER( ins_a_bus ) { A = bus_r(); } +OPHANDLER( in_a_p1 ) { cpustate->a = port_r(1) & cpustate->p1; return 2; } +OPHANDLER( in_a_p2 ) { cpustate->a = port_r(2) & cpustate->p2; return 2; } +OPHANDLER( ins_a_bus ) { cpustate->a = bus_r(); return 2; } +OPHANDLER( in_a_dbb ) +{ + /* acknowledge the IBF IRQ and clear the bit in STS */ + if ((cpustate->sts & STS_IBF) != 0 && cpustate->irq_callback != NULL) + (*cpustate->irq_callback)(cpustate->device, UPI41_INPUT_IBF); + cpustate->sts &= ~STS_IBF; -OPHANDLER( inc_a ) { A++; } -OPHANDLER( inc_r0 ) { R0++; } -OPHANDLER( inc_r1 ) { R1++; } -OPHANDLER( inc_r2 ) { R2++; } -OPHANDLER( inc_r3 ) { R3++; } -OPHANDLER( inc_r4 ) { R4++; } -OPHANDLER( inc_r5 ) { R5++; } -OPHANDLER( inc_r6 ) { R6++; } -OPHANDLER( inc_r7 ) { R7++; } -OPHANDLER( inc_xr0 ) { ram_w(R0, ram_r(R0) + 1); } -OPHANDLER( inc_xr1 ) { ram_w(R1, ram_r(R1) + 1); } + /* if P2 flags are enabled, update the state of P2 */ + if (cpustate->flags_enabled && (cpustate->p2 & P2_NIBF) == 0) + port_w(2, cpustate->p2 |= P2_NIBF); + cpustate->a = cpustate->dbbi; + return 2; +} -OPHANDLER( jb_0 ) { execute_jcc(cpustate, (A & 0x01) != 0); } -OPHANDLER( jb_1 ) { execute_jcc(cpustate, (A & 0x02) != 0); } -OPHANDLER( jb_2 ) { execute_jcc(cpustate, (A & 0x04) != 0); } -OPHANDLER( jb_3 ) { execute_jcc(cpustate, (A & 0x08) != 0); } -OPHANDLER( jb_4 ) { execute_jcc(cpustate, (A & 0x10) != 0); } -OPHANDLER( jb_5 ) { execute_jcc(cpustate, (A & 0x20) != 0); } -OPHANDLER( jb_6 ) { execute_jcc(cpustate, (A & 0x40) != 0); } -OPHANDLER( jb_7 ) { execute_jcc(cpustate, (A & 0x80) != 0); } -OPHANDLER( jc ) { execute_jcc(cpustate, (PSW & C_FLAG) != 0); } -OPHANDLER( jf0 ) { execute_jcc(cpustate, (PSW & F_FLAG) != 0); } -OPHANDLER( jf1 ) { execute_jcc(cpustate, cpustate->f1 != 0); } +OPHANDLER( inc_a ) { cpustate->a++; return 1; } +OPHANDLER( inc_r0 ) { cpustate->R0++; return 1; } +OPHANDLER( inc_r1 ) { cpustate->R1++; return 1; } +OPHANDLER( inc_r2 ) { cpustate->R2++; return 1; } +OPHANDLER( inc_r3 ) { cpustate->R3++; return 1; } +OPHANDLER( inc_r4 ) { cpustate->R4++; return 1; } +OPHANDLER( inc_r5 ) { cpustate->R5++; return 1; } +OPHANDLER( inc_r6 ) { cpustate->R6++; return 1; } +OPHANDLER( inc_r7 ) { cpustate->R7++; return 1; } +OPHANDLER( inc_xr0 ) { ram_w(cpustate->R0, ram_r(cpustate->R0) + 1); return 1; } +OPHANDLER( inc_xr1 ) { ram_w(cpustate->R1, ram_r(cpustate->R1) + 1); return 1; } -OPHANDLER( jmp_0 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x000); } -OPHANDLER( jmp_1 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x100); } -OPHANDLER( jmp_2 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x200); } -OPHANDLER( jmp_3 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x300); } -OPHANDLER( jmp_4 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x400); } -OPHANDLER( jmp_5 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x500); } -OPHANDLER( jmp_6 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x600); } -OPHANDLER( jmp_7 ) { execute_jmp(cpustate, argument_fetch(cpustate, PC) | 0x700); } -OPHANDLER( jmpp_xa ) { PC &= 0xf00; PC |= program_r(PC | A); } +OPHANDLER( jb_0 ) { execute_jcc(cpustate, (cpustate->a & 0x01) != 0); return 2; } +OPHANDLER( jb_1 ) { execute_jcc(cpustate, (cpustate->a & 0x02) != 0); return 2; } +OPHANDLER( jb_2 ) { execute_jcc(cpustate, (cpustate->a & 0x04) != 0); return 2; } +OPHANDLER( jb_3 ) { execute_jcc(cpustate, (cpustate->a & 0x08) != 0); return 2; } +OPHANDLER( jb_4 ) { execute_jcc(cpustate, (cpustate->a & 0x10) != 0); return 2; } +OPHANDLER( jb_5 ) { execute_jcc(cpustate, (cpustate->a & 0x20) != 0); return 2; } +OPHANDLER( jb_6 ) { execute_jcc(cpustate, (cpustate->a & 0x40) != 0); return 2; } +OPHANDLER( jb_7 ) { execute_jcc(cpustate, (cpustate->a & 0x80) != 0); return 2; } +OPHANDLER( jc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) != 0); return 2; } +OPHANDLER( jf0 ) { execute_jcc(cpustate, (cpustate->psw & F_FLAG) != 0); return 2; } +OPHANDLER( jf1 ) { execute_jcc(cpustate, (cpustate->sts & STS_F1) != 0); return 2; } +OPHANDLER( jnc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) == 0); return 2; } +OPHANDLER( jni ) { execute_jcc(cpustate, cpustate->irq_state != 0); return 2; } +OPHANDLER( jnibf ) { execute_jcc(cpustate, (cpustate->sts & STS_IBF) == 0); return 2; } +OPHANDLER( jnt_0 ) { execute_jcc(cpustate, test_r(0) == 0); return 2; } +OPHANDLER( jnt_1 ) { execute_jcc(cpustate, test_r(1) == 0); return 2; } +OPHANDLER( jnz ) { execute_jcc(cpustate, cpustate->a != 0); return 2; } +OPHANDLER( jobf ) { execute_jcc(cpustate, (cpustate->sts & STS_OBF) != 0); return 2; } +OPHANDLER( jtf ) { execute_jcc(cpustate, cpustate->timer_flag); cpustate->timer_flag = FALSE; return 2; } +OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); return 2; } +OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); return 2; } +OPHANDLER( jz ) { execute_jcc(cpustate, cpustate->a == 0); return 2; } -OPHANDLER( jnc ) { execute_jcc(cpustate, (PSW & C_FLAG) == 0); } -OPHANDLER( jni ) { execute_jcc(cpustate, cpustate->irq_state != 0); } -OPHANDLER( jnt_0 ) { execute_jcc(cpustate, test_r(0) == 0); } -OPHANDLER( jnt_1 ) { execute_jcc(cpustate, test_r(1) == 0); } -OPHANDLER( jnz ) { execute_jcc(cpustate, A != 0); } -OPHANDLER( jtf ) { execute_jcc(cpustate, cpustate->timer_flag); cpustate->timer_flag = FALSE; } -OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); } -OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); } -OPHANDLER( jz ) { execute_jcc(cpustate, A == 0); } +OPHANDLER( jmp_0 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x000); return 2; } +OPHANDLER( jmp_1 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x100); return 2; } +OPHANDLER( jmp_2 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x200); return 2; } +OPHANDLER( jmp_3 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x300); return 2; } +OPHANDLER( jmp_4 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x400); return 2; } +OPHANDLER( jmp_5 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x500); return 2; } +OPHANDLER( jmp_6 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x600); return 2; } +OPHANDLER( jmp_7 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x700); return 2; } +OPHANDLER( jmpp_xa ) { cpustate->pc &= 0xf00; cpustate->pc |= program_r(cpustate->pc | cpustate->a); return 2; } -OPHANDLER( mov_a_n ) { A = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_a_psw ) { A = PSW; } -OPHANDLER( mov_a_r0 ) { A = R0; } -OPHANDLER( mov_a_r1 ) { A = R1; } -OPHANDLER( mov_a_r2 ) { A = R2; } -OPHANDLER( mov_a_r3 ) { A = R3; } -OPHANDLER( mov_a_r4 ) { A = R4; } -OPHANDLER( mov_a_r5 ) { A = R5; } -OPHANDLER( mov_a_r6 ) { A = R6; } -OPHANDLER( mov_a_r7 ) { A = R7; } -OPHANDLER( mov_a_xr0 ) { A = ram_r(R0); } -OPHANDLER( mov_a_xr1 ) { A = ram_r(R1); } -OPHANDLER( mov_a_t ) { A = cpustate->timer; } +OPHANDLER( mov_a_n ) { cpustate->a = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_a_psw ) { cpustate->a = cpustate->psw; return 1; } +OPHANDLER( mov_a_r0 ) { cpustate->a = cpustate->R0; return 1; } +OPHANDLER( mov_a_r1 ) { cpustate->a = cpustate->R1; return 1; } +OPHANDLER( mov_a_r2 ) { cpustate->a = cpustate->R2; return 1; } +OPHANDLER( mov_a_r3 ) { cpustate->a = cpustate->R3; return 1; } +OPHANDLER( mov_a_r4 ) { cpustate->a = cpustate->R4; return 1; } +OPHANDLER( mov_a_r5 ) { cpustate->a = cpustate->R5; return 1; } +OPHANDLER( mov_a_r6 ) { cpustate->a = cpustate->R6; return 1; } +OPHANDLER( mov_a_r7 ) { cpustate->a = cpustate->R7; return 1; } +OPHANDLER( mov_a_xr0 ) { cpustate->a = ram_r(cpustate->R0); return 1; } +OPHANDLER( mov_a_xr1 ) { cpustate->a = ram_r(cpustate->R1); return 1; } +OPHANDLER( mov_a_t ) { cpustate->a = cpustate->timer; return 1; } -OPHANDLER( mov_psw_a ) { PSW = A; update_regptr(cpustate); } -OPHANDLER( mov_r0_a ) { R0 = A; } -OPHANDLER( mov_r1_a ) { R1 = A; } -OPHANDLER( mov_r2_a ) { R2 = A; } -OPHANDLER( mov_r3_a ) { R3 = A; } -OPHANDLER( mov_r4_a ) { R4 = A; } -OPHANDLER( mov_r5_a ) { R5 = A; } -OPHANDLER( mov_r6_a ) { R6 = A; } -OPHANDLER( mov_r7_a ) { R7 = A; } -OPHANDLER( mov_r0_n ) { R0 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r1_n ) { R1 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r2_n ) { R2 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r3_n ) { R3 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r4_n ) { R4 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r5_n ) { R5 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r6_n ) { R6 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_r7_n ) { R7 = argument_fetch(cpustate, PC++); } -OPHANDLER( mov_t_a ) { cpustate->timer = A; } -OPHANDLER( mov_xr0_a ) { ram_w(R0, A); } -OPHANDLER( mov_xr1_a ) { ram_w(R1, A); } -OPHANDLER( mov_xr0_n ) { ram_w(R0, argument_fetch(cpustate, PC++)); } -OPHANDLER( mov_xr1_n ) { ram_w(R1, argument_fetch(cpustate, PC++)); } +OPHANDLER( mov_psw_a ) { cpustate->psw = cpustate->a; update_regptr(cpustate); return 1; } +OPHANDLER( mov_sts_a ) { cpustate->sts = (cpustate->sts & 0x0f) | (cpustate->a & 0xf0); return 1; } +OPHANDLER( mov_r0_a ) { cpustate->R0 = cpustate->a; return 1; } +OPHANDLER( mov_r1_a ) { cpustate->R1 = cpustate->a; return 1; } +OPHANDLER( mov_r2_a ) { cpustate->R2 = cpustate->a; return 1; } +OPHANDLER( mov_r3_a ) { cpustate->R3 = cpustate->a; return 1; } +OPHANDLER( mov_r4_a ) { cpustate->R4 = cpustate->a; return 1; } +OPHANDLER( mov_r5_a ) { cpustate->R5 = cpustate->a; return 1; } +OPHANDLER( mov_r6_a ) { cpustate->R6 = cpustate->a; return 1; } +OPHANDLER( mov_r7_a ) { cpustate->R7 = cpustate->a; return 1; } +OPHANDLER( mov_r0_n ) { cpustate->R0 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r1_n ) { cpustate->R1 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r2_n ) { cpustate->R2 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r3_n ) { cpustate->R3 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r4_n ) { cpustate->R4 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r5_n ) { cpustate->R5 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r6_n ) { cpustate->R6 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_r7_n ) { cpustate->R7 = argument_fetch(cpustate); return 2; } +OPHANDLER( mov_t_a ) { cpustate->timer = cpustate->a; return 1; } +OPHANDLER( mov_xr0_a ) { ram_w(cpustate->R0, cpustate->a); return 1; } +OPHANDLER( mov_xr1_a ) { ram_w(cpustate->R1, cpustate->a); return 1; } +OPHANDLER( mov_xr0_n ) { ram_w(cpustate->R0, argument_fetch(cpustate)); return 2; } +OPHANDLER( mov_xr1_n ) { ram_w(cpustate->R1, argument_fetch(cpustate)); return 2; } -OPHANDLER( movd_a_p4 ) { A = port_r(4) & 0x0f; } -OPHANDLER( movd_a_p5 ) { A = port_r(5) & 0x0f; } -OPHANDLER( movd_a_p6 ) { A = port_r(6) & 0x0f; } -OPHANDLER( movd_a_p7 ) { A = port_r(7) & 0x0f; } -OPHANDLER( movd_p4_a ) { port_w(4, A & 0x0f); } -OPHANDLER( movd_p5_a ) { port_w(5, A & 0x0f); } -OPHANDLER( movd_p6_a ) { port_w(6, A & 0x0f); } -OPHANDLER( movd_p7_a ) { port_w(7, A & 0x0f); } +OPHANDLER( movd_a_p4 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 4); return 2; } +OPHANDLER( movd_a_p5 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 5); return 2; } +OPHANDLER( movd_a_p6 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 6); return 2; } +OPHANDLER( movd_a_p7 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 7); return 2; } +OPHANDLER( movd_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 4); return 2; } +OPHANDLER( movd_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 5); return 2; } +OPHANDLER( movd_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 6); return 2; } +OPHANDLER( movd_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 7); return 2; } -OPHANDLER( movp_a_xa ) { A = program_r((PC & 0xf00) | A); } -OPHANDLER( movp3_a_xa ) { A = program_r(0x300 | A); } +OPHANDLER( movp_a_xa ) { cpustate->a = program_r((cpustate->pc & 0xf00) | cpustate->a); return 2; } +OPHANDLER( movp3_a_xa ) { cpustate->a = program_r(0x300 | cpustate->a); return 2; } -OPHANDLER( movx_a_xr0 ) { A = ext_r(R0); } -OPHANDLER( movx_a_xr1 ) { A = ext_r(R1); } -OPHANDLER( movx_xr0_a ) { ext_w(R0, A); } -OPHANDLER( movx_xr1_a ) { ext_w(R1, A); } +OPHANDLER( movx_a_xr0 ) { cpustate->a = ext_r(cpustate->R0); return 2; } +OPHANDLER( movx_a_xr1 ) { cpustate->a = ext_r(cpustate->R1); return 2; } +OPHANDLER( movx_xr0_a ) { ext_w(cpustate->R0, cpustate->a); return 2; } +OPHANDLER( movx_xr1_a ) { ext_w(cpustate->R1, cpustate->a); return 2; } -OPHANDLER( nop ) { } +OPHANDLER( nop ) { return 1; } -OPHANDLER( orl_a_r0 ) { A |= R0; } -OPHANDLER( orl_a_r1 ) { A |= R1; } -OPHANDLER( orl_a_r2 ) { A |= R2; } -OPHANDLER( orl_a_r3 ) { A |= R3; } -OPHANDLER( orl_a_r4 ) { A |= R4; } -OPHANDLER( orl_a_r5 ) { A |= R5; } -OPHANDLER( orl_a_r6 ) { A |= R6; } -OPHANDLER( orl_a_r7 ) { A |= R7; } -OPHANDLER( orl_a_xr0 ) { A |= ram_r(R0); } -OPHANDLER( orl_a_xr1 ) { A |= ram_r(R1); } -OPHANDLER( orl_a_n ) { A |= argument_fetch(cpustate, PC++); } -OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch(cpustate, PC++)); } -OPHANDLER( orl_p1_n ) { port_w(1, cpustate->p1 |= argument_fetch(cpustate, PC++)); } -OPHANDLER( orl_p2_n ) { port_w(2, cpustate->p2 |= argument_fetch(cpustate, PC++)); } -OPHANDLER( orld_p4_a ) { port_w(4, port_r(4) | A); } -OPHANDLER( orld_p5_a ) { port_w(5, port_r(5) | A); } -OPHANDLER( orld_p6_a ) { port_w(6, port_r(6) | A); } -OPHANDLER( orld_p7_a ) { port_w(7, port_r(7) | A); } +OPHANDLER( orl_a_r0 ) { cpustate->a |= cpustate->R0; return 1; } +OPHANDLER( orl_a_r1 ) { cpustate->a |= cpustate->R1; return 1; } +OPHANDLER( orl_a_r2 ) { cpustate->a |= cpustate->R2; return 1; } +OPHANDLER( orl_a_r3 ) { cpustate->a |= cpustate->R3; return 1; } +OPHANDLER( orl_a_r4 ) { cpustate->a |= cpustate->R4; return 1; } +OPHANDLER( orl_a_r5 ) { cpustate->a |= cpustate->R5; return 1; } +OPHANDLER( orl_a_r6 ) { cpustate->a |= cpustate->R6; return 1; } +OPHANDLER( orl_a_r7 ) { cpustate->a |= cpustate->R7; return 1; } +OPHANDLER( orl_a_xr0 ) { cpustate->a |= ram_r(cpustate->R0); return 1; } +OPHANDLER( orl_a_xr1 ) { cpustate->a |= ram_r(cpustate->R1); return 1; } +OPHANDLER( orl_a_n ) { cpustate->a |= argument_fetch(cpustate); return 2; } -OPHANDLER( outl_bus_a ) { bus_w(A); } -OPHANDLER( outl_p1_a ) { port_w(1, cpustate->p1 = A); } -OPHANDLER( outl_p2_a ) { port_w(2, cpustate->p2 = A); } -OPHANDLER( ret ) { pull_pc(cpustate); } +OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch(cpustate)); return 2; } +OPHANDLER( orl_p1_n ) { port_w(1, cpustate->p1 |= argument_fetch(cpustate)); return 2; } +OPHANDLER( orl_p2_n ) { port_w(2, cpustate->p2 |= argument_fetch(cpustate) & p2_mask(cpustate)); return 2; } +OPHANDLER( orld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 4); return 2; } +OPHANDLER( orld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 5); return 2; } +OPHANDLER( orld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 6); return 2; } +OPHANDLER( orld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 7); return 2; } +OPHANDLER( outl_bus_a ) { bus_w(cpustate->a); return 2; } +OPHANDLER( outl_p1_a ) { port_w(1, cpustate->p1 = cpustate->a); return 2; } +OPHANDLER( outl_p2_a ) { UINT8 mask = p2_mask(cpustate); port_w(2, cpustate->p2 = (cpustate->p2 & ~mask) | (cpustate->a & mask)); return 2; } +OPHANDLER( out_dbb_a ) +{ + /* copy to the DBBO and update the bit in STS */ + cpustate->dbbo = cpustate->a; + cpustate->sts |= STS_OBF; + + /* if P2 flags are enabled, update the state of P2 */ + if (cpustate->flags_enabled && (cpustate->p2 & P2_OBF) == 0) + port_w(2, cpustate->p2 |= P2_OBF); + return 2; +} + + +OPHANDLER( ret ) { pull_pc(cpustate); return 2; } OPHANDLER( retr ) { pull_pc_psw(cpustate); /* implicitly clear the IRQ in progress flip flop and re-check interrupts */ cpustate->irq_in_progress = FALSE; - check_irqs(cpustate); + return 2 + check_irqs(cpustate); } -OPHANDLER( rl_a ) { A = (A << 1) | (A >> 7); } -OPHANDLER( rlc_a ) { UINT8 newc = A & C_FLAG; A = (A << 1) | (PSW >> 7); PSW = (PSW & ~C_FLAG) | newc; } +OPHANDLER( rl_a ) { cpustate->a = (cpustate->a << 1) | (cpustate->a >> 7); return 1; } +OPHANDLER( rlc_a ) { UINT8 newc = cpustate->a & C_FLAG; cpustate->a = (cpustate->a << 1) | (cpustate->psw >> 7); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; } -OPHANDLER( rr_a ) { A = (A >> 1) | (A << 7); } -OPHANDLER( rrc_a ) { UINT8 newc = (A << 7) & C_FLAG; A = (A >> 1) | (PSW & C_FLAG); PSW = (PSW & ~C_FLAG) | newc; } +OPHANDLER( rr_a ) { cpustate->a = (cpustate->a >> 1) | (cpustate->a << 7); return 1; } +OPHANDLER( rrc_a ) { UINT8 newc = (cpustate->a << 7) & C_FLAG; cpustate->a = (cpustate->a >> 1) | (cpustate->psw & C_FLAG); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; } -OPHANDLER( sel_mb0 ) { cpustate->a11 = 0x000; } -OPHANDLER( sel_mb1 ) { cpustate->a11 = 0x800; } +OPHANDLER( sel_mb0 ) { cpustate->a11 = 0x000; return 1; } +OPHANDLER( sel_mb1 ) { cpustate->a11 = 0x800; return 1; } -OPHANDLER( sel_rb0 ) { PSW &= ~B_FLAG; update_regptr(cpustate); } -OPHANDLER( sel_rb1 ) { PSW |= B_FLAG; update_regptr(cpustate); } +OPHANDLER( sel_rb0 ) { cpustate->psw &= ~B_FLAG; update_regptr(cpustate); return 1; } +OPHANDLER( sel_rb1 ) { cpustate->psw |= B_FLAG; update_regptr(cpustate); return 1; } -OPHANDLER( stop_tcnt ) { cpustate->timecount_enabled = 0; } +OPHANDLER( stop_tcnt ) { cpustate->timecount_enabled = 0; return 1; } -OPHANDLER( strt_cnt ) { cpustate->timecount_enabled = COUNTER_ENABLED; cpustate->t1_history = test_r(1); } -OPHANDLER( strt_t ) { cpustate->timecount_enabled = TIMER_ENABLED; cpustate->prescaler = 0; } +OPHANDLER( strt_cnt ) { cpustate->timecount_enabled = COUNTER_ENABLED; cpustate->t1_history = test_r(1); return 1; } +OPHANDLER( strt_t ) { cpustate->timecount_enabled = TIMER_ENABLED; cpustate->prescaler = 0; return 1; } -OPHANDLER( swap_a ) { A = (A << 4) | (A >> 4); } +OPHANDLER( swap_a ) { cpustate->a = (cpustate->a << 4) | (cpustate->a >> 4); return 1; } -OPHANDLER( xch_a_r0 ) { UINT8 tmp = A; A = R0; R0 = tmp; } -OPHANDLER( xch_a_r1 ) { UINT8 tmp = A; A = R1; R1 = tmp; } -OPHANDLER( xch_a_r2 ) { UINT8 tmp = A; A = R2; R2 = tmp; } -OPHANDLER( xch_a_r3 ) { UINT8 tmp = A; A = R3; R3 = tmp; } -OPHANDLER( xch_a_r4 ) { UINT8 tmp = A; A = R4; R4 = tmp; } -OPHANDLER( xch_a_r5 ) { UINT8 tmp = A; A = R5; R5 = tmp; } -OPHANDLER( xch_a_r6 ) { UINT8 tmp = A; A = R6; R6 = tmp; } -OPHANDLER( xch_a_r7 ) { UINT8 tmp = A; A = R7; R7 = tmp; } -OPHANDLER( xch_a_xr0 ) { UINT8 tmp = A; A = ram_r(R0); ram_w(R0, tmp); } -OPHANDLER( xch_a_xr1 ) { UINT8 tmp = A; A = ram_r(R1); ram_w(R1, tmp); } +OPHANDLER( xch_a_r0 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R0; cpustate->R0 = tmp; return 1; } +OPHANDLER( xch_a_r1 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R1; cpustate->R1 = tmp; return 1; } +OPHANDLER( xch_a_r2 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R2; cpustate->R2 = tmp; return 1; } +OPHANDLER( xch_a_r3 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R3; cpustate->R3 = tmp; return 1; } +OPHANDLER( xch_a_r4 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R4; cpustate->R4 = tmp; return 1; } +OPHANDLER( xch_a_r5 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R5; cpustate->R5 = tmp; return 1; } +OPHANDLER( xch_a_r6 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R6; cpustate->R6 = tmp; return 1; } +OPHANDLER( xch_a_r7 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R7; cpustate->R7 = tmp; return 1; } +OPHANDLER( xch_a_xr0 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R0); ram_w(cpustate->R0, tmp); return 1; } +OPHANDLER( xch_a_xr1 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R1); ram_w(cpustate->R1, tmp); return 1; } -OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); } -OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); } +OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(cpustate->R0); ram_w(cpustate->R0, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; } +OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(cpustate->R1); ram_w(cpustate->R1, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; } -OPHANDLER( xrl_a_r0 ) { A ^= R0; } -OPHANDLER( xrl_a_r1 ) { A ^= R1; } -OPHANDLER( xrl_a_r2 ) { A ^= R2; } -OPHANDLER( xrl_a_r3 ) { A ^= R3; } -OPHANDLER( xrl_a_r4 ) { A ^= R4; } -OPHANDLER( xrl_a_r5 ) { A ^= R5; } -OPHANDLER( xrl_a_r6 ) { A ^= R6; } -OPHANDLER( xrl_a_r7 ) { A ^= R7; } -OPHANDLER( xrl_a_xr0 ) { A ^= ram_r(R0); } -OPHANDLER( xrl_a_xr1 ) { A ^= ram_r(R1); } -OPHANDLER( xrl_a_n ) { A ^= argument_fetch(cpustate, PC++); } +OPHANDLER( xrl_a_r0 ) { cpustate->a ^= cpustate->R0; return 1; } +OPHANDLER( xrl_a_r1 ) { cpustate->a ^= cpustate->R1; return 1; } +OPHANDLER( xrl_a_r2 ) { cpustate->a ^= cpustate->R2; return 1; } +OPHANDLER( xrl_a_r3 ) { cpustate->a ^= cpustate->R3; return 1; } +OPHANDLER( xrl_a_r4 ) { cpustate->a ^= cpustate->R4; return 1; } +OPHANDLER( xrl_a_r5 ) { cpustate->a ^= cpustate->R5; return 1; } +OPHANDLER( xrl_a_r6 ) { cpustate->a ^= cpustate->R6; return 1; } +OPHANDLER( xrl_a_r7 ) { cpustate->a ^= cpustate->R7; return 1; } +OPHANDLER( xrl_a_xr0 ) { cpustate->a ^= ram_r(cpustate->R0); return 1; } +OPHANDLER( xrl_a_xr1 ) { cpustate->a ^= ram_r(cpustate->R1); return 1; } +OPHANDLER( xrl_a_n ) { cpustate->a ^= argument_fetch(cpustate); return 2; } + +SPLIT_OPHANDLER( split_02, outl_bus_a, out_dbb_a ) +SPLIT_OPHANDLER( split_08, ins_a_bus, illegal ) +SPLIT_OPHANDLER( split_22, illegal, in_a_dbb ) +SPLIT_OPHANDLER( split_75, ent0_clk, illegal ) +SPLIT_OPHANDLER( split_80, movx_a_xr0, illegal ) +SPLIT_OPHANDLER( split_81, movx_a_xr1, illegal ) +SPLIT_OPHANDLER( split_86, jni, jobf ) +SPLIT_OPHANDLER( split_88, orl_bus_n, illegal ) +SPLIT_OPHANDLER( split_90, movx_xr0_a, mov_sts_a ) +SPLIT_OPHANDLER( split_91, movx_xr1_a, illegal ) +SPLIT_OPHANDLER( split_98, anl_bus_n, illegal ) +SPLIT_OPHANDLER( split_d6, illegal, jnibf ) +SPLIT_OPHANDLER( split_e5, sel_mb0, en_dma ) +SPLIT_OPHANDLER( split_f5, sel_mb1, en_flags ) @@ -647,40 +821,40 @@ OPHANDLER( xrl_a_n ) { A ^= argument_fetch(cpustate, PC++); } OPCODE TABLES ***************************************************************************/ -static const mcs48_opcode opcode_table[256]= +static const mcs48_ophandler opcode_table[256]= { - {1, nop },{1, illegal },{2, outl_bus_a},{2, add_a_n },{2, jmp_0 },{1, en_i },{1, illegal },{1, dec_a }, - {2, ins_a_bus },{2, in_a_p1 },{2, in_a_p2 },{1, illegal },{2, movd_a_p4 },{2, movd_a_p5 },{2, movd_a_p6 },{2, movd_a_p7 }, - {1, inc_xr0 },{1, inc_xr1 },{2, jb_0 },{2, adc_a_n },{2, call_0 },{1, dis_i },{2, jtf },{1, inc_a }, - {1, inc_r0 },{1, inc_r1 },{1, inc_r2 },{1, inc_r3 },{1, inc_r4 },{1, inc_r5 },{1, inc_r6 },{1, inc_r7 }, - {1, xch_a_xr0 },{1, xch_a_xr1 },{1, illegal },{2, mov_a_n },{2, jmp_1 },{1, en_tcnti },{2, jnt_0 },{1, clr_a }, - {1, xch_a_r0 },{1, xch_a_r1 },{1, xch_a_r2 },{1, xch_a_r3 },{1, xch_a_r4 },{1, xch_a_r5 },{1, xch_a_r6 },{1, xch_a_r7 }, - {1, xchd_a_xr0 },{1, xchd_a_xr1 },{2, jb_1 },{1, illegal },{2, call_1 },{1, dis_tcnti },{2, jt_0 },{1, cpl_a }, - {0, illegal },{2, outl_p1_a },{2, outl_p2_a },{1, illegal },{2, movd_p4_a },{2, movd_p5_a },{2, movd_p6_a },{2, movd_p7_a }, - {1, orl_a_xr0 },{1, orl_a_xr1 },{1, mov_a_t },{2, orl_a_n },{2, jmp_2 },{1, strt_cnt },{2, jnt_1 },{1, swap_a }, - {1, orl_a_r0 },{1, orl_a_r1 },{1, orl_a_r2 },{1, orl_a_r3 },{1, orl_a_r4 },{1, orl_a_r5 },{1, orl_a_r6 },{1, orl_a_r7 }, - {1, anl_a_xr0 },{1, anl_a_xr1 },{2, jb_2 },{2, anl_a_n },{2, call_2 },{1, strt_t },{2, jt_1 },{1, da_a }, - {1, anl_a_r0 },{1, anl_a_r1 },{1, anl_a_r2 },{1, anl_a_r3 },{1, anl_a_r4 },{1, anl_a_r5 },{1, anl_a_r6 },{1, anl_a_r7 }, - {1, add_a_xr0 },{1, add_a_xr1 },{1, mov_t_a },{1, illegal },{2, jmp_3 },{1, stop_tcnt },{1, illegal },{1, rrc_a }, - {1, add_a_r0 },{1, add_a_r1 },{1, add_a_r2 },{1, add_a_r3 },{1, add_a_r4 },{1, add_a_r5 },{1, add_a_r6 },{1, add_a_r7 }, - {1, adc_a_xr0 },{1, adc_a_xr1 },{2, jb_3 },{1, illegal },{2, call_3 },{1, ento_clk },{2, jf1 },{1, rr_a }, - {1, adc_a_r0 },{1, adc_a_r1 },{1, adc_a_r2 },{1, adc_a_r3 },{1, adc_a_r4 },{1, adc_a_r5 },{1, adc_a_r6 },{1, adc_a_r7 }, - {2, movx_a_xr0 },{2, movx_a_xr1 },{1, illegal },{2, ret },{2, jmp_4 },{1, clr_f0 },{2, jni },{1, illegal }, - {2, orl_bus_n },{2, orl_p1_n },{2, orl_p2_n },{1, illegal },{2, orld_p4_a },{2, orld_p5_a },{2, orld_p6_a },{2, orld_p7_a }, - {2, movx_xr0_a },{2, movx_xr1_a },{2, jb_4 },{2, retr },{2, call_4 },{1, cpl_f0 },{2, jnz },{1, clr_c }, - {2, anl_bus_n },{2, anl_p1_n },{2, anl_p2_n },{1, illegal },{2, anld_p4_a },{2, anld_p5_a },{2, anld_p6_a },{2, anld_p7_a }, - {1, mov_xr0_a },{1, mov_xr1_a },{1, illegal },{2, movp_a_xa },{2, jmp_5 },{1, clr_f1 },{1, illegal },{1, cpl_c }, - {1, mov_r0_a },{1, mov_r1_a },{1, mov_r2_a },{1, mov_r3_a },{1, mov_r4_a },{1, mov_r5_a },{1, mov_r6_a },{1, mov_r7_a }, - {2, mov_xr0_n },{2, mov_xr1_n },{2, jb_5 },{2, jmpp_xa },{2, call_5 },{1, cpl_f1 },{2, jf0 },{1, illegal }, - {2, mov_r0_n },{2, mov_r1_n },{2, mov_r2_n },{2, mov_r3_n },{2, mov_r4_n },{2, mov_r5_n },{2, mov_r6_n },{2, mov_r7_n }, - {0, illegal },{1, illegal },{1, illegal },{1, illegal },{2, jmp_6 },{1, sel_rb0 },{2, jz },{1, mov_a_psw }, - {1, dec_r0 },{1, dec_r1 },{1, dec_r2 },{1, dec_r3 },{1, dec_r4 },{1, dec_r5 },{1, dec_r6 },{1, dec_r7 }, - {1, xrl_a_xr0 },{1, xrl_a_xr1 },{2, jb_6 },{2, xrl_a_n },{2, call_6 },{1, sel_rb1 },{1, illegal },{1, mov_psw_a }, - {1, xrl_a_r0 },{1, xrl_a_r1 },{1, xrl_a_r2 },{1, xrl_a_r3 },{1, xrl_a_r4 },{1, xrl_a_r5 },{1, xrl_a_r6 },{1, xrl_a_r7 }, - {0, illegal },{1, illegal },{1, illegal },{2, movp3_a_xa},{2, jmp_7 },{1, sel_mb0 },{2, jnc },{1, rl_a }, - {2, djnz_r0 },{2, djnz_r1 },{2, djnz_r2 },{2, djnz_r3 },{2, djnz_r4 },{2, djnz_r5 },{2, djnz_r6 },{2, djnz_r7 }, - {1, mov_a_xr0 },{1, mov_a_xr1 },{2, jb_7 },{1, illegal },{2, call_7 },{1, sel_mb1 },{2, jc },{1, rlc_a }, - {1, mov_a_r0 },{1, mov_a_r1 },{1, mov_a_r2 },{1, mov_a_r3 },{1, mov_a_r4 },{1, mov_a_r5 },{1, mov_a_r6 },{1, mov_a_r7 } + nop, illegal, split_02, add_a_n, jmp_0, en_i, illegal, dec_a, /* 00 */ + split_08, in_a_p1, in_a_p2, illegal, movd_a_p4, movd_a_p5, movd_a_p6, movd_a_p7, + inc_xr0, inc_xr1, jb_0, adc_a_n, call_0, dis_i, jtf, inc_a, /* 10 */ + inc_r0, inc_r1, inc_r2, inc_r3, inc_r4, inc_r5, inc_r6, inc_r7, + xch_a_xr0, xch_a_xr1, split_22, mov_a_n, jmp_1, en_tcnti, jnt_0, clr_a, /* 20 */ + xch_a_r0, xch_a_r1, xch_a_r2, xch_a_r3, xch_a_r4, xch_a_r5, xch_a_r6, xch_a_r7, + xchd_a_xr0, xchd_a_xr1, jb_1, illegal, call_1, dis_tcnti, jt_0, cpl_a, /* 30 */ + illegal, outl_p1_a, outl_p2_a, illegal, movd_p4_a, movd_p5_a, movd_p6_a, movd_p7_a, + orl_a_xr0, orl_a_xr1, mov_a_t, orl_a_n, jmp_2, strt_cnt, jnt_1, swap_a, /* 40 */ + orl_a_r0, orl_a_r1, orl_a_r2, orl_a_r3, orl_a_r4, orl_a_r5, orl_a_r6, orl_a_r7, + anl_a_xr0, anl_a_xr1, jb_2, anl_a_n, call_2, strt_t, jt_1, da_a, /* 50 */ + anl_a_r0, anl_a_r1, anl_a_r2, anl_a_r3, anl_a_r4, anl_a_r5, anl_a_r6, anl_a_r7, + add_a_xr0, add_a_xr1, mov_t_a, illegal, jmp_3, stop_tcnt, illegal, rrc_a, /* 60 */ + add_a_r0, add_a_r1, add_a_r2, add_a_r3, add_a_r4, add_a_r5, add_a_r6, add_a_r7, + adc_a_xr0, adc_a_xr1, jb_3, illegal, call_3, split_75, jf1, rr_a, /* 70 */ + adc_a_r0, adc_a_r1, adc_a_r2, adc_a_r3, adc_a_r4, adc_a_r5, adc_a_r6, adc_a_r7, + split_80, split_81, illegal, ret, jmp_4, clr_f0, split_86, illegal, /* 80 */ + split_88, orl_p1_n, orl_p2_n, illegal, orld_p4_a, orld_p5_a, orld_p6_a, orld_p7_a, + split_90, split_91, jb_4, retr, call_4, cpl_f0, jnz, clr_c, /* 90 */ + split_98, anl_p1_n, anl_p2_n, illegal, anld_p4_a, anld_p5_a, anld_p6_a, anld_p7_a, + mov_xr0_a, mov_xr1_a, illegal, movp_a_xa, jmp_5, clr_f1, illegal, cpl_c, /* A0 */ + mov_r0_a, mov_r1_a, mov_r2_a, mov_r3_a, mov_r4_a, mov_r5_a, mov_r6_a, mov_r7_a, + mov_xr0_n, mov_xr1_n, jb_5, jmpp_xa, call_5, cpl_f1, jf0, illegal, /* B0 */ + mov_r0_n, mov_r1_n, mov_r2_n, mov_r3_n, mov_r4_n, mov_r5_n, mov_r6_n, mov_r7_n, + illegal, illegal, illegal, illegal, jmp_6, sel_rb0, jz, mov_a_psw, /* C0 */ + dec_r0, dec_r1, dec_r2, dec_r3, dec_r4, dec_r5, dec_r6, dec_r7, + xrl_a_xr0, xrl_a_xr1, jb_6, xrl_a_n, call_6, sel_rb1, split_d6, mov_psw_a, /* D0 */ + xrl_a_r0, xrl_a_r1, xrl_a_r2, xrl_a_r3, xrl_a_r4, xrl_a_r5, xrl_a_r6, xrl_a_r7, + illegal, illegal, illegal, movp3_a_xa,jmp_7, split_e5, jnc, rl_a, /* E0 */ + djnz_r0, djnz_r1, djnz_r2, djnz_r3, djnz_r4, djnz_r5, djnz_r6, djnz_r7, + mov_a_xr0, mov_a_xr1, jb_7, illegal, call_7, split_f5, jc, rlc_a, /* F0 */ + mov_a_r0, mov_a_r1, mov_a_r2, mov_a_r3, mov_a_r4, mov_a_r5, mov_a_r6, mov_a_r7 }; @@ -693,7 +867,7 @@ static const mcs48_opcode opcode_table[256]= mcs48_init - generic MCS-48 initialization -------------------------------------------------*/ -static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback, UINT16 romsize) +static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback, UINT8 feature_mask, UINT16 romsize) { mcs48_state *cpustate = device->token; @@ -708,25 +882,35 @@ static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback cpustate->irq_callback = irqcallback; cpustate->device = device; cpustate->int_rom_size = romsize; + cpustate->feature_mask = feature_mask; cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA); cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO); + /* set up the state table */ + cpustate->state = state_table_template; + cpustate->state.baseptr = cpustate; + cpustate->state.subtypemask = feature_mask; + /* ensure that regptr is valid before get_info gets called */ update_regptr(cpustate); - state_save_register_device_item(device, 0, cpustate->prevpc.w.l); - state_save_register_device_item(device, 0, PC); - state_save_register_device_item(device, 0, A); - state_save_register_device_item(device, 0, PSW); + state_save_register_device_item(device, 0, cpustate->prevpc); + state_save_register_device_item(device, 0, cpustate->pc); + + state_save_register_device_item(device, 0, cpustate->a); + state_save_register_device_item(device, 0, cpustate->psw); state_save_register_device_item(device, 0, cpustate->p1); state_save_register_device_item(device, 0, cpustate->p2); - state_save_register_device_item(device, 0, cpustate->f1); state_save_register_device_item(device, 0, cpustate->ea); state_save_register_device_item(device, 0, cpustate->timer); state_save_register_device_item(device, 0, cpustate->prescaler); state_save_register_device_item(device, 0, cpustate->t1_history); + state_save_register_device_item(device, 0, cpustate->sts); + state_save_register_device_item(device, 0, cpustate->dbbi); + state_save_register_device_item(device, 0, cpustate->dbbo); + state_save_register_device_item(device, 0, cpustate->irq_state); state_save_register_device_item(device, 0, cpustate->irq_in_progress); state_save_register_device_item(device, 0, cpustate->timer_overflow); @@ -734,55 +918,65 @@ static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback state_save_register_device_item(device, 0, cpustate->tirq_enabled); state_save_register_device_item(device, 0, cpustate->xirq_enabled); state_save_register_device_item(device, 0, cpustate->timecount_enabled); + state_save_register_device_item(device, 0, cpustate->flags_enabled); + state_save_register_device_item(device, 0, cpustate->dma_enabled); + state_save_register_device_item(device, 0, cpustate->a11); } /*------------------------------------------------- - i8035_init - initialization for systems with - 0k of internal ROM and 64 bytes of internal - RAM + mcs48_norom_init - initialization for systems + with no internal ROM -------------------------------------------------*/ -static CPU_INIT( i8035 ) +static CPU_INIT( mcs48_norom ) { - mcs48_init(device, irqcallback, 0x0); + mcs48_init(device, irqcallback, MCS48_FEATURE, 0x0); } /*------------------------------------------------- - i8048_init - initialization for systems with - 1k of internal ROM and 64 bytes of internal - RAM + mcs48_1k_rom_init - initialization for systems + with 1k of internal ROM -------------------------------------------------*/ -static CPU_INIT( i8048 ) +static CPU_INIT( mcs48_1k_rom ) { - mcs48_init(device, irqcallback, 0x400); + mcs48_init(device, irqcallback, MCS48_FEATURE, 0x400); } /*------------------------------------------------- - i8039_init - initialization for systems with - 0k of internal ROM and 128 bytes of internal - RAM + mcs48_2k_rom - initialization for systems + with 2k of internal ROM -------------------------------------------------*/ -static CPU_INIT( i8039 ) +static CPU_INIT( mcs48_2k_rom ) { - mcs48_init(device, irqcallback, 0x0); + mcs48_init(device, irqcallback, MCS48_FEATURE, 0x800); } /*------------------------------------------------- - i8049_init - initialization for systems with - 2k of internal ROM and 128 bytes of internal - RAM + upi41_1k_rom_init - initialization for systems + with 1k of internal ROM -------------------------------------------------*/ -static CPU_INIT( i8049 ) +static CPU_INIT( upi41_1k_rom ) { - mcs48_init(device, irqcallback, 0x800); + mcs48_init(device, irqcallback, UPI41_FEATURE, 0x400); +} + + +/*------------------------------------------------- + upi41_2k_rom_init - initialization for systems + with 2k of internal ROM +-------------------------------------------------*/ + +static CPU_INIT( upi41_2k_rom ) +{ + mcs48_init(device, irqcallback, UPI41_FEATURE, 0x800); } @@ -795,8 +989,8 @@ static CPU_RESET( mcs48 ) mcs48_state *cpustate = device->token; /* confirmed from reset description */ - PC = 0; - PSW = (PSW & (C_FLAG | A_FLAG)) | 0x08; + cpustate->pc = 0; + cpustate->psw = (cpustate->psw & (C_FLAG | A_FLAG)) | 0x08; cpustate->a11 = 0x000; bus_w(0xff); cpustate->p1 = 0xff; @@ -807,7 +1001,9 @@ static CPU_RESET( mcs48 ) cpustate->xirq_enabled = FALSE; cpustate->timecount_enabled = 0; cpustate->timer_flag = FALSE; - cpustate->f1 = 0; + cpustate->sts = 0; + cpustate->flags_enabled = FALSE; + cpustate->dma_enabled = FALSE; /* confirmed from interrupt logic description */ cpustate->irq_in_progress = FALSE; @@ -824,25 +1020,25 @@ static CPU_RESET( mcs48 ) check_irqs - check for and process IRQs -------------------------------------------------*/ -static void check_irqs(mcs48_state *cpustate) +static int check_irqs(mcs48_state *cpustate) { /* if something is in progress, we do nothing */ if (cpustate->irq_in_progress) - return; + return 0; /* external interrupts take priority */ - if (cpustate->irq_state && cpustate->xirq_enabled) + if ((cpustate->irq_state || (cpustate->sts & STS_IBF) != 0) && cpustate->xirq_enabled) { cpustate->irq_in_progress = TRUE; /* transfer to location 0x03 */ push_pc_psw(cpustate); - PC = 0x03; - cpustate->inst_cycles += 2; + cpustate->pc = 0x03; /* indicate we took the external IRQ */ if (cpustate->irq_callback != NULL) (*cpustate->irq_callback)(cpustate->device, 0); + return 2; } /* timer overflow interrupts follow */ @@ -852,12 +1048,13 @@ static void check_irqs(mcs48_state *cpustate) /* transfer to location 0x07 */ push_pc_psw(cpustate); - PC = 0x07; - cpustate->inst_cycles += 2; + cpustate->pc = 0x07; /* timer overflow flip-flop is reset once taken */ cpustate->timer_overflow = FALSE; + return 2; } + return 0; } @@ -912,35 +1109,35 @@ static void burn_cycles(mcs48_state *cpustate, int count) static CPU_EXECUTE( mcs48 ) { mcs48_state *cpustate = device->token; - unsigned opcode; + int curcycles; update_regptr(cpustate); cpustate->icount = cycles; /* external interrupts may have been set since we last checked */ - cpustate->inst_cycles = 0; - check_irqs(cpustate); - cpustate->icount -= cpustate->inst_cycles; + curcycles = check_irqs(cpustate); + cpustate->icount -= curcycles; if (cpustate->timecount_enabled != 0) - burn_cycles(cpustate, cpustate->inst_cycles); + burn_cycles(cpustate, curcycles); /* iterate over remaining cycles, guaranteeing at least one instruction */ do { + unsigned opcode; + /* fetch next opcode */ cpustate->prevpc = cpustate->pc; - debugger_instruction_hook(device, PC); - opcode = opcode_fetch(cpustate, PC++); + debugger_instruction_hook(device, cpustate->pc); + opcode = opcode_fetch(cpustate); /* process opcode and count cycles */ - cpustate->inst_cycles = opcode_table[opcode].cycles; - (*opcode_table[opcode].function)(cpustate); + curcycles = (*opcode_table[opcode])(cpustate); /* burn the cycles */ - cpustate->icount -= cpustate->inst_cycles; + cpustate->icount -= curcycles; if (cpustate->timecount_enabled != 0) - burn_cycles(cpustate, cpustate->inst_cycles); + burn_cycles(cpustate, curcycles); } while (cpustate->icount > 0); @@ -949,6 +1146,71 @@ static CPU_EXECUTE( mcs48 ) +/*************************************************************************** + DATA ACCESS HELPERS +***************************************************************************/ + +/*------------------------------------------------- + upi41_master_r - master CPU data/status + read +-------------------------------------------------*/ + +UINT8 upi41_master_r(const device_config *device, UINT8 a0) +{ + mcs48_state *cpustate = device->token; + + /* if just reading the status, return it */ + if ((a0 & 1) != 0) + return cpustate->sts; + + /* if the output buffer was full, it gets cleared now */ + if (cpustate->sts & STS_OBF) + { + cpustate->sts &= ~STS_OBF; + if (cpustate->flags_enabled) + port_w(2, cpustate->p2 &= ~P2_OBF); + } + return cpustate->dbbo; +} + + +/*------------------------------------------------- + upi41_master_w - master CPU command/data + write +-------------------------------------------------*/ + +static TIMER_CALLBACK( master_callback ) +{ + const device_config *device = ptr; + mcs48_state *cpustate = device->token; + UINT8 a0 = (param >> 8) & 1; + UINT8 data = param; + + /* data always goes to the input buffer */ + cpustate->dbbi = data; + + /* set the appropriate flags */ + if ((cpustate->sts & STS_IBF) == 0) + { + cpustate->sts |= STS_IBF; + if (cpustate->flags_enabled) + port_w(2, cpustate->p2 &= ~P2_NIBF); + } + + /* set F1 accordingly */ + if (a0 == 0) + cpustate->sts &= ~STS_F1; + else + cpustate->sts |= STS_F1; +} + +void upi41_master_w(const device_config *device, UINT8 a0, UINT8 data) +{ + timer_call_after_resynch(device->machine, (void *)device, (a0 << 8) | data, master_callback); +} + + + /*************************************************************************** ADDRESS MAPS ***************************************************************************/ @@ -970,12 +1232,74 @@ static ADDRESS_MAP_START(data_7bit, ADDRESS_SPACE_DATA, 8) AM_RANGE(0x00, 0x7f) AM_RAM ADDRESS_MAP_END +static ADDRESS_MAP_START(data_8bit, ADDRESS_SPACE_DATA, 8) + AM_RANGE(0x00, 0xff) AM_RAM +ADDRESS_MAP_END + /*************************************************************************** GENERAL CONTEXT ACCESS ***************************************************************************/ +/*------------------------------------------------- + mcs48_import_state - import state from the + debugger into our internal format +-------------------------------------------------*/ + +static CPU_IMPORT_STATE( mcs48 ) +{ + mcs48_state *cpustate = device->token; + + switch (entry->index) + { + case MCS48_R0: + case MCS48_R1: + case MCS48_R2: + case MCS48_R3: + case MCS48_R4: + case MCS48_R5: + case MCS48_R6: + case MCS48_R7: + cpustate->regptr[entry->index - MCS48_R0] = cpustate->rtemp; + break; + + default: + fatalerror("CPU_IMPORT_STATE(mcs48) called for unexpected value\n"); + break; + } +} + + +/*------------------------------------------------- + mcs48_export_state - prepare state for + exporting to the debugger +-------------------------------------------------*/ + +static CPU_EXPORT_STATE( mcs48 ) +{ + mcs48_state *cpustate = device->token; + + switch (entry->index) + { + case MCS48_R0: + case MCS48_R1: + case MCS48_R2: + case MCS48_R3: + case MCS48_R4: + case MCS48_R5: + case MCS48_R6: + case MCS48_R7: + cpustate->rtemp = cpustate->regptr[entry->index - MCS48_R0]; + break; + + default: + fatalerror("CPU_EXPORT_STATE(mcs48) called for unexpected value\n"); + break; + } +} + + /*------------------------------------------------- mcs48_set_info - set a piece of information on the CPU core @@ -989,25 +1313,7 @@ static CPU_SET_INFO( mcs48 ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: cpustate->irq_state = (info->i != CLEAR_LINE); break; - case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: cpustate->ea = (info->i != CLEAR_LINE); break; - - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + MCS48_PC: PC = info->i; break; - case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + MCS48_PSW: PSW = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_A: A = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_TC: cpustate->timer = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_P1: cpustate->p1 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_P2: cpustate->p2 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R0: R0 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R1: R1 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R2: R2 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R3: R3 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R4: R4 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R5: R5 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R6: R6 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_R7: R7 = info->i; break; - case CPUINFO_INT_REGISTER + MCS48_EA: cpustate->ea = info->i; break; + case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: cpustate->ea = (info->i != CLEAR_LINE); break; } } @@ -1024,97 +1330,65 @@ static CPU_GET_INFO( mcs48 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48_state); break; - case CPUINFO_INT_INPUT_LINES: info->i = 2; break; - case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = MCS48_INPUT_IRQ; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break; - case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; - case CPUINFO_INT_CLOCK_DIVIDER: info->i = 3*5; break; - case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break; - case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break; - case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; - case CPUINFO_INT_MAX_CYCLES: info->i = 3; break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48_state); break; + case CPUINFO_INT_INPUT_LINES: info->i = 2; break; + case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = MCS48_INPUT_IRQ; break; + case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break; + case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; + case CPUINFO_INT_CLOCK_DIVIDER: info->i = 3*5; break; + case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break; + case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break; + case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; + case CPUINFO_INT_MAX_CYCLES: info->i = 3; break; - case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break; - case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /*info->i = 6 or 7;*/ break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break; + case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; + case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /*info->i = 6 or 7 or 8;*/ break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break; - case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break; + case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break; + case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break; - case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc.w.l; break; + /* --- the following bits of info are returned as pointers to functions --- */ + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs48); break; + case CPUINFO_FCT_INIT: /* set per-core */ break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs48); break; + case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break; + case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break; + case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(mcs48); break; + case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(mcs48); break; - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + MCS48_PC: info->i = PC; break; - case CPUINFO_INT_REGISTER + MCS48_PSW: info->i = PSW; break; - case CPUINFO_INT_REGISTER + MCS48_A: info->i = A; break; - case CPUINFO_INT_REGISTER + MCS48_TC: info->i = cpustate->timer; break; - case CPUINFO_INT_REGISTER + MCS48_P1: info->i = cpustate->p1; break; - case CPUINFO_INT_REGISTER + MCS48_P2: info->i = cpustate->p2; break; - case CPUINFO_INT_REGISTER + MCS48_R0: info->i = R0; break; - case CPUINFO_INT_REGISTER + MCS48_R1: info->i = R1; break; - case CPUINFO_INT_REGISTER + MCS48_R2: info->i = R2; break; - case CPUINFO_INT_REGISTER + MCS48_R3: info->i = R3; break; - case CPUINFO_INT_REGISTER + MCS48_R4: info->i = R4; break; - case CPUINFO_INT_REGISTER + MCS48_R5: info->i = R5; break; - case CPUINFO_INT_REGISTER + MCS48_R6: info->i = R6; break; - case CPUINFO_INT_REGISTER + MCS48_R7: info->i = R7; break; - case CPUINFO_INT_REGISTER + MCS48_EA: info->i = cpustate->ea; break; - - /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs48); break; - case CPUINFO_FCT_INIT: /*info->init = CPU_INIT_NAME(i8039);*/ break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs48); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; - - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: /*info->internal_map8 = ADDRESS_MAP_NAME(program_10bit);*/ break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /*info->internal_map8 = ADDRESS_MAP_NAME(data_7bit);*/ break; + /* --- the following bits of info are returned as pointers --- */ + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; + case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state; break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: /* set per-core */ break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /* set per-core */ break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: /*strcpy(info->s, "I8039");*/ break; - case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Intel 8039"); break; - case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.2"); break; - case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break; - case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Mirko Buffoni\nBased on the original work Copyright Dan Boris"); break; + case CPUINFO_STR_NAME: /* set per-core */ break; + case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Intel 8039"); break; + case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.2"); break; + case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break; + case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Mirko Buffoni\nBased on the original work Copyright Dan Boris"); break; case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c %c%c%c%c%c%c%c%c", cpustate->irq_state ? 'I':'.', cpustate->a11 ? 'M':'.', - PSW & 0x80 ? 'C':'.', - PSW & 0x40 ? 'A':'.', - PSW & 0x20 ? 'F':'.', - PSW & 0x10 ? 'B':'.', - PSW & 0x08 ? '?':'.', - PSW & 0x04 ? '4':'.', - PSW & 0x02 ? '2':'.', - PSW & 0x01 ? '1':'.'); + cpustate->psw & 0x80 ? 'C':'.', + cpustate->psw & 0x40 ? 'A':'.', + cpustate->psw & 0x20 ? 'F':'.', + cpustate->psw & 0x10 ? 'B':'.', + cpustate->psw & 0x08 ? '?':'.', + cpustate->psw & 0x04 ? '4':'.', + cpustate->psw & 0x02 ? '2':'.', + cpustate->psw & 0x01 ? '1':'.'); break; - - case CPUINFO_STR_REGISTER + MCS48_PC: sprintf(info->s, "PC:%04X", PC); break; - case CPUINFO_STR_REGISTER + MCS48_PSW: sprintf(info->s, "PSW:%02X", PSW); break; - case CPUINFO_STR_REGISTER + MCS48_A: sprintf(info->s, "A:%02X", A); break; - case CPUINFO_STR_REGISTER + MCS48_TC: sprintf(info->s, "TC:%02X", cpustate->timer); break; - case CPUINFO_STR_REGISTER + MCS48_P1: sprintf(info->s, "P1:%02X", cpustate->p1); break; - case CPUINFO_STR_REGISTER + MCS48_P2: sprintf(info->s, "P2:%02X", cpustate->p2); break; - case CPUINFO_STR_REGISTER + MCS48_R0: sprintf(info->s, "R0:%02X", R0); break; - case CPUINFO_STR_REGISTER + MCS48_R1: sprintf(info->s, "R1:%02X", R1); break; - case CPUINFO_STR_REGISTER + MCS48_R2: sprintf(info->s, "R2:%02X", R2); break; - case CPUINFO_STR_REGISTER + MCS48_R3: sprintf(info->s, "R3:%02X", R3); break; - case CPUINFO_STR_REGISTER + MCS48_R4: sprintf(info->s, "R4:%02X", R4); break; - case CPUINFO_STR_REGISTER + MCS48_R5: sprintf(info->s, "R5:%02X", R5); break; - case CPUINFO_STR_REGISTER + MCS48_R6: sprintf(info->s, "R6:%02X", R6); break; - case CPUINFO_STR_REGISTER + MCS48_R7: sprintf(info->s, "R7:%02X", R7); break; - case CPUINFO_STR_REGISTER + MCS48_EA: sprintf(info->s, "EA:%02X", cpustate->ea); break; } } @@ -1124,131 +1398,92 @@ static CPU_GET_INFO( mcs48 ) CPU-SPECIFIC CONTEXT ACCESS ***************************************************************************/ -CPU_GET_INFO( i8035 ) +static void mcs48_generic_get_info(const device_config *device, UINT32 state, cpuinfo *info, UINT8 features, int romsize, int ramsize, const char *name) { switch (state) { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8035); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8035"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} + /* --- the following bits of info are returned as 64-bit signed integers --- */ + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: + if (ramsize == 64) + info->i = 6; + else if (ramsize == 128) + info->i = 7; + else if (ramsize == 256) + info->i = 8; + else + fatalerror("mcs48_generic_get_info: Invalid RAM size"); + break; -CPU_GET_INFO( i8048 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8048"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} + /* --- the following bits of info are returned as pointers to functions --- */ + case CPUINFO_FCT_INIT: + if (romsize == 0) + info->init = CPU_INIT_NAME(mcs48_norom); + else if (romsize == 1024) + info->init = (features == UPI41_FEATURE) ? CPU_INIT_NAME(upi41_1k_rom) : CPU_INIT_NAME(mcs48_1k_rom); + else if (romsize == 2048) + info->init = (features == UPI41_FEATURE) ? CPU_INIT_NAME(upi41_2k_rom) : CPU_INIT_NAME(mcs48_2k_rom); + else + fatalerror("mcs48_generic_get_info: Invalid ROM size"); + break; -CPU_GET_INFO( i8648 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8648"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} + case CPUINFO_FCT_DISASSEMBLE: + if (features == UPI41_FEATURE) + info->disassemble = CPU_DISASSEMBLE_NAME(upi41); + else + info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); + break; -CPU_GET_INFO( i8748 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8748"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} + /* --- the following bits of info are returned as pointers --- */ + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: + if (romsize == 0) + info->internal_map8 = NULL; + else if (romsize == 1024) + info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); + else if (romsize == 2048) + info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); + else + fatalerror("mcs48_generic_get_info: Invalid RAM size"); + break; -CPU_GET_INFO( mb8884 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8035); break; - case CPUINFO_STR_NAME: strcpy(info->s, "MB8884"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: + if (ramsize == 64) + info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); + else if (ramsize == 128) + info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); + else if (ramsize == 256) + info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); + else + fatalerror("mcs48_generic_get_info: Invalid RAM size"); + break; -CPU_GET_INFO( n7751 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break; - case CPUINFO_STR_NAME: strcpy(info->s, "N7751"); break; - default: CPU_GET_INFO_CALL(mcs48); break; + /* --- the following bits of info are returned as NULL-terminated strings --- */ + case CPUINFO_STR_NAME: + strcpy(info->s, name); + break; + + /* default case */ + default: + CPU_GET_INFO_CALL(mcs48); + break; } } +CPU_GET_INFO( i8035 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 0, 64, "I8035"); } +CPU_GET_INFO( i8048 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 1024, 64, "I8048"); } +CPU_GET_INFO( i8648 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 1024, 64, "I8648"); } +CPU_GET_INFO( i8748 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 1024, 64, "I8748"); } +CPU_GET_INFO( mb8884 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 0, 64, "MB8884"); } +CPU_GET_INFO( n7751 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 1024, 64, "N7751"); } -CPU_GET_INFO( i8039 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8039); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8039"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} +CPU_GET_INFO( i8039 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 0, 128, "I8039"); } +CPU_GET_INFO( i8049 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 2048, 128, "I8049"); } +CPU_GET_INFO( i8749 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 2048, 128, "I8749"); } +CPU_GET_INFO( m58715 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 2048, 128, "M58715"); } -CPU_GET_INFO( i8049 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8049"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} +CPU_GET_INFO( i8041 ) { mcs48_generic_get_info(device, state, info, UPI41_FEATURE, 1024, 128, "I8041"); } +CPU_GET_INFO( i8741 ) { mcs48_generic_get_info(device, state, info, UPI41_FEATURE, 1024, 128, "I8741"); } -CPU_GET_INFO( i8749 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break; - case CPUINFO_STR_NAME: strcpy(info->s, "I8749"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} - -CPU_GET_INFO( m58715 ) -{ - switch (state) - { - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break; - case CPUINFO_STR_NAME: strcpy(info->s, "M58715"); break; - default: CPU_GET_INFO_CALL(mcs48); break; - } -} +CPU_GET_INFO( i8042 ) { mcs48_generic_get_info(device, state, info, UPI41_FEATURE, 2048, 256, "I8042"); } +CPU_GET_INFO( i8242 ) { mcs48_generic_get_info(device, state, info, UPI41_FEATURE, 2048, 256, "I8242"); } +CPU_GET_INFO( i8742 ) { mcs48_generic_get_info(device, state, info, UPI41_FEATURE, 2048, 256, "I8742"); } diff --git a/src/emu/cpu/mcs48/mcs48.h b/src/emu/cpu/mcs48/mcs48.h index 4f26c7d2364..d2820f8bec0 100644 --- a/src/emu/cpu/mcs48/mcs48.h +++ b/src/emu/cpu/mcs48/mcs48.h @@ -2,7 +2,7 @@ mcs48.c - Intel MCS-48 Portable Emulator + Intel MCS-48/UPI-41 Portable Emulator Copyright Mirko Buffoni Based on the original work Copyright Dan Boris, an 8048 emulator @@ -12,11 +12,12 @@ #pragma once -#ifndef __I8039_H__ -#define __I8039_H__ +#ifndef __MCS48_H__ +#define __MCS48_H__ #include "cpuintrf.h" + /*************************************************************************** CONSTANTS ***************************************************************************/ @@ -24,10 +25,11 @@ /* register access indexes */ enum { - MCS48_PC = 1, + MCS48_PC, MCS48_PSW, MCS48_A, MCS48_TC, + MCS48_TPRE, MCS48_P1, MCS48_P2, MCS48_R0, @@ -38,7 +40,14 @@ enum MCS48_R5, MCS48_R6, MCS48_R7, - MCS48_EA + MCS48_EA, + MCS48_STS, /* UPI-41 systems only */ + MCS48_DBBO, /* UPI-41 systems only */ + MCS48_DBBI, /* UPI-41 systems only */ + + MCS48_GENPC = REG_GENPC, + MCS48_GENSP = REG_GENSP, + MCS48_GENPCBASE = REG_GENPCBASE }; @@ -46,6 +55,7 @@ enum enum { MCS48_INPUT_IRQ = 0, + UPI41_INPUT_IBF = 0, MCS48_INPUT_EA }; @@ -62,7 +72,18 @@ enum MCS48_PORT_P7 = 0x107, MCS48_PORT_T0 = 0x110, MCS48_PORT_T1 = 0x111, - MCS48_PORT_BUS = 0x120 + MCS48_PORT_BUS = 0x120, + MCS48_PORT_PROG = 0x121 /* PROG line to 8243 expander */ +}; + + +/* 8243 expander operations */ +enum +{ + MCS48_EXPANDER_OP_READ = 0, + MCS48_EXPANDER_OP_WRITE = 1, + MCS48_EXPANDER_OP_OR = 2, + MCS48_EXPANDER_OP_AND = 3 }; @@ -71,7 +92,7 @@ enum FUNCTION PROTOTYPES ***************************************************************************/ -/* variants with 64 bytes of internal RAM and up to 1k of internal ROM */ +/* MCS-48 variants with 64 bytes of internal RAM and up to 1k of internal ROM */ CPU_GET_INFO( i8035 ); CPU_GET_INFO( i8048 ); CPU_GET_INFO( i8648 ); @@ -86,7 +107,7 @@ CPU_GET_INFO( n7751 ); #define CPU_MB8884 CPU_GET_INFO_NAME( mb8884 ) #define CPU_N7751 CPU_GET_INFO_NAME( n7751 ) -/* variants with 128 bytes of internal RAM and up to 2k of internal ROM */ +/* MCS-48 variants with 128 bytes of internal RAM and up to 2k of internal ROM */ CPU_GET_INFO( i8039 ); CPU_GET_INFO( i8049 ); CPU_GET_INFO( i8749 ); @@ -97,7 +118,32 @@ CPU_GET_INFO( m58715 ); #define CPU_I8749 CPU_GET_INFO_NAME( i8749 ) #define CPU_M58715 CPU_GET_INFO_NAME( m58715 ) -/* disassembler */ -CPU_DISASSEMBLE( mcs48 ); -#endif /* __I8039_H__ */ +/* UPI-41 variants with 128 bytes of internal RAM and up to 1k of internal ROM */ +CPU_GET_INFO( i8041 ); +CPU_GET_INFO( i8741 ); + +#define CPU_I8041 CPU_GET_INFO_NAME( i8041 ) +#define CPU_I8741 CPU_GET_INFO_NAME( i8741 ) + +/* UPI-41 variants with 256 bytes of internal RAM and up to 2k of internal ROM */ +CPU_GET_INFO( i8042 ); +CPU_GET_INFO( i8242 ); +CPU_GET_INFO( i8742 ); + +#define CPU_I8042 CPU_GET_INFO_NAME( i8042 ) +#define CPU_I8242 CPU_GET_INFO_NAME( i8242 ) +#define CPU_I8742 CPU_GET_INFO_NAME( i8742 ) + + +/* functions for talking to the input/output buffers on the UPI41-class chips */ +UINT8 upi41_master_r(const device_config *device, UINT8 a0); +void upi41_master_w(const device_config *device, UINT8 a0, UINT8 data); + + +/* disassemblers */ +CPU_DISASSEMBLE( mcs48 ); +CPU_DISASSEMBLE( upi41 ); + + +#endif /* __MCS48_H__ */ diff --git a/src/emu/cpu/mcs48/mcs48dsm.c b/src/emu/cpu/mcs48/mcs48dsm.c index 63b7d978ad3..eba82f8c7bd 100644 --- a/src/emu/cpu/mcs48/mcs48dsm.c +++ b/src/emu/cpu/mcs48/mcs48dsm.c @@ -1,303 +1,310 @@ -/**************************************************************************** - * - * mcs48 disassembler - * - * This file is Copyright Michael Cuddy, Fen's Ende Sofware. - * Redistribution is allowed in source and binary form as long as both - * forms are distributed together with the file 'README'. This copyright - * notice must also accompany the files. - * - * This software should be considered a small token to all of the - * emulator authors for thier dilligence in preserving our Arcade and - * Computer history. - * - * Michael Cuddy, Fen's Ende Software. - * 11/25/1996 - * - * Adapted by Andrea Mazzoleni for use with MAME - * - ***************************************************************************/ +/*************************************************************************** -#include + mcs48dsm.c + + Simple MCS-48/UPI-41 disassembler. + Written by Aaron Giles + +***************************************************************************/ #include "cpuintrf.h" -#define mame_printf_debug printf -typedef unsigned char byte; - -#define FMT(a,b) a, b -#define PTRS_PER_FORMAT 2 - -static const char *const Formats[] = { - FMT("00000011dddddddd", "add a,#$%X"), - FMT("01101rrr", "add a,%R"), - FMT("0110000r", "add a,@%R"), - FMT("00010011dddddddd", "adc a,#$%X"), - FMT("01111rrr", "adc a,%R"), - FMT("0111000r", "adc a,@%R"), - FMT("01010011dddddddd", "anl a,#$%X"), - FMT("01011rrr", "anl a,%R"), - FMT("0101000r", "anl a,@%R"), - FMT("10011000dddddddd", "anl bus,#$%X"), - FMT("10011001dddddddd", "anl p1,#$%X"), - FMT("10011010dddddddd", "anl p2,#$%X"), - FMT("100111pp", "anld %P,a"), - FMT("aaa10100aaaaaaaa", "!call %A"), - FMT("00100111", "clr a"), - FMT("10010111", "clr c"), - FMT("10100101", "clr f1"), - FMT("10000101", "clr f0"), - FMT("00110111", "cpl a"), - FMT("10100111", "cpl c"), - FMT("10010101", "cpl f0"), - FMT("10110101", "cpl f1"), - FMT("01010111", "da a"), - FMT("00000111", "dec a"), - FMT("11001rrr", "dec %R"), - FMT("00010101", "dis i"), - FMT("00110101", "dis tcnti"), - FMT("11101rrraaaaaaaa", "!djnz %R,%J"), - FMT("00000101", "en i"), - FMT("00100101", "en tcnti"), - FMT("01110101", "ent0 clk"), - FMT("00001001", "in a,p1"), - FMT("00001010", "in a,p2"), - FMT("00010111", "inc a"), - FMT("00011rrr", "inc %R"), - FMT("0001000r", "inc @%R"), - FMT("00001000", "ins a,bus"), - FMT("0001 0110aaaaaaaa", "jtf %J"), - FMT("0010 0110aaaaaaaa", "jnt0 %J"), - FMT("0011 0110aaaaaaaa", "jt0 %J"), - FMT("0100 0110aaaaaaaa", "jnt1 %J"), - FMT("0101 0110aaaaaaaa", "jt1 %J"), - FMT("0111 0110aaaaaaaa", "jf1 %J"), - FMT("1000 0110aaaaaaaa", "jni %J"), - FMT("1001 0110aaaaaaaa", "jnz %J"), - FMT("1011 0110aaaaaaaa", "jf0 %J"), - FMT("1100 0110aaaaaaaa", "jz %J"), - FMT("1110 0110aaaaaaaa", "jnc %J"), - FMT("1111 0110aaaaaaaa", "jc %J"), - FMT("bbb10010aaaaaaaa", "jb%B %J"), - FMT("aaa00100aaaaaaaa", "jmp %A"), - FMT("10110011", "jmpp @a"), - FMT("00100011dddddddd", "mov a,#$%X"), - FMT("11111rrr", "mov a,%R"), - FMT("1111000r", "mov a,@%R"), - FMT("11000111", "mov a,psw"), - FMT("10111rrrdddddddd", "mov %R,#$%X"), - FMT("10101rrr", "mov %R,a"), - FMT("1010000r", "mov @%R,a"), - FMT("1011000rdddddddd", "mov @%R,#$%X"), - FMT("11010111", "mov psw,a"), - FMT("000011pp", "movd a,%P"), - FMT("001111pp", "movd %P,a"), - FMT("01000010", "mov a,t"), - FMT("01100010", "mov t,a"), - FMT("11100011", "movp3 a,@a"), - FMT("10100011", "movp a,@a"), - FMT("1000000r", "movx a,@%R"), - FMT("1001000r", "movx @%R,a"), - FMT("0100 1rrr", "orl a,%R"), - FMT("0100 000r", "orl a,@%R"), - FMT("0100 0011dddddddd", "orl a,#$%X"), - FMT("1000 1000dddddddd", "orl bus,#$%X"), - FMT("1000 1001dddddddd", "orl p1,#$%X"), - FMT("1000 1010dddddddd", "orl p2,#$%X"), - FMT("1000 11pp", "orld %P,a"), - FMT("00000010", "outl bus,a"), - FMT("001110pp", "outl %P,a"), - FMT("10000011", "^ret"), - FMT("10010011", "^retr"), - FMT("11100111", "rl a"), - FMT("11110111", "rlc a"), - FMT("01110111", "rr a"), - FMT("01100111", "rrc a"), - FMT("11100101", "sel mb0"), - FMT("11110101", "sel mb1"), - FMT("11000101", "sel rb0"), - FMT("11010101", "sel rb1"), - FMT("01100101", "stop tcnt"), - FMT("01000101", "strt cnt"), - FMT("01010101", "strt t"), - FMT("01000111", "swap a"), - FMT("00101rrr", "xch a,%R"), - FMT("0010000r", "xch a,@%R"), - FMT("0011000r", "xchd a,@%R"), - FMT("1101 0011dddddddd", "xrl a,#$%X"), - FMT("1101 1rrr", "xrl a,%R"), - FMT("1101 000r", "xrl a,@%R"), - FMT("00000000", "nop"), - NULL -}; - -#define MAX_OPS (((sizeof(Formats) / sizeof(Formats[0])) - 1) / PTRS_PER_FORMAT) - -typedef struct opcode { - byte mask; /* instruction mask */ - byte bits; /* constant bits */ - char extcode; /* value that gets extension code */ - const char *parse; /* how to parse bits */ - const char *fmt; /* instruction format */ - unsigned long flags; -} M48Opcode; - -static M48Opcode Op[MAX_OPS+1]; -static int OpInizialized = 0; - -static void InitDasm8039(void) +static UINT32 common_dasm(const device_config *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int upi41) { - const char *p; - const char *const *ops; - byte mask, bits; - int bit; - int i; - - ops = Formats; i = 0; - while (*ops) { - unsigned long flags = 0; - p = *ops; - mask = 0; bits = 0; bit = 7; - while (*p && bit >= 0) { - switch (*p++) { - case '1': mask |= 1<= 0) - { - /* mame_printf_debug("{%c/%d}",*cp,bit); */ - switch(*cp) - { - case 'a': a <<=1; a |= ((code & (1<machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + } +} + +static WRITE8_HANDLER( ay_audio_nmi_enable_w ) +{ + /* port A bit 0, when 1, inhibits the NMI */ + if (audio_nmi_enable_type == AUDIO_ENABLE_AY8910) + { + audio_nmi_enabled = ~data & 1; + cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + } +} + +static TIMER_DEVICE_CALLBACK( audio_nmi_gen ) +{ + int scanline = param; + audio_nmi_state = scanline & 8; + cpu_set_input_line(timer->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); +} + + + INLINE UINT8 swap_bits_5_6(UINT8 data) @@ -119,7 +174,7 @@ static WRITE8_HANDLER( lnc_w ) else if (offset >= 0x3c00 && offset <= 0x3fff) { lnc_videoram_w(space,offset - 0x3c00,data); return; } else if (offset >= 0x7c00 && offset <= 0x7fff) { lnc_mirrorvideoram_w(space,offset - 0x7c00,data); return; } else if (offset == 0x8000) { return; } /* SMH_NOP */ - else if (offset == 0x8001) { lnc_video_control_w(space,0,data); return; } + else if (offset == 0x8001) { bnj_video_control_w(space,0,data); return; } else if (offset == 0x8003) ; else if (offset == 0x9000) { return; } /* SMH_NOP */ else if (offset == 0x9002) { audio_command_w(space,0,data); return; } @@ -137,7 +192,7 @@ static WRITE8_HANDLER( mmonkey_w ) if (offset <= 0x3bff) ; else if (offset >= 0x3c00 && offset <= 0x3fff) { lnc_videoram_w(space,offset - 0x3c00,data); return; } else if (offset >= 0x7c00 && offset <= 0x7fff) { lnc_mirrorvideoram_w(space,offset - 0x7c00,data); return; } - else if (offset == 0x8001) { lnc_video_control_w(space,0,data); return; } + else if (offset == 0x8001) { bnj_video_control_w(space,0,data); return; } else if (offset == 0x8003) ; else if (offset == 0x9000) { return; } /* SMH_NOP */ else if (offset == 0x9002) { audio_command_w(space,0,data); return; } @@ -303,7 +358,7 @@ static ADDRESS_MAP_START( lnc_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x7800, 0x7bff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */ AM_RANGE(0x7c00, 0x7fff) AM_READWRITE(btime_mirrorvideoram_r, lnc_mirrorvideoram_w) AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1") AM_WRITENOP /* ??? */ - AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_WRITE(lnc_video_control_w) + AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_WRITE(bnj_video_control_w) AM_RANGE(0x8003, 0x8003) AM_WRITE(SMH_RAM) AM_BASE(&lnc_charbank) AM_RANGE(0x9000, 0x9000) AM_READ_PORT("P1") AM_WRITENOP /* IRQ ack??? */ AM_RANGE(0x9001, 0x9001) AM_READ_PORT("P2") @@ -320,7 +375,7 @@ static ADDRESS_MAP_START( mmonkey_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x7800, 0x7bff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */ AM_RANGE(0x7c00, 0x7fff) AM_READWRITE(btime_mirrorvideoram_r, lnc_mirrorvideoram_w) AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1") - AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_WRITE(lnc_video_control_w) + AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_WRITE(bnj_video_control_w) AM_RANGE(0x8003, 0x8003) AM_WRITE(SMH_RAM) AM_BASE(&lnc_charbank) AM_RANGE(0x9000, 0x9000) AM_READ_PORT("P1") AM_WRITENOP /* IRQ ack??? */ AM_RANGE(0x9001, 0x9001) AM_READ_PORT("P2") @@ -365,16 +420,16 @@ static ADDRESS_MAP_START( disco_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_END + static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x03ff) AM_RAM AM_BASE(&audio_rambase) - AM_RANGE(0x0400, 0x0fff) AM_ROM AM_REGION("audio", 0xf400) - AM_RANGE(0x2000, 0x2fff) AM_WRITE(ay8910_write_port_0_w) - AM_RANGE(0x4000, 0x4fff) AM_WRITE(ay8910_control_port_0_w) - AM_RANGE(0x6000, 0x6fff) AM_WRITE(ay8910_write_port_1_w) - AM_RANGE(0x8000, 0x8fff) AM_WRITE(ay8910_control_port_1_w) - AM_RANGE(0xa000, 0xafff) AM_READ(soundlatch_r) - AM_RANGE(0xc000, 0xcfff) AM_WRITE(interrupt_enable_w) - AM_RANGE(0xf000, 0xffff) AM_ROM + AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x1c00) AM_RAM AM_BASE(&audio_rambase) + AM_RANGE(0x2000, 0x3fff) AM_WRITE(ay8910_write_port_0_w) + AM_RANGE(0x4000, 0x5fff) AM_WRITE(ay8910_control_port_0_w) + AM_RANGE(0x6000, 0x7fff) AM_WRITE(ay8910_write_port_1_w) + AM_RANGE(0x8000, 0x9fff) AM_WRITE(ay8910_control_port_1_w) + AM_RANGE(0xa000, 0xbfff) AM_READ(audio_command_r) + AM_RANGE(0xc000, 0xdfff) AM_WRITE(audio_nmi_enable_w) + AM_RANGE(0xe000, 0xefff) AM_MIRROR(0x1000) AM_ROM ADDRESS_MAP_END static ADDRESS_MAP_START( disco_audio_map, ADDRESS_SPACE_PROGRAM, 8 ) @@ -409,7 +464,13 @@ static INPUT_CHANGED( coin_inserted_nmi_lo ) static WRITE8_HANDLER( audio_command_w ) { soundlatch_w(space,offset,data); - cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE); + cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE); +} + +static READ8_HANDLER( audio_command_r ) +{ + cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE); + return soundlatch_r(space,offset); } @@ -1085,12 +1146,12 @@ INPUT_PORTS_END static const gfx_layout tile8layout = { - 8,8, /* 8*8 characters */ + 8,8, RGN_FRAC(1,3), 3, - { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, - { 0, 1, 2, 3, 4, 5, 6, 7 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, + { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, + { STEP8(0,1) }, + { STEP8(0,8) }, 8*8 }; @@ -1098,15 +1159,13 @@ static const gfx_layout tile8layout = static const gfx_layout tile16layout = { - 16,16, /* 16*16 sprites */ - RGN_FRAC(1,3), /* 64 characters */ - 3, /* 3 bits per pixel */ - { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, /* the bitplanes are separated */ - { 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7, - 0, 1, 2, 3, 4, 5, 6, 7 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, - 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, - 32*8 /* every sprite takes 32 consecutive bytes */ + 16,16, + RGN_FRAC(1,3), + 3, + { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, + { STEP8(16*8,1), STEP8(0,1) }, + { STEP16(0,8) }, + 32*8 }; @@ -1117,10 +1176,8 @@ static const gfx_layout bnj_tile16layout = RGN_FRAC(1,2), 3, { RGN_FRAC(1,2)+4, RGN_FRAC(0,2)+0, RGN_FRAC(0,2)+4 }, - { 3*16*8+0, 3*16*8+1, 3*16*8+2, 3*16*8+3, 2*16*8+0, 2*16*8+1, 2*16*8+2, 2*16*8+3, - 16*8+0, 16*8+1, 16*8+2, 16*8+3, 0, 1, 2, 3 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, - 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, + { STEP4(3*16*8,1), STEP4(2*16*8,1), STEP4(1*16*8,1), STEP4(0*16*8,1) }, + { STEP16(0,8) }, 64*8 }; @@ -1160,23 +1217,29 @@ GFXDECODE_END +static const ay8910_interface ay1_intf = +{ + AY8910_LEGACY_OUTPUT, + AY8910_DEFAULT_LOADS, + NULL, NULL, ay_audio_nmi_enable_w, NULL +}; + static MACHINE_DRIVER_START( btime ) /* basic machine hardware */ - MDRV_CPU_ADD("main", M6502, 1500000) + MDRV_CPU_ADD("main", M6502, HCLK2) /* seletable between H2/H4 via jumper */ MDRV_CPU_PROGRAM_MAP(btime_map,0) - MDRV_CPU_ADD("audio", M6502, 500000) + MDRV_CPU_ADD("audio", M6502, HCLK1/3/2) MDRV_CPU_PROGRAM_MAP(audio_map,0) - MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,16) + MDRV_TIMER_ADD_SCANLINE("audionmi", audio_nmi_gen, "main", 0, 8) /* video hardware */ MDRV_SCREEN_ADD("main", RASTER) - MDRV_SCREEN_REFRESH_RATE(57) - MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3072)) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) - MDRV_SCREEN_SIZE(32*8, 32*8) - MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1) + MDRV_SCREEN_RAW_PARAMS(HCLK, 384, 8, 248, 272, 8, 248) + + MDRV_MACHINE_START(btime) MDRV_GFXDECODE(btime) MDRV_PALETTE_LENGTH(16) @@ -1188,10 +1251,11 @@ static MACHINE_DRIVER_START( btime ) /* audio hardware */ MDRV_SPEAKER_STANDARD_MONO("mono") - MDRV_SOUND_ADD("ay1", AY8910, 1500000) + MDRV_SOUND_ADD("ay1", AY8910, HCLK2) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.23) + MDRV_SOUND_CONFIG(ay1_intf) - MDRV_SOUND_ADD("ay2", AY8910, 1500000) + MDRV_SOUND_ADD("ay2", AY8910, HCLK2) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.23) MACHINE_DRIVER_END @@ -1221,9 +1285,6 @@ static MACHINE_DRIVER_START( lnc ) MDRV_CPU_MODIFY("main") MDRV_CPU_PROGRAM_MAP(lnc_map,0) - MDRV_CPU_MODIFY("audio") - MDRV_CPU_VBLANK_INT_HACK(lnc_sound_interrupt,16) - MDRV_MACHINE_RESET(lnc) /* video hardware */ @@ -1239,8 +1300,6 @@ static MACHINE_DRIVER_START( wtennis ) /* basic machine hardware */ MDRV_IMPORT_FROM(lnc) - MDRV_CPU_MODIFY("audio") - MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,16) /* video hardware */ MDRV_VIDEO_UPDATE(eggs) @@ -1260,7 +1319,7 @@ static MACHINE_DRIVER_START( bnj ) /* basic machine hardware */ MDRV_IMPORT_FROM(btime) - MDRV_CPU_REPLACE("main", M6502, 750000) + MDRV_CPU_REPLACE("main", M6502, HCLK4) MDRV_CPU_PROGRAM_MAP(bnj_map,0) /* video hardware */ @@ -1291,7 +1350,7 @@ static MACHINE_DRIVER_START( disco ) /* basic machine hardware */ MDRV_IMPORT_FROM(btime) - MDRV_CPU_REPLACE("main", M6502, 750000) + MDRV_CPU_REPLACE("main", M6502, HCLK4) MDRV_CPU_PROGRAM_MAP(disco_map,0) MDRV_CPU_MODIFY("audio") @@ -1331,7 +1390,7 @@ ROM_START( btime ) ROM_LOAD( "aa07.15b", 0xf000, 0x1000, CRC(086440ad) SHA1(4a32bc92f8ff5fbe112f56e62d2c03da8851a7b9) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "ab14.12h", 0xf000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) + ROM_LOAD( "ab14.12h", 0xe000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "aa12.7k", 0x0000, 0x1000, CRC(c4617243) SHA1(24204d591aa2c264a852ee9ba8c4be63efd97728) ) /* charset #1 */ @@ -1359,7 +1418,7 @@ ROM_START( btime2 ) ROM_LOAD( "aa07.15b", 0xf000, 0x1000, CRC(086440ad) SHA1(4a32bc92f8ff5fbe112f56e62d2c03da8851a7b9) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "ab14.12h", 0xf000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) + ROM_LOAD( "ab14.12h", 0xe000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "aa12.7k", 0x0000, 0x1000, CRC(c4617243) SHA1(24204d591aa2c264a852ee9ba8c4be63efd97728) ) /* charset #1 */ @@ -1387,7 +1446,7 @@ ROM_START( btimem ) ROM_LOAD( "ab07.15b", 0xf000, 0x1000, CRC(a142f862) SHA1(39d7ef172d18874885f1b1542e885cc4287dc344) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "ab14.12h", 0xf000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) + ROM_LOAD( "ab14.12h", 0xe000, 0x1000, CRC(f55e5211) SHA1(27940026d0c6212d1138d2fd88880df697218627) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "ab12.7k", 0x0000, 0x1000, CRC(6c79f79f) SHA1(338009199b5889621693833d88c35abb8e9e38a2) ) /* charset #1 */ @@ -1414,7 +1473,7 @@ ROM_START( cookrace ) ROM_LOAD( "2k", 0xffe0, 0x0020, CRC(e2553b3d) SHA1(0a38929cdb3f37c6e4bacc5c3f94c049b4352858) ) /* reset/interrupt vectors */ ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "6f.6", 0xf000, 0x1000, CRC(6b8e0272) SHA1(372a891b7b357aea0297ba9bcae752c3c9d8c1be) ) /* starts at 0000, not f000; 0000-01ff is RAM */ + ROM_LOAD( "6f.6", 0xe000, 0x1000, CRC(6b8e0272) SHA1(372a891b7b357aea0297ba9bcae752c3c9d8c1be) ) /* starts at 0000, not f000; 0000-01ff is RAM */ ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "m8.7", 0x0000, 0x2000, CRC(a1a0d5a6) SHA1(e9583320e9c303407abfe02988b95403e5209c52) ) /* charset #1 */ @@ -1447,7 +1506,7 @@ ROM_START( tisland ) ROM_LOAD( "t-09.b14", 0xf000, 0x1000, CRC(5b26771a) SHA1(31d86acba4b6549fc08a3947d6d6d1a470fcb9da) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "t-0a.j11", 0xf000, 0x1000, CRC(807e1652) SHA1(ccfee616dc0e34d10a0e62b9864fd987291bf176) ) + ROM_LOAD( "t-0a.j11", 0xe000, 0x1000, CRC(807e1652) SHA1(ccfee616dc0e34d10a0e62b9864fd987291bf176) ) ROM_REGION( 0x3000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "t-13.k14", 0x0000, 0x1000, CRC(95bdec2f) SHA1(201b9c53ea53a25535b619231d0d14e08c206ecf) ) @@ -1483,7 +1542,7 @@ ROM_START( lnc ) ROM_LOAD( "s0-3a", 0xf000, 0x1000, CRC(beb4b1fc) SHA1(166a96b5757946231f3619844366218065412935) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "sa-1h", 0xf000, 0x1000, CRC(379387ec) SHA1(29d37f04c64ed53a2573962dfa9c0623b89e0045) ) + ROM_LOAD( "sa-1h", 0xe000, 0x1000, CRC(379387ec) SHA1(29d37f04c64ed53a2573962dfa9c0623b89e0045) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "s4-11l", 0x0000, 0x1000, CRC(a2162a9e) SHA1(2729cef805c8e863af540424faa1aca82d3525e2) ) @@ -1527,7 +1586,7 @@ ROM_START( wtennis ) ROM_LOAD( "t2", 0xf000, 0x1000, CRC(d2f9dd30) SHA1(1faa088806e8627b5e561d8b99054d295045dcfb) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "t1", 0xf000, 0x1000, CRC(40737ea7) SHA1(27e8474028385574035d3982f9c576bb9bb3facd) ) /* starts at 0000, not f000; 0000-01ff is RAM */ + ROM_LOAD( "t1", 0xe000, 0x1000, CRC(40737ea7) SHA1(27e8474028385574035d3982f9c576bb9bb3facd) ) /* starts at 0000, not f000; 0000-01ff is RAM */ ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "t7", 0x0000, 0x1000, CRC(aa935169) SHA1(965f41a9fcf35ac7c899e79acd0a85ab588d5831) ) @@ -1550,7 +1609,7 @@ ROM_START( mmonkey ) ROM_LOAD( "mmonkey.a4", 0xf000, 0x1000, CRC(f7d3d1e3) SHA1(ff650a833e5e8975fe5b4a644ce6c35de5e04740) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "mmonkey.h1", 0xf000, 0x1000, CRC(5bcb2e81) SHA1(60fb8fd83c83b278e3aaf96f0b6dbefbc1eef0f7) ) + ROM_LOAD( "mmonkey.h1", 0xe000, 0x1000, CRC(5bcb2e81) SHA1(60fb8fd83c83b278e3aaf96f0b6dbefbc1eef0f7) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "mmonkey.l11", 0x0000, 0x1000, CRC(b6aa8566) SHA1(bc90d4cfa9a221477d1989fea532621ce3e76439) ) @@ -1572,7 +1631,7 @@ ROM_START( brubber ) ROM_LOAD( "brubber.12d", 0xe000, 0x2000, CRC(b2ce51f5) SHA1(5e38ea24bcafef1faba023def96532abd6f97d38) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "bnj6c.bin", 0xf000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) + ROM_LOAD( "bnj6c.bin", 0xe000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "bnj4e.bin", 0x0000, 0x2000, CRC(b864d082) SHA1(cacf71fa6c0f7121d077381a0ff6222f534295ab) ) @@ -1591,7 +1650,7 @@ ROM_START( bnj ) ROM_LOAD( "bnj12d.bin", 0xe000, 0x2000, CRC(b88bc99e) SHA1(08a4ddea4037f9e14d0d9f4262a1746b0a3a140c) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "bnj6c.bin", 0xf000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) + ROM_LOAD( "bnj6c.bin", 0xe000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "bnj4e.bin", 0x0000, 0x2000, CRC(b864d082) SHA1(cacf71fa6c0f7121d077381a0ff6222f534295ab) ) @@ -1610,7 +1669,7 @@ ROM_START( caractn ) ROM_LOAD( "c6.12d", 0xe000, 0x2000, CRC(1d6957c4) SHA1(bd30f00187e56eef9adcc167dd752a3bb616454c) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "c5.6c", 0xf000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) + ROM_LOAD( "c5.6c", 0xe000, 0x1000, CRC(8c02f662) SHA1(1279d564e65fd3ccac25b1f9fbb40d910de2b544) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "c0.4e", 0x0000, 0x2000, CRC(bf3ea732) SHA1(d98970b2dda8c3435506656909e5e3aa70d45652) ) @@ -1632,12 +1691,12 @@ ROM_END ROM_START( zoar ) ROM_REGION( 0x10000, "main", 0 ) - ROM_LOAD( "zoar15", 0xd000, 0x1000, BAD_DUMP CRC(1f0cfdb7) SHA1(ce7e871f17c52b6eaf99cfb721e702e4f0e6bb25) ) + ROM_LOAD( "zoar15", 0xd000, 0x1000, CRC(1f0cfdb7) SHA1(ce7e871f17c52b6eaf99cfb721e702e4f0e6bb25) ) ROM_LOAD( "zoar16", 0xe000, 0x1000, CRC(7685999c) SHA1(fabe38d71e797ae0b04b5d3aba228b4c85d96185) ) ROM_LOAD( "zoar17", 0xf000, 0x1000, CRC(619ea867) SHA1(0a3735384f03a1052d54ab799b5e37038d8ece2a) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "zoar09", 0xf000, 0x1000, CRC(18d96ff1) SHA1(671d934a451e0b042450ea86d24c3751a39b38f8) ) + ROM_LOAD( "zoar09", 0xe000, 0x1000, CRC(18d96ff1) SHA1(671d934a451e0b042450ea86d24c3751a39b38f8) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "zoar00", 0x0000, 0x1000, CRC(fd2dcb64) SHA1(1a49a6ec6ffd354d872b1af83d55ec96e8215b2b) ) @@ -1710,7 +1769,7 @@ ROM_START( sdtennis ) ROM_LOAD( "ao_06.12d", 0xe000, 0x2000, CRC(413c984c) SHA1(1431df4db52d621ba39fd47dbd49da103b5c0bcf) ) ROM_REGION( 0x10000, "audio", 0 ) - ROM_LOAD( "ao_05.6c", 0xf000, 0x1000, CRC(46833e38) SHA1(420831149a566199d6a3c74ef3df0687b4ddcbe4) ) + ROM_LOAD( "ao_05.6c", 0xe000, 0x1000, CRC(46833e38) SHA1(420831149a566199d6a3c74ef3df0687b4ddcbe4) ) ROM_REGION( 0x6000, "gfx1", ROMREGION_DISPOSE ) ROM_LOAD( "ao_00.4e", 0x0000, 0x2000, CRC(f4e0cbd6) SHA1(a2ede0ce4a26957a5d3b62872a42b8979f5000aa) ) @@ -1769,6 +1828,7 @@ static void init_rom1(running_machine *machine) static DRIVER_INIT( btime ) { init_rom1(machine); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; } static DRIVER_INIT( zoar ) @@ -1782,6 +1842,7 @@ static DRIVER_INIT( zoar ) memset(&rom[0xd50a],0xea,8); init_rom1(machine); + audio_nmi_enable_type = AUDIO_ENABLE_AY8910; } static DRIVER_INIT( tisland ) @@ -1795,46 +1856,74 @@ static DRIVER_INIT( tisland ) memset(&rom[0xa2b6],0x24,1); init_rom1(machine); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; } static DRIVER_INIT( lnc ) { decrypt_C10707_cpu(machine, "main"); + audio_nmi_enable_type = AUDIO_ENABLE_AY8910; +} + +static DRIVER_INIT( bnj ) +{ + decrypt_C10707_cpu(machine, "main"); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; +} + +static DRIVER_INIT( disco ) +{ + DRIVER_INIT_CALL(btime); + audio_nmi_enable_type = AUDIO_ENABLE_AY8910; } static DRIVER_INIT( cookrace ) { - memcpy(&audio_rambase[0x200], memory_region(machine, "audio") + 0xf200, 0x200); decrypt_C10707_cpu(machine, "main"); + + memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, SMH_BANK10); + memory_set_bankptr(machine, 10, memory_region(machine, "audio") + 0xe200); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; +} + +static DRIVER_INIT( protennb ) +{ + DRIVER_INIT_CALL(btime); + audio_nmi_enable_type = AUDIO_ENABLE_AY8910; } static DRIVER_INIT( wtennis ) { - memcpy(&audio_rambase[0x200], memory_region(machine, "audio") + 0xf200, 0x200); - memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r); decrypt_C10707_cpu(machine, "main"); + + memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r); + + memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, SMH_BANK10); + memory_set_bankptr(machine, 10, memory_region(machine, "audio") + 0xe200); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; } static DRIVER_INIT( sdtennis ) { decrypt_C10707_cpu(machine, "main"); decrypt_C10707_cpu(machine, "audio"); + audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; } -GAME( 1982, btime, 0, btime, btime, btime, ROT270, "Data East Corporation", "Burger Time (Data East set 1)", 0 ) -GAME( 1982, btime2, btime, btime, btime, btime, ROT270, "Data East Corporation", "Burger Time (Data East set 2)", 0 ) -GAME( 1982, btimem, btime, btime, btime, btime, ROT270, "Data East (Bally Midway license)", "Burger Time (Midway)", 0 ) -GAME( 1982, cookrace, btime, cookrace, cookrace, cookrace,ROT270, "bootleg", "Cook Race", 0 ) -GAME( 1981, tisland, 0, tisland, btime, tisland, ROT270, "Data East Corporation", "Treasure Island", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS ) -GAME( 1981, lnc, 0, lnc, lnc, lnc, ROT270, "Data East Corporation", "Lock'n'Chase", 0 ) -GAME( 1982, protennb, 0, disco, disco, btime, ROT270, "bootleg", "Tennis (bootleg of Pro Tennis)", 0 ) -GAME( 1982, wtennis, 0, wtennis, wtennis, wtennis, ROT270, "bootleg", "World Tennis", 0 ) -GAME( 1982, mmonkey, 0, mmonkey, mmonkey, lnc, ROT270, "Technos + Roller Tron", "Minky Monkey", 0 ) -GAME( 1982, brubber, 0, bnj, bnj, lnc, ROT270, "Data East", "Burnin' Rubber", 0 ) -GAME( 1982, bnj, brubber, bnj, bnj, lnc, ROT270, "Data East USA (Bally Midway license)", "Bump 'n' Jump", 0 ) -GAME( 1982, caractn, brubber, bnj, bnj, lnc, ROT270, "bootleg", "Car Action", 0 ) -GAME( 1982, zoar, 0, zoar, zoar, zoar, ROT270, "Data East USA", "Zoar", 0 ) -GAME( 1982, disco, 0, disco, disco, btime, ROT270, "Data East", "Disco No.1", 0 ) -GAME( 1982, discof, disco, disco, disco, btime, ROT270, "Data East", "Disco No.1 (Rev.F)", 0 ) -GAME( 1983, sdtennis, 0, bnj, sdtennis, sdtennis,ROT270, "Data East Corporation", "Super Doubles Tennis", 0 ) +GAME( 1982, btime, 0, btime, btime, btime, ROT270, "Data East Corporation", "Burger Time (Data East set 1)", 0 ) +GAME( 1982, btime2, btime, btime, btime, btime, ROT270, "Data East Corporation", "Burger Time (Data East set 2)", 0 ) +GAME( 1982, btimem, btime, btime, btime, btime, ROT270, "Data East (Bally Midway license)", "Burger Time (Midway)", 0 ) +GAME( 1982, cookrace, btime, cookrace, cookrace, cookrace, ROT270, "bootleg", "Cook Race", 0 ) +GAME( 1981, tisland, 0, tisland, btime, tisland, ROT270, "Data East Corporation", "Treasure Island", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS ) +GAME( 1981, lnc, 0, lnc, lnc, lnc, ROT270, "Data East Corporation", "Lock'n'Chase", 0 ) +GAME( 1982, protennb, 0, disco, disco, protennb, ROT270, "bootleg", "Tennis (bootleg of Pro Tennis)", 0 ) +GAME( 1982, wtennis, 0, wtennis, wtennis, wtennis, ROT270, "bootleg", "World Tennis", 0 ) +GAME( 1982, mmonkey, 0, mmonkey, mmonkey, lnc, ROT270, "Technos + Roller Tron", "Minky Monkey", 0 ) +GAME( 1982, brubber, 0, bnj, bnj, bnj, ROT270, "Data East", "Burnin' Rubber", 0 ) +GAME( 1982, bnj, brubber, bnj, bnj, bnj, ROT270, "Data East USA (Bally Midway license)", "Bump 'n' Jump", 0 ) +GAME( 1982, caractn, brubber, bnj, bnj, bnj, ROT270, "bootleg", "Car Action", 0 ) +GAME( 1982, zoar, 0, zoar, zoar, zoar, ROT270, "Data East USA", "Zoar", 0 ) +GAME( 1982, disco, 0, disco, disco, disco, ROT270, "Data East", "Disco No.1", 0 ) +GAME( 1982, discof, disco, disco, disco, disco, ROT270, "Data East", "Disco No.1 (Rev.F)", 0 ) +GAME( 1983, sdtennis, 0, bnj, sdtennis, sdtennis, ROT270, "Data East Corporation", "Super Doubles Tennis", 0 ) diff --git a/src/mame/drivers/decocass.c b/src/mame/drivers/decocass.c index 909e0613309..e8f0e43d340 100644 --- a/src/mame/drivers/decocass.c +++ b/src/mame/drivers/decocass.c @@ -54,10 +54,17 @@ #include "driver.h" #include "cpu/m6502/m6502.h" -#include "cpu/i8x41/i8x41.h" +#include "cpu/mcs48/mcs48.h" #include "machine/decocass.h" #include "sound/ay8910.h" +#define MASTER_CLOCK XTAL_12MHz +#define HCLK (MASTER_CLOCK/2) +#define HCLK1 (HCLK/2) +#define HCLK2 (HCLK1/2) +#define HCLK4 (HCLK2/2) + + static UINT8 *decocass_rambase; static UINT8 *decrypted; @@ -142,8 +149,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( decocass_mcu_portmap, ADDRESS_SPACE_IO, 8 ) - AM_RANGE(0x01, 0x01) AM_READWRITE(i8041_p1_r, i8041_p1_w) - AM_RANGE(0x02, 0x02) AM_READWRITE(i8041_p2_r, i8041_p2_w) + AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(i8041_p1_r, i8041_p1_w) + AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(i8041_p2_r, i8041_p2_w) ADDRESS_MAP_END static INPUT_PORTS_START( decocass ) @@ -268,65 +275,47 @@ INPUT_PORTS_END static const gfx_layout charlayout = { - 8,8, /* 8*8 characters */ - 1024, /* 1024 characters */ - 3, /* 3 bits per pixel */ - { 2*1024*8*8, 1024*8*8, 0 }, /* the bitplanes are separated */ - { 0, 1, 2, 3, 4, 5, 6, 7 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, - 8*8 /* every char takes 8 consecutive bytes */ + 8,8, + 1024, + 3, + { 2*1024*8*8, 1*1024*8*8, 0*1024*8*8 }, + { STEP8(0,1) }, + { STEP8(0,8) }, + 8*8 }; static const gfx_layout spritelayout = { - 16,16, /* 16*16 sprites */ - 256, /* 256 sprites */ - 3, /* 3 bits per pixel */ - { 2*256*16*16, 256*16*16, 0 }, /* the bitplanes are separated */ - { 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7, - 0, 1, 2, 3, 4, 5, 6, 7 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, - 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, - 32*8 /* every sprite takes 32 consecutive bytes */ + 16,16, + 256, + 3, + { 2*256*16*16, 1*256*16*16, 0*256*16*16 }, + { STEP8(16*8,1), STEP8(0*8,1) }, + { STEP16(0,8) }, + 32*8 }; static const gfx_layout tilelayout = { - 16,16, /* 16*16 characters */ - 16+1, /* 16 tiles (+1 empty tile used in the half-width bg tilemaps) */ - 3, /* 3 bits per pixel */ + 16,16, + 16+1, /* 16 tiles (+1 empty tile used in the half-width bg tilemaps) */ + 3, { 2*16*16*16+4, 2*16*16*16+0, 4 }, - { 3*16*8+0, 3*16*8+1, 3*16*8+2, 3*16*8+3, - 2*16*8+0, 2*16*8+1, 2*16*8+2, 2*16*8+3, - 16*8+0, 16*8+1, 16*8+2, 16*8+3, - 0, 1, 2, 3 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, - 8*8, 9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, - 2*16*16 /* every tile takes 64 consecutive bytes */ + { STEP4(3*16*8,1), STEP4(2*16*8,1), STEP4(1*16*8,1), STEP4(0*16*8,1) }, + { STEP16(0,8) }, + 2*16*16 }; static const UINT32 objlayout_xoffset[64] = { - 7*8+0,7*8+1,7*8+2,7*8+3,7*8+4,7*8+5,7*8+6,7*8+7, - 6*8+0,6*8+1,6*8+2,6*8+3,6*8+4,6*8+5,6*8+6,6*8+7, - 5*8+0,5*8+1,5*8+2,5*8+3,5*8+4,5*8+5,5*8+6,5*8+7, - 4*8+0,4*8+1,4*8+2,4*8+3,4*8+4,4*8+5,4*8+6,4*8+7, - 3*8+0,3*8+1,3*8+2,3*8+3,3*8+4,3*8+5,3*8+6,3*8+7, - 2*8+0,2*8+1,2*8+2,2*8+3,2*8+4,2*8+5,2*8+6,2*8+7, - 1*8+0,1*8+1,1*8+2,1*8+3,1*8+4,1*8+5,1*8+6,1*8+7, - 0*8+0,0*8+1,0*8+2,0*8+3,0*8+4,0*8+5,0*8+6,0*8+7 + STEP8(7*8,1), STEP8(6*8,1), STEP8(5*8,1), STEP8(4*8,1), + STEP8(3*8,1), STEP8(2*8,1), STEP8(1*8,1), STEP8(0*8,1) }; static const UINT32 objlayout_yoffset[64] = { - 63*2*64,62*2*64,61*2*64,60*2*64,59*2*64,58*2*64,57*2*64,56*2*64, - 55*2*64,54*2*64,53*2*64,52*2*64,51*2*64,50*2*64,49*2*64,48*2*64, - 47*2*64,46*2*64,45*2*64,44*2*64,43*2*64,42*2*64,41*2*64,40*2*64, - 39*2*64,38*2*64,37*2*64,36*2*64,35*2*64,34*2*64,33*2*64,32*2*64, - 31*2*64,30*2*64,29*2*64,28*2*64,27*2*64,26*2*64,25*2*64,24*2*64, - 23*2*64,22*2*64,21*2*64,20*2*64,19*2*64,18*2*64,17*2*64,16*2*64, - 15*2*64,14*2*64,13*2*64,12*2*64,11*2*64,10*2*64, 9*2*64, 8*2*64, - 7*2*64, 6*2*64, 5*2*64, 4*2*64, 3*2*64, 2*2*64, 1*2*64, 0*2*64 + STEP32(63*2*64, -1*2*64), + STEP32(31*2*64, -1*2*64) }; static const gfx_layout objlayout = @@ -381,26 +370,27 @@ static PALETTE_INIT( decocass ) static MACHINE_DRIVER_START( decocass ) /* basic machine hardware */ - MDRV_CPU_ADD("main", M6502,750000) + MDRV_CPU_ADD("main", M6502, HCLK4) MDRV_CPU_PROGRAM_MAP(decocass_map,0) - MDRV_CPU_ADD("audio", M6502,500000) /* 500 kHz */ + MDRV_CPU_ADD("audio", M6502, HCLK1/3/2) MDRV_CPU_PROGRAM_MAP(decocass_sound_map,0) + MDRV_TIMER_ADD_SCANLINE("audionmi", decocass_audio_nmi_gen, "main", 0, 8) - MDRV_CPU_ADD("mcu", I8041,500000*15) /* 500 kHz ( I doubt it is 400kHz Al! )*/ + MDRV_CPU_ADD("mcu", I8041, HCLK) MDRV_CPU_IO_MAP(decocass_mcu_portmap,0) MDRV_QUANTUM_TIME(HZ(4200)) /* interleave CPUs */ + MDRV_MACHINE_START(decocass) MDRV_MACHINE_RESET(decocass) + + MDRV_DECOCASS_TAPE_ADD("cassette") /* video hardware */ MDRV_SCREEN_ADD("main", RASTER) - MDRV_SCREEN_REFRESH_RATE(57) - MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3072) /* frames per second, vblank duration */) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) - MDRV_SCREEN_SIZE(32*8, 32*8) - MDRV_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 1*8, 31*8-1) + MDRV_SCREEN_RAW_PARAMS(HCLK, 384, 8, 248, 272, 8, 248) MDRV_GFXDECODE(decocass) MDRV_PALETTE_LENGTH(32+2*8+2*4) @@ -412,10 +402,10 @@ static MACHINE_DRIVER_START( decocass ) /* sound hardware */ MDRV_SPEAKER_STANDARD_MONO("mono") - MDRV_SOUND_ADD("ay1", AY8910, 1500000) + MDRV_SOUND_ADD("ay1", AY8910, HCLK2) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) - MDRV_SOUND_ADD("ay2", AY8910, 1500000) + MDRV_SOUND_ADD("ay2", AY8910, HCLK2) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) MACHINE_DRIVER_END @@ -692,41 +682,41 @@ ROM_END ROM_START( ctsttape ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "testtape.cas", 0x0000, 0x2000, CRC(4f9d8efb) SHA1(5b77747dad1033e5703f06c0870441b54b4256c5) ) ROM_END ROM_START( chwy ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ /* The dongle data is reverse engineered from manual decryption */ ROM_LOAD( "chwy.pro", 0x0000, 0x0020, BAD_DUMP CRC(2fae678e) SHA1(4a7de851442d4c1d690de03262f0e136a52fca35) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "chwy.cas", 0x0000, 0x8000, CRC(68a48064) SHA1(7e389737972fd0c54f398d296159c561f5ec3a93) ) ROM_END ROM_START( clocknch ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "clocknch.cas", 0x0000, 0x8000, CRC(c9d163a4) SHA1(3ef55a8d8f603059e263776c08eb81f2cf18b75c) ) ROM_END ROM_START( ctisland ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "ctisland.cas", 0x0000, 0x8000, CRC(3f63b8f8) SHA1(2fd0679ef9750a228ebb098672ab6091fda75804) ) ROM_REGION( 0x4000, "user3", 0 ) /* roms from the overlay pcb */ @@ -739,10 +729,10 @@ ROM_END ROM_START( ctislnd2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "ctislnd2.cas", 0x0000, 0x8000, CRC(2854b4c0) SHA1(d3b4e0031dbb2340fbbe396a1ff9b8fbfd63663e) ) ROM_REGION( 0x4000, "user3", 0 ) /* roms from the overlay pcb */ @@ -755,10 +745,10 @@ ROM_END ROM_START( ctislnd3 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "ctislnd3.cas", 0x0000, 0x8000, CRC(45464e1e) SHA1(03275694d963c7ab0e0f5525e248e69da5f9b591) ) ROM_REGION( 0x4000, "user3", 0 ) /* roms from the overlay pcb */ @@ -771,51 +761,51 @@ ROM_END ROM_START( csuperas ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "csuperas.cas", 0x0000, 0x8000, CRC(fabcd07f) SHA1(4070c668ad6725f0710cf7fe6df0d5f80272a449) ) ROM_END ROM_START( castfant ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "castfant.cas", 0x0000, 0x8000, CRC(6d77d1b5) SHA1(821bd65fbe887cbeac9281a2ad3f88595918f886) ) ROM_END ROM_START( cluckypo ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cluckypo.cas", 0x0000, 0x8000, CRC(2070c243) SHA1(cd3af309af8eb27937756c1fe6fd0504be5aaaf5) ) ROM_END ROM_START( cterrani ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cterrani.cas", 0x0000, 0x8000, CRC(eb71adbc) SHA1(67becfde39c034d4b8edc2eb100050de102773da) ) ROM_END ROM_START( cexplore ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ /* The dongle data is reverse engineered by table analysis */ ROM_LOAD( "cexplore.pro", 0x0000, 0x0020, BAD_DUMP CRC(c7a9ac8f) SHA1(b0a566d948f71a4eddcde0dd5e9e69ca96f71c36) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cexplore.cas", 0x0000, 0x8000, CRC(fae49c66) SHA1(4ae69e2f706fdf30204f0aa1277619395cacc21b) ) ROM_REGION( 0x4000, "user3", 0 ) /* roms from the overlay pcb */ @@ -825,10 +815,10 @@ ROM_END ROM_START( cprogolf ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00020, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */ ROM_LOAD( "de-0061.pro", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cprogolf.cas", 0x0000, 0x8000, CRC(02123cd1) SHA1(e4c630ed293725f23d539cb43beb97953558dabd) ) ROM_END @@ -838,50 +828,50 @@ ROM_END ROM_START( cmissnx ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00800, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00800, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cmissnx.pro", 0x0000, 0x0800, CRC(8a41c071) SHA1(7b16d933707bf21d25dcd11db6a6c28834b11c5b) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cmissnx.cas", 0x0000, 0x8000, CRC(3a094e11) SHA1(c355fe14838187cbde19a799e5c60083c82615ac) ) ROM_END ROM_START( cdiscon1 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00800, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00800, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cdiscon1.pro", 0x0000, 0x0800, CRC(0f793fab) SHA1(331f1b1b482fcd10f42c388a503f9af62d705401) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cdiscon1.cas", 0x0000, 0x8000, CRC(1429a397) SHA1(12f9e03fcda31dc6161a39bf5c3315a1e9e94565) ) ROM_END ROM_START( csweetht ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00800, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00800, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cdiscon1.pro", 0x0000, 0x0800, CRC(0f793fab) SHA1(331f1b1b482fcd10f42c388a503f9af62d705401) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "csweetht.cas", 0x0000, 0x8000, CRC(175ef706) SHA1(49b86233f69d0daf54a6e59b86e69b8159e8f6cc) ) ROM_END ROM_START( cptennis ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00800, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00800, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cptennis.pro", 0x0000, 0x0800, CRC(59b8cede) SHA1(514861a652b5256a11477fc357bc01dfd87f712b) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cptennis.cas", 0x0000, 0x8000, CRC(6bb257fe) SHA1(7554bf1996bc9e9c04a276aab050708d70103f54) ) ROM_END ROM_START( ctornado ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x00800, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x00800, "dongle", 0 ) /* dongle data */ ROM_LOAD( "ctornado.pro", 0x0000, 0x0800, CRC(c9a91697) SHA1(3f7163291edbdf1a596e3cd2b7a16bbb140ffb36) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "ctornado.cas", 0x0000, 0x8000, CRC(e4e36ce0) SHA1(48a11823121fb2e3de31ae08e453c0124fc4f7f3) ) ROM_END @@ -891,150 +881,150 @@ ROM_END ROM_START( cburnrub ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cburnrub.pro", 0x0000, 0x1000, CRC(9f396832) SHA1(0e302fd094474ac792882948a018c73ce76e0759) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cburnrub.cas", 0x0000, 0x8000, CRC(4528ac22) SHA1(dc0fcc5e5fd21c1c858a90f43c175e36a24b3c3d) ) ROM_END ROM_START( cburnrb2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cburnrub.pro", 0x0000, 0x1000, CRC(9f396832) SHA1(0e302fd094474ac792882948a018c73ce76e0759) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cburnrb2.cas", 0x0000, 0x8000, CRC(84a9ed66) SHA1(a9c536e46b89fc6b9c6271776292fed1241d2f3f) ) ROM_END ROM_START( cbnj ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cburnrub.pro", 0x0000, 0x1000, CRC(9f396832) SHA1(0e302fd094474ac792882948a018c73ce76e0759) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cbnj.cas", 0x0000, 0x8000, CRC(eed41560) SHA1(85d5df76efac33cd10427f659c4259afabb3daaf) ) ROM_END ROM_START( cbtime ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cbtime.pro", 0x0000, 0x1000, CRC(25bec0f0) SHA1(9fb1f9699f37937421e26d4fb8fdbcd21a5ddc5c) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cbtime.cas", 0x0000, 0x8000, CRC(56d7dc58) SHA1(34b2513c9ca7ab40f532b6d6d911aa3012113632) ) ROM_END ROM_START( cgraplop ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cgraplop.pro", 0x0000, 0x1000, CRC(ee93787d) SHA1(0c753d62fdce2fdbd5b329a5aa259a967d07a651) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cgraplop.cas", 0x0000, 0x8000, CRC(d2c1c1bb) SHA1(db67304caa11540363735e7d4bf03507ccbe9980) ) ROM_END ROM_START( cgraplp2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cgraplop.pro", 0x0000, 0x1000, CRC(ee93787d) SHA1(0c753d62fdce2fdbd5b329a5aa259a967d07a651) ) /* is this right for this set? */ - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cgraplp2.cas", 0x0000, 0x8000, CRC(2e728981) SHA1(83ba90d95858d647315a1c311b8643672afea5f7) ) ROM_END ROM_START( clapapa ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "clapapa.pro", 0x0000, 0x1000, CRC(e172819a) SHA1(3492775f4f0a0b31ce5a1a998076829b3f264e98) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "clapapa.cas", 0x0000, 0x8000, CRC(4ffbac24) SHA1(1ec0d7ac1886d4b430dc12be27f387e9d952d235) ) ROM_END ROM_START( clapapa2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "clapapa.pro", 0x0000, 0x1000, CRC(e172819a) SHA1(3492775f4f0a0b31ce5a1a998076829b3f264e98) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "clapapa2.cas", 0x0000, 0x8000, CRC(069dd3c4) SHA1(5a19392c7ac5aea979187c96267e73bf5126307e) ) ROM_END ROM_START( cfghtice ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cfghtice.pro", 0x0000, 0x1000, CRC(5abd27b5) SHA1(2ab1c171adffd491759036d6ce2433706654aad2) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cfghtice.cas", 0x0000, 0x10000, CRC(906dd7fb) SHA1(894a7970d5476ed035edd15656e5cf10d6ddcf57) ) ROM_END ROM_START( cprobowl ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cprobowl.pro", 0x0000, 0x1000, CRC(e3a88e60) SHA1(e6e9a2e5ab26e0463c63201a15f7d5a429ec836e) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cprobowl.cas", 0x0000, 0x8000, CRC(cb86c5e1) SHA1(66c467418cff2ed6d7c121a8b1650ee97ae48fe9) ) ROM_END ROM_START( cnightst ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cnightst.pro", 0x0000, 0x1000, CRC(553b0fbc) SHA1(2cdf4560992b62e59b6de760d7996be4ed25f505) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cnightst.cas", 0x0000, 0x8000, CRC(c6f844cb) SHA1(5fc6154c20ee4e2f4049a78df6f3cacbb96b0dc0) ) ROM_END ROM_START( cnights2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cnightst.pro", 0x0000, 0x1000, CRC(553b0fbc) SHA1(2cdf4560992b62e59b6de760d7996be4ed25f505) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cnights2.cas", 0x0000, 0x8000, CRC(1a28128c) SHA1(4b620a1919d02814f734aba995115c09dc2db930) ) ROM_END ROM_START( cprosocc ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cprosocc.pro", 0x0000, 0x1000, CRC(919fabb2) SHA1(3d6a0676cea7b0be0fe69d06e04ca08c36b2851a) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cprosocc.cas", 0x0000, 0x10000, CRC(76b1ad2c) SHA1(6188667e5bc001dfdf83deaf7251eae794de4702) ) ROM_END ROM_START( cppicf ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cppicf.pro", 0x0000, 0x1000, CRC(0b1a1ecb) SHA1(2106da6837c78812c102b0eaaa1127fcc21ea780) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cppicf.cas", 0x0000, 0x8000, CRC(8c02f160) SHA1(03430dd8d4b2e6ca931986dac4d39be6965ffa6f) ) ROM_END ROM_START( cppicf2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cppicf.pro", 0x0000, 0x1000, CRC(0b1a1ecb) SHA1(2106da6837c78812c102b0eaaa1127fcc21ea780) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cppicf2.cas", 0x0000, 0x8000, CRC(78ffa1bc) SHA1(d15f2a240ae7b45885d32b5f507243f82e820d4b) ) ROM_END @@ -1044,20 +1034,20 @@ ROM_END ROM_START( cscrtry ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x08000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x08000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cscrtry.pro", 0x0000, 0x8000, CRC(7bc3460b) SHA1(7c5668ff9a5073e27f4a83b02d79892eb4df6b92) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cscrtry.cas", 0x0000, 0x8000, CRC(5625f0ca) SHA1(f4b0a6f2ca908880386838f06b626479b4b74134) ) ROM_END ROM_START( cscrtry2 ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x08000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x08000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "cscrtry.pro", 0x0000, 0x8000, CRC(7bc3460b) SHA1(7c5668ff9a5073e27f4a83b02d79892eb4df6b92) ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cscrtry2.cas", 0x0000, 0x8000, CRC(04597842) SHA1(7f1fc3e06b61df880debe9056bdfbbb8600af739) ) ROM_END @@ -1067,10 +1057,10 @@ ROM_END ROM_START( cbdash ) DECOCASS_COMMON_ROMS -/* ROM_REGION( 0x01000, "user1", 0 ) */ /* (max) 4k for dongle data */ +/* ROM_REGION( 0x01000, "dongle", 0 ) */ /* (max) 4k for dongle data */ /* no proms */ - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cbdash.cas", 0x0000, 0x8000, CRC(cba4c1af) SHA1(5d163d8e31c58b20679c6be06b1aa02df621822b) ) ROM_END @@ -1081,7 +1071,7 @@ ROM_START( cflyball ) /* no dongle data */ - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "cflyball.cas", 0x0000, 0x10000, CRC(cb40d043) SHA1(57698bac7e0d552167efa99d08116bf19a3b29c9) ) ROM_END @@ -1091,10 +1081,10 @@ ROM_END ROM_START( czeroize ) DECOCASS_COMMON_ROMS - ROM_REGION( 0x01000, "user1", 0 ) /* dongle data */ + ROM_REGION( 0x01000, "dongle", 0 ) /* dongle data */ ROM_LOAD( "czeroize.pro", 0x0000, 0x1000, NO_DUMP ) - ROM_REGION( 0x10000, "user2", 0 ) /* (max) 64k for cassette image */ + ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ ROM_LOAD( "czeroize.cas", 0x0000, 0x10000, CRC(3ef0a406) SHA1(645b34cd477e0bb5539c8fe937a7a2dbd8369003) ) ROM_END @@ -1185,4 +1175,4 @@ static DRIVER_INIT( decocrom ) /* 39 */ GAME( 1984, cppicf2, cppicf, cppicf, decocass, decocass, ROT270, "Data East Corporation", "Peter Pepper's Ice Cream Factory (Cassette, set 2)", 0 ) /* 40 */ GAME( 1984, cfghtice, decocass, cfghtice, decocass, decocass, ROT270, "Data East Corporation", "Fighting Ice Hockey (Cassette)", 0 ) /* 44 */ GAME( 1985, cbdash, decocass, cbdash, decocass, decocass, ROT270, "Data East Corporation", "Boulder Dash (Cassette)", 0 ) - GAME( 1985, cflyball, decocass, cflyball, decocass, decocass, ROT270, "Data East Corporation", "Flying Ball (Cassette)", GAME_NO_SOUND ) + GAME( 1985, cflyball, decocass, cflyball, decocass, decocass, ROT270, "Data East Corporation", "Flying Ball (Cassette)", 0 ) diff --git a/src/mame/drivers/tnzs.c b/src/mame/drivers/tnzs.c index fcc67a9dc06..3e72cb19eaa 100644 --- a/src/mame/drivers/tnzs.c +++ b/src/mame/drivers/tnzs.c @@ -622,7 +622,7 @@ Driver by Takahiro Nogi (nogi@kt.rim.or.jp) 1999/11/06 #include "driver.h" #include "cpu/z80/z80.h" #include "taitoipt.h" -#include "cpu/i8x41/i8x41.h" +#include "cpu/mcs48/mcs48.h" #include "sound/2203intf.h" #include "sound/dac.h" #include "sound/samples.h" @@ -894,11 +894,10 @@ static ADDRESS_MAP_START( tnzsb_io_map, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_END static ADDRESS_MAP_START( i8742_io_map, ADDRESS_SPACE_IO, 8 ) - AM_RANGE(0x02, 0x02) AM_WRITE(tnzs_port2_w) - AM_RANGE(I8X41_p1, I8X41_p1) AM_READ(tnzs_port1_r) - AM_RANGE(I8X41_p2, I8X41_p2) AM_READ(tnzs_port2_r) - AM_RANGE(I8X41_t0, I8X41_t0) AM_READ_PORT("COIN1") - AM_RANGE(I8X41_t1, I8X41_t1) AM_READ_PORT("COIN2") + AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(tnzs_port1_r) + AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(tnzs_port2_r, tnzs_port2_w) + AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ_PORT("COIN1") + AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ_PORT("COIN2") ADDRESS_MAP_END diff --git a/src/mame/includes/btime.h b/src/mame/includes/btime.h index 84045a74845..093bb0aaf2a 100644 --- a/src/mame/includes/btime.h +++ b/src/mame/includes/btime.h @@ -48,7 +48,4 @@ WRITE8_HANDLER( deco_charram_w ); WRITE8_HANDLER( zoar_video_control_w ); WRITE8_HANDLER( btime_video_control_w ); WRITE8_HANDLER( bnj_video_control_w ); -WRITE8_HANDLER( lnc_video_control_w ); WRITE8_HANDLER( disco_video_control_w ); - -INTERRUPT_GEN( lnc_sound_interrupt ); diff --git a/src/mame/machine/decocass.c b/src/mame/machine/decocass.c index f524503accb..f5b27b9ab5d 100644 --- a/src/mame/machine/decocass.c +++ b/src/mame/machine/decocass.c @@ -6,28 +6,15 @@ #include "driver.h" #include "cpu/m6502/m6502.h" -#include "cpu/i8x41/i8x41.h" +#include "cpu/mcs48/mcs48.h" #include "machine/decocass.h" -/* tape direction, speed and timing (used also in video/decocass.c) */ -INT32 tape_dir; -INT32 tape_speed; -attotime tape_time0; -emu_timer *tape_timer; +#define LOG_CASSETTE_STATE 0 +static const device_config *cassette_device; static INT32 firsttime; -static INT32 tape_present; -static INT32 tape_blocks; -static INT32 tape_length; -static INT32 tape_bot_eot; -static UINT8 crc16_lsb; -static UINT8 crc16_msb; static UINT8 latch1; -/* pre-calculated crc16 of the tape blocks */ -static UINT8 tape_crc16_lsb[256]; -static UINT8 tape_crc16_msb[256]; - static read8_space_func decocass_dongle_r; static write8_space_func decocass_dongle_w; @@ -95,7 +82,15 @@ static UINT8 decocass_quadrature_decoder[4]; /* sound latches, ACK status bits and NMI timer */ static UINT8 decocass_sound_ack; -static emu_timer *decocass_sound_timer; +static UINT8 audio_nmi_enabled; +static UINT8 audio_nmi_state; + +static UINT8 tape_get_status_bits(const device_config *device); +static UINT8 tape_is_present(const device_config *device); +static void tape_change_speed(const device_config *device, INT8 newspeed); + + + WRITE8_HANDLER( decocass_coin_counter_w ) { @@ -141,23 +136,24 @@ READ8_HANDLER( decocass_sound_command_r ) return data; } -static TIMER_CALLBACK( decocass_sound_nmi_pulse ) +TIMER_DEVICE_CALLBACK( decocass_audio_nmi_gen ) { - cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE); + int scanline = param; + audio_nmi_state = scanline & 8; + cpu_set_input_line(timer->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); } WRITE8_HANDLER( decocass_sound_nmi_enable_w ) { - LOG(2,("CPU %s sound NMI enb -> $%02x\n", space->cpu->tag, data)); - timer_adjust_periodic(decocass_sound_timer, ATTOTIME_IN_HZ(256 * 57 / 8 / 2), 0, ATTOTIME_IN_HZ(256 * 57 / 8 / 2)); + audio_nmi_enabled = 1; + cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); } READ8_HANDLER( decocass_sound_nmi_enable_r ) { - UINT8 data = 0xff; - LOG(2,("CPU %s sound NMI enb <- $%02x\n", space->cpu->tag, data)); - timer_adjust_periodic(decocass_sound_timer, ATTOTIME_IN_HZ(256 * 57 / 8 / 2), 0, ATTOTIME_IN_HZ(256 * 57 / 8 / 2)); - return data; + audio_nmi_enabled = 1; + cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + return 0xff; } READ8_HANDLER( decocass_sound_data_ack_reset_r ) @@ -232,40 +228,6 @@ READ8_HANDLER( decocass_input_r ) * D6 - * D7 - cassette present */ -/* Note on a tapes leader-BOT-data-EOT-trailer format: - * A cassette has a transparent piece of tape on both ends, - * leader and trailer. And data tapes also have BOT and EOT - * holes, shortly before the the leader and trailer. - * The holes and clear tape are detected using a photo-resitor. - * When rewinding, the BOT/EOT signal will show a short - * pulse and if rewind continues a constant high signal later. - * The specs say the holes are "> 2ms" in length. - */ - -#define TAPE_CLOCKRATE 4800 /* clock pulses per second */ - -/* duration of the clear LEADER (and trailer) of the tape */ -#define TAPE_LEADER TAPE_CLOCKRATE /* 1s */ -/* duration of the GAP between leader and BOT/EOT */ -#define TAPE_GAP TAPE_CLOCKRATE*3/2 /* 1.5s */ -/* duration of BOT/EOT holes */ -#define TAPE_HOLE TAPE_CLOCKRATE/400 /* 0.0025s */ - -/* byte offset of the tape chunks (8 clocks per byte = 16 samples) */ -/* 300 ms GAP between BOT and first data block (doesn't work.. thus /2) */ -#define TAPE_PRE_GAP 34 -#define TAPE_LEADIN (TAPE_PRE_GAP + 1) -#define TAPE_HEADER (TAPE_LEADIN + 1) -#define TAPE_BLOCK (TAPE_HEADER + 256) -#define TAPE_CRC16_MSB (TAPE_BLOCK + 1) -#define TAPE_CRC16_LSB (TAPE_CRC16_MSB + 1) -#define TAPE_TRAILER (TAPE_CRC16_LSB + 1) -#define TAPE_LEADOUT (TAPE_TRAILER + 1) -#define TAPE_LONGCLOCK (TAPE_LEADOUT + 1) -#define TAPE_POST_GAP (TAPE_LONGCLOCK + 34) - -/* size of a tape chunk (block) including gaps */ -#define TAPE_CHUNK TAPE_POST_GAP #define E5XX_MASK 0x02 /* use 0x0e for old style board */ @@ -280,264 +242,23 @@ READ8_HANDLER( decocass_input_r ) WRITE8_HANDLER( decocass_reset_w ) { - LOG(1,("%9.7f 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(1,("%10s 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); decocass_reset = data; - /* CPU #1 active hight reset */ - cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, data & 0x01 ); + /* CPU #1 active high reset */ + cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, data & 0x01); - /* on reset also remove the sound timer */ + /* on reset also disable audio NMI */ if (data & 1) - timer_adjust_oneshot(decocass_sound_timer, attotime_never, 0); + { + audio_nmi_enabled = 0; + cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE); + } /* 8041 active low reset */ - cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x08) ^ 0x08 ); + cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x08) ^ 0x08); } -static const char *dirnm(int speed) -{ - if (speed < -1) return "fast rewind"; - if (speed == -1) return "rewind"; - if (speed == 0) return "stop"; - if (speed == 1) return "forward"; - return "fast forward"; -} - -static void tape_crc16(UINT8 data) -{ - UINT8 c0, c1; - UINT8 old_lsb = crc16_lsb; - UINT8 old_msb = crc16_msb; - UINT8 feedback; - - feedback = ((data >> 7) ^ crc16_msb) & 1; - - /* rotate 16 bits */ - c0 = crc16_lsb & 1; - c1 = crc16_msb & 1; - crc16_msb = (crc16_msb >> 1) | (c0 << 7); - crc16_lsb = (crc16_lsb >> 1) | (c1 << 7); - - /* feedback into bit 7 */ - if (feedback) - crc16_lsb |= 0x80; - else - crc16_lsb &= ~0x80; - - /* feedback to bit 6 into bit 5 */ - if (((old_lsb >> 6) ^ feedback) & 1) - crc16_lsb |= 0x20; - else - crc16_lsb &= ~0x20; - - /* feedback to bit 1 into bit 0 */ - if (((old_msb >> 1) ^ feedback) & 1) - crc16_msb |= 0x01; - else - crc16_msb &= ~0x01; -} - - -attotime decocass_adjust_tape_time(attotime tape_time) -{ - attotime ret = tape_time; - - if (tape_timer) - { - attotime elapsed = timer_timeelapsed(tape_timer); - - if (tape_dir > 0) - { - ret = attotime_add(tape_time, elapsed); - - if (attotime_compare(ret, ATTOTIME_IN_MSEC(999900)) > 0) - ret = ATTOTIME_IN_MSEC(999900); - } - - if (tape_dir < 0) - { - if (attotime_compare(tape_time, elapsed) > 0) - ret = attotime_sub(tape_time, elapsed); - else - ret = attotime_zero; - } - } - - return ret; -} - - -static void tape_update(running_machine *machine) -{ - static int last_byte; - int offset, rclk, rdata, tape_bit, tape_byte, tape_block; - - attotime tape_time = decocass_adjust_tape_time(tape_time0); - - offset = (int)(attotime_to_double(attotime_mul(tape_time, TAPE_CLOCKRATE)) + 0.499995); - - /* reset RCLK and RDATA inputs */ - rclk = 0; - rdata = 0; - - if (offset < TAPE_LEADER) - { - if (offset < 0) - offset = 0; - /* LEADER area */ - if (0 == tape_bot_eot) - { - tape_bot_eot = 1; - set_led_status(1, 1); - LOG(5,("tape %5.4fs: %s found LEADER\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - } - else - if (offset < TAPE_LEADER + TAPE_GAP) - { - /* GAP between LEADER and BOT hole */ - if (1 == tape_bot_eot) - { - tape_bot_eot = 0; - set_led_status(1, 0); - LOG(5,("tape %5.4fs: %s between BOT + LEADER\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - } - else - if (offset < TAPE_LEADER + TAPE_GAP + TAPE_HOLE) - { - /* during BOT hole */ - if (0 == tape_bot_eot) - { - tape_bot_eot = 1; - set_led_status(1, 1); - LOG(5,("tape %5.4fs: %s found BOT\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - } - else - if (offset < tape_length - TAPE_LEADER - TAPE_GAP - TAPE_HOLE) - { - offset -= TAPE_LEADER + TAPE_GAP + TAPE_HOLE; - - /* data area */ - if (1 == tape_bot_eot) - { - tape_bot_eot = 0; - set_led_status(1, 0); - LOG(5,("tape %5.4fs: %s data area\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - rclk = (offset ^ 1) & 1; - tape_bit = (offset / 2) % 8; - tape_byte = (offset / 16) % TAPE_CHUNK; - tape_block = offset / 16 / TAPE_CHUNK; - - if (tape_byte < TAPE_PRE_GAP) - { - rclk = 0; - rdata = 0; - } - else - if (tape_byte < TAPE_LEADIN) - { - rdata = (0x00 >> tape_bit) & 1; - if (tape_byte != last_byte) - { - LOG(5,("tape %5.4fs: LEADIN $00\n", attotime_to_double(tape_time))); - set_led_status(2, 1); - } - } - else - if (tape_byte < TAPE_HEADER) - { - rdata = (0xaa >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(5,("tape %5.4fs: HEADER $aa\n", attotime_to_double(tape_time))); - } - else - if (tape_byte < TAPE_BLOCK) - { - UINT8 *ptr = memory_region(machine, "user2") + tape_block * 256 + tape_byte - TAPE_HEADER; - rdata = (*ptr >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(4,("tape %5.4fs: DATA(%02x) $%02x\n", attotime_to_double(tape_time), tape_byte - TAPE_HEADER, *ptr)); - } - else - if (tape_byte < TAPE_CRC16_MSB) - { - rdata = (tape_crc16_msb[tape_block] >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(4,("tape %5.4fs: CRC16 MSB $%02x\n", attotime_to_double(tape_time), tape_crc16_msb[tape_block])); - } - else - if (tape_byte < TAPE_CRC16_LSB) - { - rdata = (tape_crc16_lsb[tape_block] >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(4,("tape %5.4fs: CRC16 LSB $%02x\n", attotime_to_double(tape_time), tape_crc16_lsb[tape_block])); - } - else - if (tape_byte < TAPE_TRAILER) - { - rdata = (0xaa >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(4,("tape %5.4fs: TRAILER $aa\n", attotime_to_double(tape_time))); - } - else - if (tape_byte < TAPE_LEADOUT) - { - rdata = (0x00 >> tape_bit) & 1; - if (tape_byte != last_byte) - LOG(4,("tape %5.4fs: LEADOUT $00\n", attotime_to_double(tape_time))); - } - else - if (tape_byte < TAPE_LONGCLOCK) - { - if (tape_byte != last_byte) - { - LOG(4,("tape %5.4fs: LONG CLOCK\n", attotime_to_double(tape_time))); - set_led_status(2, 0); - } - rclk = 1; - rdata = 0; - } - last_byte = tape_byte; - } - else - if (offset < tape_length - TAPE_LEADER - TAPE_GAP) - { - /* during EOT hole */ - if (0 == tape_bot_eot) - { - tape_bot_eot = 1; - set_led_status(1, 1); - LOG(5,("tape %5.4fs: %s found EOT\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - } - else - if (offset < tape_length - TAPE_LEADER) - { - /* GAP between EOT and trailer */ - if (1 == tape_bot_eot) - { - tape_bot_eot = 0; - set_led_status(1, 0); - LOG(5,("tape %5.4fs: %s EOT and TRAILER\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - } - else - { - /* TRAILER area */ - if (0 == tape_bot_eot) - { - tape_bot_eot = 1; - set_led_status(1, 1); - LOG(5,("tape %5.4fs: %s found TRAILER\n", attotime_to_double(tape_time), dirnm(tape_dir))); - } - offset = tape_length - 1; - } - - i8041_p2 = (i8041_p2 & ~0xe0) | (tape_bot_eot << 5) | (rclk << 6) | (rdata << 7); -} #ifdef MAME_DEBUG static void decocass_fno(offs_t offset, UINT8 data) @@ -593,13 +314,13 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r ) if (1 == (offset & 1)) { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); + data = upi41_master_r(space->machine->cpu[2], 1); else data = 0xff; data = (BIT0(data) << 0) | (BIT1(data) << 1) | 0x7c; - LOG(4,("%9.7f 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, + LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } @@ -607,7 +328,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r ) { offs_t promaddr; UINT8 save; - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); if (firsttime) { @@ -623,7 +344,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r ) } if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], 0); else data = 0xff; @@ -646,8 +367,8 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r ) (((latch1 >> MAP6(type1_inmap)) & 1) << MAP6(type1_outmap)) | (((prom[promaddr] >> 4) & 1) << MAP7(type1_outmap)); - LOG(3,("%9.7f 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); latch1 = save; /* latch the data for the next A0 == 0 read */ } @@ -672,13 +393,13 @@ static READ8_HANDLER( decocass_type1_pass_136_r ) if (1 == (offset & 1)) { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); + data = upi41_master_r(space->machine->cpu[2], 1); else data = 0xff; data = (BIT0(data) << 0) | (BIT1(data) << 1) | 0x7c; - LOG(4,("%9.7f 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x <- (%s %s)\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, + LOG(4,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x <- (%s %s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } @@ -686,7 +407,7 @@ static READ8_HANDLER( decocass_type1_pass_136_r ) { offs_t promaddr; UINT8 save; - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); if (firsttime) { @@ -702,7 +423,7 @@ static READ8_HANDLER( decocass_type1_pass_136_r ) } if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], 0); else data = 0xff; @@ -725,8 +446,8 @@ static READ8_HANDLER( decocass_type1_pass_136_r ) (((data >> MAP6(type1_inmap)) & 1) << MAP6(type1_outmap)) | (((prom[promaddr] >> 4) & 1) << MAP7(type1_outmap)); - LOG(3,("%9.7f 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); latch1 = save; /* latch the data for the next A0 == 0 read */ } @@ -751,13 +472,13 @@ static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r ) if (1 == (offset & 1)) { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); + data = upi41_master_r(space->machine->cpu[2], 1); else data = 0xff; data = (BIT0(data) << 0) | (BIT1(data) << 1) | 0x7c; - LOG(4,("%9.7f 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, + LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } @@ -765,7 +486,7 @@ static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r ) { offs_t promaddr; UINT8 save; - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); if (firsttime) { @@ -781,7 +502,7 @@ static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r ) } if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], 0); else data = 0xff; @@ -804,8 +525,8 @@ static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r ) (((prom[promaddr] >> 4) & 1) << MAP6(type1_outmap)) | (((latch1 >> MAP7(type1_inmap)) & 1) << MAP7(type1_outmap)); - LOG(3,("%9.7f 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); latch1 = save; /* latch the data for the next A0 == 0 read */ } @@ -830,13 +551,13 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r ) if (1 == (offset & 1)) { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); + data = upi41_master_r(space->machine->cpu[2], 1); else data = 0xff; data = (BIT0(data) << 0) | (BIT1(data) << 1) | 0x7c; - LOG(4,("%9.7f 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x <- (%s %s)\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, + LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x <- (%s %s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } @@ -844,7 +565,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r ) { offs_t promaddr; UINT8 save; - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); if (firsttime) { @@ -860,7 +581,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r ) } if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], 0); else data = 0xff; @@ -883,8 +604,8 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r ) (((latch1 >> MAP6(type1_inmap)) & 1) << MAP6(type1_outmap)) | (((prom[promaddr] >> 4) & 1) << MAP7(type1_outmap)); - LOG(3,("%9.7f 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); latch1 = save; /* latch the data for the next A0 == 0 read */ } @@ -911,13 +632,13 @@ static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r ) if (1 == (offset & 1)) { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); + data = upi41_master_r(space->machine->cpu[2], 1); else data = 0xff; data = (BIT0(data) << 0) | (BIT1(data) << 1) | 0x7c; - LOG(4,("%9.7f 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x <- (%s %s)\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, + LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x <- (%s %s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data & 1) ? "OBF" : "-", (data & 2) ? "IBF" : "-")); } @@ -925,7 +646,7 @@ static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r ) { offs_t promaddr; UINT8 save; - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); if (firsttime) { @@ -941,7 +662,7 @@ static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r ) } if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], 0); else data = 0xff; @@ -964,8 +685,8 @@ static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r ) (((latch1 >> MAP6(type1_inmap)) & 1) << MAP6(type1_outmap)) | (((prom[promaddr] >> 4) & 1) << MAP7(type1_outmap)); - LOG(3,("%9.7f 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x\n", - attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); latch1 = save; /* latch the data for the next A0 == 0 read */ } @@ -992,9 +713,9 @@ static READ8_HANDLER( decocass_type2_r ) { if (1 == (offset & 1)) { - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); data = prom[256 * type2_d2_latch + type2_promaddr]; - LOG(3,("%9.7f 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, 256 * type2_d2_latch + type2_promaddr)); + LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, 256 * type2_d2_latch + type2_promaddr)); } else { @@ -1004,11 +725,11 @@ static READ8_HANDLER( decocass_type2_r ) else { if (0 == (offset & E5XX_MASK)) - data = cpu_get_reg(space->machine->cpu[2], offset & 1 ? I8X41_STAT : I8X41_DATA); + data = upi41_master_r(space->machine->cpu[2], offset); else data = offset & 0xff; - LOG(3,("%9.7f 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "STATUS" : "DATA")); + LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "STATUS" : "DATA")); } return data; } @@ -1019,18 +740,18 @@ static WRITE8_HANDLER( decocass_type2_w ) { if (1 == (offset & 1)) { - LOG(4,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { type2_promaddr = data; - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, type2_promaddr)); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, type2_promaddr)); return; } } else { - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA")); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA")); } if (1 == (offset & 1)) { @@ -1041,7 +762,7 @@ static WRITE8_HANDLER( decocass_type2_w ) LOG(3,("PROM:%s D2:%d", type2_xx_latch ? "on" : "off", type2_d2_latch)); } } - cpu_set_reg(space->machine->cpu[2], offset & 1 ? I8X41_CMND : I8X41_DATA, data); + upi41_master_w(space->machine->cpu[2], offset & 1, data); #ifdef MAME_DEBUG decocass_fno(offset, data); @@ -1072,9 +793,9 @@ static READ8_HANDLER( decocass_type3_r ) { if (1 == type3_pal_19) { - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); data = prom[type3_ctrs]; - LOG(3,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, type3_ctrs)); + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, type3_ctrs)); if (++type3_ctrs == 4096) type3_ctrs = 0; } @@ -1082,13 +803,13 @@ static READ8_HANDLER( decocass_type3_r ) { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); - LOG(4,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + data = upi41_master_r(space->machine->cpu[2], 1); + LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } } @@ -1097,13 +818,13 @@ static READ8_HANDLER( decocass_type3_r ) if (1 == type3_pal_19) { save = data = 0xff; /* open data bus? */ - LOG(3,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { if (0 == (offset & E5XX_MASK)) { - save = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); + save = upi41_master_r(space->machine->cpu[2], 0); switch (type3_swap) { case TYPE3_SWAP_01: @@ -1228,7 +949,7 @@ static READ8_HANDLER( decocass_type3_r ) (BIT7(save) << 7); } type3_d0_latch = save & 1; - LOG(3,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); } else { @@ -1242,7 +963,7 @@ static READ8_HANDLER( decocass_type3_r ) (BIT5(save) << 5) | (BIT6(save) << 7) | (BIT7(save) << 6); - LOG(3,("%9.7f 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); type3_d0_latch = save & 1; } } @@ -1258,7 +979,7 @@ static WRITE8_HANDLER( decocass_type3_w ) if (1 == type3_pal_19) { type3_ctrs = data << 4; - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, "LDCTRS")); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, "LDCTRS")); return; } else @@ -1270,12 +991,12 @@ static WRITE8_HANDLER( decocass_type3_w ) if (1 == type3_pal_19) { /* write nowhere?? */ - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, "nowhere?")); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, "nowhere?")); return; } } - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); - cpu_set_reg(space->machine->cpu[2], offset & 1 ? I8X41_CMND : I8X41_DATA, data); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); + upi41_master_w(space->machine->cpu[2], offset, data); } /*************************************************************************** @@ -1298,36 +1019,36 @@ static READ8_HANDLER( decocass_type4_r ) { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); - LOG(4,("%9.7f 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + data = upi41_master_r(space->machine->cpu[2], 1); + LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } else { if (type4_latch) { - UINT8 *prom = memory_region(space->machine, "user1"); + UINT8 *prom = memory_region(space->machine, "dongle"); data = prom[type4_ctrs]; - LOG(3,("%9.7f 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.', type4_ctrs)); + LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.', type4_ctrs)); type4_ctrs = (type4_ctrs+1) & 0x7fff; } else { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); - LOG(3,("%9.7f 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + data = upi41_master_r(space->machine->cpu[2], 0); + LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } } @@ -1342,7 +1063,7 @@ static WRITE8_HANDLER( decocass_type4_w ) if (1 == type4_latch) { type4_ctrs = (type4_ctrs & 0x00ff) | ((data & 0x7f) << 8); - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, type4_ctrs)); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, type4_ctrs)); return; } else @@ -1356,12 +1077,12 @@ static WRITE8_HANDLER( decocass_type4_w ) if (type4_latch) { type4_ctrs = (type4_ctrs & 0xff00) | data; - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, type4_ctrs)); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, type4_ctrs)); return; } } - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); - cpu_set_reg(space->machine->cpu[2], offset & 1 ? I8X41_CMND : I8X41_DATA, data); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); + upi41_master_w(space->machine->cpu[2], offset, data); } /*************************************************************************** @@ -1381,13 +1102,13 @@ static READ8_HANDLER( decocass_type5_r ) { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); - LOG(4,("%9.7f 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + data = upi41_master_r(space->machine->cpu[2], 1); + LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } else @@ -1395,19 +1116,19 @@ static READ8_HANDLER( decocass_type5_r ) if (type5_latch) { data = 0x55; /* Only a fixed value? It looks like this is all we need to do */ - LOG(3,("%9.7f 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); } else { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); - LOG(3,("%9.7f 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + data = upi41_master_r(space->machine->cpu[2], 0); + LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } } @@ -1421,7 +1142,7 @@ static WRITE8_HANDLER( decocass_type5_w ) { if (1 == type5_latch) { - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, "latch #2??")); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, "latch #2??")); return; } else @@ -1433,12 +1154,12 @@ static WRITE8_HANDLER( decocass_type5_w ) if (type5_latch) { /* write nowhere?? */ - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, "nowhere?")); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, "nowhere?")); return; } } - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); - cpu_set_reg(space->machine->cpu[2], offset & 1 ? I8X41_CMND : I8X41_DATA, data); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); + upi41_master_w(space->machine->cpu[2], offset, data); } /*************************************************************************** @@ -1457,26 +1178,26 @@ static READ8_HANDLER( decocass_nodong_r ) { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); - LOG(4,("%9.7f 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + data = upi41_master_r(space->machine->cpu[2], 1); + LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } else { if (0 == (offset & E5XX_MASK)) { - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); - LOG(3,("%9.7f 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); + data = upi41_master_r(space->machine->cpu[2], 0); + LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.')); } else { data = 0xff; /* open data bus? */ - LOG(4,("%9.7f 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } @@ -1496,18 +1217,20 @@ READ8_HANDLER( decocass_e5xx_r ) /* E5x2-E5x3 and mirrors */ if (2 == (offset & E5XX_MASK)) { + UINT8 bot_eot = (tape_get_status_bits(cassette_device) >> 5) & 1; + data = (BIT7(i8041_p1) << 0) | /* D0 = P17 - REQ/ */ (BIT0(i8041_p2) << 1) | /* D1 = P20 - FNO/ */ (BIT1(i8041_p2) << 2) | /* D2 = P21 - EOT/ */ (BIT2(i8041_p2) << 3) | /* D3 = P22 - ERR/ */ - ((tape_bot_eot) << 4) | /* D4 = BOT/EOT (direct from drive) */ + ((bot_eot) << 4) | /* D4 = BOT/EOT (direct from drive) */ (1 << 5) | /* D5 floating input */ (1 << 6) | /* D6 floating input */ - ((1 - tape_present) << 7); /* D7 = cassette present */ + (!tape_is_present(cassette_device) << 7); /* D7 = cassette present */ - LOG(4,("%9.7f 6502-PC: %04x decocass_e5xx_r(%02x): $%02x <- STATUS (%s%s%s%s%s%s%s%s)\n", - attotime_to_double(timer_get_time(space->machine)), + LOG(4,("%10s 6502-PC: %04x decocass_e5xx_r(%02x): $%02x <- STATUS (%s%s%s%s%s%s%s%s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, data & 0x01 ? "" : "REQ/", @@ -1539,15 +1262,15 @@ WRITE8_HANDLER( decocass_e5xx_w ) if (0 == (offset & E5XX_MASK)) { - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); - cpu_set_reg(space->machine->cpu[2], offset & 1 ? I8X41_CMND : I8X41_DATA, data); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA")); + upi41_master_w(space->machine->cpu[2], offset & 1, data); #ifdef MAME_DEBUG decocass_fno(offset, data); #endif } else { - LOG(3,("%9.7f 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(space->cpu), offset, data)); + LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data)); } } @@ -1586,41 +1309,10 @@ WRITE8_HANDLER( decocass_de0091_w ) * state save setup * ***************************************************************************/ -static STATE_POSTLOAD( decocass_state_save_postload ) -{ -#if 0 - /* fix me - this won't work anymore */ - int A; - UINT8 *mem = memory_region(machine, REGION_CPU1); - int diff = memory_region_length(machine, REGION_CPU1) / 2; - - memory_set_opcode_base(0, mem + diff); - - for (A = 0;A < 0x10000; A++) - decocass_w(A, mem[A]); - /* restart the timer if the tape was playing */ - if (0 != tape_dir) - timer_adjust_oneshot(tape_timer, attotime_never, 0); -#endif -} - /* To be called once from driver_init, i.e. decocass_init */ void decocass_machine_state_save_init(running_machine *machine) { - state_save_register_postload(machine, decocass_state_save_postload, NULL); - state_save_register_global(machine, tape_dir); - state_save_register_global(machine, tape_speed); - state_save_register_global(machine, tape_time0.seconds); - state_save_register_global(machine, tape_time0.attoseconds); state_save_register_global(machine, firsttime); - state_save_register_global(machine, tape_present); - state_save_register_global(machine, tape_blocks); - state_save_register_global(machine, tape_length); - state_save_register_global(machine, tape_bot_eot); - state_save_register_global(machine, crc16_lsb); - state_save_register_global(machine, crc16_msb); - state_save_register_global_array(machine, tape_crc16_lsb); - state_save_register_global_array(machine, tape_crc16_msb); state_save_register_global(machine, decocass_reset); state_save_register_global(machine, i8041_p1); state_save_register_global(machine, i8041_p2); @@ -1646,46 +1338,15 @@ void decocass_machine_state_save_init(running_machine *machine) * ***************************************************************************/ -static void decocass_init_common(running_machine *machine) +MACHINE_START( decocass ) { - UINT8 *image = memory_region(machine, "user2"); - int i, offs; - - tape_dir = 0; - tape_speed = 0; - tape_timer = timer_alloc(machine, NULL, NULL); + cassette_device = devtag_get_device(machine, DECOCASS_TAPE, "cassette"); +} +static void decocass_reset_common(running_machine *machine) +{ firsttime = 1; latch1 = 0; - tape_present = 1; - tape_blocks = 0; - for (i = memory_region_length(machine, "user2") / 256 - 1; !tape_blocks && i > 0; i--) - for (offs = 256 * i; !tape_blocks && offs < 256 * i + 256; offs++) - if (image[offs]) - tape_blocks = i+1; - for (i = 0; i < tape_blocks; i++) - { - crc16_lsb = 0; - crc16_msb = 0; - for (offs = 256 * i; offs < 256 * i + 256; offs++) - { - tape_crc16(image[offs] << 7); - tape_crc16(image[offs] << 6); - tape_crc16(image[offs] << 5); - tape_crc16(image[offs] << 4); - tape_crc16(image[offs] << 3); - tape_crc16(image[offs] << 2); - tape_crc16(image[offs] << 1); - tape_crc16(image[offs] << 0); - } - tape_crc16_lsb[i] = crc16_lsb; - tape_crc16_msb[i] = crc16_msb; - } - - tape_length = tape_blocks * TAPE_CHUNK * 8 * 2 + 2 * (TAPE_LEADER + TAPE_GAP + TAPE_HOLE); - tape_time0 = attotime_mul(ATTOTIME_IN_HZ(TAPE_CLOCKRATE), TAPE_LEADER + TAPE_GAP - TAPE_HOLE); - LOG(0,("tape: %d blocks\n", tape_blocks)); - tape_bot_eot = 0; decocass_dongle_r = NULL; decocass_dongle_w = NULL; @@ -1708,31 +1369,33 @@ static void decocass_init_common(running_machine *machine) memset(decocass_quadrature_decoder, 0, sizeof(decocass_quadrature_decoder)); decocass_sound_ack = 0; - decocass_sound_timer = timer_alloc(machine, decocass_sound_nmi_pulse, NULL); + + audio_nmi_enabled = 0; + audio_nmi_state = 0; } MACHINE_RESET( decocass ) { - decocass_init_common(machine); + decocass_reset_common(machine); } MACHINE_RESET( ctsttape ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061)\n")); decocass_dongle_r = decocass_type1_pass_136_r; } MACHINE_RESET( chwy ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 own PROM)\n")); decocass_dongle_r = decocass_type1_latch_27_pass_3_inv_2_r; } MACHINE_RESET( clocknch ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 flip 2-3)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(0,1,3,2,4,5,6,7); @@ -1741,7 +1404,7 @@ MACHINE_RESET( clocknch ) MACHINE_RESET( ctisland ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 flip 0-2)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(2,1,0,3,4,5,6,7); @@ -1750,7 +1413,7 @@ MACHINE_RESET( ctisland ) MACHINE_RESET( csuperas ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 flip 4-5)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(0,1,2,3,5,4,6,7); @@ -1759,14 +1422,14 @@ MACHINE_RESET( csuperas ) MACHINE_RESET( castfant ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061)\n")); decocass_dongle_r = decocass_type1_latch_16_pass_3_inv_1_r; } MACHINE_RESET( cluckypo ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 flip 1-3)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(0,3,2,1,4,5,6,7); @@ -1775,7 +1438,7 @@ MACHINE_RESET( cluckypo ) MACHINE_RESET( cterrani ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 straight)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(0,1,2,3,4,5,6,7); @@ -1784,14 +1447,14 @@ MACHINE_RESET( cterrani ) MACHINE_RESET( cexplore ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 own PROM)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_5_inv_2_r; } MACHINE_RESET( cprogolf ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #1 (DE-0061 flip 0-1)\n")); decocass_dongle_r = decocass_type1_latch_26_pass_3_inv_2_r; type1_inmap = MAKE_MAP(1,0,2,3,4,5,6,7); @@ -1800,7 +1463,7 @@ MACHINE_RESET( cprogolf ) MACHINE_RESET( cmissnx ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #2 (CS82-007)\n")); decocass_dongle_r = decocass_type2_r; decocass_dongle_w = decocass_type2_w; @@ -1808,7 +1471,7 @@ MACHINE_RESET( cmissnx ) MACHINE_RESET( cdiscon1 ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #2 (CS82-007)\n")); decocass_dongle_r = decocass_type2_r; decocass_dongle_w = decocass_type2_w; @@ -1816,7 +1479,7 @@ MACHINE_RESET( cdiscon1 ) MACHINE_RESET( cptennis ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #2 (CS82-007)\n")); decocass_dongle_r = decocass_type2_r; decocass_dongle_w = decocass_type2_w; @@ -1824,7 +1487,7 @@ MACHINE_RESET( cptennis ) MACHINE_RESET( ctornado ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #2 (CS82-007)\n")); decocass_dongle_r = decocass_type2_r; decocass_dongle_w = decocass_type2_w; @@ -1832,7 +1495,7 @@ MACHINE_RESET( ctornado ) MACHINE_RESET( cbnj ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1841,7 +1504,7 @@ MACHINE_RESET( cbnj ) MACHINE_RESET( cburnrub ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1850,7 +1513,7 @@ MACHINE_RESET( cburnrub ) MACHINE_RESET( cbtime ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1859,7 +1522,7 @@ MACHINE_RESET( cbtime ) MACHINE_RESET( cgraplop ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1868,7 +1531,7 @@ MACHINE_RESET( cgraplop ) MACHINE_RESET( cgraplp2 ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1877,7 +1540,7 @@ MACHINE_RESET( cgraplp2 ) MACHINE_RESET( clapapa ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1886,7 +1549,7 @@ MACHINE_RESET( clapapa ) MACHINE_RESET( cfghtice ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1895,7 +1558,7 @@ MACHINE_RESET( cfghtice ) MACHINE_RESET( cprobowl ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1904,7 +1567,7 @@ MACHINE_RESET( cprobowl ) MACHINE_RESET( cnightst ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1913,7 +1576,7 @@ MACHINE_RESET( cnightst ) MACHINE_RESET( cprosocc ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1922,7 +1585,7 @@ MACHINE_RESET( cprosocc ) MACHINE_RESET( cppicf ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1931,7 +1594,7 @@ MACHINE_RESET( cppicf ) MACHINE_RESET( cscrtry ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #4 (32K ROM)\n")); decocass_dongle_r = decocass_type4_r; decocass_dongle_w = decocass_type4_w; @@ -1939,7 +1602,7 @@ MACHINE_RESET( cscrtry ) MACHINE_RESET( cbdash ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("dongle type #5 (NOP)\n")); decocass_dongle_r = decocass_type5_r; decocass_dongle_w = decocass_type5_w; @@ -1947,15 +1610,15 @@ MACHINE_RESET( cbdash ) MACHINE_RESET( cflyball ) { - decocass_init_common(machine); + decocass_reset_common(machine); LOG(0,("no dongle\n")); decocass_dongle_r = decocass_nodong_r; } MACHINE_RESET( czeroize ) { - UINT8 *mem = memory_region(machine, "user1"); - decocass_init_common(machine); + UINT8 *mem = memory_region(machine, "dongle"); + decocass_reset_common(machine); LOG(0,("dongle type #3 (PAL)\n")); decocass_dongle_r = decocass_type3_r; decocass_dongle_w = decocass_type3_w; @@ -1978,23 +1641,14 @@ MACHINE_RESET( czeroize ) * ***************************************************************************/ -static void tape_stop(void) -{ - /* remember time */ - tape_time0 = decocass_adjust_tape_time(tape_time0); - - timer_adjust_oneshot(tape_timer, attotime_never, 0); -} - - WRITE8_HANDLER( i8041_p1_w ) { static int i8041_p1_old; if (data != i8041_p1_old) { - LOG(4,("%9.7f 8041-PC: %03x i8041_p1_w: $%02x (%s%s%s%s%s%s%s%s)\n", - attotime_to_double(timer_get_time(space->machine)), + LOG(4,("%10s 8041-PC: %03x i8041_p1_w: $%02x (%s%s%s%s%s%s%s%s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), data, data & 0x01 ? "" : "DATA-WRT", @@ -2008,71 +1662,16 @@ WRITE8_HANDLER( i8041_p1_w ) i8041_p1_old = data; } - /* change in REW signal ? */ - if ((data ^ i8041_p1) & 0x10) + /* change in FAST/REW/FWD signals? */ + if ((data ^ i8041_p1) & 0x34) { - tape_stop(); - if (0 == (data & 0x10)) - { - LOG(2,("tape %5.4fs: rewind\n", attotime_to_double(tape_time0))); - tape_dir = -1; - timer_adjust_oneshot(tape_timer, attotime_never, 0); - set_led_status(0, 1); - } - else - { - tape_dir = 0; - tape_speed = 0; - LOG(2,("tape %5.4fs: stopped\n", attotime_to_double(tape_time0))); -#if TAPE_UI_DISPLAY - popmessage(" [%05.1fs] ", attotime_to_double(tape_time0)); -#endif - set_led_status(0, 0); - } - } - - /* change in FWD signal ? */ - if ((data ^ i8041_p1) & 0x20) - { - tape_stop(); - if (0 == (data & 0x20)) - { - LOG(2,("tape %5.4fs: forward\n", attotime_to_double(tape_time0))); - tape_dir = +1; - timer_adjust_oneshot(tape_timer, attotime_never, 0); - set_led_status(0, 1); - } - else - { - tape_dir = 0; - tape_speed = 0; - LOG(2,("tape %5.4fs: stopped\n", attotime_to_double(tape_time0))); -#if TAPE_UI_DISPLAY - popmessage(" [%05.1fs] ", attotime_to_double(tape_time0)); -#endif - set_led_status(0, 0); - } - } - - /* change in FAST signal ? */ - if (tape_timer && (data ^ i8041_p1) & 0x04) - { - tape_stop(); - tape_speed = (0 == (data & 0x04)) ? 1 : 0; - - if (tape_dir < 0) - { - LOG(2,("tape: fast rewind %s\n", (0 == (data & 0x04)) ? "on" : "off")); - tape_dir = (tape_speed) ? -7 : -1; - timer_adjust_oneshot(tape_timer, attotime_never, 0); - } - else - if (tape_dir > 0) - { - LOG(2,("tape: fast forward %s\n", (0 == (data & 0x04)) ? "on" : "off")); - tape_dir = (tape_speed) ? +7 : +1; - timer_adjust_oneshot(tape_timer, attotime_never, 0); - } + int newspeed = 0; + + if ((data & 0x30) == 0x20) + newspeed = (data & 0x04) ? -1 : -7; + else if ((data & 0x30) == 0x10) + newspeed = (data & 0x04) ? 1 : 7; + tape_change_speed(cassette_device, newspeed); } i8041_p1 = data; @@ -2085,8 +1684,8 @@ READ8_HANDLER( i8041_p1_r ) if (data != i8041_p1_old) { - LOG(4,("%9.7f 8041-PC: %03x i8041_p1_r: $%02x (%s%s%s%s%s%s%s%s)\n", - attotime_to_double(timer_get_time(space->machine)), + LOG(4,("%10s 8041-PC: %03x i8041_p1_r: $%02x (%s%s%s%s%s%s%s%s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), data, data & 0x01 ? "" : "DATA-WRT", @@ -2108,8 +1707,8 @@ WRITE8_HANDLER( i8041_p2_w ) if (data != i8041_p2_old) { - LOG(4,("%9.7f 8041-PC: %03x i8041_p2_w: $%02x (%s%s%s%s%s%s%s%s)\n", - attotime_to_double(timer_get_time(space->machine)), + LOG(4,("%10s 8041-PC: %03x i8041_p2_w: $%02x (%s%s%s%s%s%s%s%s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), data, data & 0x01 ? "" : "FNO/", @@ -2122,7 +1721,7 @@ WRITE8_HANDLER( i8041_p2_w ) data & 0x80 ? " [RDATA]" : "")); i8041_p2_old = data; } - i8041_p2 = data; + i8041_p2 = (i8041_p2 & 0xe0) | (data & ~0xe0); } READ8_HANDLER( i8041_p2_r ) @@ -2130,14 +1729,12 @@ READ8_HANDLER( i8041_p2_r ) UINT8 data; static int i8041_p2_old; - tape_update(space->machine); - - data = i8041_p2; + data = (i8041_p2 & ~0xe0) | tape_get_status_bits(cassette_device); if (data != i8041_p2_old) { - LOG(4,("%9.7f 8041-PC: %03x i8041_p2_r: $%02x (%s%s%s%s%s%s%s%s)\n", - attotime_to_double(timer_get_time(space->machine)), + LOG(4,("%10s 8041-PC: %03x i8041_p2_r: $%02x (%s%s%s%s%s%s%s%s)\n", + attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), data, data & 0x01 ? "" : "FNO/", @@ -2154,3 +1751,453 @@ READ8_HANDLER( i8041_p2_r ) } + +/*************************************************************************** + CASSETTE DEVICE INTERFACE +***************************************************************************/ + +/* regions within the virtual tape */ +enum _tape_region +{ + REGION_LEADER, /* in clear leader section */ + REGION_LEADER_GAP, /* in gap between leader and BOT */ + REGION_BOT, /* in BOT hole */ + REGION_BOT_GAP, /* in gap between BOT hole and data */ + REGION_DATA_BLOCK_0, /* in data block 0 */ + REGION_DATA_BLOCK_255 = REGION_DATA_BLOCK_0 + 255, + REGION_EOT_GAP, /* in gap between data and EOT hole */ + REGION_EOT, /* in EOT hole */ + REGION_TRAILER_GAP, /* in gap between trailer and EOT */ + REGION_TRAILER /* in clear trailer section */ +}; +typedef enum _tape_region tape_region; + + +/* bytes within a data block on a virtual tape */ +enum _tape_byte +{ + BYTE_PRE_GAP_0, /* 34 bytes of gap, clock held to 0, no data */ + BYTE_PRE_GAP_33 = BYTE_PRE_GAP_0 + 33, + BYTE_LEADIN, /* 1 leadin byte, clocked value 0x00 */ + BYTE_HEADER, /* 1 header byte, clocked value 0xAA */ + BYTE_DATA_0, /* 256 bytes of data, clocked */ + BYTE_DATA_255 = BYTE_DATA_0 + 255, + BYTE_CRC16_MSB, /* 2 bytes of CRC, clocked MSB first, then LSB */ + BYTE_CRC16_LSB, + BYTE_TRAILER, /* 1 trailer byte, clocked value 0xAA */ + BYTE_LEADOUT, /* 1 leadout byte, clocked value 0x00 */ + BYTE_LONGCLOCK, /* 1 longclock byte, clock held to 1, no data */ + BYTE_POSTGAP_0, /* 34 bytes of gap, no clock, no data */ + BYTE_POSTGAP_33 = BYTE_POSTGAP_0 + 33, + BYTE_BLOCK_TOTAL /* total number of bytes in block */ +}; +typedef enum _tape_byte tape_byte; + + +/* state of the tape */ +typedef struct _tape_state tape_state; +struct _tape_state +{ + running_machine * machine; /* pointer back to the machine */ + emu_timer * timer; /* timer for running the tape */ + INT8 speed; /* speed: <-1=fast rewind, -1=reverse, 0=stopped, 1=normal, >1=fast forward */ + tape_region region; /* current region */ + tape_byte bytenum; /* byte number within a datablock */ + UINT8 bitnum; /* bit number within a byte */ + UINT32 clockpos; /* the current clock position of the tape */ + UINT32 numclocks; /* total number of clocks on the entire tape */ + UINT16 crc16[256]; /* CRC16 for each block */ +}; + + +/* number of tape clock pulses per second */ +#define TAPE_CLOCKRATE 4800 +#define TAPE_CLOCKS_PER_BIT 2 +#define TAPE_CLOCKS_PER_BYTE (8 * TAPE_CLOCKS_PER_BIT) +#define TAPE_MSEC_TO_CLOCKS(x) ((x) * TAPE_CLOCKRATE / 1000) + + +/* Note on a tapes leader-BOT-data-EOT-trailer format: + * A cassette has a transparent piece of tape on both ends, + * leader and trailer. And data tapes also have BOT and EOT + * holes, shortly before the the leader and trailer. + * The holes and clear tape are detected using a photo-resitor. + * When rewinding, the BOT/EOT signal will show a short + * pulse and if rewind continues a constant high signal later. + * The specs say the holes are "> 2ms" in length. + */ + +/* duration of the clear LEADER (and trailer) of the tape */ +#define REGION_LEADER_START_CLOCK 0 +#define REGION_LEADER_LEN_CLOCKS TAPE_MSEC_TO_CLOCKS(1000) /* 1s */ +#define REGION_LEADER_END_CLOCK (REGION_LEADER_START_CLOCK+REGION_LEADER_LEN_CLOCKS) + +/* duration of the GAP between leader and BOT/EOT */ +#define REGION_LEADER_GAP_START_CLOCK REGION_LEADER_END_CLOCK +#define REGION_LEADER_GAP_LEN_CLOCKS TAPE_MSEC_TO_CLOCKS(1500) /* 1.5s */ +#define REGION_LEADER_GAP_END_CLOCK (REGION_LEADER_GAP_START_CLOCK+REGION_LEADER_GAP_LEN_CLOCKS) + +/* duration of BOT/EOT holes */ +#define REGION_BOT_START_CLOCK REGION_LEADER_GAP_END_CLOCK +#define REGION_BOT_LEN_CLOCKS TAPE_MSEC_TO_CLOCKS(2.5) /* 0.0025s */ +#define REGION_BOT_END_CLOCK (REGION_BOT_START_CLOCK+REGION_BOT_LEN_CLOCKS) + +/* gap between BOT/EOT and first/last data block */ +#define REGION_BOT_GAP_START_CLOCK REGION_BOT_END_CLOCK +#define REGION_BOT_GAP_LEN_CLOCKS TAPE_MSEC_TO_CLOCKS(300) /* 300ms */ +#define REGION_BOT_GAP_END_CLOCK (REGION_BOT_GAP_START_CLOCK+REGION_BOT_GAP_LEN_CLOCKS) + + +/*------------------------------------------------- + get_safe_token - makes sure that the passed + in device is, in fact, an IDE controller +-------------------------------------------------*/ + +INLINE tape_state *get_safe_token(const device_config *device) +{ + assert(device != NULL); + assert(device->token != NULL); + assert(device->type == DECOCASS_TAPE); + + return (tape_state *)device->token; +} + + +/*------------------------------------------------- + tape_crc16_byte - accumulate 8 bits worth of + CRC data +-------------------------------------------------*/ + +static UINT16 tape_crc16_byte(UINT16 crc, UINT8 data) +{ + int bit; + + for (bit = 0; bit < 8; bit++) + { + crc = (crc >> 1) | (crc << 15); + crc ^= (data << 7) & 0x80; + if (crc & 0x80) + crc ^= 0x0120; + data >>= 1; + } + return crc; +} + + +/*------------------------------------------------- + tape_describe_state - create a string that + describes the state of the tape +-------------------------------------------------*/ + +static const char *tape_describe_state(tape_state *tape) +{ + static char buffer[40]; + char temprname[40]; + const char *rname = temprname; + + if (tape->region == REGION_LEADER) + rname = "LEAD"; + else if (tape->region == REGION_LEADER_GAP) + rname = "LGAP"; + else if (tape->region == REGION_BOT) + rname = "BOT "; + else if (tape->region == REGION_BOT_GAP) + rname = "BGAP"; + else if (tape->region == REGION_TRAILER) + rname = "TRLR"; + else if (tape->region == REGION_TRAILER_GAP) + rname = "TGAP"; + else if (tape->region == REGION_EOT) + rname = "EOT "; + else if (tape->region == REGION_EOT_GAP) + rname = "EGAP"; + else + { + char tempbname[40]; + const char *bname = tempbname; + int clk; + + if (tape->bytenum <= BYTE_PRE_GAP_33) + sprintf(tempbname, "PR%02d", tape->bytenum - BYTE_PRE_GAP_0); + else if (tape->bytenum == BYTE_LEADIN) + bname = "LDIN"; + else if (tape->bytenum == BYTE_HEADER) + bname = "HEAD"; + else if (tape->bytenum <= BYTE_DATA_255) + sprintf(tempbname, "BY%02X", tape->bytenum - BYTE_DATA_0); + else if (tape->bytenum == BYTE_CRC16_MSB) + bname = "CRCM"; + else if (tape->bytenum == BYTE_CRC16_LSB) + bname = "CRCL"; + else if (tape->bytenum == BYTE_TRAILER) + bname = "TRLR"; + else if (tape->bytenum == BYTE_LEADOUT) + bname = "LOUT"; + else if (tape->bytenum == BYTE_LONGCLOCK) + bname = "LONG"; + else + sprintf(tempbname, "PO%02d", tape->bytenum - BYTE_POSTGAP_0); + + /* in the main data area, the clock alternates at the clock rate */ + if (tape->bytenum >= BYTE_LEADIN && tape->bytenum <= BYTE_LEADOUT) + clk = ((UINT32)(tape->clockpos - REGION_BOT_GAP_END_CLOCK) & 1) ? 0 : 1; + else if (tape->bytenum == BYTE_LONGCLOCK) + clk = 1; + else + clk = 0; + + sprintf(temprname, "BL%02X.%4s.%d.%d", tape->region - REGION_DATA_BLOCK_0, bname, tape->bitnum, clk); + } + + sprintf(buffer, "{%9d=%s}", tape->clockpos, rname); + return buffer; +} + + +/*------------------------------------------------- + tape_clock_callback - called once per clock + to increment/decrement the tape location +-------------------------------------------------*/ + +static TIMER_CALLBACK( tape_clock_callback ) +{ + const device_config *device = ptr; + tape_state *tape = get_safe_token(device); + + /* advance by one clock in the desired direction */ + if (tape->speed < 0 && tape->clockpos > 0) + tape->clockpos--; + else if (tape->speed > 0 && tape->clockpos < tape->numclocks) + tape->clockpos++; + + /* look for states before the start of data */ + if (tape->clockpos < REGION_LEADER_END_CLOCK) + tape->region = REGION_LEADER; + else if (tape->clockpos < REGION_LEADER_GAP_END_CLOCK) + tape->region = REGION_LEADER_GAP; + else if (tape->clockpos < REGION_BOT_END_CLOCK) + tape->region = REGION_BOT; + else if (tape->clockpos < REGION_BOT_GAP_END_CLOCK) + tape->region = REGION_BOT_GAP; + + /* look for states after the end of data */ + else if (tape->clockpos >= tape->numclocks - REGION_LEADER_END_CLOCK) + tape->region = REGION_TRAILER; + else if (tape->clockpos >= tape->numclocks - REGION_LEADER_GAP_END_CLOCK) + tape->region = REGION_TRAILER_GAP; + else if (tape->clockpos >= tape->numclocks - REGION_BOT_END_CLOCK) + tape->region = REGION_EOT; + else if (tape->clockpos >= tape->numclocks - REGION_BOT_GAP_END_CLOCK) + tape->region = REGION_EOT_GAP; + + /* everything else is data */ + else + { + UINT32 dataclock = tape->clockpos - REGION_BOT_GAP_END_CLOCK; + + /* compute the block number */ + tape->region = REGION_DATA_BLOCK_0 + dataclock / (TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL); + dataclock -= (tape->region - REGION_DATA_BLOCK_0) * TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL; + + /* compute the byte within the block */ + tape->bytenum = dataclock / TAPE_CLOCKS_PER_BYTE; + dataclock -= tape->bytenum * TAPE_CLOCKS_PER_BYTE; + + /* compute the bit within the byte */ + tape->bitnum = dataclock / TAPE_CLOCKS_PER_BIT; + } + + /* log */ + if (LOG_CASSETTE_STATE) + tape_describe_state(tape); +} + + +/*------------------------------------------------- + tape_get_status_bits - return the 3 status + bits from the tape +-------------------------------------------------*/ + +static UINT8 tape_get_status_bits(const device_config *device) +{ + tape_state *tape = get_safe_token(device); + UINT8 tape_bits = 0; + + /* bit 0x20 is the BOT/EOT signal, which is also set in the leader/trailer area */ + if (tape->region == REGION_LEADER || tape->region == REGION_BOT || tape->region == REGION_EOT || tape->region == REGION_TRAILER) + tape_bits |= 0x20; + + /* bit 0x40 is the clock, which is only valid in some areas of the data block */ + /* bit 0x80 is the data, which is only valid in some areas of the data block */ + if (tape->region >= REGION_DATA_BLOCK_0 && tape->region <= REGION_DATA_BLOCK_255) + { + int blocknum = tape->region - REGION_DATA_BLOCK_0; + UINT8 byteval = 0x00; + + /* in the main data area, the clock alternates at the clock rate */ + if (tape->bytenum >= BYTE_LEADIN && tape->bytenum <= BYTE_LEADOUT) + tape_bits |= ((UINT32)(tape->clockpos - REGION_BOT_GAP_END_CLOCK) & 1) ? 0x00 : 0x40; + + /* in the longclock area, the clock holds high */ + else if (tape->bytenum == BYTE_LONGCLOCK) + tape_bits |= 0x40; + + /* everywhere else, the clock holds to 0 */ + else + ; + + /* lead-in and lead-out bytes are 0xAA */ + if (tape->bytenum == BYTE_HEADER || tape->bytenum == BYTE_TRAILER) + byteval = 0xaa; + + /* data block bytes are data */ + else if (tape->bytenum >= BYTE_DATA_0 && tape->bytenum <= BYTE_DATA_255) + byteval = device->region[blocknum * 256 + (tape->bytenum - BYTE_DATA_0)]; + + /* CRC MSB */ + else if (tape->bytenum == BYTE_CRC16_MSB) + byteval = tape->crc16[blocknum] >> 8; + + /* CRC LSB */ + else if (tape->bytenum == BYTE_CRC16_LSB) + byteval = tape->crc16[blocknum]; + + /* select the appropriate bit from the byte and move to the upper bit */ + if ((byteval >> tape->bitnum) & 1) + tape_bits |= 0x80; + } + return tape_bits; +} + + +/*------------------------------------------------- + tape_is_present - return TRUE if the tape is + present +-------------------------------------------------*/ + +static UINT8 tape_is_present(const device_config *device) +{ + return device->region != NULL; +} + + +/*------------------------------------------------- + tape_change_speed - alter the speed of tape + playback +-------------------------------------------------*/ + +static void tape_change_speed(const device_config *device, INT8 newspeed) +{ + tape_state *tape = get_safe_token(device); + attotime newperiod; + INT8 absnewspeed; + + /* do nothing if speed has not changed */ + if (tape->speed == newspeed) + return; + + /* compute how fast to run the tape timer */ + absnewspeed = (newspeed < 0) ? -newspeed : newspeed; + if (newspeed == 0) + newperiod = attotime_never; + else + newperiod = ATTOTIME_IN_HZ(TAPE_CLOCKRATE * absnewspeed); + + /* set the new speed */ + timer_adjust_periodic(tape->timer, newperiod, 0, newperiod); + tape->speed = newspeed; +} + + +/*------------------------------------------------- + device start callback +-------------------------------------------------*/ + +static DEVICE_START( decocass_tape ) +{ + tape_state *tape = get_safe_token(device); + int curblock, offs, numblocks; + + /* validate some basic stuff */ + assert(device != NULL); + assert(device->static_config == NULL); + assert(device->inline_config == NULL); + assert(device->machine != NULL); + assert(device->machine->config != NULL); + + /* fetch the data pointer */ + tape->timer = timer_alloc(device->machine, tape_clock_callback, (void *)device); + if (device->region == NULL) + return DEVICE_START_OK; + + /* scan for the first non-empty block in the image */ + for (offs = device->regionbytes - 1; offs >= 0; offs--) + if (device->region[offs] != 0) + break; + numblocks = ((offs | 0xff) + 1) / 256; + assert(numblocks < ARRAY_LENGTH(tape->crc16)); + + /* compute the total length */ + tape->numclocks = REGION_BOT_GAP_END_CLOCK + numblocks * BYTE_BLOCK_TOTAL * 16 + REGION_BOT_GAP_END_CLOCK; + + /* compute CRCs for each block */ + for (curblock = 0; curblock < numblocks; curblock++) + { + UINT16 crc = 0; + int testval; + + /* first CRC the 256 bytes of data */ + for (offs = 256 * curblock; offs < 256 * curblock + 256; offs++) + crc = tape_crc16_byte(crc, device->region[offs]); + + /* then find a pair of bytes that will bring the CRC to 0 (any better way than brute force?) */ + for (testval = 0; testval < 0x10000; testval++) + if (tape_crc16_byte(tape_crc16_byte(crc, testval >> 8), testval) == 0) + break; + tape->crc16[curblock] = testval; + } + + /* register states */ + state_save_register_device_item(device, 0, tape->speed); + state_save_register_device_item(device, 0, tape->bitnum); + state_save_register_device_item(device, 0, tape->clockpos); + + return DEVICE_START_OK; +} + + +/*------------------------------------------------- + device reset callback +-------------------------------------------------*/ + +static DEVICE_RESET( decocass_tape ) +{ + /* turn the tape off */ + tape_change_speed(device, 0); +} + + +/*------------------------------------------------- + device get info callback +-------------------------------------------------*/ + +DEVICE_GET_INFO( decocass_tape ) +{ + switch (state) + { + /* --- the following bits of info are returned as 64-bit signed integers --- */ + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tape_state); break; + case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break; + + /* --- the following bits of info are returned as pointers to data or functions --- */ + case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(decocass_tape); break; + case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(decocass_tape);break; + + /* --- the following bits of info are returned as NULL-terminated strings --- */ + case DEVINFO_STR_NAME: strcpy(info->s, "DECO Cassette Tape"); break; + case DEVINFO_STR_FAMILY: strcpy(info->s, "Tape Controller"); break; + case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; + case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; + } +} diff --git a/src/mame/machine/decocass.h b/src/mame/machine/decocass.h index 5bd56d877c1..3afceaa7cef 100644 --- a/src/mame/machine/decocass.h +++ b/src/mame/machine/decocass.h @@ -1,19 +1,25 @@ -/* Set this to 1 to display current tape position */ -#define TAPE_UI_DISPLAY 0 - #ifdef MAME_DEBUG -#define LOGLEVEL 3 +#define LOGLEVEL 5 #else #define LOGLEVEL 0 #endif #define LOG(n,x) do { if (LOGLEVEL >= n) logerror x; } while (0) + +#define DECOCASS_TAPE DEVICE_GET_INFO_NAME(decocass_tape) +DEVICE_GET_INFO( decocass_tape ); + +#define MDRV_DECOCASS_TAPE_ADD(_tag) \ + MDRV_DEVICE_ADD(_tag, DECOCASS_TAPE, 0) + + extern WRITE8_HANDLER( decocass_coin_counter_w ); extern WRITE8_HANDLER( decocass_sound_command_w ); extern READ8_HANDLER( decocass_sound_data_r ); extern READ8_HANDLER( decocass_sound_ack_r ); extern WRITE8_HANDLER( decocass_sound_data_w ); extern READ8_HANDLER( decocass_sound_command_r ); +extern TIMER_DEVICE_CALLBACK( decocass_audio_nmi_gen ); extern WRITE8_HANDLER( decocass_sound_nmi_enable_w ); extern READ8_HANDLER( decocass_sound_nmi_enable_r ); extern READ8_HANDLER( decocass_sound_data_ack_reset_r ); @@ -22,11 +28,6 @@ extern WRITE8_HANDLER( decocass_nmi_reset_w ); extern WRITE8_HANDLER( decocass_quadrature_decoder_reset_w ); extern WRITE8_HANDLER( decocass_adc_w ); extern READ8_HANDLER( decocass_input_r ); -extern int tape_dir; -extern int tape_speed; -extern attotime tape_time0; -extern emu_timer *tape_timer; -attotime decocass_adjust_tape_time(attotime tape_time); extern WRITE8_HANDLER( decocass_reset_w ); @@ -35,6 +36,7 @@ extern WRITE8_HANDLER( decocass_e5xx_w ); extern WRITE8_HANDLER( decocass_de0091_w ); extern WRITE8_HANDLER( decocass_e900_w ); +extern MACHINE_START( decocass ); extern MACHINE_RESET( decocass ); extern MACHINE_RESET( ctsttape ); extern MACHINE_RESET( chwy ); diff --git a/src/mame/machine/tnzs.c b/src/mame/machine/tnzs.c index 7577a2ee7de..45f97b46a47 100644 --- a/src/mame/machine/tnzs.c +++ b/src/mame/machine/tnzs.c @@ -13,7 +13,7 @@ ***************************************************************************/ #include "driver.h" -#include "cpu/i8x41/i8x41.h" +#include "cpu/mcs48/mcs48.h" #include "includes/tnzs.h" static int mcu_type; @@ -44,16 +44,8 @@ static READ8_HANDLER( mcu_tnzs_r ) { UINT8 data; - if (offset == 0) - { - data = cpu_get_reg(space->machine->cpu[2], I8X41_DATA); - cpu_yield(space->cpu); - } - else - { - data = cpu_get_reg(space->machine->cpu[2], I8X41_STAT); - cpu_yield(space->cpu); - } + data = upi41_master_r(space->machine->cpu[2], offset & 1); + cpu_yield(space->cpu); // logerror("PC %04x: read %02x from mcu $c00%01x\n", cpu_get_previouspc(space->cpu), data, offset); @@ -64,10 +56,7 @@ static WRITE8_HANDLER( mcu_tnzs_w ) { // logerror("PC %04x: write %02x to mcu $c00%01x\n", cpu_get_previouspc(space->cpu), data, offset); - if (offset == 0) - cpu_set_reg(space->machine->cpu[2], I8X41_DATA, data); - else - cpu_set_reg(space->machine->cpu[2], I8X41_CMND, data); + upi41_master_w(space->machine->cpu[2], offset & 1, data); } diff --git a/src/mame/mame.mak b/src/mame/mame.mak index 4220d189989..c77caaef0dc 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -67,11 +67,6 @@ CPUS += V35 CPUS += V60 CPUS += V70 CPUS += MCS48 -CPUS += I8041 -CPUS += I8741 -CPUS += I8042 -CPUS += I8242 -CPUS += I8742 CPUS += I8031 CPUS += I8032 CPUS += I8051 diff --git a/src/mame/video/btime.c b/src/mame/video/btime.c index 21ecbe344e6..97e445c7bc2 100644 --- a/src/mame/video/btime.c +++ b/src/mame/video/btime.c @@ -21,14 +21,12 @@ UINT8 *zoar_scrollram; UINT8 *deco_charram; size_t bnj_backgroundram_size; -static int sprite_dirty[256]; -static int char_dirty[1024]; - static UINT8 btime_palette = 0; static UINT8 bnj_scroll1 = 0; static UINT8 bnj_scroll2 = 0; static bitmap_t *background_bitmap; -static UINT8 lnc_sound_interrupt_enabled = 0; + +static UINT8 *sprite_dirty, *char_dirty; /*************************************************************************** @@ -142,14 +140,20 @@ VIDEO_START( btime ) bnj_scroll1 = 0; bnj_scroll2 = 0; btime_palette = 0; + + sprite_dirty = auto_malloc(256 * sizeof(*sprite_dirty)); + memset(sprite_dirty, 1, 256 * sizeof(*sprite_dirty)); + + char_dirty = auto_malloc(1024 * sizeof(*char_dirty)); + memset(char_dirty, 1, 1024 * sizeof(*char_dirty)); } VIDEO_START( bnj ) { /* the background area is twice as wide as the screen */ - int width = video_screen_get_width(machine->primary_screen); - int height = video_screen_get_height(machine->primary_screen); + int width = 256; + int height = 256; bitmap_format format = video_screen_get_format(machine->primary_screen); background_bitmap = auto_bitmap_alloc(2*width, height, format); @@ -297,15 +301,6 @@ WRITE8_HANDLER( bnj_video_control_w ) btime_video_control_w(space, offset, data); } -WRITE8_HANDLER( lnc_video_control_w ) -{ - // I have a feeling that this only works by coincidence. I couldn't - // figure out how NMI's are disabled by the sound processor - lnc_sound_interrupt_enabled = data & 0x08; - - bnj_video_control_w(space, offset, data & 0x01); -} - WRITE8_HANDLER( disco_video_control_w ) { btime_palette = (data >> 2) & 0x03; @@ -317,13 +312,6 @@ WRITE8_HANDLER( disco_video_control_w ) } -INTERRUPT_GEN( lnc_sound_interrupt ) -{ - if (lnc_sound_interrupt_enabled) - cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE); -} - - static void draw_chars(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 transparency, UINT8 color, int priority) { offs_t offs; @@ -341,7 +329,7 @@ static void draw_chars(running_machine *machine, bitmap_t *bitmap, const rectang if (flip_screen_get(machine)) { x = 31 - x; - y = 31 - y; + y = 33 - y; } drawgfx(bitmap,machine->gfx[0], @@ -377,7 +365,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta if (flip_screen_get(machine)) { x = 240 - x; - y = 240 - y + sprite_y_adjust_flip_screen; + y = 256 - y + sprite_y_adjust_flip_screen; flipx = !flipx; flipy = !flipy; @@ -429,7 +417,7 @@ static void draw_background(running_machine *machine, bitmap_t *bitmap, const re if (flip_screen_get(machine)) { x = 240 - x; - y = 240 - y; + y = 256 - y; } drawgfx(bitmap, machine->gfx[2], @@ -565,7 +553,7 @@ VIDEO_UPDATE( bnj ) if (flip_screen_get(screen->machine)) { sx = 496 - sx; - sy = 240 - sy; + sy = 256 - sy; } drawgfx(background_bitmap, screen->machine->gfx[2], @@ -612,7 +600,7 @@ VIDEO_UPDATE( cookrace ) if (flip_screen_get(screen->machine)) { sx = 31 - sx; - sy = 31 - sy; + sy = 33 - sy; } drawgfx(bitmap, screen->machine->gfx[2], diff --git a/src/mame/video/decocass.c b/src/mame/video/decocass.c index 2b39997b097..127aaeb80e1 100644 --- a/src/mame/video/decocass.c +++ b/src/mame/video/decocass.c @@ -213,8 +213,6 @@ WRITE8_HANDLER( decocass_paletteram_w ) WRITE8_HANDLER( decocass_charram_w ) { - if (data == decocass_charram[offset]) - return; decocass_charram[offset] = data; /* dirty sprite */ sprite_dirty[(offset >> 5) & 255] = 1; @@ -245,8 +243,6 @@ static void mark_bg_tile_dirty(offs_t offset) WRITE8_HANDLER( decocass_tileram_w ) { - if (data == decocass_tileram[offset]) - return; decocass_tileram[offset] = data; /* dirty tile (64 bytes per tile) */ tile_dirty[(offset / 64) & 15] = 1; @@ -257,8 +253,6 @@ WRITE8_HANDLER( decocass_tileram_w ) WRITE8_HANDLER( decocass_objectram_w ) { - if (data == decocass_objectram[offset]) - return; decocass_objectram[offset] = data; /* dirty the object */ object_dirty = 1; @@ -266,8 +260,6 @@ WRITE8_HANDLER( decocass_objectram_w ) WRITE8_HANDLER( decocass_bgvideoram_w ) { - if (data == decocass_bgvideoram[offset]) - return; decocass_bgvideoram[offset] = data; mark_bg_tile_dirty( offset ); } @@ -592,10 +584,10 @@ VIDEO_START( decocass ) tilemap_set_transparent_pen( fg_tilemap, 0 ); bg_tilemap_l_clip = *video_screen_get_visible_area(machine->primary_screen); - bg_tilemap_l_clip.max_y = video_screen_get_height(machine->primary_screen) / 2; + bg_tilemap_l_clip.max_y = 256 / 2; bg_tilemap_r_clip = *video_screen_get_visible_area(machine->primary_screen); - bg_tilemap_r_clip.min_y = video_screen_get_height(machine->primary_screen) / 2; + bg_tilemap_r_clip.min_y = 256 / 2; /* background videroam bits D0-D3 are shared with the tileram */ decocass_bgvideoram = decocass_tileram; @@ -615,18 +607,6 @@ VIDEO_UPDATE( decocass ) else if (watchdog_count-- > 0) watchdog_reset(screen->machine); -#if TAPE_UI_DISPLAY - if (tape_timer) - { - attotime tape_time = decocass_adjust_tape_time(tape_time0); - popmessage("%c%c [%05.1fs] %c%c", - (tape_dir < 0 && tape_speed) ? '<' : ' ', - (tape_dir < 0) ? '<' : ' ', - attotime_to_double(tape_time), - (tape_dir > 0) ? '>' : ' ', - (tape_dir > 0 && tape_speed) ? '>' : ' '); - } -#endif #ifdef MAME_DEBUG { static int showmsg;