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https://github.com/holub/mame
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Add Seals 8K SC Memory Board to S-100 bus emulation
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AJR
parent
c6654f04ee
commit
5334d77c78
@ -1368,6 +1368,8 @@ if (BUSES["S100"]~=null) then
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MAME_DIR .. "src/devices/bus/s100/nsmdsa.h",
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MAME_DIR .. "src/devices/bus/s100/nsmdsad.cpp",
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MAME_DIR .. "src/devices/bus/s100/nsmdsad.h",
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MAME_DIR .. "src/devices/bus/s100/seals8k.cpp",
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MAME_DIR .. "src/devices/bus/s100/seals8k.h",
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MAME_DIR .. "src/devices/bus/s100/wunderbus.cpp",
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MAME_DIR .. "src/devices/bus/s100/wunderbus.h",
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}
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221
src/devices/bus/s100/seals8k.cpp
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221
src/devices/bus/s100/seals8k.cpp
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@ -0,0 +1,221 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/**********************************************************************
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Seals Electronics 8K SC RAM board
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PolyMorphic Systems used this S-100 memory board in their first
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series of computers before introducing a 16K dynamic RAM of their
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own design.
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The 8K SC originally used AMD 91L02APC 1024x1 static RAMs with a
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500 ns access time. Replacing these with faster RAMs was certainly
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possible (the 8K SC-Z kit was supplied with the 250 ns 2102LHPC),
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and essential for use with high-speed CPUs since the tightly-
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packed board had absolutely no room for a wait state circuit.
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The 8K SC could be configured for battery backup by providing +2
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to +4 V at 600 mA on pin 14. (Pin 14 also could provide standby
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power to static RAM boards by Ithaca Audio, but this use was
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incompatible with some other S-100 systems and not sanctioned by
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the IEEE-696 standard). Power for this prominently advertised yet
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entirely optional feature was supplied by a Battery Back-Up Card
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(BBUC) which Seals sold separately. However, 64 static RAM chips
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made the 8K SC rather power-hungry even when operating under
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normal power (which it drew through four 7805 voltage regulators).
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**********************************************************************/
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#include "emu.h"
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#include "bus/s100/s100.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> s100_8k_sc_device
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class s100_8k_sc_device : public device_t, public device_s100_card_interface
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{
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public:
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// construction/destruction
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s100_8k_sc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// delegated construction
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s100_8k_sc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
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// device-specific overrides
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virtual ioport_constructor device_input_ports() const override;
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virtual void device_start() override;
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// S-100 memory access handlers
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virtual u8 s100_smemr_r(address_space &space, offs_t offset) override;
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virtual void s100_mwrt_w(address_space &space, offs_t offset, u8 data) override;
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// internal state
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std::unique_ptr<u8[]> m_ram;
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private:
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// helpers
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bool board_selected(offs_t offset) const;
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// object finder
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required_ioport m_dsw;
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};
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// ======================> s100_8k_sc_bb_device
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class s100_8k_sc_bb_device : public s100_8k_sc_device, public device_nvram_interface
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{
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public:
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// construction/destruction
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s100_8k_sc_bb_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device_nvram_interface overrides
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virtual void nvram_read(emu_file &file) override;
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virtual void nvram_write(emu_file &file) override;
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virtual void nvram_default() override;
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};
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DEFINE_DEVICE_TYPE(S100_8K_SC, s100_8k_sc_device, "s100_8k_sc", "Seals 8K SC Memory Board")
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DEFINE_DEVICE_TYPE(S100_8K_SC_BB, s100_8k_sc_bb_device, "s100_8k_sc_bb", "Seals 8K SC Memory Board with Battery Backup")
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//**************************************************************************
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// CONFIGURATION SETTINGS
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//**************************************************************************
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static INPUT_PORTS_START( s100_8k_sc )
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PORT_START("DSW")
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PORT_DIPNAME(0xff, 0xfb, "Address Range") PORT_DIPLOCATION("IC67:1,2,3,4,5,6,7,8")
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PORT_DIPSETTING(0xfe, "0 to 8K")
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PORT_DIPSETTING(0xfd, "8K to 16K")
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PORT_DIPSETTING(0xfb, "16K to 24K")
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PORT_DIPSETTING(0xf7, "24K to 32K")
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PORT_DIPSETTING(0xef, "32K to 40K")
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PORT_DIPSETTING(0xdf, "40K to 48K")
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PORT_DIPSETTING(0xbf, "48K to 56K")
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PORT_DIPSETTING(0x7f, "56K to 64K")
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INPUT_PORTS_END
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//**************************************************************************
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// DEVICE DEFINITION
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//**************************************************************************
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//-------------------------------------------------
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// s100_8k_sc_device - constructor
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//-------------------------------------------------
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s100_8k_sc_device::s100_8k_sc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
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device_t(mconfig, type, tag, owner, clock),
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device_s100_card_interface(mconfig, *this),
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m_dsw(*this, "DSW")
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{
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}
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s100_8k_sc_device::s100_8k_sc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
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s100_8k_sc_device(mconfig, S100_8K_SC, tag, owner, clock)
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{
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}
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//-------------------------------------------------
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// s100_8k_sc_bb_device - constructor
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//-------------------------------------------------
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s100_8k_sc_bb_device::s100_8k_sc_bb_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
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s100_8k_sc_device(mconfig, S100_8K_SC_BB, tag, owner, clock),
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device_nvram_interface(mconfig, *this)
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{
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}
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//-------------------------------------------------
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// device_input_ports - input port construction
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//-------------------------------------------------
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ioport_constructor s100_8k_sc_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(s100_8k_sc);
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void s100_8k_sc_device::device_start()
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{
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m_ram = make_unique_clear<u8[]>(0x2000);
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save_pointer(NAME(m_ram.get()), 0x2000);
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}
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//-------------------------------------------------
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// nvram_read - read NVRAM from the file
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//-------------------------------------------------
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void s100_8k_sc_bb_device::nvram_read(emu_file &file)
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{
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file.read(m_ram.get(), 0x2000);
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}
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//------------------------------------------------
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// nvram_write - write NVRAM to the file
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//-------------------------------------------------
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void s100_8k_sc_bb_device::nvram_write(emu_file &file)
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{
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file.write(m_ram.get(), 0x2000);
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}
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//------------------------------------------------
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// nvram_default - default NVRAM setting
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//-------------------------------------------------
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void s100_8k_sc_bb_device::nvram_default()
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{
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}
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//-------------------------------------------------
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// board_selected - return true if the address
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// is within the board's configured range
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//-------------------------------------------------
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bool s100_8k_sc_device::board_selected(offs_t offset) const
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{
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// A13-A15 decoded by 74138 at IC66
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return (m_dsw->read() | 1 << ((offset >> 13) & 7)) == 0xff;
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}
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//-------------------------------------------------
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// s100_smemr_r - memory read
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//-------------------------------------------------
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u8 s100_8k_sc_device::s100_smemr_r(address_space &space, offs_t offset)
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{
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if (board_selected(offset))
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return m_ram[offset & 0x1fff];
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else
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return 0;
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}
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//-------------------------------------------------
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// s100_mwrt_w - memory write
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//-------------------------------------------------
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void s100_8k_sc_device::s100_mwrt_w(address_space &space, offs_t offset, u8 data)
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{
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if (board_selected(offset))
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m_ram[offset & 0x1fff] = data;
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}
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17
src/devices/bus/s100/seals8k.h
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17
src/devices/bus/s100/seals8k.h
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@ -0,0 +1,17 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/**********************************************************************
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Seals Electronics 8K SC RAM board
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**********************************************************************/
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#ifndef MAME_BUS_S100_8K_SC_H
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#define MAME_BUS_S100_8K_SC_H
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#pragma once
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extern device_type S100_8K_SC;
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extern device_type S100_8K_SC_BB;
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#endif // MAME_BUS_S100_8K_SC_H
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@ -146,6 +146,7 @@ DEVICE_INPUT_DEFAULTS_END
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//#include "bus/s100/mm65k16s.h"
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#include "bus/s100/nsmdsa.h"
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#include "bus/s100/nsmdsad.h"
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#include "bus/s100/seals8k.h"
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//#include "bus/s100/wunderbus.h"
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static SLOT_INTERFACE_START( horizon_s100_cards )
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@ -155,6 +156,8 @@ static SLOT_INTERFACE_START( horizon_s100_cards )
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//SLOT_INTERFACE("ram32a", S100_RAM32A)
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//SLOT_INTERFACE("ram16a", S100_RAM16A)
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//SLOT_INTERFACE("fpb", S100_FPB)
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SLOT_INTERFACE("8ksc", S100_8K_SC)
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SLOT_INTERFACE("8kscbb", S100_8K_SC_BB)
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SLOT_INTERFACE_END
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