diff --git a/src/devices/machine/eepromser.cpp b/src/devices/machine/eepromser.cpp index 93476ad360b..dfb3f37cfae 100644 --- a/src/devices/machine/eepromser.cpp +++ b/src/devices/machine/eepromser.cpp @@ -740,14 +740,13 @@ void eeprom_serial_x24c44_device::device_start() // start the base class eeprom_serial_base_device::device_start(); - int16_t i=0; - m_ram_length=0xf; + m_ram_length = 0xf; - for (i=0;i<16;i++){ - m_ram_data[i]=read(i); //autoreload at power up - } - m_reading=0; - m_store_latch=0; + for (int i = 0; i < 16; i++) + m_ram_data[i] = read(i); // autoreload at power up + + m_reading = 0; + m_store_latch = 0; // save the current state save_item(NAME(m_ram_data)); @@ -755,31 +754,28 @@ void eeprom_serial_x24c44_device::device_start() save_item(NAME(m_store_latch)); } -void eeprom_serial_x24c44_device::copy_eeprom_to_ram(){ - uint16_t i=0; +void eeprom_serial_x24c44_device::copy_eeprom_to_ram() +{ LOG1("EEPROM TO RAM COPY!!!\n"); - for (i=0;i<16;i++){ - m_ram_data[i]=read(i); - } - m_store_latch=1; + for (int i = 0; i < 16; i++) + m_ram_data[i] = read(i); + m_store_latch = 1; } - - -void eeprom_serial_x24c44_device::copy_ram_to_eeprom(){ - uint16_t i=0; - if (m_store_latch){ +void eeprom_serial_x24c44_device::copy_ram_to_eeprom() +{ + if (m_store_latch) + { LOG1("RAM TO EEPROM COPY\n"); - for (i=0;i<16;i++){ + for (int i = 0; i < 16; i++) write(i, m_ram_data[i]); - } - m_store_latch=0; - }else{ - LOG0("Store command with store latch not set!\n"); + m_store_latch = 0; } - + else + LOG0("Store command with store latch not set!\n"); } + //------------------------------------------------- // execute_command - execute a command once we // have enough bits for one @@ -829,14 +825,14 @@ void eeprom_serial_x24c44_device::execute_command() // lock the chip; return to IN_RESET state case COMMAND_LOCK: m_locked = true; - m_store_latch=0; + m_store_latch = 0; set_state(STATE_IN_RESET); break; // unlock the chip; return to IN_RESET state case COMMAND_UNLOCK: m_locked = false; - m_store_latch=1; + m_store_latch = 1; set_state(STATE_IN_RESET); break; @@ -909,20 +905,18 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) // if we have enough bits for a command + address, check it out m_command_address_accum = (m_command_address_accum << 1) | m_di_state; - m_bits_accum=m_bits_accum+1; + m_bits_accum = m_bits_accum + 1; - if (m_bits_accum == 2 + m_command_address_bits){ + if (m_bits_accum == 2 + m_command_address_bits) + { //read command is only 2 bits all other are 3 bits!!! - - parse_command_and_address_2_bit(); - + parse_command_and_address_2_bit(); } - if (!m_reading){ - if (m_bits_accum == 3 + m_command_address_bits){ + if (!m_reading && m_bits_accum == 3 + m_command_address_bits) + { execute_command(); } - } } else if (event == EVENT_CS_FALLING_EDGE) set_state(STATE_IN_RESET); @@ -934,8 +928,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) { int bit_index = m_bits_accum++; - if (bit_index % m_data_bits == 0 && (bit_index == 0 || m_streaming_enabled)){ - m_shift_register=m_ram_data[m_address]; + if (bit_index % m_data_bits == 0 && (bit_index == 0 || m_streaming_enabled)) + { + m_shift_register = m_ram_data[m_address]; //m_shift_register=bitswap<16>(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); //m_shift_register=bitswap<16>(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); @@ -979,7 +974,7 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) //m_shift_register=bitswap<16>(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); //m_shift_register=bitswap<16>(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); m_shift_register=bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); - m_ram_data[m_address]=m_shift_register; + m_ram_data[m_address] = m_shift_register; LOG1("write to RAM addr=%02X data=%04X\n",m_address,m_shift_register); } @@ -1015,7 +1010,7 @@ void eeprom_serial_x24c44_device::parse_command_and_address() m_address = (m_command_address_accum >> 3) & 0x0f; - LOG1("EEPROM: command= %04X, address %02X\n", m_command_address_accum& 0x07, m_address); + LOG1("EEPROM: command= %04X, address %02X\n", m_command_address_accum & 0x07, m_address); switch (m_command_address_accum & 0x07) { diff --git a/src/devices/sound/okiadpcm.cpp b/src/devices/sound/okiadpcm.cpp index c9702f93175..631a317724f 100644 --- a/src/devices/sound/okiadpcm.cpp +++ b/src/devices/sound/okiadpcm.cpp @@ -17,6 +17,7 @@ Application JP,1995-104333 (Unexamined Publication JP,H08-307371,A) (Not examined or registered) https://patents.google.com/patent/JPH08307371A/en <- something unrelated to adpcm, wireless transmission error detection related? Application JP,1995-162009 (Unexamined Publication JP,H09-018425,A) (Not examined or registered) https://patents.google.com/patent/JPH0918425A/en <- looks like ADPCM2 maybe? Application JP,1988-176215 (Unexamined Publication JP,H02-026426,A) (Not examined or registered) https://patents.google.com/patent/JPH0226426A/en <- Fujitsu variant on (G.726/727?) SB-ADPCM, cited by above + ***************************************************************************/ #include "emu.h" @@ -131,7 +132,7 @@ void oki_adpcm_state::compute_tables() for (int nib = 0; nib < 16; nib++) { s_diff_lookup[step*16 + nib] = nbl2bit[nib][0] * - (stepval * nbl2bit[nib][1] + + (stepval * nbl2bit[nib][1] + stepval/2 * nbl2bit[nib][2] + stepval/4 * nbl2bit[nib][3] + stepval/8); @@ -250,7 +251,7 @@ void oki_adpcm2_state::compute_tables() for (int nib = 0; nib < 16; nib++) { s_diff_lookup[step*16 + nib] = nbl2bit[nib][0] * - (stepval * nbl2bit[nib][1] + + (stepval * nbl2bit[nib][1] + stepval/2 * nbl2bit[nib][2] + stepval/4 * nbl2bit[nib][3] + stepval/8); diff --git a/src/devices/sound/okim6295.cpp b/src/devices/sound/okim6295.cpp index fbded659cf1..d4006fea1da 100644 --- a/src/devices/sound/okim6295.cpp +++ b/src/devices/sound/okim6295.cpp @@ -85,14 +85,14 @@ const stream_buffer::sample_t okim6295_device::s_volume_table[16] = // okim6295_device - constructor //------------------------------------------------- -okim6295_device::okim6295_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, OKIM6295, tag, owner, clock), - device_sound_interface(mconfig, *this), - device_rom_interface(mconfig, *this), - m_region(*this, DEVICE_SELF), - m_command(-1), - m_stream(nullptr), - m_pin7_state(~uint8_t(0)) +okim6295_device::okim6295_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, OKIM6295, tag, owner, clock), + device_sound_interface(mconfig, *this), + device_rom_interface(mconfig, *this), + m_region(*this, DEVICE_SELF), + m_command(-1), + m_stream(nullptr), + m_pin7_state(~uint8_t(0)) { } @@ -326,12 +326,12 @@ void okim6295_device::write(uint8_t command) // okim_voice - constructor //------------------------------------------------- -okim6295_device::okim_voice::okim_voice() - : m_playing(false), - m_base_offset(0), - m_sample(0), - m_count(0), - m_volume(0) +okim6295_device::okim_voice::okim_voice() : + m_playing(false), + m_base_offset(0), + m_sample(0), + m_count(0), + m_volume(0) { } diff --git a/src/devices/video/ramdac.cpp b/src/devices/video/ramdac.cpp index 9d749bc2c7f..4504d7f0deb 100644 --- a/src/devices/video/ramdac.cpp +++ b/src/devices/video/ramdac.cpp @@ -44,13 +44,13 @@ DEFINE_DEVICE_TYPE(RAMDAC, ramdac_device, "ramdac", "RAMDAC") // ramdac_device - constructor //------------------------------------------------- -ramdac_device::ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, RAMDAC, tag, owner, clock), - device_memory_interface(mconfig, *this), - m_space_config("videoram", ENDIANNESS_LITTLE, 8, 10, 0, address_map_constructor(FUNC(ramdac_device::ramdac_palram), this)), - m_palette(*this, finder_base::DUMMY_TAG), - m_color_base(0), - m_split_read_reg(0) +ramdac_device::ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, RAMDAC, tag, owner, clock), + device_memory_interface(mconfig, *this), + m_space_config("videoram", ENDIANNESS_LITTLE, 8, 10, 0, address_map_constructor(FUNC(ramdac_device::ramdac_palram), this)), + m_palette(*this, finder_base::DUMMY_TAG), + m_color_base(0), + m_split_read_reg(0) { } @@ -101,7 +101,6 @@ void ramdac_device::device_validity_check(validity_checker &valid) const void ramdac_device::device_start() { m_palram = make_unique_clear(1 << 10); - } diff --git a/src/mame/appliedconcepts/ggm.cpp b/src/mame/appliedconcepts/ggm.cpp index d2b7de2372a..2935ed76d19 100644 --- a/src/mame/appliedconcepts/ggm.cpp +++ b/src/mame/appliedconcepts/ggm.cpp @@ -204,10 +204,11 @@ void ggm_state::update_overlay() }; for (int i = 0; i < 6; i++) - m_fdigit[1][i] = fdigit_lut[overlay_lut[overlay_r()]][i]; - - for (int i = 0; i < 6; i++) - m_fdigit[0][i] = m_fdigit[1][i] ^ 0x3fff; + { + u16 value = fdigit_lut[overlay_lut[overlay_r()]][i]; + m_fdigit[1][i] = value; + m_fdigit[0][i] = value ^ 0x3fff; + } } diff --git a/src/mame/taito/gladiatr.cpp b/src/mame/taito/gladiatr.cpp index 2ed9a07afa7..0f6fe3339e3 100644 --- a/src/mame/taito/gladiatr.cpp +++ b/src/mame/taito/gladiatr.cpp @@ -165,19 +165,11 @@ Notes: - The fg tilemap is a 1bpp layer which selects the second palette bank when active, so it could be used for some cool effects. Gladiator just sets the whole palette to white so we can just treat it as a monochromatic layer. -- Tilemap Y scroll is not implemented because the game doesn't use it so I - can't verify it's right. -- gladiatr and clones start with one credit due to the way MAME initialises - memory and the dodgy code the bootleg MCUs use to synchronise with the host - CPUs. On an F3 reset they randomly start with one credit or no credits. - More specifically, the 1st opcode in cctl and ccpu is nonsense. Whether it's - a bad dump or done on purpose by the bootleggers is unknown. The JNT0 test - makes no sense, and if the jump would have succeeded, the jump target is - in the middle of another opcode. It makes more sense if the 1st byte was - 0x22 instead of 0x26 and that would fix the coin issue. TODO: ----- +- Tilemap Y scroll is not implemented because the game doesn't use it so I + can't verify it's right. - gladiatr_irq_patch_w, which triggers irq on the second CPU, is a kludge. It shouldn't work that way, that address should actually reset the second CPU (but the main CPU never asserts the line). The schematics are too fuzzy to @@ -188,8 +180,10 @@ TODO: - YM2203 some sound effects just don't sound correct - Audio Filter Switch not hooked up (might solve YM2203 mixing issue) - Ports 60,61,80,81 not fully understood yet... -- Three 8741 dumps come from an unprotected bootleg, we need dumps from - original boards. +- Three gladiatr 8741 dumps come from an unprotected bootleg, we need dumps + from original boards. +- 2 of the bootleg gladiatr 8741 dumps are suspected to be bad, see rom patch + at driver init. ***************************************************************************/ @@ -327,9 +321,9 @@ READ_LINE_MEMBER(gladiatr_state::ucpu_t1_r) u8 gladiatr_state::ucpu_p1_r() { - // p10 connected to corresponding line on other MCU - // p11 connected to t1 on other MCU - // other lines floating + // p10 connected to corresponding line on other MCU + // p11 connected to t1 on other MCU + // other lines floating return m_csnd_p1 |= 0xfe; } @@ -346,9 +340,9 @@ READ_LINE_MEMBER(gladiatr_state::csnd_t1_r) u8 gladiatr_state::csnd_p1_r() { - // p10 connected to corresponding line on other MCU - // p11 connected to t1 on other MCU - // other lines floating + // p10 connected to corresponding line on other MCU + // p11 connected to t1 on other MCU + // other lines floating return m_ucpu_p1 |= 0xfe; } @@ -409,10 +403,9 @@ u8 ppking_state::ppking_f1_r() inline bool ppking_state::mcu_parity_check() { - int i; u8 res = 0; - for(i=0;i<8;i++) + for(int i=0;i<8;i++) { if(m_mcu[0].rxd & (1 << i)) res++; @@ -888,8 +881,8 @@ static INPUT_PORTS_START( gladiatr ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL PORT_START("COINS") // ccpu test, cctl test - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END @@ -1306,10 +1299,10 @@ ROM_START( greatgur ) ROM_LOAD( "q4.5s", 0x00020, 0x0020, CRC(e325808e) SHA1(5fd92ad4eff24f6ccf2df19d268a6cafba72202e) ) ROM_REGION( 0x0400, "cctl", 0 ) /* I/O MCU */ - ROM_LOAD( "gladcctl.1", 0x00000, 0x0400, CRC(b30d225f) SHA1(f383286530975c440589c276aa8c46fdfe5292b6) ) + ROM_LOAD( "gladcctl.1", 0x00000, 0x0400, CRC(b30d225f) SHA1(f383286530975c440589c276aa8c46fdfe5292b6) BAD_DUMP ) ROM_REGION( 0x0400, "ccpu", 0 ) /* I/O MCU */ - ROM_LOAD( "gladccpu.2", 0x00000, 0x0400, CRC(1d02cd5f) SHA1(f7242039788c66a1d91b01852d7d447330b847c4) ) + ROM_LOAD( "gladccpu.2", 0x00000, 0x0400, CRC(1d02cd5f) SHA1(f7242039788c66a1d91b01852d7d447330b847c4) BAD_DUMP ) ROM_REGION( 0x0400, "ucpu", 0 ) /* comms MCU */ ROM_LOAD( "gladucpu.17", 0x00000, 0x0400, CRC(3c5ca4c6) SHA1(0d8c2e1c2142ada11e30cfb9a48663386fee9cb8) ) @@ -1320,11 +1313,11 @@ ROM_END ROM_START( gcastle ) ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gc0_5", 0x00000, 0x4000, BAD_DUMP CRC(25b19efb) SHA1(c41344278f6c7f3d6527aced3e459ed1ba86dea5) ) // not dumped, placeholder taken from ogonsiro - ROM_LOAD( "gc0_4", 0x04000, 0x2000, BAD_DUMP CRC(347ec794) SHA1(51100f9fef2e96f00e94fce709eed6583b01a2eb) ) // " - ROM_LOAD( "gc0_1", 0x10000, 0x2000, BAD_DUMP CRC(040c9839) SHA1(8c0d9a246847461a59eb5e6a53a94218e701d6c3) ) // " + ROM_LOAD( "gc0_5", 0x00000, 0x4000, CRC(25b19efb) SHA1(c41344278f6c7f3d6527aced3e459ed1ba86dea5) BAD_DUMP ) // not dumped, placeholder taken from ogonsiro + ROM_LOAD( "gc0_4", 0x04000, 0x2000, CRC(347ec794) SHA1(51100f9fef2e96f00e94fce709eed6583b01a2eb) BAD_DUMP ) // " + ROM_LOAD( "gc0_1", 0x10000, 0x2000, CRC(040c9839) SHA1(8c0d9a246847461a59eb5e6a53a94218e701d6c3) BAD_DUMP ) // " ROM_CONTINUE( 0x16000, 0x2000 ) - ROM_LOAD( "gc0_3", 0x12000, 0x4000, BAD_DUMP CRC(d6a342e7) SHA1(96274ae3bda4679108a25fcc514b625552abda30) ) // " + ROM_LOAD( "gc0_3", 0x12000, 0x4000, CRC(d6a342e7) SHA1(96274ae3bda4679108a25fcc514b625552abda30) BAD_DUMP ) // " ROM_CONTINUE( 0x18000, 0x4000 ) ROM_REGION( 0x10000, "sub", 0 ) /* Code for the 2nd CPU */ @@ -1376,8 +1369,8 @@ ROM_END void gladiatr_state::init_gladiatr() { - u8 *rom = memregion("gfx2")->base(); // unpack 3bpp graphics + u8 *rom = memregion("gfx2")->base(); for (int j = 3; j >= 0; j--) { for (int i = 0; i < 0x2000; i++) @@ -1389,8 +1382,8 @@ void gladiatr_state::init_gladiatr() // sort data std::swap_ranges(rom + 0x14000, rom + 0x18000, rom + 0x18000); - rom = memregion("gfx3")->base(); // unpack 3bpp graphics + rom = memregion("gfx3")->base(); for (int j = 5; j >= 0; j--) { for (int i = 0; i < 0x2000; i++) @@ -1405,10 +1398,17 @@ void gladiatr_state::init_gladiatr() std::swap_ranges(rom + 0x26000, rom + 0x28000, rom + 0x2c000); std::swap_ranges(rom + 0x24000, rom + 0x28000, rom + 0x28000); + // 2 of the bootleg MCU ROM dumps are suspected to be bad, this patch changes + // the 1st byte from 0x26 to 0x22. The init routine makes more sense with it + // and becomes identical to the bootleg ucpu/csnd init routine. Without it, + // the game starts with 1 credit inserted. + *memregion("cctl")->base() = 0x22; + *memregion("ccpu")->base() = 0x22; + membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x10000, 0x6000); membank("bank2")->configure_entries(0, 2, memregion("audiocpu")->base() + 0x10000, 0xc000); - /* make sure bank is valid in cpu-reset */ + // make sure bank is valid in cpu-reset membank("bank2")->set_entry(0); m_tclk_val = false; @@ -1427,15 +1427,15 @@ void gladiatr_state::init_gladiatr() void ppking_state::init_ppking() { - u8 *rom = memregion("gfx2")->base(); // unpack 3bpp graphics + u8 *rom = memregion("gfx2")->base(); for (int i = 0; i < 0x2000; i++) { rom[i+0x2000] = rom[i] >> 4; } - rom = memregion("gfx3")->base(); // unpack 3bpp graphics + rom = memregion("gfx3")->base(); for (int j = 1; j >= 0; j--) { for (int i = 0; i < 0x2000; i++) @@ -1445,9 +1445,8 @@ void ppking_state::init_ppking() } } - rom = memregion("sub")->base(); - // patch audio CPU crash + ROM checksums + rom = memregion("sub")->base(); rom[0x1b9] = 0x00; rom[0x1ba] = 0x00; rom[0x1bb] = 0x00;