mirror of
https://github.com/holub/mame
synced 2025-05-23 22:20:01 +03:00
Updated the Fairchild F3853 SMI device to no longer be legacy. [Harmony]
Non-whatsnew note: This is for MESS. No idea how to work the Chess Champion, either, so I can't really test it, but hey, it builds.
This commit is contained in:
Ryan Holtz
parent
ccda15bbc0
commit
5395f401ef
@ -1,233 +1,288 @@
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/*
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/**********************************************************************
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fairchild f3853 smi static ram interface
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with integrated interrupt controller and timer
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databook found at www.freetradezone.com
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Fairchild F3853 SRAM interface with integrated interrupt
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*/
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controller and timer (SMI)
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This chip is a timer shift register, basically the same as in the
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F3851.
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Based on a datasheet obtained from www.freetradezone.com
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The SMI does not have DC0 and DC1, only DC0; as a result, it does
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not respond to the main CPU's DC0/DC1 swap instruction. This may
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lead to two devices responding to the same DC0 address and
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attempting to place their bytes on the data bus simultaneously!
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8-bit shift register:
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Feedback in0 = !((out3 ^ out4) ^ (out5 ^ out7))
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Interrupts are at 0xfe
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0xff stops the register (0xfe is never reached)
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**********************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "f3853.h"
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#include "f3853.h"
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#include "devhelpr.h"
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/*
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/***************************************************************************
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the smi does not have DC0 and DC1, only DC0
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MACROS
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it is not reacting to the cpus DC0/DC1 swap instruction
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***************************************************************************/
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--> might lead to 2 devices having reacting to the same DC0 address
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and placing their bytes to the databus!
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#define INTERRUPT_VECTOR(external) ( external ? m_low | ( m_high << 8 ) | 0x80 \
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*/
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: ( m_low | ( m_high << 8 ) ) & ~0x80 )
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typedef struct _f3853 f3853_t;
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struct _f3853 {
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const f3853_config *config;
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UINT8 high,low; // bit 7 set to 0 for timer interrupt, to 1 for external interrupt
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/***************************************************************************
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int external_enable;
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IMPLEMENTATION
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int timer_enable;
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***************************************************************************/
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int request_flipflop;
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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int priority_line; /* inverted level*/
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//-------------------------------------------------
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int external_interrupt_line;/* inverted level */
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// f3853_device_config - constructor
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//-------------------------------------------------
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emu_timer *timer;
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f3853_device_config::f3853_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
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};
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: device_config(mconfig, static_alloc_device_config, "F3853", tag, owner, clock)
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/*
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8 bit shift register
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feedback in0 = not ( (out3 xor out4) xor (out5 xor out7) )
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interrupt at 0xfe
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0xff stops register (0xfe never reached!)
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*/
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static UINT8 f3853_value_to_cycle[0x100];
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static TIMER_CALLBACK( f3853_timer_callback );
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#define INTERRUPT_VECTOR(external) ( external ? f3853->low | ( f3853->high << 8 ) | 0x80 \
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: ( f3853->low | ( f3853->high << 8 ) ) & ~0x80 )
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INLINE f3853_t *get_safe_token(running_device *device)
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{
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{
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assert( device != NULL );
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assert( device->type() == F3853 );
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return ( f3853_t * ) downcast<legacy_device_base *>(device)->token();
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}
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}
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static void f3853_set_interrupt_request_line(running_device *device)
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//-------------------------------------------------
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// static_alloc_device_config - allocate a new
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// configuration object
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//-------------------------------------------------
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device_config *f3853_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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return global_alloc(f3853_device_config(mconfig, tag, owner, clock));
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if ( ! f3853->config->interrupt_request )
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return;
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if ( f3853->external_enable && ! f3853->priority_line )
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f3853->config->interrupt_request(device, INTERRUPT_VECTOR(TRUE), TRUE);
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else if ( f3853->timer_enable && ! f3853->priority_line && f3853->request_flipflop)
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f3853->config->interrupt_request(device, INTERRUPT_VECTOR(FALSE), TRUE);
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else
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f3853->config->interrupt_request(device, 0, FALSE);
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}
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}
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static void f3853_timer_start(running_device *device, UINT8 value)
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//-------------------------------------------------
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// alloc_device - allocate a new device object
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//-------------------------------------------------
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device_t *f3853_device_config::alloc_device(running_machine &machine) const
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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return auto_alloc(&machine, f3853_device(machine, *this));
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attotime period = (value != 0xff) ? attotime_mul(ATTOTIME_IN_HZ(device->clock()), f3853_value_to_cycle[value]*31) : attotime_never;
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timer_adjust_oneshot(f3853->timer, period, 0);
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}
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}
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static TIMER_CALLBACK( f3853_timer_callback )
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//-------------------------------------------------
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{
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// device_config_complete - perform any
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running_device *device = (running_device *)ptr;
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// operations now that the configuration is
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f3853_t *f3853 = get_safe_token( device );
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// complete
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//-------------------------------------------------
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if (f3853->timer_enable)
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void f3853_device_config::device_config_complete()
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{
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// inherit a copy of the static data
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const f3853_interface *intf = reinterpret_cast<const f3853_interface *>(static_config());
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if (intf != NULL)
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{
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{
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f3853->request_flipflop = TRUE;
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*static_cast<f3853_interface *>(this) = *intf;
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f3853_set_interrupt_request_line( device );
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}
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}
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f3853_timer_start( device, 0xfe);
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// or initialize to defaults if none provided
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else
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{
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memset(&m_interrupt_request, 0, sizeof(m_interrupt_request));
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}
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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const device_type F3853 = f3853_device_config::static_alloc_device_config;
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//-------------------------------------------------
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// f3853_device - constructor
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//-------------------------------------------------
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f3853_device::f3853_device(running_machine &_machine, const f3853_device_config &config)
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: device_t(_machine, config),
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m_config(config)
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void f3853_device::device_start()
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{
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UINT8 reg = 0xfe;
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for(INT32 i=254 /* Known to get 0xfe after 255 cycles */; i >= 0; i--)
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{
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INT32 o7 = (reg & 0x80) ? TRUE : FALSE;
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INT32 o5 = (reg & 0x20) ? TRUE : FALSE;
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INT32 o4 = (reg & 0x10) ? TRUE : FALSE;
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INT32 o3 = (reg & 0x08) ? TRUE : FALSE;
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m_value_to_cycle[reg] = i;
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reg <<= 1;
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if(!((o7 != o5) != (o4 != o3)))
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{
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reg |= 1;
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}
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}
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m_timer = timer_alloc(&m_machine, f3853_timer_callback, (void *)this );
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state_save_register_device_item(this, 0, m_high );
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state_save_register_device_item(this, 0, m_low );
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state_save_register_device_item(this, 0, m_external_enable );
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state_save_register_device_item(this, 0, m_timer_enable );
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state_save_register_device_item(this, 0, m_request_flipflop );
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state_save_register_device_item(this, 0, m_priority_line );
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state_save_register_device_item(this, 0, m_external_interrupt_line );
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void f3853_device::device_reset()
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{
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m_high = 0;
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m_low = 0;
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m_external_enable = 0;
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m_timer_enable = 0;
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m_request_flipflop = 0;
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m_priority_line = FALSE;
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m_external_interrupt_line = TRUE;
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timer_enable(m_timer, 0);
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}
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void f3853_device::f3853_set_interrupt_request_line()
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{
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if(!m_config.m_interrupt_request)
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{
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return;
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}
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if(m_external_enable && !m_priority_line)
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{
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m_config.m_interrupt_request(this, INTERRUPT_VECTOR(TRUE), TRUE);
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}
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else if( m_timer_enable && !m_priority_line && m_request_flipflop)
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{
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m_config.m_interrupt_request(this, INTERRUPT_VECTOR(FALSE), TRUE);
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}
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else
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{
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m_config.m_interrupt_request(this, 0, FALSE);
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}
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}
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void f3853_device::f3853_timer_start(UINT8 value)
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{
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attotime period = (value != 0xff) ? attotime_mul(ATTOTIME_IN_HZ(clock()), m_value_to_cycle[value]*31) : attotime_never;
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timer_adjust_oneshot(m_timer, period, 0);
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}
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TIMER_CALLBACK( f3853_device::f3853_timer_callback )
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{
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reinterpret_cast<f3853_device*>(ptr)->f3853_timer();
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}
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void f3853_device::f3853_timer()
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{
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if(m_timer_enable)
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{
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m_request_flipflop = TRUE;
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f3853_set_interrupt_request_line();
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}
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f3853_timer_start(0xfe);
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}
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}
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void f3853_set_external_interrupt_in_line(running_device *device, int level)
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void f3853_set_external_interrupt_in_line(running_device *device, int level)
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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downcast<f3853_device*>(device)->f3853_set_external_interrupt_in_line(level);
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}
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if ( f3853->external_interrupt_line && ! level && f3853->external_enable)
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void f3853_device::f3853_set_external_interrupt_in_line(int level)
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f3853->request_flipflop = TRUE;
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{
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f3853->external_interrupt_line = level;
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if(m_external_interrupt_line && !level && m_external_enable)
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f3853_set_interrupt_request_line( device );
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{
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m_request_flipflop = TRUE;
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}
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m_external_interrupt_line = level;
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f3853_set_interrupt_request_line();
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}
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}
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void f3853_set_priority_in_line(running_device *device, int level)
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void f3853_set_priority_in_line(running_device *device, int level)
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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downcast<f3853_device*>(device)->f3853_set_priority_in_line(level);
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}
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f3853->priority_line = level;
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void f3853_device::f3853_set_priority_in_line(int level)
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f3853_set_interrupt_request_line( device );
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{
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m_priority_line = level;
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f3853_set_interrupt_request_line();
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}
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}
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READ8_DEVICE_HANDLER(f3853_r)
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READ8_DEVICE_HANDLER_TRAMPOLINE(f3853, f3853_r)
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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UINT8 data = 0;
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UINT8 data=0;
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switch (offset)
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switch (offset)
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{
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{
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case 0:
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case 0:
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data = f3853->high;
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data = m_high;
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break;
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break;
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case 1:
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case 1:
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data = f3853->low;
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data = m_low;
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break;
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break;
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case 2: // interrupt control; not readable
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case 3: // timer; not readable
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case 2: // Interrupt control; not readable
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case 3: // Timer; not readable
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break;
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break;
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}
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}
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return data;
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return data;
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}
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}
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WRITE8_DEVICE_HANDLER(f3853_w)
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WRITE8_DEVICE_HANDLER_TRAMPOLINE(f3853, f3853_w)
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{
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{
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f3853_t *f3853 = get_safe_token( device );
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switch(offset)
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switch (offset)
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{
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{
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case 0:
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case 0:
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f3853->high = data;
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m_high = data;
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break;
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break;
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case 1:
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case 1:
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f3853->low = data;
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m_low = data;
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break;
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break;
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case 2: //interrupt control
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case 2: //interrupt control
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f3853->external_enable = ((data&3)==1);
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m_external_enable = ((data & 3) == 1);
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f3853->timer_enable = ((data&3)==3);
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m_timer_enable = ((data & 3) == 3);
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f3853_set_interrupt_request_line( device );
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f3853_set_interrupt_request_line();
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break;
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break;
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case 3: //timer
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case 3: //timer
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f3853->request_flipflop = FALSE;
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m_request_flipflop = FALSE;
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f3853_set_interrupt_request_line( device );
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f3853_set_interrupt_request_line();
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f3853_timer_start( device, data );
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f3853_timer_start(data);
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break;
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break;
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}
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}
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}
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}
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static DEVICE_START( f3853 )
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{
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f3853_t *f3853 = get_safe_token( device );
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UINT8 reg=0xfe;
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int i;
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f3853->config = (const f3853_config *)device->baseconfig().static_config();
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for (i=254/*known to get 0xfe after 255 cycles*/; i>=0; i--)
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{
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int o7 = ( reg & 0x80 ) ? TRUE : FALSE;
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int o5 = ( reg & 0x20 ) ? TRUE : FALSE;
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int o4 = ( reg & 0x10 ) ? TRUE : FALSE;
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int o3 = ( reg & 8 ) ? TRUE : FALSE;
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f3853_value_to_cycle[reg]=i;
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reg<<=1;
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if (!((o7!=o5)!=(o4!=o3))) reg|=1;
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}
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f3853->timer = timer_alloc( device->machine, f3853_timer_callback, (void *)device );
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state_save_register_device_item( device, 0, f3853->high );
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state_save_register_device_item( device, 0, f3853->low );
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|
||||||
state_save_register_device_item( device, 0, f3853->external_enable );
|
|
||||||
state_save_register_device_item( device, 0, f3853->timer_enable );
|
|
||||||
state_save_register_device_item( device, 0, f3853->request_flipflop );
|
|
||||||
state_save_register_device_item( device, 0, f3853->priority_line );
|
|
||||||
state_save_register_device_item( device, 0, f3853->external_interrupt_line );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static DEVICE_RESET( f3853 )
|
|
||||||
{
|
|
||||||
f3853_t *f3853 = get_safe_token( device );
|
|
||||||
|
|
||||||
f3853->high = 0;
|
|
||||||
f3853->low = 0;
|
|
||||||
f3853->external_enable = 0;
|
|
||||||
f3853->timer_enable = 0;
|
|
||||||
f3853->request_flipflop = 0;
|
|
||||||
f3853->priority_line = FALSE;
|
|
||||||
f3853->external_interrupt_line = TRUE;
|
|
||||||
|
|
||||||
timer_enable( f3853->timer, 0 );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
DEVICE_GET_INFO( f3853 )
|
|
||||||
{
|
|
||||||
switch ( state )
|
|
||||||
{
|
|
||||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
|
||||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(f3853_t); break;
|
|
||||||
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
|
|
||||||
|
|
||||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
|
||||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(f3853); break;
|
|
||||||
case DEVINFO_FCT_STOP: /* nothing */ break;
|
|
||||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(f3853); break;
|
|
||||||
|
|
||||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
|
||||||
case DEVINFO_STR_NAME: strcpy(info->s, "F3853"); break;
|
|
||||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "F8"); break;
|
|
||||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
|
||||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
|
||||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright the MAME and MESS Teams"); break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
DEFINE_LEGACY_DEVICE(F3853, f3853);
|
|
||||||
|
|||||||
@ -1,41 +1,128 @@
|
|||||||
/*
|
/**********************************************************************
|
||||||
fairchild f3853 static ram interface smi
|
|
||||||
with integrated interrupt controller and timer
|
|
||||||
|
|
||||||
timer shift register basically the same as in f3851!
|
Fairchild F3853 SRAM interface with integrated interrupt
|
||||||
*/
|
controller and timer
|
||||||
|
|
||||||
|
This chip is a timer shift register, basically the same as in the
|
||||||
|
F3851.
|
||||||
|
|
||||||
|
**********************************************************************/
|
||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#ifndef __F3853_H__
|
#ifndef __F3853_H__
|
||||||
#define __F3853_H__
|
#define __F3853_H__
|
||||||
|
|
||||||
#include "devlegcy.h"
|
#include "emu.h"
|
||||||
|
|
||||||
DECLARE_LEGACY_DEVICE(F3853, f3853);
|
|
||||||
|
|
||||||
/***************************************************************************
|
|
||||||
TYPE DEFINITIONS
|
|
||||||
***************************************************************************/
|
|
||||||
|
|
||||||
typedef struct _f3853_config f3853_config;
|
|
||||||
struct _f3853_config
|
|
||||||
{
|
|
||||||
void (*interrupt_request)(running_device *device, UINT16 addr, int level);
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***************************************************************************
|
|
||||||
DEVICE CONFIGURATION MACROS
|
|
||||||
***************************************************************************/
|
//**************************************************************************
|
||||||
|
// INTERFACE CONFIGURATION MACROS
|
||||||
|
//**************************************************************************
|
||||||
|
|
||||||
#define MDRV_F3853_ADD(_tag, _clock, _intrf) \
|
#define MDRV_F3853_ADD(_tag, _clock, _intrf) \
|
||||||
MDRV_DEVICE_ADD(_tag, F3853, _clock) \
|
MDRV_DEVICE_ADD(_tag, F3853, _clock) \
|
||||||
MDRV_DEVICE_CONFIG(_intrf)
|
MDRV_DEVICE_CONFIG(_intrf)
|
||||||
|
|
||||||
|
|
||||||
READ8_DEVICE_HANDLER(f3853_r);
|
|
||||||
WRITE8_DEVICE_HANDLER(f3853_w);
|
/***************************************************************************
|
||||||
|
TYPE DEFINITIONS
|
||||||
|
***************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
// ======================> f3853_interface
|
||||||
|
|
||||||
|
struct f3853_interface
|
||||||
|
{
|
||||||
|
void (*m_interrupt_request)(running_device *device, UINT16 addr, int level);
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
// ======================> f3853_device_config
|
||||||
|
|
||||||
|
class f3853_device_config : public device_config,
|
||||||
|
public f3853_interface
|
||||||
|
{
|
||||||
|
friend class f3853_device;
|
||||||
|
|
||||||
|
// construction/destruction
|
||||||
|
f3853_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||||
|
|
||||||
|
public:
|
||||||
|
// allocators
|
||||||
|
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||||
|
virtual device_t *alloc_device(running_machine &machine) const;
|
||||||
|
|
||||||
|
protected:
|
||||||
|
// device_config overrides
|
||||||
|
virtual void device_config_complete();
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
// ======================> f3853_device
|
||||||
|
|
||||||
|
class f3853_device : public device_t
|
||||||
|
{
|
||||||
|
friend class f3853_device_config;
|
||||||
|
|
||||||
|
// construction/destruction
|
||||||
|
f3853_device(running_machine &_machine, const f3853_device_config &_config);
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
UINT8 f3853_r(UINT32 offset);
|
||||||
|
void f3853_w(UINT32 offset, UINT8 data);
|
||||||
|
|
||||||
|
void f3853_set_external_interrupt_in_line(int level);
|
||||||
|
void f3853_set_priority_in_line(int level);
|
||||||
|
|
||||||
|
protected:
|
||||||
|
// device-level overrides
|
||||||
|
virtual void device_start();
|
||||||
|
virtual void device_reset();
|
||||||
|
virtual void device_post_load() { }
|
||||||
|
virtual void device_clock_changed() { }
|
||||||
|
|
||||||
|
static TIMER_CALLBACK( f3853_timer_callback );
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
void f3853_set_interrupt_request_line();
|
||||||
|
void f3853_timer_start(UINT8 value);
|
||||||
|
void f3853_timer();
|
||||||
|
|
||||||
|
UINT8 m_high;
|
||||||
|
UINT8 m_low; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
|
||||||
|
INT32 m_external_enable;
|
||||||
|
INT32 m_timer_enable;
|
||||||
|
|
||||||
|
INT32 m_request_flipflop;
|
||||||
|
|
||||||
|
INT32 m_priority_line; /* inverted level*/
|
||||||
|
INT32 m_external_interrupt_line; /* inverted level */
|
||||||
|
|
||||||
|
emu_timer *m_timer;
|
||||||
|
|
||||||
|
UINT8 m_value_to_cycle[0x100];
|
||||||
|
|
||||||
|
const f3853_device_config &m_config;
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
// device type definition
|
||||||
|
extern const device_type F3853;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/***************************************************************************
|
||||||
|
PROTOTYPES
|
||||||
|
***************************************************************************/
|
||||||
|
|
||||||
|
READ8_DEVICE_HANDLER( f3853_r );
|
||||||
|
WRITE8_DEVICE_HANDLER( f3853_w );
|
||||||
|
|
||||||
void f3853_set_external_interrupt_in_line(running_device *device, int level);
|
void f3853_set_external_interrupt_in_line(running_device *device, int level);
|
||||||
void f3853_set_priority_in_line(running_device *device, int level);
|
void f3853_set_priority_in_line(running_device *device, int level);
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user