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(MESS) megadriv.c: removed drivers gensvp, mdsvp and mdsvpj: Virtua Racing can

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now be loaded directly in genesis, megadriv and megadrij [Fabio Priuli]
This commit is contained in:
Fabio Priuli 2013-03-23 11:53:31 +00:00
parent b139a66a78
commit 5409bd67cd
6 changed files with 11 additions and 449 deletions
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1
.gitattributes vendored
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@ -7316,7 +7316,6 @@ src/mess/machine/md_stm95.c svneol=native#text/plain
src/mess/machine/md_stm95.h svneol=native#text/plain
src/mess/machine/md_svp.c svneol=native#text/plain
src/mess/machine/md_svp.h svneol=native#text/plain
src/mess/machine/megasvp.c svneol=native#text/plain
src/mess/machine/mface2.c svneol=native#text/plain
src/mess/machine/mface2.h svneol=native#text/plain
src/mess/machine/microdrv.c svneol=native#text/plain

7
hash/megadriv.xml
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@ -7474,7 +7474,6 @@ Info on Sega chip labels (from Sunbeam / Digital Corruption)
<!-- Old scrambled/interleaved dumps -->
<software name="13mahjan">
@ -29937,7 +29936,7 @@ Notice that these are not working on real hardware due to bugged code with VDP i
<sharedfeat name="compatibility" value="PAL" />
<sharedfeat name="addon" value="SVP" />
<part name="cart" interface="megadriv_cart">
<feature name="slot" value="rom" />
<feature name="slot" value="rom_svp" />
<dataarea name="rom" size="2097152">
<rom name="mpr-16420.bin" size="2097152" crc="9624d4ef" sha1="2c3812f8a010571e51269a33a989598787d27c2d" offset="000000" loadflag="load16_word_swap" />
</dataarea>
@ -29955,7 +29954,7 @@ Notice that these are not working on real hardware due to bugged code with VDP i
<sharedfeat name="compatibility" value="EUR-JPN" />
<sharedfeat name="addon" value="SVP" />
<part name="cart" interface="megadriv_cart">
<feature name="slot" value="rom" />
<feature name="slot" value="rom_svp" />
<dataarea name="rom" size="2097152">
<rom name="mpr-16389.bin" size="2097152" crc="53a293b5" sha1="0ad38a3ab1cc99edac72184f8ae420e13df5cac6" offset="000000" loadflag="load16_word_swap" />
</dataarea>
@ -29970,7 +29969,7 @@ Notice that these are not working on real hardware due to bugged code with VDP i
<sharedfeat name="compatibility" value="NTSC-U" />
<sharedfeat name="addon" value="SVP" />
<part name="cart" interface="megadriv_cart">
<feature name="slot" value="rom" />
<feature name="slot" value="rom_svp" />
<dataarea name="rom" size="2097152">
<rom name="virtua racing (usa).bin" size="2097152" crc="7e1a324a" sha1="ff969ae53120cc4e7cb1a8a7e47458f2eb8a2165" offset="000000" loadflag="load16_word_swap" />
</dataarea>

85
src/mess/drivers/megadriv.c
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@ -298,18 +298,13 @@ static MACHINE_START( ms_megadriv )
md_cons_state *state = machine.driver_data<md_cons_state>();
mess_init_6buttons_pad(machine);
// small hack, until SVP is converted to be a slot device
if (machine.device<cpu_device>("svp") != NULL)
svp_init(machine);
else
{
vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_console;
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7fffff, read16_delegate(FUNC(base_md_cart_slot_device::read),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a13),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a13),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a15),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a15),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)state->m_slotcart));
}
vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_console;
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7fffff, read16_delegate(FUNC(base_md_cart_slot_device::read),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a13),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a13),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a15),(base_md_cart_slot_device*)state->m_slotcart), write16_delegate(FUNC(base_md_cart_slot_device::write_a15),(base_md_cart_slot_device*)state->m_slotcart));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)state->m_slotcart));
}
static MACHINE_RESET( ms_megadriv )
@ -319,7 +314,7 @@ static MACHINE_RESET( ms_megadriv )
static SLOT_INTERFACE_START(md_cart)
SLOT_INTERFACE_INTERNAL("rom", MD_STD_ROM)
SLOT_INTERFACE_INTERNAL("rom_svp", MD_ROM_SVP) // in progress...
SLOT_INTERFACE_INTERNAL("rom_svp", MD_ROM_SVP)
SLOT_INTERFACE_INTERNAL("rom_sk", MD_ROM_SK)
// NVRAM handling
SLOT_INTERFACE_INTERNAL("rom_sram", MD_ROM_SRAM)
@ -423,21 +418,6 @@ ROM_START(megadrij)
ROM_END
ROM_START(gensvp)
ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
ROM_END
ROM_START(mdsvp)
ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
ROM_END
ROM_START(mdsvpj)
ROM_REGION(MD_CPU_REGION_SIZE, "maincpu", ROMREGION_ERASEFF)
ROM_REGION( 0x10000, "soundcpu", ROMREGION_ERASEFF)
ROM_END
/*************************************
*
* Driver initialization
@ -821,49 +801,6 @@ ROM_START( 32x_scd )
ROM_LOAD( "32x_s_bios.bin", 0x000000, 0x000400, CRC(bfda1fe5) SHA1(4103668c1bbd66c5e24558e73d4f3f92061a109a) )
ROM_END
/****************************************** SVP emulation *****************************************/
INPUT_PORTS_START( megdsvp )
PORT_INCLUDE( megadriv )
PORT_START("MEMORY_TEST") /* special memtest mode */
/* Region setting for Console */
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Test ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
INPUT_PORTS_END
static MACHINE_CONFIG_START( megdsvp, mdsvp_state )
MCFG_FRAGMENT_ADD( md_ntsc )
MCFG_CPU_ADD("svp", SSP1601, MASTER_CLOCK_NTSC / 7 * 3) /* ~23 MHz (guessed) */
MCFG_CPU_PROGRAM_MAP(svp_ssp_map)
MCFG_CPU_IO_MAP(svp_ext_map)
/* IRQs are not used by this CPU */
MCFG_MACHINE_START( ms_megadriv )
MCFG_MACHINE_RESET( ms_megadriv )
MCFG_MD_CARTRIDGE_ADD("mdslot", md_cart, NULL, NULL)
MCFG_SOFTWARE_LIST_ADD("cart_list","megadriv")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( megdsvp_pal, mdsvp_state )
MCFG_FRAGMENT_ADD( md_pal )
MCFG_CPU_ADD("svp", SSP1601, MASTER_CLOCK_PAL / 7 * 3) /* ~23 MHz (guessed) */
MCFG_CPU_PROGRAM_MAP(svp_ssp_map)
MCFG_CPU_IO_MAP(svp_ext_map)
/* IRQs are not used by this CPU */
MCFG_MACHINE_START( ms_megadriv )
MCFG_MACHINE_RESET( ms_megadriv )
MCFG_MD_CARTRIDGE_ADD("mdslot", md_cart, NULL, NULL)
MCFG_SOFTWARE_LIST_ADD("cart_list","megadriv")
MACHINE_CONFIG_END
/****************************************** PICO emulation ****************************************/
@ -1125,12 +1062,6 @@ CONS( 1989, genesis, 0, 0, ms_megadriv, md, md_cons_state,
CONS( 1990, megadriv, genesis, 0, ms_megadpal, md, md_cons_state, md_eur, "Sega", "Mega Drive (Europe, PAL)", 0)
CONS( 1988, megadrij, genesis, 0, ms_megadriv, md, md_cons_state, md_jpn, "Sega", "Mega Drive (Japan, NTSC)", 0)
// these should not exist, the SVP hardware is in the cart and should be installed dynamically when selected from the Software List
// this however involves installing entire CPUs at run/load time and I don't think we can do that.
CONS( 1993, gensvp, genesis, 0, megdsvp, md, md_cons_state, genesis, "Sega", "Genesis (USA, NTSC, for SVP cart)", 0)
CONS( 1990, mdsvp, genesis, 0, megdsvp_pal, md, md_cons_state, md_eur, "Sega", "Mega Drive (Europe, PAL, for SVP cart)", 0)
CONS( 1988, mdsvpj, genesis, 0, megdsvp, md, md_cons_state, md_jpn, "Sega", "Mega Drive (Japan, NTSC, for SVP cart)", 0)
// the 32X plugged in the cart slot, games plugged into the 32x. Maybe it should be handled as an expansion device?
CONS( 1994, 32x, 0, 0, genesis_32x, md, md_cons_state, genesis, "Sega", "Genesis with 32X (USA, NTSC)", GAME_NOT_WORKING )
CONS( 1994, 32xe, 32x, 0, md_32x, md, md_cons_state, md_eur, "Sega", "Mega Drive with 32X (Europe, PAL)", GAME_NOT_WORKING )

363
src/mess/machine/megasvp.c
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@ -1,363 +0,0 @@
/* Megadrive SVP emulation (Virtua Racing) */
#include "includes/md.h"
/****************************************** SVP related *****************************************/
/*
* Emulator of memory controller in SVP chip
*
* Copyright 2008, Grazvydas Ignotas
* based on RE work by Tasco Deluxe
*
* SSP1601 EXT registers are mapped as I/O ports due to their function
* (they are interfaced through external bus), and are named as follows
* (these are unofficial names, official ones are unknown):
* EXT0: PM0 - programmable register 0
* EXT1: PM1 - ... 1
* EXT2: PM2 - ... 2
* EXT3: XST - external status. Can also act as PM.
* EXT4: PM4 - ... 4
* EXT5: (unused)
* EXT6: PMC - programmable memory register control (PMAC).
* EXT7: AL - although internal to SSP1601, it still causes bus access
*
* Depending on GPO bits in status register, PM0, PM1, PM2 and XST can act as
* external status registers, os as programmable memory registers. PM4 always
* acts as PM register (independent on GPO bits).
*/
#define SSP_PMC_HAVE_ADDR 1 // address written to PMAC, waiting for mode
#define SSP_PMC_SET 2 // PMAC is set, PMx can be programmed
static int get_inc(int mode)
{
int inc = (mode >> 11) & 7;
if (inc != 0) {
if (inc != 7) inc--;
inc = 1 << inc; // 0 1 2 4 8 16 32 128
if (mode & 0x8000) inc = -inc; // decrement mode
}
return inc;
}
INLINE void overwrite_write(UINT16 *dst, UINT16 d)
{
if (d & 0xf000) { *dst &= ~0xf000; *dst |= d & 0xf000; }
if (d & 0x0f00) { *dst &= ~0x0f00; *dst |= d & 0x0f00; }
if (d & 0x00f0) { *dst &= ~0x00f0; *dst |= d & 0x00f0; }
if (d & 0x000f) { *dst &= ~0x000f; *dst |= d & 0x000f; }
}
static UINT32 pm_io(address_space &space, int reg, int write, UINT32 d)
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
if (state->m_emu_status & SSP_PMC_SET)
{
if (write)
state->m_pmac_write[reg] = state->m_pmc.d;
else
state->m_pmac_read[reg] = state->m_pmc.d;
state->m_emu_status &= ~SSP_PMC_SET;
return 0;
}
// just in case
if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
}
if (reg == 4 || (space.device().state().state_int(SSP_ST) & 0x60))
{
#define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
UINT16 *dram = (UINT16 *)state->m_dram;
if (write)
{
int mode = state->m_pmac_write[reg]>>16;
int addr = state->m_pmac_write[reg]&0xffff;
if ((mode & 0x43ff) == 0x0018) // DRAM
{
int inc = get_inc(mode);
if (mode & 0x0400) {
overwrite_write(&dram[addr], d);
} else dram[addr] = d;
state->m_pmac_write[reg] += inc;
}
else if ((mode & 0xfbff) == 0x4018) // DRAM, cell inc
{
if (mode & 0x0400) {
overwrite_write(&dram[addr], d);
} else dram[addr] = d;
state->m_pmac_write[reg] += (addr&1) ? 31 : 1;
}
else if ((mode & 0x47ff) == 0x001c) // IRAM
{
int inc = get_inc(mode);
((UINT16 *)state->m_iram)[addr&0x3ff] = d;
state->m_pmac_write[reg] += inc;
}
else
{
logerror("ssp FIXME: PM%i unhandled write mode %04x, [%06x] %04x\n",
reg, mode, CADDR, d);
}
}
else
{
int mode = state->m_pmac_read[reg]>>16;
int addr = state->m_pmac_read[reg]&0xffff;
if ((mode & 0xfff0) == 0x0800) // ROM, inc 1, verified to be correct
{
UINT16 *ROM = (UINT16 *) space.machine().root_device().memregion("maincpu")->base();
state->m_pmac_read[reg] += 1;
d = ROM[addr|((mode&0xf)<<16)];
}
else if ((mode & 0x47ff) == 0x0018) // DRAM
{
int inc = get_inc(mode);
d = dram[addr];
state->m_pmac_read[reg] += inc;
}
else
{
logerror("ssp FIXME: PM%i unhandled read mode %04x, [%06x]\n",
reg, mode, CADDR);
d = 0;
}
}
// PMC value corresponds to last PMR accessed (not sure).
if (write)
state->m_pmc.d = state->m_pmac_write[reg];
else
state->m_pmc.d = state->m_pmac_read[reg];
return d;
}
return (UINT32)-1;
}
static READ16_HANDLER( read_PM0 )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 d = pm_io(space, 0, 0, 0);
if (d != (UINT32)-1) return d;
d = state->m_XST2;
state->m_XST2 &= ~2; // ?
return d;
}
static WRITE16_HANDLER( write_PM0 )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 r = pm_io(space, 0, 1, data);
if (r != (UINT32)-1) return;
state->m_XST2 = data; // ?
}
static READ16_HANDLER( read_PM1 )
{
UINT32 r = pm_io(space, 1, 0, 0);
if (r != (UINT32)-1) return r;
logerror("svp: PM1 acces in non PM mode?\n");
return 0;
}
static WRITE16_HANDLER( write_PM1 )
{
UINT32 r = pm_io(space, 1, 1, data);
if (r != (UINT32)-1) return;
logerror("svp: PM1 acces in non PM mode?\n");
}
static READ16_HANDLER( read_PM2 )
{
UINT32 r = pm_io(space, 2, 0, 0);
if (r != (UINT32)-1) return r;
logerror("svp: PM2 acces in non PM mode?\n");
return 0;
}
static WRITE16_HANDLER( write_PM2 )
{
UINT32 r = pm_io(space, 2, 1, data);
if (r != (UINT32)-1) return;
logerror("svp: PM2 acces in non PM mode?\n");
}
static READ16_HANDLER( read_XST )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 d = pm_io(space, 3, 0, 0);
if (d != (UINT32)-1) return d;
return state->m_XST;
}
static WRITE16_HANDLER( write_XST )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 r = pm_io(space, 3, 1, data);
if (r != (UINT32)-1) return;
state->m_XST2 |= 1;
state->m_XST = data;
}
static READ16_HANDLER( read_PM4 )
{
return pm_io(space, 4, 0, 0);
}
static WRITE16_HANDLER( write_PM4 )
{
pm_io(space, 4, 1, data);
}
static READ16_HANDLER( read_PMC )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
state->m_emu_status |= SSP_PMC_SET;
state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
return ((state->m_pmc.w.l << 4) & 0xfff0) | ((state->m_pmc.w.l >> 4) & 0xf);
} else {
state->m_emu_status |= SSP_PMC_HAVE_ADDR;
return state->m_pmc.w.l;
}
}
static WRITE16_HANDLER( write_PMC )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
state->m_emu_status |= SSP_PMC_SET;
state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
state->m_pmc.w.h = data;
} else {
state->m_emu_status |= SSP_PMC_HAVE_ADDR;
state->m_pmc.w.l = data;
}
}
static READ16_HANDLER( read_AL )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
state->m_emu_status &= ~(SSP_PMC_SET|SSP_PMC_HAVE_ADDR);
return 0;
}
static WRITE16_HANDLER( write_AL )
{
}
static READ16_HANDLER( svp_68k_io_r )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 d;
switch (offset)
{
// 0xa15000, 0xa15002
case 0:
case 1: return state->m_XST;
// 0xa15004
case 2: d = state->m_XST2; state->m_XST2 &= ~1; return d;
default: logerror("unhandled SVP reg read @ %x\n", offset<<1);
}
return 0;
}
static WRITE16_HANDLER( svp_68k_io_w )
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
switch (offset)
{
// 0xa15000, 0xa15002
case 0:
case 1: state->m_XST = data; state->m_XST2 |= 2; break;
// 0xa15006
case 3: break; // possibly halts SSP1601
default: logerror("unhandled SVP reg write %04x @ %x\n", data, offset<<1);
}
}
static READ16_HANDLER( svp_68k_cell1_r )
{
// this is rewritten 68k test code
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 a1 = offset;
a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
return ((UINT16 *)state->m_dram)[a1];
}
static READ16_HANDLER( svp_68k_cell2_r )
{
// this is rewritten 68k test code
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
UINT32 a1 = offset;
a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
return ((UINT16 *)state->m_dram)[a1];
}
ADDRESS_MAP_START( svp_ssp_map, AS_PROGRAM, 16, driver_device )
AM_RANGE(0x0000, 0x03ff) AM_ROMBANK("bank3")
AM_RANGE(0x0400, 0xffff) AM_ROMBANK("bank4")
ADDRESS_MAP_END
ADDRESS_MAP_START( svp_ext_map, AS_IO, 16, driver_device )
ADDRESS_MAP_GLOBAL_MASK(0xf)
AM_RANGE(0*2, 0*2+1) AM_READWRITE_LEGACY(read_PM0, write_PM0)
AM_RANGE(1*2, 1*2+1) AM_READWRITE_LEGACY(read_PM1, write_PM1)
AM_RANGE(2*2, 2*2+1) AM_READWRITE_LEGACY(read_PM2, write_PM2)
AM_RANGE(3*2, 3*2+1) AM_READWRITE_LEGACY(read_XST, write_XST)
AM_RANGE(4*2, 4*2+1) AM_READWRITE_LEGACY(read_PM4, write_PM4)
AM_RANGE(6*2, 6*2+1) AM_READWRITE_LEGACY(read_PMC, write_PMC)
AM_RANGE(7*2, 7*2+1) AM_READWRITE_LEGACY(read_AL, write_AL)
ADDRESS_MAP_END
static READ16_HANDLER( svp_speedup_r )
{
space.device().execute().spin_until_time(attotime::from_usec(100));
return 0x0425;
}
void svp_init(running_machine &machine)
{
mdsvp_state *state = machine.driver_data<mdsvp_state>();
UINT8 *ROM = state->memregion("maincpu")->base();
memset(state->m_pmac_read, 0, ARRAY_LENGTH(state->m_pmac_read));
memset(state->m_pmac_write, 0, ARRAY_LENGTH(state->m_pmac_write));
state->m_pmc.d = 0;
state->m_pmc.w.l = 0;
state->m_pmc.w.h = 0;
state->m_emu_status = 0;
state->m_XST = 0;
state->m_XST2 = 0;
/* SVP stuff */
state->m_dram = auto_alloc_array(machine, UINT8, 0x20000);
machine.device("maincpu")->memory().space(AS_PROGRAM).install_ram(0x300000, 0x31ffff, state->m_dram);
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa15000, 0xa150ff, FUNC(svp_68k_io_r), FUNC(svp_68k_io_w));
// "cell arrange" 1 and 2
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x390000, 0x39ffff, FUNC(svp_68k_cell1_r));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x3a0000, 0x3affff, FUNC(svp_68k_cell2_r));
machine.device("svp")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x438, 0x438, FUNC(svp_speedup_r));
if (state->m_slotcart->m_cart->get_rom_base() != NULL)
memcpy(ROM, state->m_slotcart->m_cart->get_rom_base(), state->m_slotcart->m_cart->get_rom_size());
state->m_iram = auto_alloc_array(machine, UINT8, 0x800);
memset(state->m_iram, 0, sizeof(UINT8) * 0x800);
state->membank("bank3")->set_base(state->m_iram);
/* SVP ROM just shares m68k region.. */
state->membank("bank4")->set_base(ROM + 0x800);
}

3
src/mess/mess.lst
View File

@ -98,9 +98,6 @@ smssdisp // Sega Master System Store Display Unit
megadrij // 1988 Sega Mega Drive (Japan)
genesis // 1989 Sega Genesis (USA)
gensvp // 1993 Sega Genesis (USA w/SVP chip)
mdsvp
mdsvpj
megadriv // 1990 Sega Mega Drive (Europe)
pico // 1994 Sega Pico (Europe)
picou // 1994 Sega Pico (USA)

1
src/mess/mess.mak
View File

@ -1630,7 +1630,6 @@ $(MESSOBJ)/sega.a: \
$(MESS_MACHINE)/md_jcart.o \
$(MESS_MACHINE)/md_stm95.o \
$(MESS_MACHINE)/md_svp.o \
$(MESS_MACHINE)/megasvp.o \
$(MESS_DRIVERS)/megadriv.o \
$(MESS_DRIVERS)/dccons.o \
$(MAME_MACHINE)/gdrom.o \