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Revert "Merge branch 'master' of https://github.com/mamedev/mame"

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This reverts commit f537428e5a, reversing
changes made to 0d70d79810.
This commit is contained in:
Firehawke 2017-12-13 21:01:10 -07:00
parent f537428e5a
commit 54155441e9
745 changed files with 13091 additions and 24375 deletions
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2
docs/source/license.rst
View File

@ -4,7 +4,7 @@ The MAME License
The MAME project as a whole is distributed under the terms of the `GNU General Public License, version 2 or later <http://opensource.org/licenses/GPL-2.0>`_ (GPL-2.0+), since it contains code made available under multiple GPL-compatible licenses. A great majority of files (over 90% including core files) are under the `BSD-3-Clause License <http://opensource.org/licenses/BSD-3-Clause>`_ and we would encourage new contributors to distribute files under this license.
Please note that MAME is a registered trademark of Gregory Ember, and permission is required to use the "MAME" name, logo, or wordmark.
Please note that MAME is a registered trademark of Nicola Salmoria, and permission is required to use the "MAME" name, logo, or wordmark.
Copyright (C) 1997-2017 MAMEDev and contributors

26
docs/source/techspecs/device_rom_interface.rst
View File

@ -15,7 +15,7 @@ as rom. In the region/block cases, banking is automatically handled.
2. Setup
--------
| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, u8 datawidth = 8)
| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, UINT8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, UINT8 datawidth = 8)
The constructor of the interface wants, in addition to the standard
parameters, the address bus width of the dedicated bus. In addition
@ -41,16 +41,7 @@ rom description for the system, it will be automatically picked up as
the connected rom. An address map has priority over the region if
present in the machine config.
| void **set_rom_endianness**\ (endianness_t endian)
| void **set_rom_data_width**\ (u8 width)
| void **set_rom_addr_width**\ (u8 width)
These methods, intended for generic devices with indefinite hardware
specifications, override the endianness, data bus width and address
bus width assigned through the constructor. They must be called from
within the device before **config_complete** time.
| void **set_rom**\ (const void \*base, u32 size);
| void **set_rom**\ (const void \*base, UINT32 size);
At any time post- **interface_pre_start**, a memory block can be
setup as the connected rom with that method. It overrides any
@ -60,10 +51,10 @@ times.
3. Rom access
-------------
| u8 **read_byte**\ (offs_t byteaddress)
| u16 **read_word**\ (offs_t byteaddress)
| u32 **read_dword**\ (offs_t byteaddress)
| u64 **read_qword**\ (offs_t byteaddress)
| UINT8 **read_byte**\ (offs_t byteaddress)
| UINT16 **read_word**\ (offs_t byteaddress)
| UINT32 **read_dword**\ (offs_t byteaddress)
| UINT64 **read_qword**\ (offs_t byteaddress)
These methods provide read access to the connected rom. Out-of-bounds
access results in standard unmapped read logerror messages.
@ -85,8 +76,3 @@ Using that interface makes the device derive from
**device_memory_interface**. If the device wants to actually use the
memory interface for itself, remember that AS_0/AS_PROGRAM is used by
the rom interface, and don't forget to upcall **memory_space_config**.
For devices which have outputs that can be used to address ROMs but
only to forward the data to another device for processing, it may be
helpful to disable the interface when it is not required. This can be
done by overriding **memory_space_config** to return an empty vector.

2
docs/source/whatis.rst
View File

@ -8,7 +8,7 @@ MAME's purpose is to preserve decades of software history. As electronic technol
|
| **MAME(R)**
| **Copyright (c) 1997-2017 by Nicola Salmoria and the MAME team**
| **MAME is a trademark owned by Gregory Ember**
| **MAME is a trademark owned by Nicola Salmoria**
|

5
hash/fmtowns_cd.xml
View File

@ -8614,6 +8614,7 @@ User/save disks that can be created from the game itself are not included.
<!--
Originally labeled as "mp3 source". It probably needs a redump.
Also, the floppy disk seems to be an overdump.
-->
<software name="sspirits">
<!--
@ -8627,8 +8628,8 @@ User/save disks that can be created from the game itself are not included.
<info name="release" value="199509xx" />
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="Boot Disk" />
<dataarea name="flop" size="1261568">
<rom name="samurai spirits (boot disk).bin" size="1261568" crc="7d10e903" sha1="5893035421003ce336e7516863c3c17a3ed86c0b" offset="000000" />
<dataarea name="flop" size="1281280">
<rom name="samurai spirits (boot disk).bin" size="1281280" crc="2f1793ac" sha1="bd0f7f5f3fc4b0bd58d04812449cae853b58b5a8" offset="000000" />
</dataarea>
</part>
<part name="cdrom" interface="fmt_cdrom">

53
hash/ibm5150.xml
View File

@ -6168,57 +6168,8 @@ has been replaced with an all-zero block. -->
</part>
</software>
<software name="azurebndb" cloneof="azurebnd">
<description>Advanced Dungeons &amp; Dragons - Curse of the Azure Bonds (V1.0)</description>
<year>1989</year>
<publisher>SSI</publisher>
<info name="developer" value="SSI" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Curse of the Azure Bonds (V1.0) [SSI] [1989] [5.25DD] [disk A].img" size="368640" crc="37a54248" sha1="81c63263b52a39d2e38ab1fb71ab4568fe1419c2" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Curse of the Azure Bonds (V1.0) [SSI] [1989] [5.25DD] [disk B].img" size="368640" crc="014bb852" sha1="73eea7540f6edc512ed89d73d7faefe0abd8400a" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Curse of the Azure Bonds (V1.0) [SSI] [1989] [5.25DD] [disk C].img" size="368640" crc="f86fea1b" sha1="b1e1f4daa42abb7738309bfc4afad65d2883a5e8" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Curse of the Azure Bonds (V1.0) [SSI] [1989] [5.25DD] [disk D].img" size="368640" crc="7aa75fa1" sha1="62659d805a255fa640e4a24ffb7dcff51a4da68e" offset="0"/>
</dataarea>
</part>
</software>
<software name="poolrad">
<description>Advanced Dungeons &amp; Dragons - Pool of Radiance (5.25")</description>
<year>1988</year>
<publisher>SSI</publisher>
<info name="developer" value="SSI" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Pool of Radiance [1988] [SSI] [5.25DD] [disk A].img" size="368640" crc="83b031fa" sha1="7b3bd9c4e37b925a9bed895317aefcfe1298f206" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Pool of Radiance [1988] [SSI] [5.25DD] [disk B].img" size="368640" crc="82ae7aed" sha1="71bc17c47ecbb42d650fc6797b8cccfba7876f99" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Pool of Radiance [1988] [SSI] [5.25DD] [disk C].img" size="368640" crc="c10a2962" sha1="0452af2639973bda8630cc5f13333e63f7677537" offset="0"/>
</dataarea>
</part>
</software>
<software name="poolrad35" cloneof="poolrad">
<description>Advanced Dungeons &amp; Dragons - Pool of Radiance (3.5")</description>
<description>Advanced Dungeons &amp; Dragons - Pool of Radiance</description>
<year>1988</year>
<publisher>SSI</publisher>
<info name="version" value="1.2" />
@ -8260,9 +8211,9 @@ has been replaced with an all-zero block. -->
<software name="nightmar">
<description>A Nightmare on Elm Street</description>
<year>1989</year>
<publisher>Monarch Software</publisher>
<info name="version" value="2.00" />
<info name="developer" value="Westwood Associates" />
<publisher>Monarch Software</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="A Nightmare on Elm Street (USA) (v2.00) (Disk 1).img" size="368640" crc="fed37ad6" sha1="f0adcd8164d3bdc7bb2ca742067ce1cc3ea1a4c2" offset="0"/>

111
hash/ibm5170.xml
View File

@ -4511,71 +4511,6 @@
</part>
</software>
<software name="gravutil">
<!-- included with UltraSound MAX card; includes Commander Keen 4 shareware -->
<description>Gravis Utilities V2.1</description>
<year>1993</year>
<publisher>Advanced Gravis</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="GravisUtilities.img" size="737280" crc="35973f99" sha1="74a4bf84ba452f3d86420dcf28f9dd5b0d0aa19e" offset="0"/>
</dataarea>
</part>
</software>
<software name="ultrasnd">
<description>Gravis UltraSound (GUS) Installation - V3.53</description>
<year>1994</year>
<publisher>Advanced Gravis</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk1.img" size="1474560" crc="d1a8b7ab" sha1="e0027ee4cc10077a97d1e21e250bf159253b345f" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk2.img" size="1474560" crc="7b7e4f0e" sha1="1eb3fd5564dae4e5993a2c9f3398c5a260b197a5" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk3.img" size="1474560" crc="c57f118e" sha1="715d5769729bc7b15b03748c1c63e092393dbfa6" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk4.img" size="1474560" crc="1fafddb9" sha1="4cc40f709be068156b62029336acd03f7afa016b" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk5.img" size="1474560" crc="c6f8c717" sha1="04f275b0e0cbb676cea73597a1516afae2eb4b9b" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="353_Disk6.img" size="1474560" crc="59b15abe" sha1="35e485e64dd4828a935a25a8cf71fcfb11d371ec" offset="0"/>
</dataarea>
</part>
</software>
<software name="gusbonus" supported="no">
<!-- includes WinSoft Sound Station, UltraSound Studio -->
<description>Gravis UltraSound BONUS Software Installation v. 1.52</description>
<year>1994</year>
<publisher>Advanced Gravis</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="bonus152_1.img" size="1474560" crc="b6fdc5b1" sha1="72c66435c1af013ccfe7be1031eeccc01311be31" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="bonus152_2.img" size="1474560" crc="af96295d" sha1="5927d4503dc27accc6602f01bfea1530b8af35a0" offset="0"/>
</dataarea>
</part>
</software>
<software name="hscd414">
<description>High-Speed CD-ROM Driver (Version 4.14)</description>
<year>199?</year>
@ -9439,9 +9374,9 @@
<!-- Dumped via Kryoflux from original disks, all tracks show as modified -->
<description>WarCraft - Orcs &amp; Humans</description>
<year>1994</year>
<publisher>Interplay</publisher>
<info name="version" value="1.05" />
<info name="developer" value="Blizzard Entertainment" />
<publisher>Interplay</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="[PC] Warcraft Orcs and Humans [3.5HD] [Disk 1 of 4].img" size="1474560" crc="528d9208" sha1="4a3fb4cf21acce1a51754e4cdd29d906d6cff6c4" offset="0"/>
@ -10211,48 +10146,4 @@
</part>
</software>
<software name="l123r3">
<!-- missing all other disks -->
<description>Lotus 1-2-3 Release 3</description>
<year>1989</year>
<publisher>Lotus Development</publisher>
<part name="flop1" interface="floppy_3_5">
<!--
Lotus 1-2-3 Release 3
Drivers Disk 2
(C) Copyright 1989 Lotus Development Corporation.
All rights reserved. Part No. 100007L
-->
<feature name="part_id" value="Drivers Disk 2"/>
<dataarea name="flop" size="737280">
<rom name="100007l.img" size="737280" crc="bd2be994" sha1="3c3a3bcbf5b4b4a037ab896c5a607a930f7536fe" offset="0"/>
</dataarea>
</part>
</software>
<software name="ontrakdm">
<description>Ontrack Disk Manager</description>
<year>1997</year>
<publisher>Quantum Data Systems</publisher>
<part name="flop1" interface="floppy_3_5">
<!--
Ontrack Disk Manager
For Quantum ATA (IDE) Disk Drives
Quantum(TM)
Capacity for the Extraordinary(TM)
Supports ATA disk drives greater than 528 MB under DOS, Windows 3.1X, Windows 95, Windows NT and OS/2
For detailed installation instructions and to view the on-line manual: insert Disk Manager diskette and type "A: HELP". This diskette is bootable with Ontrack's OS Boot Kernel.
Rev. G
Quantum P/N: 77-109028-01
-->
<dataarea name="flop" size="1474560">
<rom name="77-109028-01.img" size="1474560" crc="565510f6" sha1="d862aec61ee23e9499db92b1d955c01939eabdeb" offset="0"/>
</dataarea>
</part>
</software>
</softwarelist>

337
hash/ibm5170_cdrom.xml
View File

@ -1,274 +1,7 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="ibm5170_cdrom" description="IBM PC/AT CD-ROM images">
<!-- -->
<!-- Games -->
<!-- -->
<software name="alieninc">
<!--
Alien Incident
English - French - German
Gametek(R) compro games
(C) 1996 Gametek UK
All rights reserved
Published by Gametek (UK), Ltd.
Hogarth House 29 - 31 Sheet St.
Windsor, SL4 1BY U.K.
Mastered by AMI American Multimedia, Inc.
GCR-102-0062 G2 960914
-->
<description>Alien Incident (Eng, Fre, Ger, Fin) (v1.30)</description>
<year>1996</year>
<publisher>Gametek</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="gcr-102-0062" sha1="183949d162064c38a21d6a143a815af6760233fb" />
</diskarea>
</part>
</software>
<!-- Windows 95, Direct X 3.0 (in cdrom under Instdx.exe) -->
<software name="arabkid">
<description>Arabian Kid</description>
<year>1996</year>
<publisher>ASCII / Yellow Horn</publisher>
<info name="alt_title" value="あらびあんKid" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="kid" sha1="a837c3f4cde66b244bccbae22cb1cec83df6698d" />
</diskarea>
</part>
</software>
<!-- Pentium class 200 MHz / Direct X 7.0 / Windows 95 -->
<!-- TODO: invalid opcode exception after install -->
<software name="boorball" supported="no">
<description>Boorp's Balls</description>
<year>2001</year>
<publisher>Xpiral / TSY</publisher>
<info name="alt_title" value="ブーアプス　ボール" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="booaps" sha1="58d2602ca37c40041a6b504857d4c3057e52e94d" />
</diskarea>
</part>
</software>
<!-- Pentium class 166 MHz / Direct X 7.0 -->
<!-- Windows 95/98/ME -->
<!-- TODO: some transparency issues -->
<software name="dobupanic" supported="partial">
<description>Doka Chan No Building Panic (Japan)</description>
<year>2001</year>
<publisher>MSD-JAPAN / Salva Corporation / D-YAMA</publisher>
<info name="alt_title" value="どかちゃんのビルパニック" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="bpanic" sha1="141b67f93b4d96be7c064d3603a5b961ed56f23b" />
</diskarea>
</part>
</software>
<!-- Windows 95 -->
<!-- 256 colors minimum -->
<software name="doom2j">
<description>Doom II for Windows 95 (Japan)</description>
<year>1996</year>
<publisher>Id Software / Imagineer</publisher>
<info name="alt_title" value="ドゥームＩＩ" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="doom2j" sha1="61dd4c9a81d4d354a14533dcbd257a5bcffd22c6" />
</diskarea>
</part>
</software>
<!-- Untouched image from original CD created with an ASUS DRW-1814BLT (EAC drive sample read offset reported as +6)
If you subtract 0x18 (4 * 6) bytes from a .wav extracted from this CHD the audio matches a rip done with EAC (verified) -->
<software name="krondor">
<description>Betrayal at Krondor (1994 release, CDDA)</description>
<year>1994</year>
<publisher>Dynamix</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="betrayal_at_krondor" sha1="f0d0907edccfc4f6ab4f181b0d2e9a3b18f81e73" />
</diskarea>
</part>
</software>
<software name="krondora" cloneof="krondor">
<description>Betrayal at Krondor (1998 release, no CDDA)</description>
<year>1998</year>
<publisher>Dynamix</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="betrayal_at_krondor_1998" sha1="d58acdb5bc10c2ad9a4b6dd51438102785c44216" />
</diskarea>
</part>
</software>
<!-- Windows 3.1 / Windows 95 -->
<!-- 256 colors minimum -->
<!-- TODO: gfx issues -->
<software name="gollygoal" supported="partial">
<description>Golly! Ghosts! Goal! (Japan)</description>
<year>1996</year>
<publisher>Namco</publisher>
<info name="alt_title" value="ゴーリーゴーストゴール!" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="ggg" sha1="ab7babc13b5ffb4536fc7a553753a9d12ec41103" />
</diskarea>
</part>
</software>
<!-- Untouched image from original CD created with an ASUS DRW-1814BLT (EAC drive sample read offset reported as +6)
If you subtract 0x18 (4 * 6) bytes from a .wav extracted from this CHD the audio matches a rip done with EAC (verified) -->
<software name="kingsq6e">
<description>King's Quest VI (Windows 3.1 enhanced)</description>
<year>1993</year>
<publisher>Sierra</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="kings_quest_6_enhanced" sha1="0d237ee8c2d15be3b47f3676eddce41a00bca094" />
</diskarea>
</part>
</software>
<!-- Windows 3.1/95 -->
<software name="noiangi">
<description>Noi Siamo Angeli (Italian)</description>
<year>1997</year>
<publisher>Smile Interactive</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<!-- no disc label, arbitrary renamed -->
<disk name="bud" sha1="053ed238459721e9b62b9c045af6d8931a223095" />
</diskarea>
</part>
</software>
<software name="noiangd" cloneof="noiangi">
<description>We Are Angels - Ein Engel schlägt zu! (German)</description>
<year>1997</year>
<publisher>Smile Interactive</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="970618_1330" sha1="29ea81c4760934194099fbd0c2a94239b487a400" />
</diskarea>
</part>
</software>
<!-- Windows 3.1 / Mac LCIII -->
<software name="orgaslave">
<description>Orgaslave</description>
<year>1996</year>
<publisher>Kuki</publisher>
<info name="alt_title" value="オルガスレイブ" />
<part name="cdrom1" interface="cdrom">
<diskarea name="cdrom">
<disk name="cd1" sha1="60c4be022959c6b108c096780451ba102b488b00" />
</diskarea>
</part>
<part name="cdrom2" interface="cdrom">
<diskarea name="cdrom">
<disk name="cd2" sha1="11e9986c9b33aeee9cc42fc623f2909f9883ae49" />
</diskarea>
</part>
</software>
<!-- Can't install to hard disk, can't save game, default text speed is very slow on 486 -->
<!-- (set option 5 from 100 to 0 to make text and voices to sync) -->
<software name="pompei" supported="partial">
<description>Pompei A.D. LXXIX</description>
<year>1995</year>
<publisher>Finson / Antinomia</publisher>
<part name="cdrom" interface="cdrom">
<feature name="disk_label" value="CD0141" />
<diskarea name="cdrom">
<disk name="pompei" sha1="964c914b8580a21b2f1a54e9329336ead243598b" />
</diskarea>
</part>
</software>
<software name="prototyp">
<description>Prototype</description>
<year>1995</year>
<publisher>Neo</publisher>
<info name="version" value="1.0" />
<part name="cdrom" interface="cdrom">
<feature name="disk_label" value="Prototype" />
<diskarea name="cdrom">
<disk name="prototyp" sha1="0cdfabab37e5e9b219b3c8a381c937ae52749bb1" />
</diskarea>
</part>
</software>
<software name="sideline">
<description>Sideline</description>
<year>1996</year>
<publisher>EMAG Soft</publisher>
<info name="version" value="1.20" />
<part name="cdrom" interface="cdrom">
<feature name="disk_label" value="Sideline" />
<diskarea name="cdrom">
<disk name="sideline" sha1="5e6b52aa5cb9df8a65362901ac60a98f8f6ab464" />
</diskarea>
</part>
</software>
<!-- Windows 3.1 -->
<!-- TODO: gfx shift issue on 256 color mode -->
<software name="spaceinv" supported="partial">
<description>Space Invaders for Windows</description>
<year>1997</year>
<publisher>Wiz / Taito</publisher>
<part name="cdrom" interface="cdrom">
<feature name="disk_label" value="Sideline" />
<diskarea name="cdrom">
<disk name="si_4" sha1="0827a8a8f6602fd0947396b9ef96e449eb7a4d5c" />
</diskarea>
</part>
</software>
<!-- Windows 95/98/ME/XP and Mac OS supported -->
<!-- Requires 256 colors minimum otherwise they crashes at boot -->
<software name="v16imagine">
<description>Viper -V16- Imagine (International)</description>
<year>2001</year>
<publisher>Sogna / Hobibox Europe</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="GX" sha1="5de4abf4a883a56ec389bb255d176b5a39a63420" />
</diskarea>
</part>
</software>
<software name="v16rise">
<description>Viper -V16- RISE (International)</description>
<year>2001</year>
<publisher>Sogna / Hobibox Europe</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="GX4" sha1="a600a961b5127d3a5ee368c20d9f54e6ede23b81" />
</diskarea>
</part>
</software>
<!-- -->
<!-- Drivers / Utilities / Operating Systems -->
<!-- -->
<software name="acercpr" supported="no">
<!-- Floppy dumped via Kryoflux, three tracks show as modified -->
<description>Acer CPR</description>
@ -290,35 +23,6 @@
</part>
</software>
<software name="ultrasnd" supported="partial">
<!-- includes Gravis UltraSound (GUS) Installation - V4.11 -->
<description>The UltraSound CD</description>
<year>1995</year>
<publisher>Advanced Gravis</publisher>
<info name="version" value="1.1" />
<part name="cdrom" interface="cdrom">
<feature name="disk_serial" value="490-0028-XX" />
<diskarea name="cdrom">
<disk name="ultrasnd_cd" sha1="3fe3d683131e5f94bebf25a69c0cd4e496d4891e" />
</diskarea>
</part>
</software>
<software name="ultraexp" supported="partial">
<!-- includes Gravis UltraSound (GUS) Installation - V3.59 -->
<description>The UltraSound Experience</description>
<year>1994</year>
<publisher>Advanced Gravis</publisher>
<info name="version" value="1.0e" />
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="ultraexp" sha1="145027e33e8ed4f342209ec41f9f13e7b8d5ba26" />
</diskarea>
</part>
</software>
<software name="pcdos2k">
<description>PC DOS 2000</description>
<year>1998</year>
@ -391,6 +95,46 @@
</part>
</software>
<!-- Untouched image from original CD created with an ASUS DRW-1814BLT (EAC drive sample read offset reported as +6)
If you subtract 0x18 (4 * 6) bytes from a .wav extracted from this CHD the audio matches a rip done with EAC (verified) -->
<software name="kingsq6e">
<description>King's Quest VI (Windows 3.1 enhanced)</description>
<year>1993</year>
<publisher>Sierra</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="kings_quest_6_enhanced" sha1="0d237ee8c2d15be3b47f3676eddce41a00bca094" />
</diskarea>
</part>
</software>
<!-- Untouched image from original CD created with an ASUS DRW-1814BLT (EAC drive sample read offset reported as +6)
If you subtract 0x18 (4 * 6) bytes from a .wav extracted from this CHD the audio matches a rip done with EAC (verified) -->
<software name="krondor">
<description>Betrayal at Krondor (1994 release, CDDA)</description>
<year>1994</year>
<publisher>Dynamix</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="betrayal_at_krondor" sha1="f0d0907edccfc4f6ab4f181b0d2e9a3b18f81e73" />
</diskarea>
</part>
</software>
<software name="krondora" cloneof="krondor">
<description>Betrayal at Krondor (1998 release, no CDDA)</description>
<year>1998</year>
<publisher>Dynamix</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="betrayal_at_krondor_1998" sha1="d58acdb5bc10c2ad9a4b6dd51438102785c44216" />
</diskarea>
</part>
</software>
<!-- various Windows CDROMs
so far the listed discs should all be full english language retail discs, this can be expanded later -->
@ -489,4 +233,5 @@
</diskarea>
</part>
</software>
</softwarelist>

33
hash/neogeo.xml
View File

@ -1262,38 +1262,7 @@
</part>
</software>
<software name="bjourneyh" cloneof="bjourney">
<description>Blue's Journey / Raguy (ALH-001)</description>
<year>1990</year>
<publisher>Alpha Denshi Co.</publisher>
<info name="serial" value="NGH-022 / ALH-001 (AES)"/>
<info name="release" value="19910701 (AES)"/>
<info name="alt_title" value="ラギ"/>
<sharedfeat name="release" value="AES" />
<sharedfeat name="compatibility" value="MVS,AES" />
<part name="cart" interface="neo_cart">
<dataarea name="maincpu" width="16" endianness="big" size="0x100000">
<rom loadflag="load16_word_swap" name="022-hp1.p1" offset="0x000000" size="0x100000" crc="62cbe7b2" sha1="f9a8fd98702c623ae793804ba50d09751e3fee4c" /> <!-- TC538200 -->
</dataarea>
<dataarea name="fixed" size="0x040000">
<rom offset="0x000000" size="0x020000" name="022-s1.s1" crc="843c3624" sha1="dbdf86c193b7c1d795f8c21f2c103c1d3e18abbe" /> <!-- TC531000 -->
</dataarea>
<dataarea name="audiocpu" size="0x020000">
<rom offset="0x000000" size="0x020000" name="022-m1.m1" crc="8e1d4ab6" sha1="deabc11ab81e7e68a3e041c03a127ae28d0d7264" /> <!-- TC531001 -->
</dataarea>
<dataarea name="ymsnd" size="0x200000">
<rom name="022-v11.v11" offset="0x000000" size="0x100000" crc="2cb4ad91" sha1="169ec7303c4275155a66a88cc08270c24132bb36" /> <!-- TC538200 -->
<rom name="022-v22.v22" offset="0x100000" size="0x100000" crc="65a54d13" sha1="a591fbcedca8f679dacbebcd554e3aa3fd163e92" /> <!-- TC538200 -->
</dataarea>
<dataarea name="sprites" size="0x300000">
<rom loadflag="load16_byte" name="022-c1.c1" offset="0x000000" size="0x100000" crc="4d47a48c" sha1="6e282285be72583d828e7765b1c1695ecdc44777" /> <!-- TC538200 -->
<rom loadflag="load16_byte" name="022-c2.c2" offset="0x000001" size="0x100000" crc="e8c1491a" sha1="c468d2556b3de095aaa05edd1bc16d71303e9478" /> <!-- TC538200 -->
<rom loadflag="load16_byte" name="022-c3.c3" offset="0x200000" size="0x080000" crc="66e69753" sha1="974b823fc62236fbc23e727f25b61a805a707a9e" /> <!-- TC534200 -->
<rom loadflag="load16_byte" name="022-c4.c4" offset="0x200001" size="0x080000" crc="71bfd48a" sha1="47288be69e6992d09ebef108b4de9ffab6293dc8" /> <!-- TC534200 -->
</dataarea>
</part>
</software>
<!--
ID-0023
. NGM-023

191
hash/pce_tourvision.xml
View File

@ -2,132 +2,6 @@
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="pce_tourvision" description="Tourvision (bootleg Arcade NEC PC-Engine) cartridges">
<!--
Known games (followed by game ID, some are duplicate):
1943 Kai (65)
Adventure Island (64)
Aero Blaster (32)
After Burner II (46)
Alice in Wonderland (61)
Ankoku Densetsu (Legendary Axe II) (33)
Armed-F (?)
Ballistix (186)
Barunba (39)
Batman (30)
Be Ball (93)
* Blodia
Bomberman (71)
Bomberman 93 (204)
Bull Fight (185)
Burning Angels (49)
Cadash (203)
Chozetsurinjin Beraboh Man (Super Foolish Man) (27)
Chuka Taisen (37)
Columns (90)
Coryoon (43)
* Cross Wiber
Cyber Core (13)
Daisempuu (3)
Dead Moon (?)
Devil Crash (47)
Die Hard (73)
Dodge Ball (194)
Doraemon Meikyuu Daisakusen (20)
Doreamon - Nobita's Dorabian Night (Doraemon II, 43)
Down Load (43)
Dragon Egg! (98)
Dragon Saber (65)
Dragon Spirit (?)
Drop Rock Hora Hora (12)
Dungeon Explorer (209)
* F1 Triple Battle
Fighting Run (195)
Final Blaster (29)
Final Lap Twin (79)
Final Match Tennis (62)
Final Soldier (45)
Formation Soccer (1)
Gomola Speed (27)
Gradius (187)
Gunhed (148)
Hana Taka Daka (Super Long Nose Goblin) (6)
* Hatris
Hit The Ice (97)
Image Fight (99)
Jackie Chan (54)
Jinmu Densho (19)
Kato & Ken (42)
Kiki Kaikai (120)
Knight Rider Special (193)
Legend Of Hero Tomna (56)
Makyo Densetsu - The Legendary Axe (40)
Mashin Eiyuden Wataru (27)
Mesopotamia (197)
Mizubaku Daibouken Liquid Kids (10) (marketed as "Parasol Stars II")
Mr. Heli (23)
Ninja Ryukenden (10)
Operation Wolf (26)
Ordyne (94)
Out Run (38)
Override (53)
Pac-Land (16)
* Paranoia (18)
PC Genjin (8)
PC Genjin 2 (84)
PC Denjin Punkic Cyborg (201)
Power Drift (200)
Power Eleven (83)
* Power Golf
Power League IV (?)
Power Sports (199)
Power Tennis (183)
Pro Yakyuu World Stadium '91 (192)
Psycho Chaser (14)
Puzzle Boy (57)
Puzznic (69)
R-Type II (61)
* Rabio Lepus Special
Raiden (111)
Rastan Saga II (33, possibly incorrect riser)
Saigo no Nindou (44)
Saint Dragon (36)
Salamander (184)
Shinobi (5)
Side Arms (2)
Skweek (89)
Sokoban World (66)
Soldier Blade (23)
Son Son II (80)
Special Criminal Investigation (58)
Spin Pair (50)
Splatterhouse (148)
Super Star Soldier (42)
Super Volley ball (9)
Tatsujin (31)
Terra Cresta II (27)
The NewZealand Story (11)
Thunder Blade (34)
Tiger Road (10)
* Titan
Toilet Kids (196)
Toy Shop Boys (51)
Tricky (42)
* TV Sports
USA Pro Basketball (206) - marketed as NBA
Veigues (40)
Vigilante (8)
Violent Soldier (no ID, V1 cart)
Volfied (68)
W-Ring (21)
Winning Shot (28)
World Jockey (202)
Xevious (?)
Rumored games:
* Parasol Stars - often been mentioned, but still not confirmed, for Tourvision. For now it's been added from its NEC PC-Engine dump, which it would be likely identical.
-->
<software name="dsaber">
<description>Dragon Saber - After Story of Dragon Spirit (Tourvision PCE bootleg)</description>
<year>1991</year>
@ -661,17 +535,6 @@ Notes:
</part>
</software>
<!--Final Soldier -->
<software name="finalsol">
<description>Final Soldier (Tourvision PCE bootleg)</description>
<year>1991</year>
<publisher>bootleg (Tourvision) / Hudson</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="final_soldier.bin" size="1048576" crc="bf28530b" sha1="fe9b487ab0fb5adc83d23d66c0ccb6dde6b77fbd" offset="000000" />
</dataarea>
</part>
</software>
<!--Formation Soccer - Human Cup ' 90 - Human -->
<software name="fsoccr90">
@ -1010,17 +873,6 @@ Notes:
</part>
</software>
<!--PC Genjin - Pithecanthropus Computerurus -->
<software name="pcgenj">
<description>PC Genjin - Pithecanthropus Computerurus (Tourvision PCE bootleg)</description>
<year>1989</year>
<publisher>bootleg (Tourvision) / Hudson</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="pc_genjin.bin" size="1048576" crc="eecd176f" sha1="b24e7501e0aa9e8ba8759f9bb32452f42d7688cd" offset="000000" />
</dataarea>
</part>
</software>
<!--PC Genjin 2 - Hudson -->
<software name="pcgenj2">
@ -1362,17 +1214,6 @@ Notes:
</part>
</software>
<!--Splatterhouse -->
<software name="splatth">
<description>Splatterhouse (Tourvision PCE bootleg)</description>
<year>1990</year>
<publisher>bootleg (Tourvision) / Namcot</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="splatterhouse.bin" size="1048576" crc="be8e8c4c" sha1="f8a65d95a68735e7549838c845befcf07483876c" offset="000000" />
</dataarea>
</part>
</software>
<!--Super Star Soldier - Hudson / Kaneko -->
<software name="sssoldr">
@ -1416,16 +1257,6 @@ Notes:
</part>
</software>
<software name="sdragon">
<description>Tenseiryuu - Saint Dragon (Tourvision PCE bootleg)</description>
<year>1990</year>
<publisher>bootleg (Tourvision) / Irem</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="saint_dragon.bin" size="1048576" crc="492231a9" sha1="b8bfd18bde2398b07a693c86d21a14cd9627f0c8" offset="000000" />
</dataarea>
</part>
</software>
<!--Terra Cresta II -->
<software name="terracr2">
@ -1489,17 +1320,6 @@ Notes:
</part>
</software>
<!--Tora e no Michi -->
<software name="toramich">
<description>Tora e no Michi (Tourvision PCE bootleg)</description>
<year>1990</year>
<publisher>bootleg (Tourvision) / Victor Entertainment</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="tiger_road.bin" size="1048576" crc="5e55f35c" sha1="942c8e9e8923acf7ef2ba8878879251621e48408" offset="000000" />
</dataarea>
</part>
</software>
<!--Toy Shop Boys -->
<software name="toyshopb">
@ -1577,17 +1397,6 @@ Notes:
</part>
</software>
<!--Violent Soldier -->
<software name="violents">
<description>Violent Soldier (Tourvision PCE bootleg)</description>
<year>1990</year>
<publisher>bootleg (Tourvision) / IGS</publisher>
<part name="cart" interface="tourvision_cart">
<dataarea name="rom" size="1048576">
<rom name="violent_soldier.bin" size="1048576" crc="66bbea83" sha1="b60d507eb5d5069f0e8a52308a35459b44ee5b9e" offset="000000" />
</dataarea>
</part>
</software>
<!--Volfied - Taito -->
<software name="volfied">

224
hash/psx.xml
View File

@ -42805,21 +42805,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="fireprog">
<!-- Original images (Redump)
<rom name="Fire Pro Wrestling G (Japan) (v1.1).cue" size="101" crc="235169a5" sha1="8d8e7d6247ba63290b18224639ef7f97e89121d1"/>
<rom name="Fire Pro Wrestling G (Japan) (v1.1).bin" size="303358608" crc="8ddb5a09" sha1="26c1da5e5b64d162e9f85c285ffaf2cf2d82214a"/>
-->
<description>Fire Pro Wrestling G (Japan) (v1.1)</description>
<year>2000</year>
<publisher>Spike</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="fire pro wrestling g (japan (v1.1)" sha1="5b0792750443a320ce4e62e2f01da8d721a2686e"/>
</diskarea>
</part>
</software>
<software name="firewomn" supported="no">
<!-- Unknown source
<rom name="Fire Woman Matoigumi (Japan) [SLPS-01315].bin" size="710339280" crc="b3526c6a" sha1="2dd364f28f82774e3a4ce73e06c8197c29514df0"/>
@ -44061,21 +44046,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="gradiusg">
<!-- Original images (Redump)
<rom name="Gradius Gaiden (Japan) (v1.1).cue" size="95" crc="2a2a5d50" sha1="2e638e4f7e1e11e14cf121a14dc5a6835b808579"/>
<rom name="Gradius Gaiden (Japan) (v1.1).bin" size="589716960" crc="8ddb5a09" sha1="5c4794957782bed1ec79851c3ac40d673495b2be"/>
-->
<description>Gradius Gaiden (Japan) (v1.1)</description>
<year>1997</year>
<publisher>Konami</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="gradius gaiden (japan) (v1.1)" sha1="587c2314833c127d1fd4b94ea6d3535537b62146"/>
</diskarea>
</part>
</software>
<software name="grandoll" supported="no">
<!-- Unknown source
<rom name="Chou-Kousoku Gran Doll (Japan) [SLPS-00935].bin" size="558237792" crc="d66949aa" sha1="4e81d144625673671ee8c345eca0dbad0c3f6e59"/>
@ -44218,21 +44188,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="gunnersh">
<!-- Original images (Redump)
<rom name="Gunners Heaven (Japan).cue" size="88" crc="6c5136cc" sha1="44136d13f418a67d8342f07d0d3fac2f165ee039"/>
<rom name="Gunners Heaven (Japan).bin" size="398306496" crc="4ff1d1aa" sha1="82bc08baacad979beea29cea702c2c9d85a7c206"/>
-->
<description>Gunners Heaven (Japan)</description>
<year>1995</year>
<publisher>Media Vision</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="gunners heaven (japan)" sha1="06106575688eaeebf0cf5aac6ddc51403dcdcc28"/>
</diskarea>
</part>
</software>
<software name="gunparad" supported="no">
<!-- Unknown source
<rom name="Gunparade March (Japan) [SCPS-10136].bin" size="440372016" crc="ad1c014f" sha1="58e06a00eaa400f129a5191ed080888350adf201"/>
@ -45016,22 +44971,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="hokutosk" supported="partially">
<!-- Original images (Redump)
<rom name="Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan).cue" size="278" crc="736b61a5" sha1="7c318db42827e230c7766972759654c266c0ba65"/>
<rom name="Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan) (Track 1).bin" size="659056272" crc="79e9fc16" sha1="1f9b064ceafef91641bb3bbcc075a604f478489e"/>
<rom name="Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan) (Track 2).bin" size="37396800" crc="7976083e" sha1="d9f92af296360772e62caa4cb276de3fa74f5538"/>
-->
<description>Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan)</description>
<year>2000</year>
<publisher>Bandai</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="hokuto no ken - seikimatsu kyuuseishu densetsu (japan)" sha1="bd52aeec9c61c52b4e7a5391e1a4bd56fe453cdd"/>
</diskarea>
</part>
</software>
<software name="hooockey" supported="no">
<!-- Unknown source
<rom name="Hooockey!! (Japan) [SLPM-86488].bin" size="156692592" crc="032f439f" sha1="ac67eb197a3b761e46679135a0f6e30957617a58"/>
@ -45583,21 +45522,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="jikkparo" supported="no">
<!-- Original images (Redump)
<rom name="Jikkyou Oshaberi Parodius - Forever with Me (Japan).cue" size="117" crc="5a953380" sha1="c00f3a13075a1fa66c451a7427a12354ee9855b6"/>
<rom name="Jikkyou Oshaberi Parodius - Forever with Me (Japan).bin" size="236070240" crc="6818a16d" sha1="b133e7d7ab6679e742b9c29053fba239d948287e"/>
-->
<description>Jikkyou Oshaberi Parodius - Forever with Me (Japan)</description>
<year>1996</year>
<publisher>Konami</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="jikkyou oshaberi parodius - forever with me (japan)" sha1="2ccce47c444030d1ec6751ec54e943f80fbf9164"/>
</diskarea>
</part>
</software>
<software name="jounetsu" supported="no">
<!-- Unknown source
<rom name="Jounetsu Nekketsu - Athletes (Japan) [SLPS-00936].bin" size="141261120" crc="52cfcc5a" sha1="f6d92cc35c615dbad1fe8ace5d38bcb1b14c8875"/>
@ -47366,39 +47290,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="macrovfx">
<!-- Original images (Redump)
<rom name="Macross Digital Mission VF-X (Japan) (v1.1).cue" size="256" crc="4ff1d1aa" sha1="fd92d61ea6dd653e34d73cf87aa984226437cd92"/>
<rom name="Macross Digital Mission VF-X (Japan) (v1.1) (Track 1).bin" size="650036352" crc="a8eead5b" sha1="732bb1fb49b6822d960d8b1cfd3e8e44e15d5195"/>
<rom name="Macross Digital Mission VF-X (Japan) (v1.1) (Track 2).bin" size="1712256" crc="c9cc476e" sha1="4f9f15c5f519429eccb33d5ceebf18cdf681849c"/>
-->
<description>Macross Digital Mission VF-X (Japan)</description>
<year>1997</year>
<publisher>Bandai</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="macross digital mission vf-x (japan) (v1.1)" sha1="d6cc4f5cacf2877560a692b45788f61f71a18873"/>
</diskarea>
</part>
</software>
<software name="macrvfx2">
<!-- Original images (Redump)
<rom name="Macross VF-X2 (Japan).cue" size="327" crc="0f83c2d4" sha1="735b4ddcefe82825f69d265b8975d6d4bb929d80"/>
<rom name="Macross VF-X2 (Japan) (Track 1).bin" size="430867584" crc="9696eadb" sha1="f7e0d5b2175850b77d5bd8e2efd2123d74240af9"/>
<rom name="Macross VF-X2 (Japan) (Track 2).bin" size="47451600" crc="2e07f6eb" sha1="68f587366f2ad490fe47d9c14056cb087ab47c46"/>
<rom name="Macross VF-X2 (Japan) (Track 3).bin" size="37573200" crc="b65806d8" sha1="4bda128d58304d25207af2ffa564fd2493771db8"/>
-->
<description>Macross VF-X2 (Japan)</description>
<year>1999</year>
<publisher>Bandai</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="macross vf-x2 (japan)" sha1="2cb788b175f9dccdd1c491e7f054048534593040"/>
</diskarea>
</part>
</software>
<!-- boot OK -->
<software name="madpanic" supported="no">
<!-- Unknown source
@ -53624,106 +53515,6 @@ The entries in this section are intended to replace the existing "low-grade" Jap
</part>
</software>
<software name="srobota">
<!-- Original images (Redump)
<rom name="Super Robot Taisen Alpha (Japan) (v1.1).cue" size="105" crc="a64072b6" sha1="e48e50c8dd42eb4ec94eac0b124606d9f19484b5"/>
<rom name="Super Robot Taisen Alpha (Japan) (v1.1).bin" size="646374288" crc="b6550e08" sha1="914a07e58ed4b68ea7a2b732372a565f532fab0d"/>
-->
<description>Super Robot Taisen Alpha (Japan) (v1.1)</description>
<year>2000</year>
<publisher>Banpresto</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen alpha (japan) (v1.1)" sha1="55891934c6f643bad499999e441d019c9a14f478" />
</diskarea>
</part>
</software>
<software name="srobotagp">
<!-- Original images (Redump)
<rom name="Super Robot Taisen Alpha Gaiden (Japan) (Premium Edition).cue" size="123" crc="ee787a65" sha1="5877e52eafb38b0cec2fb888ecba26aaa1e02d28"/>
<rom name="Super Robot Taisen Alpha Gaiden (Japan) (Premium Edition).bin" size="718310208" crc="366c1cf1" sha1="b0d87ae8cf6434e2cb5c47d03812e0c0874a874c"/>
-->
<description>Super Robot Taisen Alpha Gaiden - Premium Edition (Japan)</description>
<year>2001</year>
<publisher>Banpresto</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen alpha gaiden - premium edition (japan)" sha1="6d1c0aadeb797702d8de68b1d96b0c62ae84cf77" />
</diskarea>
</part>
</software>
<software name="srobotags">
<!-- Original images (Redump)
<rom name="Super Robot Taisen Alpha Gaiden (Japan) (Shokai Genteiban).cue" size="124" crc="8715a811" sha1="e8e634d9b85372ec0169cbffe47cac88b060eb90"/>
<rom name="Super Robot Taisen Alpha Gaiden (Japan) (Shokai Genteiban).bin" size="718310208" crc="b9bef60c" sha1="546675f35773bdf68a5b24a0fe429443a175cc44"/>
-->
<description>Super Robot Taisen Alpha Gaiden - Shokai Genteiban (Japan)</description>
<year>2001</year>
<publisher>Banpresto</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen alpha gaiden - shokai genteiban (japan)" sha1="104390ee61a56baf4902f45a945cb588d3b7c795" />
</diskarea>
</part>
</software>
<software name="srobotcb">
<!-- Original images (Redump)
<rom name="Super Robot Taisen - Complete Box (Japan) (Disc 1) (Super Robot Wars Complete Box).cue" size="334" crc="c68361e4" sha1="3b5e4cc51caa48bc6982d56d1f478accfb009791"/>
<rom name="Super Robot Taisen - Complete Box (Japan) (Disc 1) (Super Robot Wars Complete Box) (Track 1).bin" size="565543104" crc="597ac371" sha1="14017a7ccc3b92e9483085fc744da414a721b68e"/>
<rom name="Super Robot Taisen - Complete Box (Japan) (Disc 1) (Super Robot Wars Complete Box) (Track 2).bin" size="32104800" crc="9b94ea54" sha1="bd1fde88c2b79e3cf8821c969373460d51f3155a"/>
<rom name="Super Robot Taisen - Complete Box (Japan) (Disc 2) (History of Super Robot Wars).cue" size="146" crc="50c54b6d" sha1="990fb4f7d6563eacc9b7ee425a4c34105d2404c6"/>
<rom name="Super Robot Taisen - Complete Box (Japan) (Disc 2) (History of Super Robot Wars).bin" size="642105408" crc="bef35311" sha1="65ffad2101381dbc4821ef1d152029e99d9f0996"/>
-->
<description>Super Robot Taisen Complete Box (Japan)</description>
<year>1999</year>
<publisher>Banpresto</publisher>
<part name="cdrom1" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen - complete box (japan) (disc 1)" sha1="624cc4b224cb211199095a6c2daad947c9d4c6de" />
</diskarea>
</part>
<part name="cdrom2" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen - complete box (japan) (disc 2) (history of super robot wars)" sha1="9ec3ef55ff9ac2c5f94990c74271f6bbb365d3da"/>
</diskarea>
</part>
</software>
<software name="srobotf">
<!-- Original images (Redump)
<rom name="Super Robot Taisen F (Japan).cue" size="" crc="1b9c1216" sha1="d397125bf25c42d3edbb2dd12b8e936a5a77c464"/>
<rom name="Super Robot Taisen F (Japan) (Track 1).bin" size="" crc="c9d941ba" sha1="582019486fa0288100086d3a1866b9b91031c8f7"/>
<rom name="Super Robot Taisen F (Japan) (Track 2).bin" size="" crc="9b94ea54" sha1="bd1fde88c2b79e3cf8821c969373460d51f3155a"/>
-->
<description>Super Robot Taisen F (Japan)</description>
<year>1998</year>
<publisher>Banpresto</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen f (japan)" sha1="3b86350787d8d9512e276f646a6ef7d8fe2191d4" />
</diskarea>
</part>
</software>
<software name="srobotfk">
<!-- Original images (Redump)
<rom name="Super Robot Taisen F Kanketsuhen (Japan).cue" size="" crc="f40ace20" sha1="af84071adadb4c8eb8020b95e1064729cfeb1426"/>
<rom name="Super Robot Taisen F Kanketsuhen (Japan) (Track 1).bin" size="" crc="a04ec282" sha1="28b3988d5e405f5bd602ed42113c709b4bc4e0d4"/>
<rom name="Super Robot Taisen F Kanketsuhen (Japan) (Track 2).bin" size="" crc="9b94ea54" sha1="bd1fde88c2b79e3cf8821c969373460d51f3155a"/>
-->
<description>Super Robot Taisen F Kanketsuhen (Japan)</description>
<year>1999</year>
<publisher>Banpresto</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="super robot taisen f kanketsuhen (japan)" sha1="f2587e200ebb55eee1dcd7092b2e745102d5db3a" />
</diskarea>
</part>
</software>
<software name="ss037pzl" supported="no">
<!-- Unknown source
<rom name="Simple 1500 Series Vol.037 - The Illustration Puzzle &amp; Slide Puzzle (Japan) [SLPS-02958].bin" size="78610896" crc="8d1cf9e1" sha1="051d05d76e349f5a01f1db9c541ac799272d250c"/>
@ -58491,19 +58282,4 @@ use an alternate design found on the demo disk... It might be possible to enable
</part>
</software>
<software name="zanacx">
<!-- Original images (Redump)
<rom name="Zanac x Zanac (Japan).cue" size="87" crc="bf9b92c3" sha1="6a6d9eccb0e4c5d7443e616b0591de3df8643709"/>
<rom name="Zanac x Zanac (Japan).bin" size="379659840" crc="cf5625d4" sha1="8d8e7d6247ba63290b18224639ef7f97e89121d1"/>
-->
<description>Zanac X Zanac (Japan)</description>
<year>2001</year>
<publisher>Compile</publisher>
<part name="cdrom" interface="psx_cdrom">
<diskarea name="cdrom">
<disk name="zanac x zanac (japan)" sha1="93d215a0de3ac5a16b4bc58a058f01f084ada63a" />
</diskarea>
</part>
</software>
</softwarelist>

41
hash/ti95_cart.xml
View File

@ -1,41 +0,0 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="ti95_cart" description="TI-95 cartridges">
<!--
Library functions can be reached from [RUN], [F3]
Not dumped yet:
- Chemical Engineering Library
Not included in list:
- 8KB RAM, battery backed
-->
<software name="maths">
<description>Mathematics Library</description>
<year>1986</year>
<publisher>Texas Instruments</publisher>
<part name="cart" interface="ti95_cart">
<dataarea name="rom" size="0x8000">
<rom name="mathematics.bin" size="0x8000" crc="f2221fd9" sha1="69eba2ecb85f9b2a6b556579e39c20246a50ef34" offset="0" />
</dataarea>
</part>
</software>
<software name="stats">
<description>Statistics Library</description>
<year>1986</year>
<publisher>Texas Instruments</publisher>
<part name="cart" interface="ti95_cart">
<dataarea name="rom" size="0x8000">
<rom name="statistics.bin" size="0x8000" crc="a61753e8" sha1="8ed3048b909e3b05416c1c16b2437902e6ac16f8" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

94
language/Italian/strings.po
View File

@ -1,4 +1,4 @@
# Copyright (C) 2017 THE PACKAGE'S COPYRIGHT HOLDER
# Copyright (C) 2016 THE PACKAGE'S COPYRIGHT HOLDER
# This file is distributed under the same license as the PACKAGE package.
# Automatically generated, 2016.
#
@ -8,7 +8,7 @@ msgstr ""
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2017-10-03 10:32+1100\n"
"PO-Revision-Date: 2017-08-30 09:37+0200\n"
"Last-Translator: theheroGAC\n"
"Last-Translator: Piergiorgio Bellezza\n"
"Language-Team: MAME Language Team\n"
"Language: it\n"
"MIME-Version: 1.0\n"
@ -1266,27 +1266,27 @@ msgstr ""
#: src/frontend/mame/ui/selgame.cpp:946
msgid "Requires Artwork\tYes\n"
msgstr "Richiede Artwork\tSi\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:946
msgid "Requires Artwork\tNo\n"
msgstr "Richiede Artwork\tNo\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:947
msgid "Requires Clickable Artwork\tYes\n"
msgstr "Richiede Artwork Cliccabile\tSi\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:947
msgid "Requires Clickable Artwork\tNo\n"
msgstr "Richiede Artwork Cliccabile\tNo\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:948
msgid "Support Cocktail\tYes\n"
msgstr "Supporto Cocktail\tSi\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:948
msgid "Support Cocktail\tNo\n"
msgstr "Supporto Cocktail\tNo\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:949
msgid "Driver is BIOS\tYes\n"
@ -1298,11 +1298,11 @@ msgstr ""
#: src/frontend/mame/ui/selgame.cpp:950
msgid "Support Save\tYes\n"
msgstr "Supporto Salvataggio\tSi\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:950
msgid "Support Save\tNo\n"
msgstr "Supporto Salvataggio\tNo\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:951
msgid "Screen Orientation\tVertical\n"
@ -1314,11 +1314,11 @@ msgstr ""
#: src/frontend/mame/ui/selgame.cpp:961
msgid "Requires CHD\tYes\n"
msgstr "Richiede CHD\tSi\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:961
msgid "Requires CHD\tNo\n"
msgstr "Richiede CHD\tNo\n"
msgstr ""
#: src/frontend/mame/ui/selgame.cpp:974
msgid "ROM Audit Result\tOK\n"
@ -2043,7 +2043,7 @@ msgstr "Utilizza i pannelli di controllo"
#: src/frontend/mame/ui/submenu.cpp:62
msgid "Use Marquees"
msgstr "Utilizza i Marquees"
msgstr "Utilizza le Marce"
#: src/frontend/mame/ui/submenu.cpp:64
msgid "State/Playback Options"
@ -2475,11 +2475,11 @@ msgstr "Impostazioni"
#: plugins/timer/init.lua:94
msgid "Current time"
msgstr "Tempo corrente"
msgstr ""
#: plugins/timer/init.lua:96
msgid "Total time"
msgstr "Tempo totale"
msgstr ""
#: plugins/timer/init.lua:98
msgid "Play Count"
@ -2491,11 +2491,11 @@ msgstr ""
#: plugins/cheat/init.lua:458
msgid "Select cheat to set hotkey"
msgstr "Seleziona cheat per impostare gli hotkey"
msgstr ""
#: plugins/cheat/init.lua:464
msgid "Press button for hotkey or wait to clear"
msgstr "Premere il pulsante per gli hotkey o attendere per cancellare"
msgstr ""
#: plugins/cheat/init.lua:476
msgid "None"
@ -2503,7 +2503,7 @@ msgstr "Nessuno"
#: plugins/cheat/init.lua:481
msgid "Done"
msgstr "Fatto"
msgstr ""
#: plugins/cheat/init.lua:495 plugins/cheat/init.lua:509
msgid "Set"
@ -2511,32 +2511,32 @@ msgstr ""
#: plugins/cheat/init.lua:528
msgid "Set hotkeys"
msgstr "Imposta i tasti di scelta rapida"
msgstr ""
#: plugins/cheat/init.lua:668
#, lua-format
msgid "Activated: %s = %s"
msgstr "Attivato: %s = %s"
msgstr ""
#: plugins/cheat/init.lua:671 plugins/cheat/init.lua:729
#, lua-format
msgid "Activated: %s"
msgstr "Attivato: %s"
msgstr ""
#: plugins/cheat/init.lua:733
#, lua-format
msgid "Enabled: %s"
msgstr "Abilitato: %s"
msgstr ""
#: plugins/cheat/init.lua:738
#, lua-format
msgid "Disabled: %s"
msgstr "Disabilitato: %s"
msgstr ""
#: plugins/cheat/init.lua:776
#, lua-format
msgid "%s added"
msgstr "%s aggiunto"
msgstr ""
#: plugins/data/data_command.lua:19
msgid "Command"
@ -2584,15 +2584,15 @@ msgstr "Punteggio MARP"
#: plugins/cheatfind/init.lua:344
msgid "Save Cheat"
msgstr "Salva Cheat"
msgstr ""
#: plugins/cheatfind/init.lua:347
msgid "Default"
msgstr "Predefinito"
msgstr ""
#: plugins/cheatfind/init.lua:347
msgid "Custom"
msgstr "Personalizzato"
msgstr ""
#: plugins/cheatfind/init.lua:348
msgid "Cheat Name"
@ -2601,7 +2601,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:354
#, lua-format
msgid "Default name is %s"
msgstr "Il nome predefinito è %s"
msgstr ""
#: plugins/cheatfind/init.lua:362
msgid "Player"
@ -2609,20 +2609,20 @@ msgstr ""
#: plugins/cheatfind/init.lua:367
msgid "Type"
msgstr "Tipo"
msgstr ""
#: plugins/cheatfind/init.lua:373
msgid "Save"
msgstr "Salva"
msgstr ""
#: plugins/cheatfind/init.lua:399
#, lua-format
msgid "Cheat written to %s and added to cheat.simple"
msgstr "Cheat scritto su %s e aggiunto a cheat.simple"
msgstr ""
#: plugins/cheatfind/init.lua:407
msgid "Cheat added to cheat.simple"
msgstr "Cheat aggiunto a cheat.simple"
msgstr ""
#: plugins/cheatfind/init.lua:412
msgid ""
@ -2632,31 +2632,31 @@ msgstr ""
#: plugins/cheatfind/init.lua:421
msgid "Cancel"
msgstr "Cancella"
msgstr ""
#: plugins/cheatfind/init.lua:426
msgid "CPU or RAM"
msgstr "CPU o RAM"
msgstr ""
#: plugins/cheatfind/init.lua:430
msgid "Changes to this only take effect when \"Start new search\" is selected"
msgstr "Le modifiche avranno effetto solo quando \"Inizia nuova ricerca\" è selezionato"
msgstr ""
#: plugins/cheatfind/init.lua:449
msgid "Data cleared and current state saved"
msgstr "Dati cancellati e stato attuale salvato"
msgstr ""
#: plugins/cheatfind/init.lua:457
msgid "Start new search"
msgstr "Inizia nuova ricerca"
msgstr ""
#: plugins/cheatfind/init.lua:467
msgid "Current state saved"
msgstr "Stato attuale salvato"
msgstr ""
#: plugins/cheatfind/init.lua:474
msgid "Save current -- #"
msgstr "Salva corrente -- #"
msgstr ""
#: plugins/cheatfind/init.lua:506
msgid " total matches found"
@ -2688,7 +2688,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:535
msgid "Left equal to right"
msgstr "Sinistra uguale a destra"
msgstr ""
#: plugins/cheatfind/init.lua:537
msgid "Left not equal to right, value is difference"
@ -2704,7 +2704,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:543
msgid "Left less than value"
msgstr "Sinistra, inferiore al valore"
msgstr ""
#: plugins/cheatfind/init.lua:545
msgid "Left greater than value"
@ -2732,7 +2732,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:578
msgid "Data Format"
msgstr "Formato dati"
msgstr ""
#: plugins/cheatfind/init.lua:602
msgid "Undo last search -- #"
@ -2744,7 +2744,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:609
msgid "All"
msgstr "TUTTO"
msgstr ""
#: plugins/cheatfind/init.lua:660
#, lua-format
@ -2753,11 +2753,11 @@ msgstr ""
#: plugins/cheatfind/init.lua:692
msgid "Cheat engine not available"
msgstr "Cheat engine non disponibile"
msgstr ""
#: plugins/cheatfind/init.lua:718
msgid "Default name is "
msgstr "Il nome predefinito è "
msgstr ""
#: plugins/cheatfind/init.lua:741
msgid "Test"
@ -2765,7 +2765,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:741
msgid "Write"
msgstr "Scrivere"
msgstr ""
#: plugins/cheatfind/init.lua:741
msgid "Watch"
@ -2773,7 +2773,7 @@ msgstr ""
#: plugins/cheatfind/init.lua:758
msgid "Page"
msgstr "Pagina"
msgstr ""
#: plugins/cheatfind/init.lua:776
msgid "Clear Watches"

26
language/Portuguese_Brazil/strings.po
View File

@ -8,8 +8,8 @@ msgid ""
msgstr ""
"Project-Id-Version: MAME\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2017-11-30 08:07+1100\n"
"PO-Revision-Date: 2017-11-30 08:07-0300\n"
"POT-Creation-Date: 2017-10-03 10:32+1100\n"
"PO-Revision-Date: 2017-10-08 16:05-0300\n"
"Last-Translator: Katananja\n"
"Language-Team: MAME Language Team\n"
"Language: pt_BR\n"
@ -314,7 +314,7 @@ msgstr ""
#: src/frontend/mame/ui/cheatopt.cpp:105
msgid "All cheats reloaded"
msgstr "Todas as trapaças foram recarregadas"
msgstr "Todos as trapaças recarregadas"
#: src/frontend/mame/ui/cheatopt.cpp:136
msgid "Autofire Settings"
@ -403,7 +403,7 @@ msgstr "Mostrar painéis laterais"
#: src/frontend/mame/ui/custui.cpp:173
msgid "Custom UI Settings"
msgstr "Personalizaçoes da Interface"
msgstr "Configurações Personalizadas da IU"
#: src/frontend/mame/ui/custui.cpp:223
msgid "default"
@ -411,7 +411,7 @@ msgstr "padrão"
#: src/frontend/mame/ui/custui.cpp:331
msgid "UI Font"
msgstr "Tipografia da Interface"
msgstr "Fonte da IU"
#: src/frontend/mame/ui/custui.cpp:336
msgid "Bold"
@ -427,11 +427,11 @@ msgstr "Linhas"
#: src/frontend/mame/ui/custui.cpp:348
msgid "Infos text size"
msgstr "Tamanho do texto de informação"
msgstr "Tamanho do texto para info"
#: src/frontend/mame/ui/custui.cpp:362
msgid "UI Fonts Settings"
msgstr "Configurações das Fontes da Interface"
msgstr "Configurações das fontes do UI"
#: src/frontend/mame/ui/custui.cpp:371
msgid "Sample text - Lorem ipsum dolor sit amet, consectetur adipiscing elit."
@ -508,7 +508,7 @@ msgstr "Restaurar as cores originais"
#: src/frontend/mame/ui/custui.cpp:481
msgid "UI Colors Settings"
msgstr "Configurações de cores da Interface"
msgstr "Configurações de cores da IU"
#: src/frontend/mame/ui/custui.cpp:490
#, c-format
@ -1307,11 +1307,11 @@ msgstr "Há Suporte para Salvamento\tNão\n"
#: src/frontend/mame/ui/selgame.cpp:951
msgid "Screen Orientation\tVertical\n"
msgstr "Orientação de tela\tVertical\n"
msgstr "Orientaçlão de tela\tVertical\n"
#: src/frontend/mame/ui/selgame.cpp:951
msgid "Screen Orientation\tHorizontal\n"
msgstr "Orientação de tela\tHorizontal\n"
msgstr "Orientaçlão de tela\tHorizontal\n"
#: src/frontend/mame/ui/selgame.cpp:961
msgid "Requires CHD\tYes\n"
@ -1398,7 +1398,7 @@ msgstr "Mídia de Software"
#: src/frontend/mame/ui/dirmenu.cpp:37
msgid "UI"
msgstr "Interface do Usuário"
msgstr "IU"
#: src/frontend/mame/ui/dirmenu.cpp:39
msgid "Samples"
@ -1450,7 +1450,7 @@ msgstr "PCBs"
#: src/frontend/mame/ui/dirmenu.cpp:52
msgid "Controls Panels"
msgstr "Painéis de Controle"
msgstr "Painéis de Controles"
#: src/frontend/mame/ui/dirmenu.cpp:53
msgid "Crosshairs"
@ -2099,7 +2099,7 @@ msgstr "Steadykey"
#: src/frontend/mame/ui/submenu.cpp:77
msgid "UI active"
msgstr "IU ativa"
msgstr "IU ativo"
#: src/frontend/mame/ui/submenu.cpp:78
msgid "Offscreen reload"

2
plugins/cheatfind/init.lua
View File

@ -715,7 +715,7 @@ function cheatfind.startplugin()
cheat_save.json = json.stringify({[1] = cheat}, {indent = true})
cheat_save.xml = string.format("<mamecheat version=1>\n<cheat desc=\"%%s\">\n<script state=\"run\">\n<action>%s.pp%s@%X=%X</action>\n</script>\n</cheat>\n</mamecheat>", dev.tag:sub(2), widchar, match.addr, match.newval)
cheat_save.simple = string.format("%s,%s,%X,%s,%X,%%s\n", setname, dev.tag, match.addr, widchar, match.newval)
manager:machine():popmessage(string.format(_("Default name is %s"), cheat_save.name))
manager:machine():popmessage(_("Default name is ") .. cheat_save.name)
return true
else
local func = "return space:read"

4
scripts/src/bus.lua
View File

@ -1400,8 +1400,6 @@ if (BUSES["SS50"]~=null) then
files {
MAME_DIR .. "src/devices/bus/ss50/interface.cpp",
MAME_DIR .. "src/devices/bus/ss50/interface.h",
MAME_DIR .. "src/devices/bus/ss50/mpc.cpp",
MAME_DIR .. "src/devices/bus/ss50/mpc.h",
MAME_DIR .. "src/devices/bus/ss50/mps.cpp",
MAME_DIR .. "src/devices/bus/ss50/mps.h",
}
@ -1787,8 +1785,6 @@ if (BUSES["A2BUS"]~=null) then
MAME_DIR .. "src/devices/bus/a2bus/agat7langcard.h",
MAME_DIR .. "src/devices/bus/a2bus/agat7ram.cpp",
MAME_DIR .. "src/devices/bus/a2bus/agat7ram.h",
MAME_DIR .. "src/devices/bus/a2bus/agat840k_hle.cpp",
MAME_DIR .. "src/devices/bus/a2bus/agat840k_hle.h",
MAME_DIR .. "src/devices/bus/a2bus/ssprite.cpp",
MAME_DIR .. "src/devices/bus/a2bus/ssprite.h",
MAME_DIR .. "src/devices/bus/a2bus/ssbapple.cpp",

2
scripts/src/cpu.lua
View File

@ -1016,7 +1016,7 @@ if (CPUS["I86"]~=null) then
}
end
if (CPUS["E1"]~=null or CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["I86"]~=null or CPUS["I386"]~=null or _OPTIONS["with-tools"]) then
if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["I86"]~=null or CPUS["I386"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i386/i386dasm.cpp")
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i386/i386dasm.h")
end

12
scripts/src/formats.lua
View File

@ -185,18 +185,6 @@ if (FORMATS["AFS_DSK"]~=null or _OPTIONS["with-tools"]) then
}
end
--------------------------------------------------
--
--@src/lib/formats/agat840k_hle_dsk.h,FORMATS["AGAT840K_HLE_DSK"] = true
--------------------------------------------------
if (FORMATS["AGAT840K_HLE_DSK"]~=null or _OPTIONS["with-tools"]) then
files {
MAME_DIR.. "src/lib/formats/agat840k_hle_dsk.cpp",
MAME_DIR.. "src/lib/formats/agat840k_hle_dsk.h",
}
end
--------------------------------------------------
--
--@src/lib/formats/ami_dsk.h,FORMATS["AMI_DSK"] = true

12
scripts/src/machine.lua
View File

@ -2196,18 +2196,6 @@ if (MACHINES["RF5C296"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/machine/ripple_counter.h,MACHINES["RIPPLE_COUNTER"] = true
---------------------------------------------------
if (MACHINES["RIPPLE_COUNTER"]~=null) then
files {
MAME_DIR .. "src/devices/machine/ripple_counter.cpp",
MAME_DIR .. "src/devices/machine/ripple_counter.h",
}
end
---------------------------------------------------
--
--@src/devices/machine/roc10937.h,MACHINES["ROC10937"] = true

12
scripts/src/video.lua
View File

@ -1033,15 +1033,3 @@ if (VIDEOS["I4100"]~=null) then
MAME_DIR .. "src/devices/video/imagetek_i4100.h",
}
end
--------------------------------------------------
--
--@src/devices/video/dp8510.h,VIDEOS["DP8510"] = true
--------------------------------------------------
if (VIDEOS["DP8510"]~=null) then
files {
MAME_DIR .. "src/devices/video/dp8510.cpp",
MAME_DIR .. "src/devices/video/dp8510.h",
}
end

12
scripts/target/mame/arcade.lua
View File

@ -535,7 +535,6 @@ MACHINES["RA17XX"] = true
--MACHINES["R64H156"] = true
MACHINES["RF5C296"] = true
--MACHINES["RIOT6532"] = true
MACHINES["RIPPLE_COUNTER"] = true
MACHINES["ROC10937"] = true
MACHINES["RP5C01"] = true
MACHINES["RP5C15"] = true
@ -888,8 +887,6 @@ files {
MAME_DIR .. "src/mame/audio/decobsmt.h",
MAME_DIR .. "src/mame/audio/efo_zsu.cpp",
MAME_DIR .. "src/mame/audio/efo_zsu.h",
MAME_DIR .. "src/mame/audio/rax.cpp",
MAME_DIR .. "src/mame/audio/rax.h",
MAME_DIR .. "src/mame/audio/segam1audio.cpp",
MAME_DIR .. "src/mame/audio/segam1audio.h",
}
@ -1950,8 +1947,6 @@ files {
MAME_DIR .. "src/mame/drivers/pgm2.cpp",
MAME_DIR .. "src/mame/video/pgm2.cpp",
MAME_DIR .. "src/mame/includes/pgm2.h",
MAME_DIR .. "src/mame/machine/pgm2_memcard.cpp",
MAME_DIR .. "src/mame/machine/pgm2_memcard.h",
MAME_DIR .. "src/mame/drivers/pgm3.cpp",
MAME_DIR .. "src/mame/drivers/spoker.cpp",
MAME_DIR .. "src/mame/machine/igs036crypt.cpp",
@ -3173,7 +3168,6 @@ files {
MAME_DIR .. "src/mame/includes/megadrvb.h",
MAME_DIR .. "src/mame/drivers/megaplay.cpp",
MAME_DIR .. "src/mame/drivers/megatech.cpp",
MAME_DIR .. "src/mame/drivers/calcune.cpp",
MAME_DIR .. "src/mame/drivers/model1.cpp",
MAME_DIR .. "src/mame/includes/model1.h",
MAME_DIR .. "src/mame/machine/model1.cpp",
@ -3363,6 +3357,8 @@ files {
MAME_DIR .. "src/mame/video/sega16sp.h",
MAME_DIR .. "src/mame/video/segaic24.cpp",
MAME_DIR .. "src/mame/video/segaic24.h",
MAME_DIR .. "src/mame/machine/gdrom.cpp",
MAME_DIR .. "src/mame/machine/gdrom.h",
MAME_DIR .. "src/mame/machine/xbox.cpp",
MAME_DIR .. "src/mame/machine/xbox_usb.cpp",
MAME_DIR .. "src/mame/machine/xbox_pci.cpp",
@ -4655,7 +4651,6 @@ files {
MAME_DIR .. "src/mame/includes/norautp.h",
MAME_DIR .. "src/mame/audio/norautp.cpp",
MAME_DIR .. "src/mame/drivers/notechan.cpp",
MAME_DIR .. "src/mame/drivers/nsg6809.cpp",
MAME_DIR .. "src/mame/drivers/nsmpoker.cpp",
MAME_DIR .. "src/mame/drivers/oneshot.cpp",
MAME_DIR .. "src/mame/includes/oneshot.h",
@ -4688,6 +4683,8 @@ files {
MAME_DIR .. "src/mame/drivers/pse.cpp",
MAME_DIR .. "src/mame/drivers/quizo.cpp",
MAME_DIR .. "src/mame/drivers/quizpun2.cpp",
MAME_DIR .. "src/mame/audio/rax.cpp",
MAME_DIR .. "src/mame/audio/rax.h",
MAME_DIR .. "src/mame/drivers/rbmk.cpp",
MAME_DIR .. "src/mame/drivers/rcorsair.cpp",
MAME_DIR .. "src/mame/drivers/re900.cpp",
@ -4771,6 +4768,5 @@ files {
MAME_DIR .. "src/mame/drivers/xyonix.cpp",
MAME_DIR .. "src/mame/includes/xyonix.h",
MAME_DIR .. "src/mame/video/xyonix.cpp",
MAME_DIR .. "src/mame/drivers/yuvomz80.cpp",
}
end

21
scripts/target/mame/mess.lua
View File

@ -353,7 +353,6 @@ VIDEOS["GB_LCD"] = true
VIDEOS["GBA_LCD"] = true
VIDEOS["MGA2064W"] = true
VIDEOS["PPU2C0X"] = true
VIDEOS["DP8510"] = true
--------------------------------------------------
-- specify available machine cores
@ -524,7 +523,6 @@ MACHINES["PROM82S129"] = true
MACHINES["R64H156"] = true
MACHINES["RF5C296"] = true
MACHINES["RIOT6532"] = true
MACHINES["RIPPLE_COUNTER"] = true
MACHINES["ROC10937"] = true
MACHINES["RP5C01"] = true
MACHINES["RP5C15"] = true
@ -776,7 +774,6 @@ FORMATS["ACORN_DSK"] = true
FORMATS["ADAM_CAS"] = true
FORMATS["ADAM_DSK"] = true
FORMATS["AFS_DSK"] = true
FORMATS["AGAT840K_HLE_DSK"] = true
FORMATS["AMI_DSK"] = true
FORMATS["AP2_DSK"] = true
FORMATS["APD_DSK"] = true
@ -1076,7 +1073,7 @@ function linkProjects_mame_mess(_target, _subtarget)
"samsung",
"sanyo",
"saturn",
"segacons",
"sega",
"sequential",
"sgi",
"sharp",
@ -1249,6 +1246,8 @@ files {
MAME_DIR .. "src/mame/machine/dc.cpp",
MAME_DIR .. "src/mame/machine/dc-ctrl.cpp",
MAME_DIR .. "src/mame/machine/dc-ctrl.h",
MAME_DIR .. "src/mame/machine/gdrom.cpp",
MAME_DIR .. "src/mame/machine/gdrom.h",
MAME_DIR .. "src/mame/machine/jvs13551.cpp",
MAME_DIR .. "src/mame/machine/jvs13551.h",
MAME_DIR .. "src/mame/machine/maple-dc.cpp",
@ -2135,8 +2134,6 @@ files {
MAME_DIR .. "src/mame/drivers/hp48.cpp",
MAME_DIR .. "src/mame/includes/hp48.h",
MAME_DIR .. "src/mame/machine/hp48.cpp",
MAME_DIR .. "src/mame/machine/hp9845_printer.cpp",
MAME_DIR .. "src/mame/machine/hp9845_printer.h",
MAME_DIR .. "src/mame/video/hp48.cpp",
MAME_DIR .. "src/mame/drivers/hp49gp.cpp",
MAME_DIR .. "src/mame/drivers/hp9845.cpp",
@ -2671,9 +2668,6 @@ files {
MAME_DIR .. "src/mame/drivers/prodigy.cpp",
MAME_DIR .. "src/mame/machine/nl_prodigy.cpp",
MAME_DIR .. "src/mame/machine/nl_prodigy.h",
}
includedirs {
MAME_DIR .. "3rdparty/rapidjson/include",
}
createMESSProjects(_target, _subtarget, "psion")
@ -2799,18 +2793,11 @@ files {
MAME_DIR .. "src/mame/includes/phc25.h",
}
-- Don't call this project "sega" or it collides with the arcade one
-- and merges with it, which ends up with libsega.a linked after
-- libshared.a. The link then fails on linux because SEGAM1AUDIO and RAX
-- are in shared while model* and stv are in sega.
createMESSProjects(_target, _subtarget, "segacons")
createMESSProjects(_target, _subtarget, "sega")
files {
MAME_DIR .. "src/mame/drivers/dccons.cpp",
MAME_DIR .. "src/mame/includes/dccons.h",
MAME_DIR .. "src/mame/machine/dccons.cpp",
MAME_DIR .. "src/mame/machine/gdrom.cpp",
MAME_DIR .. "src/mame/machine/gdrom.h",
MAME_DIR .. "src/mame/drivers/megadriv.cpp",
MAME_DIR .. "src/mame/includes/megadriv.h",
MAME_DIR .. "src/mame/drivers/segapico.cpp",

19
src/devices/bus/a2bus/agat7langcard.cpp
View File

@ -10,9 +10,6 @@
#include "agat7langcard.h"
//#define VERBOSE 1
#include "logmacro.h"
/***************************************************************************
PARAMETERS
***************************************************************************/
@ -33,7 +30,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7LANGCARD, a2bus_agat7langcard_device, "a7lang", "A
a2bus_agat7langcard_device::a2bus_agat7langcard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_dxxx_bank(0), m_main_bank(0), m_csr(0)
device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0)
{
}
@ -51,13 +48,13 @@ void a2bus_agat7langcard_device::device_start()
// set_a2bus_device makes m_slot valid
set_a2bus_device();
memset(m_ram, 0, 32 * 1024);
memset(m_ram, 0, 32*1024);
save_item(NAME(m_inh_state));
save_item(NAME(m_ram));
save_item(NAME(m_dxxx_bank));
save_item(NAME(m_main_bank));
save_item(NAME(m_csr));
save_item(NAME(m_last_offset));
}
void a2bus_agat7langcard_device::device_reset()
@ -65,7 +62,7 @@ void a2bus_agat7langcard_device::device_reset()
m_inh_state = INH_NONE;
m_dxxx_bank = 0;
m_main_bank = 0;
m_csr = 0;
m_last_offset = -1;
m_mode = 0;
}
@ -73,7 +70,7 @@ void a2bus_agat7langcard_device::do_io(int offset)
{
int old_inh_state = m_inh_state;
m_csr = offset & 0x7f;
m_last_offset = offset;
m_inh_state = INH_WRITE;
m_dxxx_bank = 0;
@ -94,11 +91,13 @@ void a2bus_agat7langcard_device::do_io(int offset)
recalc_slot_inh();
}
LOG("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n",
#if 1
logerror("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n",
offset,
(m_inh_state & INH_READ) ? 'R' : 'x',
(m_inh_state & INH_WRITE) ? 'W' : 'x',
m_dxxx_bank, m_main_bank);
#endif
}
@ -108,7 +107,7 @@ void a2bus_agat7langcard_device::do_io(int offset)
uint8_t a2bus_agat7langcard_device::read_cnxx(address_space &space, uint8_t offset)
{
return (0x80 | m_csr);
return m_last_offset < 0 ? 0x80 : (0x80 | m_last_offset);
}

4
src/devices/bus/a2bus/agat7langcard.h
View File

@ -47,11 +47,11 @@ private:
void do_io(int offset);
int m_inh_state;
int m_last_offset;
int m_dxxx_bank;
int m_main_bank;
uint8_t m_ram[32 * 1024];
uint8_t m_ram[32*1024];
uint8_t m_mode;
uint8_t m_csr;
};
// device type definition

27
src/devices/bus/a2bus/agat7ram.cpp
View File

@ -10,9 +10,6 @@
#include "agat7ram.h"
//#define VERBOSE 1
#include "logmacro.h"
/***************************************************************************
PARAMETERS
***************************************************************************/
@ -33,7 +30,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7RAM, a2bus_agat7ram_device, "a7ram", "Agat-7 32K R
a2bus_agat7ram_device::a2bus_agat7ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_main_bank(0), m_csr(0)
device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_main_bank(0)
{
}
@ -51,32 +48,32 @@ void a2bus_agat7ram_device::device_start()
// set_a2bus_device makes m_slot valid
set_a2bus_device();
memset(m_ram, 0, 32 * 1024);
memset(m_ram, 0, 32*1024);
save_item(NAME(m_inh_state));
save_item(NAME(m_ram));
save_item(NAME(m_main_bank));
save_item(NAME(m_csr));
save_item(NAME(m_last_offset));
}
void a2bus_agat7ram_device::device_reset()
{
m_inh_state = INH_NONE;
m_main_bank = 0;
m_csr = 0;
m_last_offset = -1;
}
void a2bus_agat7ram_device::do_io(int offset)
{
int old_inh_state = m_inh_state;
m_csr = offset & 0x7f;
m_last_offset = offset;
m_inh_state = INH_NONE;
m_main_bank = 0;
if (offset & 0x8)
{
m_inh_state = INH_READ | INH_WRITE;
m_inh_state = INH_READ|INH_WRITE;
}
if (offset & 0x1)
@ -89,11 +86,13 @@ void a2bus_agat7ram_device::do_io(int offset)
recalc_slot_inh();
}
LOG("RAM: (ofs %02x) new state %c%c main=%05x\n",
#if 1
logerror("RAM: (ofs %02x) new state %c%c main=%05x\n",
offset,
(m_inh_state & INH_READ) ? 'R' : 'x',
(m_inh_state & INH_WRITE) ? 'W' : 'x',
m_main_bank);
#endif
}
@ -103,7 +102,7 @@ void a2bus_agat7ram_device::do_io(int offset)
uint8_t a2bus_agat7ram_device::read_cnxx(address_space &space, uint8_t offset)
{
return m_csr;
return m_last_offset < 0 ? 0 : (m_last_offset & 0x7f);
}
@ -126,10 +125,12 @@ uint8_t a2bus_agat7ram_device::read_inh_rom(address_space &space, uint16_t offse
void a2bus_agat7ram_device::write_inh_rom(address_space &space, uint16_t offset, uint8_t data)
{
// are writes enabled?
if ((m_inh_state & INH_WRITE) && !BIT(m_csr, 4))
if (!(m_inh_state & INH_WRITE))
{
m_ram[(offset & 0x3fff) + m_main_bank] = data;
return;
}
m_ram[(offset & 0x3fff) + m_main_bank] = data;
}
int a2bus_agat7ram_device::inh_type()

4
src/devices/bus/a2bus/agat7ram.h
View File

@ -47,9 +47,9 @@ private:
void do_io(int offset);
int m_inh_state;
int m_last_offset;
int m_main_bank;
uint8_t m_ram[32 * 1024];
uint8_t m_csr;
uint8_t m_ram[32*1024];
};
// device type definition

449
src/devices/bus/a2bus/agat840k_hle.cpp
View File

@ -1,449 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Sergey Svishchev
/*********************************************************************
agat840k_hle.cpp
High-level simulation of the Agat 840K floppy controller card
http://agatcomp.ru/Reading/docs/es5323.txt
https://github.com/sintech/AGAT/blob/master/docs/agat-840k-format.txt
http://www.torlus.com/floppy/forum/viewtopic.php?f=19&t=1385
*********************************************************************/
#include "emu.h"
#include "agat840k_hle.h"
#include "formats/agat840k_hle_dsk.h"
//#define VERBOSE 1
#include "logmacro.h"
/***************************************************************************
PARAMETERS
***************************************************************************/
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
DEFINE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device, "agat840k_hle", "Agat 840K floppy card")
#define AGAT840K_ROM_REGION "agat840k_hle_rom"
ROM_START( agat840k_hle )
ROM_REGION(0x100, AGAT840K_ROM_REGION, 0)
// "Zagorsk" variant
ROM_LOAD( "teac.rom", 0x0000, 0x0100, CRC(94266928) SHA1(5d369bad6cdd6a70b0bb16480eba69640de87a2e) )
ROM_END
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
static const floppy_interface agat840k_hle_floppy_interface =
{
FLOPPY_STANDARD_5_25_DSHD,
LEGACY_FLOPPY_OPTIONS_NAME(agat840k_hle),
"floppy_5_25"
};
MACHINE_CONFIG_MEMBER( a2bus_agat840k_hle_device::device_add_mconfig )
MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0)
MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface)
MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_0_w))
MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0)
MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface)
MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_1_w))
MCFG_DEVICE_ADD("d14", I8255, 0)
// PA not connected
MCFG_I8255_IN_PORTB_CB(READ8(a2bus_agat840k_hle_device, d14_i_b)) // status signals from drive
MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d14_o_c)) // control
MCFG_DEVICE_ADD("d15", I8255, 0)
MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data
// MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data
MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c))
MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c))
MACHINE_CONFIG_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const tiny_rom_entry *a2bus_agat840k_hle_device::device_rom_region() const
{
return ROM_NAME(agat840k_hle);
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
, device_a2bus_card_interface(mconfig, *this)
, m_d14(*this, "d14")
, m_d15(*this, "d15")
, m_rom(nullptr)
{
}
a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
a2bus_agat840k_hle_device(mconfig, A2BUS_AGAT840K_HLE, tag, owner, clock)
{
}
WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_0_w)
{
index_callback(0, state);
}
WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_1_w)
{
index_callback(1, state);
}
void a2bus_agat840k_hle_device::index_callback(int unit, int state)
{
if (unit != m_unit) return;
LOG("index: unit %d state %d (%s)\n", unit, state, m_seen_magic ? "MAGIC" : "magic");
#if 0
if (!state && !m_seen_magic)
{
m_seen_magic = true;
m_count_read = 0;
m_count_write = 0;
m_d15->pc4_w(0); // latch data into port A
m_d15->pc4_w(1);
m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime));
}
#endif
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void a2bus_agat840k_hle_device::device_start()
{
// set_a2bus_device makes m_slot valid
set_a2bus_device();
m_rom = device().machine().root_device().memregion(this->subtag(AGAT840K_ROM_REGION).c_str())->base();
m_mxcs = MXCSR_SYNC;
m_timer_wait = timer_alloc(TIMER_ID_WAIT);
m_timer_seek = timer_alloc(TIMER_ID_SEEK);
m_seektime = 6000; // 6 ms, per es5323.txt
m_waittime = 32; // 16 bits x 2 us
}
void a2bus_agat840k_hle_device::device_reset()
{
u8 buf[256];
for (int i = 0; i < 2; i++)
{
legacy_floppy_image_device *img = floppy_image(i);
if (img)
{
img->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 0);
img->floppy_drive_set_rpm(300.);
img->floppy_drive_seek(-img->floppy_drive_get_current_track());
}
}
m_floppy = floppy_image(0);
// generate track images in memory, using default volume ID and gap padding bytes
int t = 0;
for (auto &elem : m_tracks)
{
elem = std::make_unique<uint16_t[]>(6250);
for (int i = 0; i < 13; i++)
{
elem[i] = 0xaa;
}
for (int j = 0; j < 21; j++)
{
const int s = (j * 1) % 21;
int cksum = 0;
m_floppy->floppy_drive_read_sector_data(t & 1, s, buf, 256);
enum
{
BAUX = 22,
BLOB = 256 + 19 + BAUX
};
for (int k = 0; k < 256; k++)
{
if (cksum > 255) { cksum++; cksum &= 255; }
cksum += buf[k];
elem[13 + (BLOB * j) + 17 + k] = buf[k];
}
cksum &= 255;
elem[13 + (BLOB * j) + 0] = 0xa4;
elem[13 + (BLOB * j) + 1] = 0x80ff; // desync
elem[13 + (BLOB * j) + 2] = 0x95;
elem[13 + (BLOB * j) + 3] = 0x6a;
elem[13 + (BLOB * j) + 4] = 0x40fe; // volume id
elem[13 + (BLOB * j) + 5] = t;
elem[13 + (BLOB * j) + 6] = s;
elem[13 + (BLOB * j) + 7] = 0x5a;
elem[13 + (BLOB * j) + 8] = 0xaa;
elem[13 + (BLOB * j) + 9] = 0xaa;
elem[13 + (BLOB * j) + 10] = 0xaa;
elem[13 + (BLOB * j) + 11] = 0xaa;
elem[13 + (BLOB * j) + 12] = 0xaa;
elem[13 + (BLOB * j) + 13] = 0xa4;
elem[13 + (BLOB * j) + 14] = 0x80ff; // desync
elem[13 + (BLOB * j) + 15] = 0x6a;
elem[13 + (BLOB * j) + 16] = 0x95;
elem[13 + (BLOB * j) + 17 + 256] = cksum + 0x2000;
elem[13 + (BLOB * j) + 17 + 257] = 0x5a;
// gap3
for (int k = 0; k < BAUX; k++)
{
elem[13 + (BLOB * j) + 17 + 258 + k] = 0xaa;
}
}
t++;
if ((t & 1) == 0)
{
m_floppy->floppy_drive_seek(1);
}
}
m_floppy->floppy_drive_seek(-m_floppy->floppy_drive_get_current_track());
m_mxcs |= MXCSR_SYNC;
m_mxcs &= ~MXCSR_TR;
}
void a2bus_agat840k_hle_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_ID_WAIT:
{
m_count_read++;
m_count_read %= 6250;
m_d15->pc4_w(0);
m_d15->pc4_w(1);
if (BIT(m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read], 15))
m_mxcs &= ~MXCSR_SYNC;
}
break;
case TIMER_ID_SEEK:
m_floppy->floppy_stp_w(1);
m_floppy->floppy_stp_w(0);
break;
}
}
/*-------------------------------------------------
read_c0nx - called for reads from this card's c0nx space
-------------------------------------------------*/
uint8_t a2bus_agat840k_hle_device::read_c0nx(address_space &space, uint8_t offset)
{
u8 data;
switch (offset)
{
case 0: case 1: case 2: case 3:
data = m_d14->read(space, offset);
break;
case 4: case 5: case 6: case 7:
data = m_d15->read(space, offset - 4);
break;
default:
data = 0xff;
break;
}
return data;
}
/*-------------------------------------------------
write_c0nx - called for writes to this card's c0nx space
-------------------------------------------------*/
void a2bus_agat840k_hle_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data)
{
switch (offset)
{
case 0: case 1: case 2: case 3:
m_d14->write(space, offset, data);
break;
case 4: case 5: case 6: case 7:
m_d15->write(space, offset - 4, data);
break;
case 8: // write desync
break;
case 9: // step
LOG("step at %11.6f\n", machine().time().as_double());
m_seen_magic = false;
m_timer_wait->adjust(attotime::from_usec(m_seektime), 0, attotime::from_usec(m_waittime));
m_floppy->floppy_stp_w(1);
m_floppy->floppy_stp_w(0);
break;
case 10: // reset desync flipflop
m_mxcs |= MXCSR_SYNC;
break;
default:
break;
}
}
/*-------------------------------------------------
read_cnxx - called for reads from this card's c0nx space
-------------------------------------------------*/
uint8_t a2bus_agat840k_hle_device::read_cnxx(address_space &space, uint8_t offset)
{
return m_rom[offset];
}
legacy_floppy_image_device *a2bus_agat840k_hle_device::floppy_image(int drive)
{
const char *floppy_name = nullptr;
switch (drive)
{
case 0:
floppy_name = FLOPPY_0;
break;
case 1:
floppy_name = FLOPPY_1;
break;
}
return subdevice<legacy_floppy_image_device>(floppy_name);
}
// all signals active low. write support not implemented; WPT is always active.
READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b)
{
u8 data = 0x03; // one drive present, because drive select is broken
m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1);
data |= (m_floppy->floppy_index_r() << 4) ^ 0x10;
// data |= m_floppy->floppy_wpt_r() << 5;
data |= m_floppy->floppy_tk00_r() << 6;
data |= m_floppy->floppy_ready_r() << 7;
LOG("status A: %s %s (t %d) %s %s\n", BIT(data, 7) ? "ready" : "READY", BIT(data, 6) ? "tk00" : "TK00",
m_floppy->floppy_drive_get_current_track(),
BIT(data, 5) ? "wpt" : "WPT", BIT(data, 4) ? "index" : "INDEX");
return data;
}
/*
* b0 AH strong write precomp
* b1 -- NC
* b2 -- step direction (1 - inward, 0 - outward)
* b3 -- drive select (0 - drive 1, 1 - drive 2)
* b4 -- head select (0 - bottom, 1 - top)
* b5 AH write precomp off
* b6 AH write enable
* b7 AH motor on
*
* C0x2
*/
WRITE8_MEMBER(a2bus_agat840k_hle_device::d14_o_c)
{
// drive select is broken in legacy flopdrv.cpp -- floppy_get_drive
m_unit = BIT(data, 3);
m_floppy = floppy_image(m_unit);
if (m_unit)
m_floppy->floppy_ds1_w(m_unit != 1);
else
m_floppy->floppy_ds0_w(m_unit != 0);
m_floppy->floppy_drtn_w(!BIT(data, 2));
m_side = BIT(data, 4);
m_floppy->floppy_wtg_w(!BIT(data, 6));
m_floppy->floppy_mon_w(!BIT(data, 7)); // tied to 'drive select', 'motor on' and 'head load'
if (!BIT(data, 7))
{
m_seen_magic = false;
m_timer_wait->adjust(attotime::never);
}
else
{
m_d15->pc4_w(0);
m_d15->pc4_w(1);
m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime));
}
LOG("D14 C <- %02X (unit %d side %d drtn %d wtg %d mon %d)\n",
data, m_unit, m_side, !BIT(data, 2), !BIT(data, 6), !BIT(data, 7));
}
// data are latched in by write to PC4
READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a)
{
const u16 data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read];
LOG("sector data: %02x @ %4d (head %d track %2d)%s\n", data & 0xff, m_count_read,
m_side, m_floppy->floppy_drive_get_current_track(),
BIT(data, 14) ? " volume" : (BIT(data, 13) ? " cksum" : ""));
return data & 0xff;
}
// C0x6
//
// b6 AL desync detected
// b7 AH read or write data ready
READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c)
{
LOG("status B: @ %4d %s %s (%s)\n", m_count_read,
BIT(m_mxcs, 7) ? "ready" : "READY", BIT(m_mxcs, 6) ? "SYNC" : "sync",
m_seen_magic ? "MAGIC" : "magic");
return m_mxcs;
}
// C0x7
//
// b0 -- connected to b7, set if m_intr[PORT_B]
// b2 AH b7 = ready for write data
// b3 -- connected to b7, set if m_intr[PORT_A]
// b4 AH b7 = read data ready
WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c)
{
if (BIT(data, 0) || BIT(data, 3))
{
m_mxcs |= MXCSR_TR;
}
else
{
m_mxcs &= ~MXCSR_TR;
}
}

103
src/devices/bus/a2bus/agat840k_hle.h
View File

@ -1,103 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Sergey Svishchev
/*********************************************************************
agat840k_hle.h
High-level simulation of the Agat 840K floppy controller card
*********************************************************************/
#ifndef MAME_BUS_A2BUS_AGAT840K_HLE_H
#define MAME_BUS_A2BUS_AGAT840K_HLE_H
#pragma once
#include "a2bus.h"
#include "imagedev/flopdrv.h"
#include "machine/i8255.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class a2bus_agat840k_hle_device:
public device_t,
public device_a2bus_card_interface
{
public:
enum : u8
{
MXCSR_SYNC = 0x40,
MXCSR_TR = 0x80
};
// construction/destruction
a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(d14_i_b);
DECLARE_READ8_MEMBER(d15_i_a);
DECLARE_READ8_MEMBER(d15_i_c);
DECLARE_WRITE8_MEMBER(d14_o_c);
DECLARE_WRITE8_MEMBER(d15_o_b);
DECLARE_WRITE8_MEMBER(d15_o_c);
DECLARE_WRITE_LINE_MEMBER(index_0_w);
DECLARE_WRITE_LINE_MEMBER(index_1_w);
void index_callback(int unit, int state);
protected:
// construction/destruction
a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual void device_add_mconfig(machine_config &config) override;
virtual const tiny_rom_entry *device_rom_region() const override;
// overrides of standard a2bus slot functions
virtual uint8_t read_c0nx(address_space &space, uint8_t offset) override;
virtual void write_c0nx(address_space &space, uint8_t offset, uint8_t data) override;
virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override;
enum
{
TIMER_ID_WAIT = 0,
TIMER_ID_SEEK
};
required_device<i8255_device> m_d14;
required_device<i8255_device> m_d15;
private:
legacy_floppy_image_device *floppy_image(int drive);
legacy_floppy_image_device *m_floppy;
bool m_side;
std::unique_ptr<uint16_t[]> m_tracks[160];
int m_count_read;
int m_count_write;
bool m_seen_magic;
int m_current_track;
u8 m_mxcs;
int m_unit;
int m_state;
int m_seektime;
int m_waittime;
emu_timer *m_timer_wait = nullptr;
emu_timer *m_timer_seek = nullptr;
uint8_t *m_rom;
};
// device type definition
DECLARE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device)
#endif // MAME_BUS_A2BUS_AGAT840K_HLE_H

4
src/devices/bus/c64/silverrock.cpp
View File

@ -37,10 +37,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
bitswap<16>(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4)
BITSWAP16(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4)
#define UNSCRAMBLE_DATA(_data) \
bitswap<8>(_data,7,6,5,4,0,1,2,3)
BITSWAP8(_data,7,6,5,4,0,1,2,3)

2
src/devices/bus/c64/stardos.cpp
View File

@ -142,7 +142,7 @@ uint8_t c64_stardos_cartridge_device::c64_cd_r(address_space &space, offs_t offs
{
if (!roml || !romh)
{
// TODO bitswap<8>(7,6,5,4,3,1,2,0) ?
// TODO BITSWAP8(7,6,5,4,3,1,2,0) ?
data = m_roml[offset & 0x3fff];
}
else if (!io1)

4
src/devices/bus/c64/vizastar.cpp
View File

@ -36,10 +36,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
bitswap<16>(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1)
BITSWAP16(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1)
#define UNSCRAMBLE_DATA(_data) \
bitswap<8>(_data,7,6,0,5,1,4,2,3)
BITSWAP8(_data,7,6,0,5,1,4,2,3)

4
src/devices/bus/c64/vw64.cpp
View File

@ -40,10 +40,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
bitswap<16>(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0)
BITSWAP16(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0)
#define UNSCRAMBLE_DATA(_data) \
bitswap<8>(_data,7,6,0,5,1,4,2,3)
BITSWAP8(_data,7,6,0,5,1,4,2,3)
// 74LS122 tW=0.45*R*C = 1.1844s

4
src/devices/bus/c64/warp_speed.cpp
View File

@ -38,10 +38,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
bitswap<16>(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0)
BITSWAP16(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0)
#define UNSCRAMBLE_DATA(_data) \
bitswap<8>(_data,7,6,5,0,1,4,2,3)
BITSWAP8(_data,7,6,5,0,1,4,2,3)

2
src/devices/bus/cbmiec/c1541.cpp
View File

@ -1071,7 +1071,7 @@ void fsd2_device::device_start()
for (offs_t offset = 0; offset < 0x4000; offset++)
{
uint8_t data = bitswap<8>(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0);
uint8_t data = BITSWAP8(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0);
rom[offset] = data;
}

2
src/devices/bus/chanf/rom.cpp
View File

@ -192,7 +192,7 @@ void chanf_rom_device::common_write_2102(uint32_t offset, uint8_t data)
m_latch[1] = data;
// all bits but 2,3 come from this write, but they are shuffled
// notice that data is 8bits, so when swapping bit8 & bit9 are always 0!
m_addr_latch = (m_addr_latch & 0x0c) | (bitswap<16>((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0));
m_addr_latch = (m_addr_latch & 0x0c) | (BITSWAP16((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0));
}
}

23
src/devices/bus/coco/coco_fdc.cpp
View File

@ -494,27 +494,22 @@ namespace
DEFINE_DEVICE_TYPE(COCO3_HDB1, coco3_hdb1_device, "coco3_hdb1", "CoCo3 HDB-DOS")
//**************************************************************************
// Prológica CP-450 BASIC Disco V. 1.0 (1984)
//
// There is a photo of the CP-450 disk controller unit at:
// https://datassette.org/softwares/tandy-trs-color/cp-450-basic-disco-v-10
// http://files.datassette.org/softwares/img/wp_20141212_22_08_26_pro.jpg
//
// CP400 FDC
//**************************************************************************
ROM_START(cp450_fdc)
ROM_START(cp400_fdc)
ROM_REGION(0x4000, "eprom", ROMREGION_ERASE00)
ROM_LOAD("cp450_basic_disco_v1.0.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b))
ROM_LOAD("cp400dsk.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b))
ROM_END
namespace
{
class cp450_fdc_device : public coco_fdc_device_base
class cp400_fdc_device : public coco_fdc_device_base
{
public:
// construction/destruction
cp450_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: coco_fdc_device_base(mconfig, CP450_FDC, tag, owner, clock)
cp400_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: coco_fdc_device_base(mconfig, CP400_FDC, tag, owner, clock)
{
}
@ -522,12 +517,12 @@ namespace
// optional information overrides
virtual const tiny_rom_entry *device_rom_region() const override
{
return ROM_NAME(cp450_fdc);
return ROM_NAME(cp400_fdc);
}
};
}
DEFINE_DEVICE_TYPE(CP450_FDC, cp450_fdc_device, "cp450_fdc", "Prológica CP-450 BASIC Disco V. 1.0 (1984)")
DEFINE_DEVICE_TYPE(CP400_FDC, cp400_fdc_device, "cp400_fdc", "CP400 FDC")
//**************************************************************************
// Codimex CD-6809 FDC (1986)
@ -561,4 +556,4 @@ namespace
};
}
DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "Codimex CD-6809 Disk BASIC (1986)")
DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "CD6809 FDC")

2
src/devices/bus/coco/coco_fdc.h
View File

@ -64,7 +64,7 @@ private:
extern const device_type COCO_FDC;
extern const device_type COCO_FDC_V11;
extern const device_type COCO3_HDB1;
extern const device_type CP450_FDC;
extern const device_type CP400_FDC;
extern const device_type CD6809_FDC;
#endif // MAME_BUS_COCO_COCO_FDC_H

16
src/devices/bus/gameboy/mbc.cpp
View File

@ -1057,26 +1057,26 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank)
switch (m_sintax_mode & 0x0f)
{
case 0x0d:
data = bitswap<8>(data, 1,0,7,6,5,4,3,2);
data = BITSWAP8(data, 1,0,7,6,5,4,3,2);
break;
case 0x09:
//data = bitswap<8>(data, 3,2,5,4,0,1,6,7); // Monkey..no
data = bitswap<8>(data, 4,5,2,3,0,1,6,7);
//data = BITSWAP8(data, 3,2,5,4,0,1,6,7); // Monkey..no
data = BITSWAP8(data, 4,5,2,3,0,1,6,7);
break;
case 0x00: // 0x10=lion 0x00 hmmmmm // 1 and 0 unconfirmed
data = bitswap<8>(data, 7,0,5,6,3,4,1,2);
data = BITSWAP8(data, 7,0,5,6,3,4,1,2);
break;
case 0x01:
data = bitswap<8>(data, 0,1,6,7,4,5,2,3);
data = BITSWAP8(data, 0,1,6,7,4,5,2,3);
break;
case 0x05:
data = bitswap<8>(data, 7,6,1,0,3,2,5,4); // Not 100% on this one
data = BITSWAP8(data, 7,6,1,0,3,2,5,4); // Not 100% on this one
break;
case 0x07:
data = bitswap<8>(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed
data = BITSWAP8(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed
break;
case 0x0b:
data = bitswap<8>(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed
data = BITSWAP8(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed
break;
}
m_latch_bank2 = (m_latch_bank2 & 0x100) | data;

2
src/devices/bus/msx_cart/dooly.cpp
View File

@ -45,7 +45,7 @@ READ8_MEMBER(msx_cart_dooly_device::read_cart)
switch (m_prot)
{
case 0x04:
data = bitswap<8>(data, 7, 6, 5, 4, 3, 1, 0, 2);
data = BITSWAP8(data, 7, 6, 5, 4, 3, 1, 0, 2);
break;
}
return data;

2
src/devices/bus/neogeo/boot_kof10th.cpp
View File

@ -102,7 +102,7 @@ WRITE16_MEMBER(neogeo_kof10th_cart_device::protection_w)
if (!m_cart_ram[0xffe])
COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
else
m_fixed[offset] = bitswap<8>(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
}
else if (offset >= 0xfe000/2)
{

6
src/devices/bus/neogeo/prot_cmc.cpp
View File

@ -689,15 +689,15 @@ int cmc_prot_device::m1_address_scramble(int address, uint16_t key)
int block = (address >> 16) & 7;
int aux = address & 0xffff;
aux ^= bitswap<16>(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5);
aux = bitswap<16>(aux,
aux ^= BITSWAP16(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5);
aux = BITSWAP16(aux,
p1[block][15], p1[block][14], p1[block][13], p1[block][12],
p1[block][11], p1[block][10], p1[block][9], p1[block][8],
p1[block][7], p1[block][6], p1[block][5], p1[block][4],
p1[block][3], p1[block][2], p1[block][1], p1[block][0]);
aux ^= m1_address_0_7_xor[(aux >> 8) & 0xff];
aux ^= m1_address_8_15_xor[aux & 0xff] << 8;
aux = bitswap<16>(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0);
aux = BITSWAP16(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0);
return (block << 16) | aux;
}

4
src/devices/bus/neogeo/prot_cthd.cpp
View File

@ -189,7 +189,7 @@ void cthd_prot_device::ct2k3sp_sx_decrypt( uint8_t* fixedrom, uint32_t fixedrom_
for (int i = 0; i < rom_size; i++)
{
int ofst = bitswap<24>((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3,
int ofst = BITSWAP24((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3,
0, 1, 4, 2, 13, 14, 16, 15,
5, 6, 11, 10, 9, 8, 7, 12 );
ofst += (i >> 17) << 17;
@ -275,7 +275,7 @@ void cthd_prot_device::patch_ct2k3sa(uint8_t* cpurom, uint32_t cpurom_size)
/* Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg) */
#define MATRIMBLZ80(i) (i ^ (bitswap<8>(i & 0x3,4,3,1,2,0,7,6,5) << 8))
#define MATRIMBLZ80(i) (i ^ (BITSWAP8(i & 0x3,4,3,1,2,0,7,6,5) << 8))
void cthd_prot_device::matrimbl_decrypt(uint8_t* sprrom, uint32_t sprrom_size, uint8_t* audiorom, uint32_t audiorom_size)
{

4
src/devices/bus/neogeo/prot_kof2k3bl.cpp
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@ -102,7 +102,7 @@ void kof2k3bl_prot_device::pl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
{
memcpy(&tmp[0], &rom16[i], 0x100000);
for (int j = 0; j < 0x100000/2; j++)
rom16[i+j] = tmp[bitswap<24>(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
}
/* patched by Altera protection chip on PCB */
@ -124,7 +124,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
uint8_t *buf = cpurom + 0xd0610;
for (int i = 0; i < 0x2000 / 2; i++)
{
int ofst = (i & 0xff00) + bitswap<8>((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
memcpy(&rom[i * 2], &buf[ofst * 2], 2);
}

28
src/devices/bus/neogeo/prot_misc.cpp
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@ -77,7 +77,7 @@ void neoboot_prot_device::sx_decrypt(uint8_t* fixed, uint32_t fixed_size, int va
else if (value == 2)
{
for (int i = 0; i < sx_size; i++)
rom[i] = bitswap<8>(rom[i], 7, 6, 0, 4, 3, 2, 1, 5);
rom[i] = BITSWAP8(rom[i], 7, 6, 0, 4, 3, 2, 1, 5);
}
}
@ -139,7 +139,7 @@ void neoboot_prot_device::kf2k5uni_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
{
for (int j = 0; j < 0x80; j += 2)
{
int ofst = bitswap<8>(j, 0, 3, 4, 5, 6, 1, 2, 7);
int ofst = BITSWAP8(j, 0, 3, 4, 5, 6, 1, 2, 7);
memcpy(&dst[j], src + i + ofst, 2);
}
memcpy(src + i, &dst[0], 0x80);
@ -154,7 +154,7 @@ void neoboot_prot_device::kf2k5uni_sx_decrypt(uint8_t* fixedrom, uint32_t fixedr
uint8_t *srom = fixedrom;
for (int i = 0; i < 0x20000; i++)
srom[i] = bitswap<8>(srom[i], 4, 5, 6, 7, 0, 1, 2, 3);
srom[i] = BITSWAP8(srom[i], 4, 5, 6, 7, 0, 1, 2, 3);
}
void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audiorom_size)
@ -162,7 +162,7 @@ void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audior
uint8_t *mrom = audiorom;
for (int i = 0; i < 0x30000; i++)
mrom[i] = bitswap<8>(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3);
mrom[i] = BITSWAP8(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3);
}
@ -187,7 +187,7 @@ void neoboot_prot_device::lans2004_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr
{
uint8_t *rom = ymsndrom;
for (int i = 0; i < 0xA00000; i++)
rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
void neoboot_prot_device::lans2004_decrypt_68k(uint8_t* cpurom, uint32_t cpurom_size)
@ -239,7 +239,7 @@ void neoboot_prot_device::samsho5b_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
for (int i = 0; i < px_size / 2; i++)
{
int ofst = bitswap<8>((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
ofst += (i & 0xfffff00);
ofst ^= 0x060005;
@ -259,7 +259,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr
uint8_t *rom = ymsndrom;
for (int i = 0; i < vx_size; i++)
rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
@ -381,7 +381,7 @@ void neoboot_prot_device::svcboot_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si
for (int i = 0; i < size / 2; i++)
{
int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
ofst += (i & 0xffff00);
memcpy(&src[i * 2], &dst[ofst * 2], 0x02);
}
@ -410,7 +410,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(uint8_t* sprrom, uint32_t sprrom_si
int bit1 = bitswap4_tbl[idx][1];
int bit2 = bitswap4_tbl[idx][2];
int bit3 = bitswap4_tbl[idx][3];
int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0);
int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0);
ofst += (i & 0xfffff00);
memcpy(&src[i * 0x80], &dst[ofst * 0x80], 0x80);
}
@ -429,7 +429,7 @@ void neoboot_prot_device::svcplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = bitswap<24>((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
ofst ^= 0x0f0007;
@ -478,7 +478,7 @@ void neoboot_prot_device::svcsplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = bitswap<16>((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
ofst += (i & 0x078000);
@ -524,7 +524,7 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(uint8_t *src, int size)
for (int j = 0; j < 0x200; j++)
{
int n = (j & 0x38) >> 3;
int ofst = bitswap<16>(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]);
int ofst = BITSWAP16(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]);
memcpy(src + i + ofst * 128, &dst[j * 128], 128);
}
}
@ -544,7 +544,7 @@ void neoboot_prot_device::kf2k2mp_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
{
for (int j = 0; j < 0x80 / 2; j++)
{
int ofst = bitswap<8>( j, 6, 7, 2, 3, 4, 5, 0, 1 );
int ofst = BITSWAP8( j, 6, 7, 2, 3, 4, 5, 0, 1 );
memcpy(dst + j * 2, src + i + ofst * 2, 2);
}
memcpy(src + i, dst, 0x80);
@ -580,7 +580,7 @@ void neoboot_prot_device::kof10th_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
for (int i = 0; i < 0x900000; i++)
{
int j = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
src[j] = dst[i];
}

2
src/devices/bus/neogeo/prot_pcm2.cpp
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@ -82,7 +82,7 @@ void pcm2_prot_device::swap(uint8_t* ymrom, uint32_t ymsize, int value)
for (int i = 0; i < 0x1000000; i++)
{
j = bitswap<24>(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16);
j = BITSWAP24(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16);
j ^= addrs[value][1];
d = ((i + addrs[value][0]) & 0xffffff);
src[j] = buf[d] ^ xordata[value][j & 0x7];

30
src/devices/bus/neogeo/prot_pvc.cpp
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@ -112,7 +112,7 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x0800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
@ -120,12 +120,12 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size)
memcpy(&buf[0], rom, rom_size);
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x800000; i += 0x100)
{
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (bitswap<8>(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12);
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (BITSWAP8(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12);
memcpy(&rom[i], &buf[ofst], 0x100);
}
@ -151,7 +151,7 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x0800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
@ -159,13 +159,13 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size)
memcpy(&buf[0], rom, rom_size);
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1);
int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1);
memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x800000; i += 0x100)
{
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&rom[i], &buf[ofst], 0x100);
}
memcpy(&buf[0], rom, rom_size );
@ -189,20 +189,20 @@ void pvc_prot_device::kf2k3pcb_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0);
rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);
@ -230,20 +230,20 @@ void pvc_prot_device::kof2003_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0);
rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3);
int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);
@ -271,19 +271,19 @@ void pvc_prot_device::kof2003h_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (bitswap<8>(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12);
int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (BITSWAP8(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);

30
src/devices/bus/neogeo/prot_sma.cpp
View File

@ -398,7 +398,7 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = bitswap<16>(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15);
rom[i] = BITSWAP16(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15);
// swap address lines for the banked part
for (int i = 0; i < 0x600000/2; i += 0x800/2)
@ -406,13 +406,13 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base)
uint16_t buffer[0x800/2];
memcpy(buffer, &rom[i], 0x800);
for (int j = 0; j < 0x800/2; j++)
rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)];
rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)];
}
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x700000/2 + bitswap<24>(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)];
rom[i] = rom[0x700000/2 + BITSWAP24(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)];
}
@ -423,12 +423,12 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = bitswap<16>(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7);
rom[i] = BITSWAP16(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x710000/2 + bitswap<24>(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)];
rom[i] = rom[0x710000/2 + BITSWAP24(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@ -437,7 +437,7 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base)
uint16_t buffer[0x8000/2];
memcpy(buffer, &rom[i], 0x8000);
for (int j = 0; j < 0x8000/2; j++)
rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)];
rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)];
}
}
@ -449,12 +449,12 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = bitswap<16>(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x7f8000/2 + bitswap<24>(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)];
rom[i] = rom[0x7f8000/2 + BITSWAP24(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@ -463,7 +463,7 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base)
uint16_t buffer[0x8000/2];
memcpy(buffer, &rom[i], 0x8000);
for (int j = 0; j < 0x8000/2; j++)
rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)];
rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)];
}
}
@ -475,12 +475,12 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = bitswap<16>(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x5d0000/2 + bitswap<24>(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)];
rom[i] = rom[0x5d0000/2 + BITSWAP24(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@ -489,7 +489,7 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base)
uint16_t buffer[0x10000/2];
memcpy(buffer, &rom[i], 0x10000);
for (int j = 0; j < 0x10000/2; j++)
rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)];
rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)];
}
}
@ -501,7 +501,7 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = bitswap<16>(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
// swap address lines for the banked part
for (int i = 0; i < 0x63a000/2; i += 0x800/2)
@ -509,11 +509,11 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base)
uint16_t buffer[0x800/2];
memcpy(buffer, &rom[i], 0x800);
for (int j = 0; j < 0x800/2; j++)
rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)];
rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)];
}
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x73a000/2 + bitswap<24>(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
}

2
src/devices/bus/neogeo/sbp.cpp
View File

@ -36,7 +36,7 @@ READ16_MEMBER( neogeo_sbp_cart_device::protection_r )
{
uint16_t* rom = (get_rom_size()) ? get_rom_base() : get_region_rom_base();
uint16_t origdata = rom[offset + (0x200/2)];
uint16_t data = bitswap<16>(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
uint16_t data = BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
int realoffset = 0x200 + (offset * 2);
logerror("sbp_lowerrom_r offset %08x data %04x\n", realoffset, data);

2
src/devices/bus/nes/jy.cpp
View File

@ -296,7 +296,7 @@ READ8_MEMBER(nes_jy_typea_device::read_m)
inline uint8_t nes_jy_typea_device::unscramble(uint8_t bank)
{
return bitswap<8>(bank & 0x7f,7,0,1,2,3,4,5,6);
return BITSWAP8(bank & 0x7f,7,0,1,2,3,4,5,6);
}
void nes_jy_typea_device::update_prg()

2
src/devices/bus/nes/mmc3_clones.cpp
View File

@ -2565,7 +2565,7 @@ void nes_a9746_device::pcb_reset()
void nes_a9746_device::update_banks(uint8_t value)
{
uint8_t bank = bitswap<8>(value & 0x3c,7,6,0,1,2,3,4,5);
uint8_t bank = BITSWAP8(value & 0x3c,7,6,0,1,2,3,4,5);
switch (m_reg[0])
{

4
src/devices/bus/nes/waixing.cpp
View File

@ -929,7 +929,7 @@ READ8_MEMBER(nes_waixing_sh2_device::chr_r)
void nes_waixing_sec_device::prg_cb(int start, int bank)
{
if (m_reg)
bank = bitswap<8>(bank & 0x1f,7,6,5,2,1,3,4,0);
bank = BITSWAP8(bank & 0x1f,7,6,5,2,1,3,4,0);
prg8_x(start, bank);
}
@ -937,7 +937,7 @@ void nes_waixing_sec_device::prg_cb(int start, int bank)
void nes_waixing_sec_device::chr_cb(int start, int bank, int source)
{
if (m_reg)
bank = bitswap<8>(bank, 5,4,2,6,7,3,1,0);
bank = BITSWAP8(bank, 5,4,2,6,7,3,1,0);
chr1_x(start, bank, source);
}

2
src/devices/bus/nubus/nubus_spec8.cpp
View File

@ -257,7 +257,7 @@ WRITE32_MEMBER( nubus_spec8s3_device::spec8s3_w )
if (m_count == 3)
{
int actual_color = bitswap<8>(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7);
int actual_color = BITSWAP8(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7);
// printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
m_palette[actual_color] = rgb_t(m_colors[0], m_colors[1], m_colors[2]);

2
src/devices/bus/nubus/pds30_procolor816.cpp
View File

@ -272,7 +272,7 @@ WRITE32_MEMBER( nubus_procolor816_device::procolor816_w )
if (mem_mask == 0x00ff0000)
{
// printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc());
m_clutoffs = bitswap<8>((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7);
m_clutoffs = BITSWAP8((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7);
}
else if (mem_mask == 0x000000ff)
{

2
src/devices/bus/s100/wunderbus.cpp
View File

@ -345,7 +345,7 @@ uint8_t s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset)
*/
data = bitswap<8>(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc;
data = BITSWAP8(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc;
break;
case 2: // R.T. Clock IN/RESET CLK. Int.

2
src/devices/bus/saturn/sat_slot.cpp
View File

@ -156,7 +156,7 @@ image_init_result sat_cart_slot_device::call_load()
// fix endianness....
for (int i = 0; i < len/4; i ++)
ROM[i] = bitswap<32>(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24);
ROM[i] = BITSWAP32(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24);
// {
// uint8_t tempa = ROM[i+0];
// uint8_t tempb = ROM[i+1];

2
src/devices/bus/sega8/rom.cpp
View File

@ -871,7 +871,7 @@ READ8_MEMBER(sega8_janggun_device::read_cart)
if (m_rom_bank_base[bank] < 0x80)
return m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)];
else
return bitswap<8>(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7);
return BITSWAP8(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7);
}

6
src/devices/bus/snes/rom.cpp
View File

@ -291,7 +291,7 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write )
// Address range for read/write depends on the game (check snes.xml)
READ8_MEMBER( sns_rom_pokemon_device::chip_read )
{
return bitswap<8>(m_latch,0,6,7,1,2,3,4,5);
return BITSWAP8(m_latch,0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_pokemon_device::chip_write )
@ -488,7 +488,7 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write )
READ8_MEMBER( sns_rom_banana_device::chip_read )
{
return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5);
return BITSWAP8(m_latch[0xf],0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_banana_device::chip_write )
@ -499,7 +499,7 @@ WRITE8_MEMBER( sns_rom_banana_device::chip_write )
READ8_MEMBER( sns_rom_bugs_device::chip_read )
{
return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5);
return BITSWAP8(m_latch[offset & 0xff],0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_bugs_device::chip_write )

2
src/devices/bus/snes_ctrl/pachinko.cpp
View File

@ -83,7 +83,7 @@ void snes_pachinko_device::device_reset()
void snes_pachinko_device::port_poll()
{
uint8_t dial = bitswap<8>(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0);
uint8_t dial = BITSWAP8(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0);
m_latch = m_button->read() | (dial << 25) | 0xee7000; // add ID
}

4
src/devices/bus/ss50/interface.cpp
View File

@ -79,7 +79,7 @@
#include "emu.h"
#include "bus/ss50/interface.h"
#include "bus/ss50/mpc.h"
//#include "bus/ss50/mpc.h"
//#include "bus/ss50/mpl.h"
//#include "bus/ss50/mpr.h"
#include "bus/ss50/mps.h"
@ -214,7 +214,7 @@ ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t
}
SLOT_INTERFACE_START(ss50_default_2rs_devices)
SLOT_INTERFACE("mpc", SS50_MPC)
//SLOT_INTERFACE("mpc", SS50_MPC)
//SLOT_INTERFACE("mpl", SS50_MPL)
//SLOT_INTERFACE("mpn", SS50_MPN)
SLOT_INTERFACE("mps", SS50_MPS)

194
src/devices/bus/ss50/mpc.cpp
View File

@ -1,194 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:AJR
/**********************************************************************
SWTPC MP-C Serial Control Interface
**********************************************************************/
#include "emu.h"
#include "bus/ss50/mpc.h"
#include "bus/ss50/interface.h"
#include "bus/rs232/rs232.h"
#include "machine/6821pia.h"
#include "machine/input_merger.h"
#include "machine/ripple_counter.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> ss50_mpc_device
class ss50_mpc_device : public device_t, public ss50_card_interface
{
public:
// construction/destruction
ss50_mpc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, SS50_MPC, tag, owner, clock),
ss50_card_interface(mconfig, *this),
m_pia(*this, "pia"),
m_loopback(*this, "loopback"),
m_counter(*this, "counter"),
m_baud_jumper(*this, "BAUD"),
m_count_select(false)
{
}
protected:
// device-specific overrides
virtual ioport_constructor device_input_ports() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
// interface-specific overrides
virtual DECLARE_READ8_MEMBER(register_read) override;
virtual DECLARE_WRITE8_MEMBER(register_write) override;
virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override;
virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override;
private:
DECLARE_WRITE_LINE_MEMBER(serial_input_w);
DECLARE_WRITE_LINE_MEMBER(reader_control_w);
DECLARE_READ_LINE_MEMBER(count_r);
DECLARE_WRITE_LINE_MEMBER(count_select_w);
required_device<pia6821_device> m_pia;
required_device<input_merger_device> m_loopback;
required_device<ripple_counter_device> m_counter;
required_ioport m_baud_jumper;
bool m_count_select;
};
static INPUT_PORTS_START( mpc )
PORT_START("BAUD")
PORT_DIPNAME(1, 0, "Baud Rate")
PORT_DIPSETTING(1, "110")
PORT_DIPSETTING(0, "300")
PORT_START("STOP")
PORT_DIPNAME(1, 0, "Stop Bits")
PORT_DIPSETTING(0, "1")
PORT_DIPSETTING(1, "2")
INPUT_PORTS_END
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
ioport_constructor ss50_mpc_device::device_input_ports() const
{
return INPUT_PORTS_NAME(mpc);
}
static DEVICE_INPUT_DEFAULTS_START( terminal )
DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_300)
DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_300)
DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1)
DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8)
DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE)
DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1)
DEVICE_INPUT_DEFAULTS_END
//-------------------------------------------------
// device_add_mconfig - add device-specific
// machine configuration
//-------------------------------------------------
MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig)
MCFG_DEVICE_ADD("pia", PIA6821, 0) // actually MC6820
MCFG_PIA_WRITEPA_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<0>)) MCFG_DEVCB_BIT(0)
MCFG_PIA_CB2_HANDLER(WRITELINE(ss50_mpc_device, reader_control_w))
MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6)
MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7)
MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2)
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("counter", ripple_counter_device, reset_w)) MCFG_DEVCB_BIT(0)
//MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w))
//MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(WRITELINE(ss50_mpc_device, serial_input_w))
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal)
MCFG_INPUT_MERGER_ALL_HIGH("outgate")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_INPUT_MERGER_ANY_HIGH("loopback")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>))
MCFG_DEVICE_ADD("counter", RIPPLE_COUNTER, 0) // CD4024AE (IC3)
MCFG_RIPPLE_COUNTER_STAGES(7) // only Q5 (÷32) and Q4 (÷16) are actually used
MACHINE_CONFIG_END
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void ss50_mpc_device::device_start()
{
save_item(NAME(m_count_select));
}
WRITE_LINE_MEMBER(ss50_mpc_device::serial_input_w)
{
m_pia->set_a_input(state << 7, 0x7f);
m_loopback->in_w<0>(state);
}
WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w)
{
m_loopback->in_w<1>(state);
}
READ_LINE_MEMBER(ss50_mpc_device::count_r)
{
return BIT(m_counter->count(), m_count_select ? 4 : 3);
}
WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w)
{
m_count_select = bool(state);
}
//-------------------------------------------------
// register_read - read from a port register
//-------------------------------------------------
READ8_MEMBER(ss50_mpc_device::register_read)
{
return m_pia->read(space, offset & 3, 0);
}
//-------------------------------------------------
// register_write - write to a port register
//-------------------------------------------------
WRITE8_MEMBER(ss50_mpc_device::register_write)
{
m_pia->write(space, offset & 3, data);
}
WRITE_LINE_MEMBER(ss50_mpc_device::f110_w)
{
if (m_baud_jumper->read())
m_counter->clock_w(state);
}
WRITE_LINE_MEMBER(ss50_mpc_device::f300_w)
{
if (!m_baud_jumper->read())
m_counter->clock_w(state);
}
// device type definition
DEFINE_DEVICE_TYPE(SS50_MPC, ss50_mpc_device, "ss50_mpc", "MP-C Serial Control Interface")

14
src/devices/bus/ss50/mpc.h
View File

@ -1,14 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:AJR
/**********************************************************************
SWTPC MP-C Serial Control Interface
**********************************************************************/
#ifndef MAME_DEVICE_BUS_SS50_MPC_H
#define MAME_DEVICE_BUS_SS50_MPC_H
extern const device_type SS50_MPC;
#endif // MAME_DEVICE_BUS_SS50_MPC_H

2
src/devices/bus/ti99x/990_hd.cpp
View File

@ -241,7 +241,7 @@ DEVICE_IMAGE_LOAD_MEMBER( ti990_hdc_device, ti990_hd )
*/
DEVICE_IMAGE_UNLOAD_MEMBER( ti990_hdc_device, ti990_hd )
{
int id = get_id_from_device(&image.device());
int id = get_id_from_device( image );
hd_unit_t *d;
d = &m_d[id];

4
src/devices/bus/vcs/dpc.cpp
View File

@ -160,10 +160,10 @@ READ8_MEMBER(dpc_device::read)
data = m_df[data_fetcher].flag ? display_data : 0x00;
break;
case 0x18: // display data AND'd w/flag, nibbles swapped
data = m_df[data_fetcher].flag ? bitswap<8>(display_data,3,2,1,0,7,6,5,4) : 0x00;
data = m_df[data_fetcher].flag ? BITSWAP8(display_data,3,2,1,0,7,6,5,4) : 0x00;
break;
case 0x20: // display data AND'd w/flag, byte reversed
data = m_df[data_fetcher].flag ? bitswap<8>(display_data,0,1,2,3,4,5,6,7) : 0x00;
data = m_df[data_fetcher].flag ? BITSWAP8(display_data,0,1,2,3,4,5,6,7) : 0x00;
break;
case 0x28: // display data AND'd w/flag, rotated right
data = m_df[data_fetcher].flag ? (display_data >> 1) : 0x00;

1
src/devices/bus/vic20/exp.cpp
View File

@ -219,6 +219,5 @@ SLOT_INTERFACE_START( vic20_expansion_cards )
// the following need ROMs from the software list
SLOT_INTERFACE_INTERNAL("standard", VIC20_STD)
SLOT_INTERFACE_INTERNAL("ieee488", VIC1112)
MCFG_SLOT_OPTION_CLOCK("ieee488", DERIVED_CLOCK(1, 1))
SLOT_INTERFACE_INTERNAL("megacart", VIC20_MEGACART)
SLOT_INTERFACE_END

4
src/devices/bus/vic20/vic1112.cpp
View File

@ -98,12 +98,12 @@ WRITE_LINE_MEMBER( vic1112_device::via1_irq_w )
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( vic1112_device::device_add_mconfig )
MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, DERIVED_CLOCK(1, 1))
MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 0)
MCFG_VIA6522_READPB_HANDLER(READ8(vic1112_device, via0_pb_r))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic1112_device, via0_pb_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(vic1112_device, via0_irq_w))
MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, DERIVED_CLOCK(1, 1))
MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0)
MCFG_VIA6522_READPB_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r))
MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8(IEEE488_TAG, ieee488_device, dio_w))
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(IEEE488_TAG, ieee488_device, atn_w))

38
src/devices/cpu/arm7/arm7.cpp
View File

@ -148,16 +148,14 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char
}
arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: arm9_cpu_device(mconfig, type, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
cp15_control(0x78)
{
m_copro_id = ARM9_COPRO_ID_MFR_ARM
| ARM9_COPRO_ID_ARCH_V5TE
| ARM9_COPRO_ID_PART_ARM946
| ARM9_COPRO_ID_STEP_ARM946_A0;
| ARM9_COPRO_ID_ARCH_V5TE
| ARM9_COPRO_ID_PART_ARM946
| ARM9_COPRO_ID_STEP_ARM946_A0;
memset(ITCM, 0, 0x8000);
memset(DTCM, 0, 0x4000);
@ -171,17 +169,6 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_t
cp15_itcm_reg = cp15_dtcm_reg = 0;
}
arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm946es_cpu_device(mconfig, ARM946ES, tag, owner, clock)
{
}
// unknown configuration, but uses MPU not MMU, so closer to ARM946ES
igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm946es_cpu_device(mconfig, IGS036, tag, owner, clock)
{
}
pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE)
{
@ -202,6 +189,13 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *
| ARM9_COPRO_ID_STEP_SA1110_A0;
}
// unknown configuration
igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm9_cpu_device(mconfig, IGS036, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE)
{
}
device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const
{
return space_config_vector {
@ -1465,6 +1459,14 @@ uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr)
return m_program->read_byte(addr);
}
WRITE32_MEMBER(igs036_cpu_device::arm7_rt_w_callback)
{
arm7_cpu_device::arm7_rt_w_callback(space, offset, data, mem_mask);
/* disable the MMU for now, it doesn't seem to set up valid mappings
so could be entirely different here */
COPRO_CTRL &= ~COPRO_CTRL_MMU_EN;
}
void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
{
uint8_t cpn = (insn >> 8) & 0xF;

18
src/devices/cpu/arm7/arm7.h
View File

@ -626,9 +626,6 @@ public:
virtual uint32_t arm7_cpu_read16(uint32_t addr) override;
virtual uint8_t arm7_cpu_read8(uint32_t addr) override;
protected:
arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
private:
uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size;
uint32_t cp15_itcm_end, cp15_dtcm_end, cp15_itcm_reg, cp15_dtcm_reg;
@ -638,12 +635,6 @@ private:
void RefreshDTCM();
};
class igs036_cpu_device : public arm946es_cpu_device
{
public:
// construction/destruction
igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pxa255_cpu_device : public arm7_cpu_device
{
@ -660,6 +651,15 @@ public:
sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class igs036_cpu_device : public arm9_cpu_device
{
public:
// construction/destruction
igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override;
};
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device)

5
src/devices/cpu/arm7/arm7core.h
View File

@ -470,6 +470,11 @@ enum
COND_NV /* 0 never */
};
#define LSL(v, s) ((v) << (s))
#define LSR(v, s) ((v) >> (s))
#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s))))
#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s))))
/* Convenience Macros */
#define R15 m_r[eR15]
#define SPSR 17 // SPSR is always the 18th register in our 0 based array sRegisterTable[][18]

5
src/devices/cpu/arm7/arm7help.h
View File

@ -166,8 +166,3 @@
#define WRITE32(addr,data) arm7_cpu_write32(addr,data)
#define PTR_READ32 &arm7_cpu_read32
#define PTR_WRITE32 &arm7_cpu_write32
#define LSL(v, s) ((v) << (s))
#define LSR(v, s) ((v) >> (s))
#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s))))
#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s))))

5
src/devices/cpu/arm7/arm7thmb.cpp
View File

@ -1307,7 +1307,8 @@ void arm7_cpu_device::tg0b_f(uint32_t pc, uint32_t op)
// "The address should normally be a word aligned quantity and non-word aligned addresses do not affect the instruction."
// "However, the bottom 2 bits of the address will appear on A[1:0] and might be interpreted by the memory system."
// Endrift says LDMIA/STMIA ignore the low 2 bits and GBA Test Suite assumes it.
// GBA "BB Ball" performs an unaligned read with A[1:0] = 2 and expects A[1] not to be ignored [BP 800B90A,(R4&3)!=0]
// GBA "Gadget Racers" performs an unaligned read with A[1:0] = 1 and expects A[0] to be ignored [BP B72,(R0&3)!=0]
void arm7_cpu_device::tg0c_0(uint32_t pc, uint32_t op) /* Store */
{
@ -1334,7 +1335,7 @@ void arm7_cpu_device::tg0c_1(uint32_t pc, uint32_t op) /* Load */
{
if (op & (1 << offs))
{
SetRegister(offs, READ32(ld_st_address & ~3));
SetRegister(offs, READ32(ld_st_address & ~1));
ld_st_address += 4;
}
}

25
src/devices/cpu/e132xs/32xsdasm.cpp
View File

@ -391,31 +391,32 @@ u32 hyperstone_disassembler::opcode_alignment() const
return 2;
}
hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf)
{
}
/*****************************/
/* Main disassembly function */
/*****************************/
offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint16_t op;
uint8_t op_num;
uint8_t source_code, dest_code, source_bit, dest_bit;
char source[5] = "\0", dest[5] = "\0";
uint32_t flags = 0;
uint16_t op = opcodes.r16(pc);
op = opcodes.r16(pc);
size = 2;
uint8_t source_code = SOURCECODE(op);
uint8_t dest_code = DESTCODE(op);
uint8_t source_bit = SOURCEBIT(op);
uint8_t dest_bit = DESTBIT(op);
source_code = SOURCECODE(op);
dest_code = DESTCODE(op);
source_bit = SOURCEBIT(op);
dest_bit = DESTBIT(op);
global_fp = m_config->get_fp();
int h_flag = m_config->get_h();
global_fp = 0;
int h_flag = 0;
uint8_t op_num = (op & 0xff00) >> 8;
op_num = (op & 0xff00) >> 8;
switch( op_num )
{

14
src/devices/cpu/e132xs/32xsdasm.h
View File

@ -15,14 +15,7 @@
class hyperstone_disassembler : public util::disasm_interface
{
public:
struct config {
virtual ~config() = default;
virtual u8 get_fp() const = 0;
virtual bool get_h() const = 0;
};
hyperstone_disassembler(config *conf);
hyperstone_disassembler() = default;
virtual ~hyperstone_disassembler() = default;
virtual u32 opcode_alignment() const override;
@ -33,11 +26,8 @@ private:
static const char *const G_REG[];
static const char *const SETxx[];
config *m_config;
int size, global_fp;
int size;
u8 global_fp;
void LL_format(char *source, char *dest, uint16_t op);
void LR_format(char *source, char *dest, uint16_t op);
void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag);

46
src/devices/cpu/e132xs/32xsdefs.h
View File

@ -54,15 +54,15 @@
/* Trap numbers */
#define TRAPNO_IO2 48
#define TRAPNO_IO1 49
#define TRAPNO_INT4 50
#define TRAPNO_INT3 51
#define TRAPNO_INT2 52
#define TRAPNO_INT1 53
#define TRAPNO_INT4 50
#define TRAPNO_INT3 51
#define TRAPNO_INT2 52
#define TRAPNO_INT1 53
#define TRAPNO_IO3 54
#define TRAPNO_TIMER 55
#define TRAPNO_RESERVED1 56
#define TRAPNO_TRACE_EXCEPTION 57
#define TRAPNO_PARITY_ERROR 58
#define TRAPNO_PARITY_ERROR 58
#define TRAPNO_EXTENDED_OVERFLOW 59
#define TRAPNO_RANGE_ERROR 60
#define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR
@ -125,6 +125,27 @@
/* Internal registers */
#define SREG decode.src_value
#define SREGF decode.next_src_value
#define DREG decode.dst_value
#define DREGF decode.next_dst_value
#define EXTRA_U decode.extra.u
#define EXTRA_S decode.extra.s
#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_))
#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_))
#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_))
#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_))
#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER)
#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER)
#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER)
#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER)
#define SAME_SRC_DST decode.same_src_dst
#define SAME_SRC_DSTF decode.same_src_dstf
#define SAME_SRCF_DST decode.same_srcf_dst
#define OP m_op
#define PC m_global_regs[0] //Program Counter
#define SR m_global_regs[1] //Status Register
@ -154,13 +175,6 @@
#define T_MASK 0x00010000
#define P_MASK 0x00020000
#define S_MASK 0x00040000
#define ILC_MASK 0x00180000
#define C_SHIFT 0
#define Z_SHIFT 1
#define N_SHIFT 2
#define V_SHIFT 3
#define S_SHIFT 18
/* SR flags */
#define GET_C ( SR & C_MASK) // bit 0 //CARRY
@ -206,11 +220,17 @@
#define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed
#define CHECK_C(x) (SR = (SR & ~0x00000001) | (uint32_t)((x & 0x100000000L) >> 32))
#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) >> 29))
#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) >> 29))
#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | (((z ^ y) & (y ^ x) & 0x80000000) >> 29))
/* FER flags */
#define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions
#define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions
//other bits are reversed, in particular 7 - 5 for the operating system.
//the user program can only change the above 2 flags
//the user program can only changes the above 2 flags
#endif // MAME_CPU_E132XS_XS32DEFS_H

253
src/devices/cpu/e132xs/e132xs.cpp
View File

@ -33,7 +33,6 @@
TODO:
- some wrong cycle counts
- verify register wrapping with sregf/dregf on hardware
CHANGELOG:
Pierpaolo Prazzoli
@ -148,6 +147,7 @@
#include "debugger.h"
#include "32xsdefs.h"
#include "32xsdasm.h"
//#define VERBOSE 1
#include "logmacro.h"
@ -195,10 +195,10 @@ ADDRESS_MAP_END
hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map)
, m_io_config("io", ENDIANNESS_BIG, io_data_width, 15)
, m_icount(0)
: cpu_device(mconfig, type, tag, owner, clock),
m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map),
m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
m_icount(0)
{
}
@ -374,26 +374,46 @@ uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */
return addr;
}
/*static*/ const uint32_t hyperstone_device::s_trap_entries[8] = {
0x00000000, // MEM0
0x40000000, // MEM1
0x80000000, // MEM2
0xc0000000, // IRAM
0,
0,
0,
0xffffff00, // MEM3
};
void hyperstone_device::hyperstone_set_trap_entry(int which)
{
switch( which )
{
case E132XS_ENTRY_MEM0:
m_trap_entry = 0x00000000;
break;
void hyperstone_device::compute_tr()
case E132XS_ENTRY_MEM1:
m_trap_entry = 0x40000000;
break;
case E132XS_ENTRY_MEM2:
m_trap_entry = 0x80000000;
break;
case E132XS_ENTRY_MEM3:
m_trap_entry = 0xffffff00;
break;
case E132XS_ENTRY_IRAM:
m_trap_entry = 0xc0000000;
break;
default:
LOG("Set entry point to a reserved value: %d\n", which);
break;
}
}
uint32_t hyperstone_device::compute_tr()
{
uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles;
uint64_t clocks_since_base = cycles_since_base >> m_clck_scale;
m_tr_result = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
}
void hyperstone_device::update_timer_prescale()
{
uint32_t prevtr = compute_tr();
TPR &= ~0x80000000;
m_clck_scale = (TPR >> 26) & m_clock_scale_mask;
m_clock_cycles_1 = 1 << m_clck_scale;
@ -402,7 +422,7 @@ void hyperstone_device::update_timer_prescale()
m_clock_cycles_4 = 4 << m_clck_scale;
m_clock_cycles_6 = 6 << m_clck_scale;
m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
m_tr_base_value = m_tr_result;
m_tr_base_value = prevtr;
m_tr_base_cycles = total_cycles();
}
@ -452,13 +472,10 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback )
/* update the values if necessary */
if (update)
{
update_timer_prescale();
}
/* see if the timer is right for firing */
compute_tr();
if (!((m_tr_result - TCR) & 0x80000000))
if (!((compute_tr() - TCR) & 0x80000000))
m_timer_int_pending = 1;
/* adjust ourselves for the next time */
@ -508,8 +525,7 @@ uint32_t hyperstone_device::get_global_register(uint8_t code)
/* it is common to poll this in a loop */
if (m_icount > m_tr_clocks_per_tick / 2)
m_icount -= m_tr_clocks_per_tick / 2;
compute_tr();
return m_tr_result;
return compute_tr();
}
return m_global_regs[code & 0x1f];
}
@ -563,10 +579,7 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
case TPR_REGISTER:
m_global_regs[code] = val;
if (!(val & 0x80000000)) /* change immediately */
{
compute_tr();
update_timer_prescale();
}
adjust_timer_interrupt();
return;
case TCR_REGISTER:
@ -597,14 +610,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
m_intblock = 1;
return;
case MCR_REGISTER:
{
// bits 14..12 EntryTableMap
const int which = (val & 0x7000) >> 12;
assert(which < 4 || which == 7);
m_trap_entry = s_trap_entries[which];
hyperstone_set_trap_entry((val & 0x7000) >> 12);
m_global_regs[code] = val;
return;
}
case 28:
case 29:
case 30:
@ -625,8 +634,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
#define SIGN_BIT(val) ((val & 0x80000000) >> 31)
#define SIGN_TO_N(val) ((val & 0x80000000) >> 29)
/*static*/ const int32_t hyperstone_device::s_immediate_values[16] =
static constexpr int32_t immediate_values[32] =
{
0, 1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12, 13, 14, 15,
16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000),
-8, -7, -6, -5, -4, -3, -2, -1
};
@ -640,7 +651,7 @@ do
if (m_delay_slot) \
{ \
PC = m_delay_pc; \
m_delay_slot = 0; \
m_delay_slot = false; \
} \
} while (0)
@ -659,7 +670,8 @@ uint32_t hyperstone_device::decode_immediate_s()
switch (nybble)
{
case 0:
return 16;
default:
return immediate_values[0x10 + nybble];
case 1:
{
m_instruction_length = (3<<19);
@ -681,8 +693,6 @@ uint32_t hyperstone_device::decode_immediate_s()
PC += 2;
return extra_u;
}
default:
return s_immediate_values[nybble];
}
}
@ -754,7 +764,7 @@ void hyperstone_device::ignore_pcrel()
}
}
void hyperstone_device::hyperstone_br()
void hyperstone_device::execute_br()
{
const int32_t offset = decode_pcrel();
check_delay_PC();
@ -767,18 +777,24 @@ void hyperstone_device::hyperstone_br()
void hyperstone_device::execute_trap(uint32_t addr)
{
const uint8_t reg = GET_FP + GET_FL;
uint8_t reg;
uint32_t oldSR;
reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length);
const uint32_t oldSR = SR;
oldSR = SR;
SET_FL(6);
SET_FP(reg);
m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S;
m_local_regs[(1 + reg) & 0x3f] = oldSR;
set_local_register(0, (PC & 0xfffffffe) | GET_S);
set_local_register(1, oldSR);
SR &= ~(M_MASK | T_MASK);
SR |= (L_MASK | S_MASK);
SET_M(0);
SET_T(0);
SET_L(1);
SET_S(1);
PC = addr;
@ -813,8 +829,8 @@ void hyperstone_device::execute_exception(uint32_t addr)
SET_ILC(m_instruction_length);
const uint32_t oldSR = SR;
SET_FL(2);
SET_FP(reg);
SET_FL(2);
m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S;
m_local_regs[(1 + reg) & 0x3f] = oldSR;
@ -1005,7 +1021,6 @@ void hyperstone_device::init(int scale_mask)
m_tr_base_cycles = 0;
m_tr_base_value = 0;
m_tr_result = 0;
m_tr_clocks_per_tick = 0;
m_timer_int_pending = 0;
@ -1259,7 +1274,7 @@ void hyperstone_device::device_reset()
m_tr_clocks_per_tick = 2;
m_trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3
hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */
set_global_register(BCR_REGISTER, ~0);
set_global_register(MCR_REGISTER, ~0);
@ -1341,45 +1356,79 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std
util::disasm_interface *hyperstone_device::create_disassembler()
{
return new hyperstone_disassembler(this);
}
u8 hyperstone_device::get_fp() const
{
return GET_FP;
}
bool hyperstone_device::get_h() const
{
return GET_H;
return new hyperstone_disassembler;
}
/* Opcodes */
void hyperstone_device::hyperstone_trap()
{
static const uint32_t conditions[16] = {
0, 0, 0, 0, N_MASK | Z_MASK, N_MASK | Z_MASK, N_MASK, N_MASK, C_MASK | Z_MASK, C_MASK | Z_MASK, C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, 0
};
static const bool trap_if_set[16] = {
false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false
};
check_delay_PC();
const uint8_t trapno = (m_op & 0xfc) >> 2;
const uint32_t addr = get_trap_addr(trapno);
const uint8_t code = ((m_op & 0x300) >> 6) | (m_op & 0x03);
if (trap_if_set[code])
switch (code)
{
if (SR & conditions[code])
execute_trap(addr);
}
else
{
if (!(SR & conditions[code]))
case TRAPLE:
if (SR & (N_MASK | Z_MASK))
execute_trap(addr);
break;
case TRAPGT:
if(!(SR & (N_MASK | Z_MASK)))
execute_trap(addr);
break;
case TRAPLT:
if (SR & N_MASK)
execute_trap(addr);
break;
case TRAPGE:
if (!(SR & N_MASK))
execute_trap(addr);
break;
case TRAPSE:
if (SR & (C_MASK | Z_MASK))
execute_trap(addr);
break;
case TRAPHT:
if (!(SR & (C_MASK | Z_MASK)))
execute_trap(addr);
break;
case TRAPST:
if (SR & C_MASK)
execute_trap(addr);
break;
case TRAPHE:
if (!(SR & C_MASK))
execute_trap(addr);
break;
case TRAPE:
if (SR & Z_MASK)
execute_trap(addr);
break;
case TRAPNE:
if (!(SR & Z_MASK))
execute_trap(addr);
break;
case TRAPV:
if (SR & V_MASK)
execute_trap(addr);
break;
case TRAP:
execute_trap(addr);
break;
}
m_icount -= m_clock_cycles_1;
@ -1466,7 +1515,7 @@ void hyperstone_device::execute_run()
m_instruction_length = (1<<19);
switch (m_op >> 8)
switch ((OP >> 8) & 0x00ff)
{
case 0x00: hyperstone_chk<GLOBAL, GLOBAL>(); break;
case 0x01: hyperstone_chk<GLOBAL, LOCAL>(); break;
@ -1680,8 +1729,8 @@ void hyperstone_device::execute_run()
case 0xd1: hyperstone_ldwr<LOCAL>(); break;
case 0xd2: hyperstone_lddr<GLOBAL>(); break;
case 0xd3: hyperstone_lddr<LOCAL>(); break;
case 0xd4: hyperstone_ldwp<GLOBAL>(); break;
case 0xd5: hyperstone_ldwp<LOCAL>(); break;
case 0xd4: hypesrtone_ldwp<GLOBAL>(); break;
case 0xd5: hypesrtone_ldwp<LOCAL>(); break;
case 0xd6: hyperstone_lddp<GLOBAL>(); break;
case 0xd7: hyperstone_lddp<LOCAL>(); break;
case 0xd8: hyperstone_stwr<GLOBAL>(); break;
@ -1692,35 +1741,35 @@ void hyperstone_device::execute_run()
case 0xdd: hyperstone_stwp<LOCAL>(); break;
case 0xde: hyperstone_stdp<GLOBAL>(); break;
case 0xdf: hyperstone_stdp<LOCAL>(); break;
case 0xe0: hyperstone_db<COND_V, IS_SET>(); break;
case 0xe1: hyperstone_db<COND_V, IS_CLEAR>(); break;
case 0xe2: hyperstone_db<COND_Z, IS_SET>(); break;
case 0xe3: hyperstone_db<COND_Z, IS_CLEAR>(); break;
case 0xe4: hyperstone_db<COND_C, IS_SET>(); break;
case 0xe5: hyperstone_db<COND_C, IS_CLEAR>(); break;
case 0xe6: hyperstone_db<COND_CZ, IS_SET>(); break;
case 0xe7: hyperstone_db<COND_CZ, IS_CLEAR>(); break;
case 0xe8: hyperstone_db<COND_N, IS_SET>(); break;
case 0xe9: hyperstone_db<COND_N, IS_CLEAR>(); break;
case 0xea: hyperstone_db<COND_NZ, IS_SET>(); break;
case 0xeb: hyperstone_db<COND_NZ, IS_CLEAR>(); break;
case 0xe0: hyperstone_dbv(); break;
case 0xe1: hyperstone_dbnv(); break;
case 0xe2: hyperstone_dbe(); break;
case 0xe3: hyperstone_dbne(); break;
case 0xe4: hyperstone_dbc(); break;
case 0xe5: hyperstone_dbnc(); break;
case 0xe6: hyperstone_dbse(); break;
case 0xe7: hyperstone_dbht(); break;
case 0xe8: hyperstone_dbn(); break;
case 0xe9: hyperstone_dbnn(); break;
case 0xea: hyperstone_dble(); break;
case 0xeb: hyperstone_dbgt(); break;
case 0xec: hyperstone_dbr(); break;
case 0xed: hyperstone_frame(); break;
case 0xee: hyperstone_call<GLOBAL>(); break;
case 0xef: hyperstone_call<LOCAL>(); break;
case 0xf0: hyperstone_b<COND_V, IS_SET>(); break;
case 0xf1: hyperstone_b<COND_V, IS_CLEAR>(); break;
case 0xf2: hyperstone_b<COND_Z, IS_SET>(); break;
case 0xf3: hyperstone_b<COND_Z, IS_CLEAR>(); break;
case 0xf4: hyperstone_b<COND_C, IS_SET>(); break;
case 0xf5: hyperstone_b<COND_C, IS_CLEAR>(); break;
case 0xf6: hyperstone_b<COND_CZ, IS_SET>(); break;
case 0xf7: hyperstone_b<COND_CZ, IS_CLEAR>(); break;
case 0xf8: hyperstone_b<COND_N, IS_SET>(); break;
case 0xf9: hyperstone_b<COND_N, IS_CLEAR>(); break;
case 0xfa: hyperstone_b<COND_NZ, IS_SET>(); break;
case 0xfb: hyperstone_b<COND_NZ, IS_CLEAR>(); break;
case 0xfc: hyperstone_br(); break;
case 0xee: hyperstone_call_global(); break;
case 0xef: hyperstone_call_local(); break;
case 0xf0: hyperstone_bv(); break;
case 0xf1: hyperstone_bnv(); break;
case 0xf2: hyperstone_be(); break;
case 0xf3: hyperstone_bne(); break;
case 0xf4: hyperstone_bc(); break;
case 0xf5: hyperstone_bnc(); break;
case 0xf6: hyperstone_bse(); break;
case 0xf7: hyperstone_bht(); break;
case 0xf8: hyperstone_bn(); break;
case 0xf9: hyperstone_bnn(); break;
case 0xfa: hyperstone_ble(); break;
case 0xfb: hyperstone_bgt(); break;
case 0xfc: execute_br(); break;
case 0xfd: hyperstone_trap(); break;
case 0xfe: hyperstone_trap(); break;
case 0xff: hyperstone_trap(); break;

268
src/devices/cpu/e132xs/e132xs.h
View File

@ -5,7 +5,6 @@
#pragma once
#include "32xsdasm.h"
/*
A note about clock multipliers and dividers:
@ -23,27 +22,17 @@
/* Functions */
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class e132xs_frontend;
// ======================> hyperstone_device
// Used by core CPU interface
class hyperstone_device : public cpu_device, public hyperstone_disassembler::config
class hyperstone_device : public cpu_device
{
friend class e132xs_frontend;
public:
inline void ccfunc_unimplemented();
inline void ccfunc_print();
inline void ccfunc_total_cycles();
void update_timer_prescale();
void compute_tr();
void adjust_timer_interrupt();
protected:
enum
{
@ -125,45 +114,6 @@ protected:
IS_SIGNED = 1
};
enum branch_condition
{
COND_V = 0,
COND_Z = 1,
COND_C = 2,
COND_CZ = 3,
COND_N = 4,
COND_NZ = 5
};
enum condition_set
{
IS_CLEAR = 0,
IS_SET = 1
};
enum
{
EXCEPTION_IO2 = 48,
EXCEPTION_IO1 = 49,
EXCEPTION_INT4 = 50,
EXCEPTION_INT3 = 51,
EXCEPTION_INT2 = 52,
EXCEPTION_INT1 = 53,
EXCEPTION_IO3 = 54,
EXCEPTION_TIMER = 55,
EXCEPTION_RESERVED1 = 56,
EXCEPTION_TRACE = 57,
EXCEPTION_PARITY_ERROR = 58,
EXCEPTION_EXTENDED_OVERFLOW = 59,
EXCEPTION_RANGE_ERROR = 60,
EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR,
EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR,
EXCEPTION_RESERVED2 = 61,
EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3
EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones
EXCEPTION_COUNT
};
// construction/destruction
hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map);
@ -187,8 +137,6 @@ protected:
// device_disasm_interface overrides
virtual util::disasm_interface *create_disassembler() override;
virtual u8 get_fp() const override;
virtual bool get_h() const override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@ -218,16 +166,12 @@ protected:
uint64_t m_tr_base_cycles;
uint32_t m_tr_base_value;
uint32_t m_tr_result;
uint32_t m_tr_clocks_per_tick;
uint8_t m_timer_int_pending;
emu_timer *m_timer;
uint64_t m_numcycles;
uint32_t m_prev_pc;
uint32_t m_delay_pc;
uint32_t m_delay_slot;
bool m_delay_slot;
uint32_t m_opcodexor;
@ -238,10 +182,6 @@ protected:
int m_icount;
uint8_t m_fl_lut[16];
static const uint32_t s_trap_entries[8];
static const int32_t s_immediate_values[16];
uint32_t get_trap_addr(uint8_t trapno);
private:
// internal functions
@ -252,22 +192,25 @@ private:
uint32_t get_global_register(uint8_t code);
uint32_t get_trap_addr(uint8_t trapno);
uint32_t get_emu_code_addr(uint8_t num);
void hyperstone_set_trap_entry(int which);
uint32_t compute_tr();
void update_timer_prescale();
void adjust_timer_interrupt();
TIMER_CALLBACK_MEMBER(timer_callback);
uint32_t decode_const();
uint32_t decode_immediate_s();
void ignore_immediate_s();
int32_t decode_pcrel();
void ignore_pcrel();
void hyperstone_br();
void execute_br();
void execute_trap(uint32_t addr);
void execute_int(uint32_t addr);
void execute_exception(uint32_t addr);
void execute_software();
void ignore_immediate_s();
uint32_t decode_immediate_s();
uint32_t decode_const();
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk();
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd();
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu();
@ -325,7 +268,7 @@ private:
template <reg_bank SRC_GLOBAL> void hyperstone_ldwr();
template <reg_bank SRC_GLOBAL> void hyperstone_lddr();
template <reg_bank SRC_GLOBAL> void hyperstone_ldwp();
template <reg_bank SRC_GLOBAL> void hypesrtone_ldwp();
template <reg_bank SRC_GLOBAL> void hyperstone_lddp();
template <reg_bank SRC_GLOBAL> void hyperstone_stwr();
@ -333,18 +276,192 @@ private:
template <reg_bank SRC_GLOBAL> void hyperstone_stwp();
template <reg_bank SRC_GLOBAL> void hyperstone_stdp();
template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b();
template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db();
void hyperstone_dbv();
void hyperstone_dbnv();
void hyperstone_dbe();
void hyperstone_dbne();
void hyperstone_dbc();
void hyperstone_dbnc();
void hyperstone_dbse();
void hyperstone_dbht();
void hyperstone_dbn();
void hyperstone_dbnn();
void hyperstone_dble();
void hyperstone_dbgt();
void hyperstone_dbr();
void hyperstone_frame();
template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call();
void hyperstone_call_global();
void hyperstone_call_local();
void hyperstone_bv();
void hyperstone_bnv();
void hyperstone_be();
void hyperstone_bne();
void hyperstone_bc();
void hyperstone_bnc();
void hyperstone_bse();
void hyperstone_bht();
void hyperstone_bn();
void hyperstone_bnn();
void hyperstone_ble();
void hyperstone_bgt();
void hyperstone_trap();
void hyperstone_extend();
void hyperstone_reserved();
void hyperstone_do();
int32_t decode_pcrel();
void ignore_pcrel();
#if 0
void execute_run_drc();
void flush_drc_cache();
void code_flush_cache();
void code_compile_block(offs_t pc);
inline void ccfunc_unimplemented();
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr);
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
#endif
#if 0
void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
#endif
};
// device type definition
@ -545,5 +662,4 @@ protected:
virtual void device_start() override;
};
#endif // MAME_CPU_E132XS_E132XS_H

1275
src/devices/cpu/e132xs/e132xsop.hxx
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File diff suppressed because it is too large Load Diff

2
src/devices/cpu/hmcs40/hmcs40.cpp
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@ -620,7 +620,7 @@ void hmcs40_cpu_device::execute_run()
debugger_instruction_hook(this, m_pc);
m_icount--;
m_op = m_program->read_word(m_pc) & 0x3ff;
m_i = bitswap<8>(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
increment_pc();
// handle opcode

2
src/devices/cpu/hmcs40/hmcs40d.cpp
View File

@ -181,7 +181,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
// reverse bits
if (bits < 0)
{
param = bitswap<8>(param,0,1,2,3,4,5,6,7);
param = BITSWAP8(param,0,1,2,3,4,5,6,7);
param >>= (8 + bits);
bits = -bits;
}

4
src/devices/cpu/hmcs40/hmcs40op.cpp
View File

@ -669,13 +669,13 @@ void hmcs40_cpu_device::op_p()
if (o & 0x100)
{
// B3 B2 B1 B0 A0 A1 A2 A3
m_a = bitswap<8>(o,7,6,5,4,0,1,2,3) & 0xf;
m_a = BITSWAP8(o,7,6,5,4,0,1,2,3) & 0xf;
m_b = o >> 4 & 0xf;
}
if (o & 0x200)
{
// R20 R21 R22 R23 R30 R31 R32 R33
o = bitswap<8>(o,0,1,2,3,4,5,6,7);
o = BITSWAP8(o,0,1,2,3,4,5,6,7);
write_r(2, o & 0xf);
write_r(3, o >> 4 & 0xf);
}

10
src/devices/cpu/hphybrid/hphybrid.cpp
View File

@ -761,7 +761,7 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr)
return read_non_common_reg(addr_wo_bsc);
}
} else {
return m_direct->read_word(addr);
return m_direct->read_word(addr << 1);
}
}
@ -1026,8 +1026,8 @@ void hp_hybrid_cpu_device::do_pw(uint16_t opcode)
WM(tmp_addr >> 1 , tmp);
} else {
// Extend address, form byte address
uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8);
uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00;
uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) << 8 : uint8_t(tmp);
uint16_t mask = (tmp_addr & 1) ? 0xff00 : 0x00ff;
tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1);
m_program->write_word(tmp_addr , val, mask);
}
@ -1125,12 +1125,12 @@ void hp_hybrid_cpu_device::handle_dma(void)
uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic)
{
return m_io->read_word(HP_MAKE_IOADDR(pa, ic));
return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
}
void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v)
{
m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v);
m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)

102
src/devices/cpu/i386/i386.cpp
View File

@ -3788,59 +3788,59 @@ void i386_device::pentium_smi()
m_smi_latched = false;
// save state
WRITE32(smram_state + SMRAM_IP5_CR4, m_cr[4]);
WRITE32(smram_state + SMRAM_IP5_ESLIM, m_sreg[ES].limit);
WRITE32(smram_state + SMRAM_IP5_ESBASE, m_sreg[ES].base);
WRITE32(smram_state + SMRAM_IP5_ESACC, m_sreg[ES].flags);
WRITE32(smram_state + SMRAM_IP5_CSLIM, m_sreg[CS].limit);
WRITE32(smram_state + SMRAM_IP5_CSBASE, m_sreg[CS].base);
WRITE32(smram_state + SMRAM_IP5_CSACC, m_sreg[CS].flags);
WRITE32(smram_state + SMRAM_IP5_SSLIM, m_sreg[SS].limit);
WRITE32(smram_state + SMRAM_IP5_SSBASE, m_sreg[SS].base);
WRITE32(smram_state + SMRAM_IP5_SSACC, m_sreg[SS].flags);
WRITE32(smram_state + SMRAM_IP5_DSLIM, m_sreg[DS].limit);
WRITE32(smram_state + SMRAM_IP5_DSBASE, m_sreg[DS].base);
WRITE32(smram_state + SMRAM_IP5_DSACC, m_sreg[DS].flags);
WRITE32(smram_state + SMRAM_IP5_FSLIM, m_sreg[FS].limit);
WRITE32(smram_state + SMRAM_IP5_FSBASE, m_sreg[FS].base);
WRITE32(smram_state + SMRAM_IP5_FSACC, m_sreg[FS].flags);
WRITE32(smram_state + SMRAM_IP5_GSLIM, m_sreg[GS].limit);
WRITE32(smram_state + SMRAM_IP5_GSBASE, m_sreg[GS].base);
WRITE32(smram_state + SMRAM_IP5_GSACC, m_sreg[GS].flags);
WRITE32(smram_state + SMRAM_IP5_LDTACC, m_ldtr.flags);
WRITE32(smram_state + SMRAM_IP5_LDTLIM, m_ldtr.limit);
WRITE32(smram_state + SMRAM_IP5_LDTBASE, m_ldtr.base);
WRITE32(smram_state + SMRAM_IP5_GDTLIM, m_gdtr.limit);
WRITE32(smram_state + SMRAM_IP5_GDTBASE, m_gdtr.base);
WRITE32(smram_state + SMRAM_IP5_IDTLIM, m_idtr.limit);
WRITE32(smram_state + SMRAM_IP5_IDTBASE, m_idtr.base);
WRITE32(smram_state + SMRAM_IP5_TRLIM, m_task.limit);
WRITE32(smram_state + SMRAM_IP5_TRBASE, m_task.base);
WRITE32(smram_state + SMRAM_IP5_TRACC, m_task.flags);
WRITE32(m_cr[4], smram_state+SMRAM_IP5_CR4);
WRITE32(m_sreg[ES].limit, smram_state+SMRAM_IP5_ESLIM);
WRITE32(m_sreg[ES].base, smram_state+SMRAM_IP5_ESBASE);
WRITE32(m_sreg[ES].flags, smram_state+SMRAM_IP5_ESACC);
WRITE32(m_sreg[CS].limit, smram_state+SMRAM_IP5_CSLIM);
WRITE32(m_sreg[CS].base, smram_state+SMRAM_IP5_CSBASE);
WRITE32(m_sreg[CS].flags, smram_state+SMRAM_IP5_CSACC);
WRITE32(m_sreg[SS].limit, smram_state+SMRAM_IP5_SSLIM);
WRITE32(m_sreg[SS].base, smram_state+SMRAM_IP5_SSBASE);
WRITE32(m_sreg[SS].flags, smram_state+SMRAM_IP5_SSACC);
WRITE32(m_sreg[DS].limit, smram_state+SMRAM_IP5_DSLIM);
WRITE32(m_sreg[DS].base, smram_state+SMRAM_IP5_DSBASE);
WRITE32(m_sreg[DS].flags, smram_state+SMRAM_IP5_DSACC);
WRITE32(m_sreg[FS].limit, smram_state+SMRAM_IP5_FSLIM);
WRITE32(m_sreg[FS].base, smram_state+SMRAM_IP5_FSBASE);
WRITE32(m_sreg[FS].flags, smram_state+SMRAM_IP5_FSACC);
WRITE32(m_sreg[GS].limit, smram_state+SMRAM_IP5_GSLIM);
WRITE32(m_sreg[GS].base, smram_state+SMRAM_IP5_GSBASE);
WRITE32(m_sreg[GS].flags, smram_state+SMRAM_IP5_GSACC);
WRITE32(m_ldtr.flags, smram_state+SMRAM_IP5_LDTACC);
WRITE32(m_ldtr.limit, smram_state+SMRAM_IP5_LDTLIM);
WRITE32(m_ldtr.base, smram_state+SMRAM_IP5_LDTBASE);
WRITE32(m_gdtr.limit, smram_state+SMRAM_IP5_GDTLIM);
WRITE32(m_gdtr.base, smram_state+SMRAM_IP5_GDTBASE);
WRITE32(m_idtr.limit, smram_state+SMRAM_IP5_IDTLIM);
WRITE32(m_idtr.base, smram_state+SMRAM_IP5_IDTBASE);
WRITE32(m_task.limit, smram_state+SMRAM_IP5_TRLIM);
WRITE32(m_task.base, smram_state+SMRAM_IP5_TRBASE);
WRITE32(m_task.flags, smram_state+SMRAM_IP5_TRACC);
WRITE32(smram_state + SMRAM_ES, m_sreg[ES].selector);
WRITE32(smram_state + SMRAM_CS, m_sreg[CS].selector);
WRITE32(smram_state + SMRAM_SS, m_sreg[SS].selector);
WRITE32(smram_state + SMRAM_DS, m_sreg[DS].selector);
WRITE32(smram_state + SMRAM_FS, m_sreg[FS].selector);
WRITE32(smram_state + SMRAM_GS, m_sreg[GS].selector);
WRITE32(smram_state + SMRAM_LDTR, m_ldtr.segment);
WRITE32(smram_state + SMRAM_TR, m_task.segment);
WRITE32(m_sreg[ES].selector, smram_state+SMRAM_ES);
WRITE32(m_sreg[CS].selector, smram_state+SMRAM_CS);
WRITE32(m_sreg[SS].selector, smram_state+SMRAM_SS);
WRITE32(m_sreg[DS].selector, smram_state+SMRAM_DS);
WRITE32(m_sreg[FS].selector, smram_state+SMRAM_FS);
WRITE32(m_sreg[GS].selector, smram_state+SMRAM_GS);
WRITE32(m_ldtr.segment, smram_state+SMRAM_LDTR);
WRITE32(m_task.segment, smram_state+SMRAM_TR);
WRITE32(smram_state + SMRAM_DR7, m_dr[7]);
WRITE32(smram_state + SMRAM_DR6, m_dr[6]);
WRITE32(smram_state + SMRAM_EAX, REG32(EAX));
WRITE32(smram_state + SMRAM_ECX, REG32(ECX));
WRITE32(smram_state + SMRAM_EDX, REG32(EDX));
WRITE32(smram_state + SMRAM_EBX, REG32(EBX));
WRITE32(smram_state + SMRAM_ESP, REG32(ESP));
WRITE32(smram_state + SMRAM_EBP, REG32(EBP));
WRITE32(smram_state + SMRAM_ESI, REG32(ESI));
WRITE32(smram_state + SMRAM_EDI, REG32(EDI));
WRITE32(smram_state + SMRAM_EIP, m_eip);
WRITE32(smram_state + SMRAM_EFLAGS, old_flags);
WRITE32(smram_state + SMRAM_CR3, m_cr[3]);
WRITE32(smram_state + SMRAM_CR0, old_cr0);
WRITE32(m_dr[7], smram_state+SMRAM_DR7);
WRITE32(m_dr[6], smram_state+SMRAM_DR6);
WRITE32(REG32(EAX), smram_state+SMRAM_EAX);
WRITE32(REG32(ECX), smram_state+SMRAM_ECX);
WRITE32(REG32(EDX), smram_state+SMRAM_EDX);
WRITE32(REG32(EBX), smram_state+SMRAM_EBX);
WRITE32(REG32(ESP), smram_state+SMRAM_ESP);
WRITE32(REG32(EBP), smram_state+SMRAM_EBP);
WRITE32(REG32(ESI), smram_state+SMRAM_ESI);
WRITE32(REG32(EDI), smram_state+SMRAM_EDI);
WRITE32(m_eip, smram_state+SMRAM_EIP);
WRITE32(old_flags, smram_state+SMRAM_EFLAGS);
WRITE32(m_cr[3], smram_state+SMRAM_CR3);
WRITE32(old_cr0, smram_state+SMRAM_CR0);
m_sreg[DS].selector = m_sreg[ES].selector = m_sreg[FS].selector = m_sreg[GS].selector = m_sreg[SS].selector = 0;
m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000;

1
src/devices/cpu/m6502/m6502.cpp
View File

@ -64,7 +64,6 @@ void m6502_device::init()
save_item(NAME(PC));
save_item(NAME(NPC));
save_item(NAME(PPC));
save_item(NAME(A));
save_item(NAME(X));
save_item(NAME(Y));

297
src/devices/cpu/m68000/m68000.h
View File

@ -10,30 +10,43 @@
#define softfloat_h 1
#include "softfloat/milieu.h"
#include "softfloat/softfloat.h"
extern flag floatx80_is_nan(floatx80 a);
#endif
/* MMU constants */
constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22
#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22
/* instruction cache constants */
constexpr int M68K_IC_SIZE = 128;
#define M68K_IC_SIZE 128
#define m68ki_check_address_error(m68k, ADDR, WRITE_MODE, FC) \
if((ADDR)&1) \
{ \
m68k->aerr_address = ADDR; \
m68k->aerr_write_mode = WRITE_MODE; \
m68k->aerr_fc = FC; \
throw 10; \
}
/* There are 7 levels of interrupt to the 68K.
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
*/
constexpr int M68K_IRQ_NONE = 0;
constexpr int M68K_IRQ_1 = 1;
constexpr int M68K_IRQ_2 = 2;
constexpr int M68K_IRQ_3 = 3;
constexpr int M68K_IRQ_4 = 4;
constexpr int M68K_IRQ_5 = 5;
constexpr int M68K_IRQ_6 = 6;
constexpr int M68K_IRQ_7 = 7;
#define M68K_IRQ_NONE 0
#define M68K_IRQ_1 1
#define M68K_IRQ_2 2
#define M68K_IRQ_3 3
#define M68K_IRQ_4 4
#define M68K_IRQ_5 5
#define M68K_IRQ_6 6
#define M68K_IRQ_7 7
// special input lines
constexpr int M68K_LINE_BUSERROR = 16;
#define M68K_LINE_BUSERROR 16
/* CPU types for use in m68k_set_cpu_type() */
enum
@ -65,9 +78,9 @@ enum
};
/* HMMU enable types for use with m68k_set_hmmu_enable() */
constexpr int M68K_HMMU_DISABLE = 0; /* no translation */
constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */
constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */
#define M68K_HMMU_DISABLE 0 /* no translation */
#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */
#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */
/* Special interrupt acknowledge values.
* Use these as special returns from the interrupt acknowledge callback
@ -78,25 +91,30 @@ constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */
* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
* acknowledge cycle instead of DTACK.
*/
constexpr uint32_t M68K_INT_ACK_AUTOVECTOR = 0xffffffff;
#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
/* Causes the spurious interrupt vector (0x18) to be taken
* This happens in a real 68K if BERR is asserted during the interrupt
* acknowledge cycle (i.e. no devices responded to the acknowledge).
*/
constexpr uint32_t M68K_INT_ACK_SPURIOUS = 0xfffffffe;
#define M68K_INT_ACK_SPURIOUS 0xfffffffe
enum
{
/* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */
M68K_PC = STATE_GENPC, M68K_SP = 1, M68K_ISP, M68K_USP, M68K_MSP, M68K_SR, M68K_VBR,
M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_IR, M68K_PREF_ADDR, M68K_PREF_DATA,
M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA,
M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7,
M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7,
M68K_FP0, M68K_FP1, M68K_FP2, M68K_FP3, M68K_FP4, M68K_FP5, M68K_FP6, M68K_FP7,
M68K_FPSR, M68K_FPCR
};
class m68000_base_device;
extern const device_type M68K;
class m68000_base_device : public cpu_device
{
public:
@ -104,7 +122,6 @@ public:
// construction/destruction
m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
void presave();
void postload();
@ -133,7 +150,6 @@ protected:
void define_state(void);
public:
void set_reset_callback(write_line_delegate callback);
void set_cmpild_callback(write32_delegate callback);
void set_rte_callback(write_line_delegate callback);
@ -141,6 +157,8 @@ public:
uint16_t get_fc();
void set_hmmu_enable(int enable);
void set_fpu_enable(int enable);
int get_fpu_enable();
void set_instruction_hook(read32_delegate ihook);
void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc);
protected:
@ -150,89 +168,91 @@ protected:
m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map);
int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
private:
int has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
public:
uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
//
uint32_t m_dar[16]; /* Data and Address Registers */
uint32_t m_ppc; /* Previous program counter */
uint32_t m_pc; /* Program Counter */
uint32_t m_sp[7]; /* User, Interrupt, and Master Stack Pointers */
uint32_t m_vbr; /* Vector Base Register (m68010+) */
uint32_t m_sfc; /* Source Function Code Register (m68010+) */
uint32_t m_dfc; /* Destination Function Code Register (m68010+) */
uint32_t m_cacr; /* Cache Control Register (m68020, unemulated) */
uint32_t m_caar; /* Cache Address Register (m68020, unemulated) */
uint32_t m_ir; /* Instruction Register */
floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */
uint32_t m_fpiar; /* FPU Instruction Address Register (m68040) */
uint32_t m_fpsr; /* FPU Status Register (m68040) */
uint32_t m_fpcr; /* FPU Control Register (m68040) */
uint32_t m_t1_flag; /* Trace 1 */
uint32_t m_t0_flag; /* Trace 0 */
uint32_t m_s_flag; /* Supervisor */
uint32_t m_m_flag; /* Master/Interrupt state */
uint32_t m_x_flag; /* Extend */
uint32_t m_n_flag; /* Negative */
uint32_t m_not_z_flag; /* Zero, inverted for speedups */
uint32_t m_v_flag; /* Overflow */
uint32_t m_c_flag; /* Carry */
uint32_t m_int_mask; /* I0-I2 */
uint32_t m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
uint32_t m_stopped; /* Stopped state */
uint32_t m_pref_addr; /* Last prefetch address */
uint32_t m_pref_data; /* Data in the prefetch queue */
uint32_t m_sr_mask; /* Implemented status register bits */
uint32_t m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
uint32_t m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
int m_pmmu_enabled; /* Indicates if the PMMU is enabled */
int m_hmmu_enabled; /* Indicates if the HMMU is enabled */
int m_fpu_just_reset; /* Indicates the FPU was just reset */
uint32_t cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
// uint32_t dasm_type; /* disassembly type */
uint32_t dar[16]; /* Data and Address Registers */
uint32_t ppc; /* Previous program counter */
uint32_t pc; /* Program Counter */
uint32_t sp[7]; /* User, Interrupt, and Master Stack Pointers */
uint32_t vbr; /* Vector Base Register (m68010+) */
uint32_t sfc; /* Source Function Code Register (m68010+) */
uint32_t dfc; /* Destination Function Code Register (m68010+) */
uint32_t cacr; /* Cache Control Register (m68020, unemulated) */
uint32_t caar; /* Cache Address Register (m68020, unemulated) */
uint32_t ir; /* Instruction Register */
floatx80 fpr[8]; /* FPU Data Register (m68030/040) */
uint32_t fpiar; /* FPU Instruction Address Register (m68040) */
uint32_t fpsr; /* FPU Status Register (m68040) */
uint32_t fpcr; /* FPU Control Register (m68040) */
uint32_t t1_flag; /* Trace 1 */
uint32_t t0_flag; /* Trace 0 */
uint32_t s_flag; /* Supervisor */
uint32_t m_flag; /* Master/Interrupt state */
uint32_t x_flag; /* Extend */
uint32_t n_flag; /* Negative */
uint32_t not_z_flag; /* Zero, inverted for speedups */
uint32_t v_flag; /* Overflow */
uint32_t c_flag; /* Carry */
uint32_t int_mask; /* I0-I2 */
uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
uint32_t stopped; /* Stopped state */
uint32_t pref_addr; /* Last prefetch address */
uint32_t pref_data; /* Data in the prefetch queue */
uint32_t sr_mask; /* Implemented status register bits */
uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
int has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
int pmmu_enabled; /* Indicates if the PMMU is enabled */
int hmmu_enabled; /* Indicates if the HMMU is enabled */
int fpu_just_reset; /* Indicates the FPU was just reset */
/* Clocks required for instructions / exceptions */
uint32_t m_cyc_bcc_notake_b;
uint32_t m_cyc_bcc_notake_w;
uint32_t m_cyc_dbcc_f_noexp;
uint32_t m_cyc_dbcc_f_exp;
uint32_t m_cyc_scc_r_true;
uint32_t m_cyc_movem_w;
uint32_t m_cyc_movem_l;
uint32_t m_cyc_shift;
uint32_t m_cyc_reset;
uint32_t cyc_bcc_notake_b;
uint32_t cyc_bcc_notake_w;
uint32_t cyc_dbcc_f_noexp;
uint32_t cyc_dbcc_f_exp;
uint32_t cyc_scc_r_true;
uint32_t cyc_movem_w;
uint32_t cyc_movem_l;
uint32_t cyc_shift;
uint32_t cyc_reset;
int m_initial_cycles;
int m_remaining_cycles; /* Number of clocks remaining */
int m_reset_cycles;
uint32_t m_tracing;
int initial_cycles;
int remaining_cycles; /* Number of clocks remaining */
int reset_cycles;
uint32_t tracing;
int m_address_error;
uint32_t m_aerr_address;
uint32_t m_aerr_write_mode;
uint32_t m_aerr_fc;
uint32_t aerr_address;
uint32_t aerr_write_mode;
uint32_t aerr_fc;
/* Virtual IRQ lines state */
uint32_t m_virq_state;
uint32_t m_nmi_pending;
uint32_t virq_state;
uint32_t nmi_pending;
void (m68000_base_device::**m_jump_table)();
const uint8_t* m_cyc_instruction;
const uint8_t* m_cyc_exception;
void (**jump_table)(m68000_base_device *m68k);
const uint8_t* cyc_instruction;
const uint8_t* cyc_exception;
/* Callbacks to host */
device_irq_acknowledge_delegate m_int_ack_callback; /* Interrupt Acknowledge */
write32_delegate m_bkpt_ack_callback; /* Breakpoint Acknowledge */
write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */
write32_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */
write8_delegate m_tas_write_callback; /* Called instead of normal write8 by the TAS instruction,
device_irq_acknowledge_delegate int_ack_callback; /* Interrupt Acknowledge */
write32_delegate bkpt_ack_callback; /* Breakpoint Acknowledge */
write_line_delegate reset_instr_callback; /* Called when a RESET instruction is encountered */
write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */
write8_delegate tas_write_callback; /* Called instead of normal write8 by the TAS instruction,
allowing writeback to be disabled globally or selectively
or other side effects to be implemented */
address_space *m_program, *m_oprogram;
address_space *program, *oprogram;
/* Redirect memory calls */
@ -244,21 +264,25 @@ protected:
typedef delegate<void (offs_t, uint16_t)> m68k_write16_delegate;
typedef delegate<void (offs_t, uint32_t)> m68k_write32_delegate;
// class m68k_memory_interface
// {
public:
void init8(address_space &space, address_space &ospace);
void init16(address_space &space, address_space &ospace);
void init32(address_space &space, address_space &ospace);
void init32mmu(address_space &space, address_space &ospace);
void init32hmmu(address_space &space, address_space &ospace);
offs_t m_opcode_xor; // Address Calculation
m68k_readimm16_delegate m_readimm16; // Immediate read 16 bit
m68k_read8_delegate m_read8;
m68k_read16_delegate m_read16;
m68k_read32_delegate m_read32;
m68k_write8_delegate m_write8;
m68k_write16_delegate m_write16;
m68k_write32_delegate m_write32;
offs_t opcode_xor; // Address Calculation
m68k_readimm16_delegate readimm16; // Immediate read 16 bit
m68k_read8_delegate read8;
m68k_read16_delegate read16;
m68k_read32_delegate read32;
m68k_write8_delegate write8;
m68k_write16_delegate write16;
m68k_write32_delegate write32;
private:
uint16_t m68008_read_immediate_16(offs_t address);
uint16_t read_immediate_16(offs_t address);
uint16_t simple_read_immediate_16(offs_t address);
@ -281,47 +305,57 @@ protected:
uint32_t readlong_d32_hmmu(offs_t address);
void writelong_d32_hmmu(offs_t address, uint32_t data);
// m68000_base_device *m_cpustate;
// };
public:
// m68k_memory_interface memory;
address_space *m_space, *m_ospace;
direct_read_data<0> *m_direct, *m_odirect;
uint32_t m_iotemp;
uint32_t iotemp;
/* save state data */
uint16_t m_save_sr;
uint8_t m_save_stopped;
uint8_t m_save_halted;
uint16_t save_sr;
uint8_t save_stopped;
uint8_t save_halted;
/* PMMU registers */
uint32_t m_mmu_crp_aptr, m_mmu_crp_limit;
uint32_t m_mmu_srp_aptr, m_mmu_srp_limit;
uint32_t m_mmu_urp_aptr; /* 040 only */
uint32_t m_mmu_tc;
uint16_t m_mmu_sr;
uint32_t m_mmu_sr_040;
uint32_t m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES];
uint32_t m_mmu_atc_rr;
uint32_t m_mmu_tt0, m_mmu_tt1;
uint32_t m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1;
uint32_t m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3;
uint32_t m_mmu_last_page_entry, m_mmu_last_page_entry_addr;
uint32_t mmu_crp_aptr, mmu_crp_limit;
uint32_t mmu_srp_aptr, mmu_srp_limit;
uint32_t mmu_urp_aptr; /* 040 only */
uint32_t mmu_tc;
uint16_t mmu_sr;
uint32_t mmu_sr_040;
uint32_t mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
uint32_t mmu_atc_rr;
uint32_t mmu_tt0, mmu_tt1;
uint32_t mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
uint32_t mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
uint32_t mmu_last_page_entry, mmu_last_page_entry_addr;
uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
uint16_t mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
uint16_t mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
uint16_t mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
uint32_t mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
uint16_t mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
uint16_t mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
uint16_t mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */
uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */
bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
uint32_t ic_address[M68K_IC_SIZE]; /* instruction cache address data */
uint32_t ic_data[M68K_IC_SIZE]; /* instruction cache content data */
bool ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
/* 68307 / 68340 internal address map */
address_space *m_internal;
address_space *internal;
/* external instruction hook (does not depend on debug mode) */
read32_delegate instruction_hook;
@ -344,18 +378,10 @@ protected:
void init_cpu_coldfire(void);
void m68ki_exception_interrupt(uint32_t int_level);
void m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level);
inline void m68ki_check_address_error(uint32_t ADDR, uint32_t WRITE_MODE, uint32_t FC)
{
if((ADDR)&1)
{
m_aerr_address = ADDR;
m_aerr_write_mode = WRITE_MODE;
m_aerr_fc = FC;
throw 10;
}
}
void reset_cpu(void);
inline void cpu_execute(void);
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@ -364,11 +390,6 @@ protected:
// device_memory_interface overrides
virtual bool memory_translate(int space, int intention, offs_t &address) override;
#include "m68kcpu.h"
#include "m68kops.h"
#include "m68kfpu.hxx"
#include "m68kmmu.h"
};

7563
src/devices/cpu/m68000/m68k_in.cpp
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File diff suppressed because it is too large Load Diff

1360
src/devices/cpu/m68000/m68kcpu.cpp
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File diff suppressed because it is too large Load Diff

1560
src/devices/cpu/m68000/m68kcpu.h
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File diff suppressed because it is too large Load Diff

1073
src/devices/cpu/m68000/m68kfpu.hxx
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File diff suppressed because it is too large Load Diff

25
src/devices/cpu/m68000/m68kmake.cpp
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@ -789,8 +789,8 @@ static void get_base_name(char* base_name, opcode_struct* op)
/* Write the name of an opcode handler function */
static void write_function_name(FILE* filep, char* base_name)
{
fprintf(filep, "void m68000_base_device::%s()\n", base_name);
fprintf(g_prototype_file, "void %s();\n", base_name);
fprintf(filep, "void m68000_base_device_ops::%s(m68000_base_device* mc68kcpu)\n", base_name);
fprintf(g_prototype_file, "static void %s(m68000_base_device* mc68kcpu);\n", base_name);
}
static void add_opcode_output_table_entry(opcode_struct* op, char* name)
@ -803,7 +803,7 @@ static void add_opcode_output_table_entry(opcode_struct* op, char* name)
*ptr = *op;
sprintf( ptr->name, "&m68000_base_device::%s", name);
sprintf( ptr->name, "m68000_base_device_ops::%s", name);
ptr->bits = num_bits(ptr->op_mask);
}
@ -880,17 +880,17 @@ static void generate_opcode_handler(FILE* filep, body_struct* body, replace_stru
/* Add any replace strings needed */
if(ea_mode != EA_MODE_NONE)
{
sprintf(str, "EA_%s_8()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "EA_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_EA_AY_8, str);
sprintf(str, "EA_%s_16()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "EA_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_EA_AY_16, str);
sprintf(str, "EA_%s_32()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "EA_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_EA_AY_32, str);
sprintf(str, "OPER_%s_8()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "OPER_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_OPER_AY_8, str);
sprintf(str, "OPER_%s_16()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "OPER_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_OPER_AY_16, str);
sprintf(str, "OPER_%s_32()", g_ea_info_table[ea_mode].ea_add);
sprintf(str, "OPER_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add);
add_replace_string(replace, ID_OPHANDLER_OPER_AY_32, str);
}
@ -972,8 +972,8 @@ static void generate_opcode_cc_variants(FILE* filep, body_struct* body, replace_
for(i=2;i<16;i++)
{
/* Add replace strings for this condition code */
sprintf(repl, "COND_%s()", g_cc_table[i][1]);
sprintf(replnot, "COND_NOT_%s()", g_cc_table[i][1]);
sprintf(repl, "COND_%s(mc68kcpu)", g_cc_table[i][1]);
sprintf(replnot, "COND_NOT_%s(mc68kcpu)", g_cc_table[i][1]);
add_replace_string(replace, ID_OPHANDLER_CC, repl);
add_replace_string(replace, ID_OPHANDLER_NOT_CC, replnot);
@ -1358,7 +1358,9 @@ int main(int argc, char *argv[])
error_exit("Duplicate opcode handler section");
fprintf(g_table_file, "%s\n\n", ophandler_header_insert);
fprintf(g_prototype_file, "#ifdef OPCODE_PROTOTYPES\n\n");
process_opcode_handlers(g_table_file);
fprintf(g_prototype_file, "#else\n");
fprintf(g_table_file, "%s\n\n", ophandler_footer_insert);
ophandler_body_read = 1;
@ -1388,6 +1390,7 @@ int main(int argc, char *argv[])
fprintf(g_table_file, "%s\n\n", table_footer_insert);
fprintf(g_prototype_file, "%s\n\n", prototype_footer_insert);
fprintf(g_prototype_file, "#endif\n");
break;
}

534
src/devices/cpu/m68000/m68kmmu.h
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File diff suppressed because it is too large Load Diff

15
src/devices/cpu/m6809/hd6309.cpp
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@ -126,30 +126,19 @@ March 2013 NPW:
//**************************************************************************
DEFINE_DEVICE_TYPE(HD6309, hd6309_device, "hd6309", "HD6309")
DEFINE_DEVICE_TYPE(HD6309E, hd6309e_device, "hd6309e", "HD6309E")
//-------------------------------------------------
// hd6309_device - constructor
//-------------------------------------------------
hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider) :
m6809_base_device(mconfig, tag, owner, clock, type, divider),
hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6809_base_device(mconfig, tag, owner, clock, HD6309, 4),
m_md(0),
m_temp_im(0)
{
}
hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
hd6309_device(mconfig, tag, owner, clock, HD6309, 4)
{
}
hd6309e_device::hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
hd6309_device(mconfig, tag, owner, clock, HD6309E, 1)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------

15
src/devices/cpu/m6809/hd6309.h
View File

@ -20,9 +20,8 @@
// TYPE DEFINITIONS
//**************************************************************************
// device type definitions
// device type definition
DECLARE_DEVICE_TYPE(HD6309, hd6309_device)
DECLARE_DEVICE_TYPE(HD6309E, hd6309e_device)
// ======================> hd6309_device
@ -33,9 +32,6 @@ public:
hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// delegating constructor
hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
@ -142,15 +138,6 @@ enum
HD6309_ZERO_WORD
};
// ======================> hd6309e_device
class hd6309e_device : public hd6309_device
{
public:
// construction/destruction
hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
#define HD6309_IRQ_LINE M6809_IRQ_LINE /* 0 - IRQ line number */
#define HD6309_FIRQ_LINE M6809_FIRQ_LINE /* 1 - FIRQ line number */

52
src/devices/cpu/m6809/m6809.cpp
View File

@ -77,30 +77,6 @@ March 2013 NPW:
Removed unused jmp/jsr _slap functions from 6809ops.c,
m6809_slapstick check moved into the opcode functions.
******************************************************************************
M6809 cycle timings are relative to a four-phase clock cycle defined by
the Q and E signals on pins 35 and 34. The Q clock must lead the E clock
by approximately half a cycle. On the MC6809E, Q and E are inputs, and
one 74LS74 wired as a two-stage Johnson counter is almost sufficient to
generate both (though E requires voltage levels above TTL). On the
MC6809, however, Q and E are output from an internal clock generator
which can be driven by a crystal oscillator connected to pins 38 and 39.
(The MC6809E reuses the same numbered pins for the unrelated TSC and LIC
functions.) The frequencies of Q and E on the MC6809 are that of the XTAL
divided by 4. MAME's emulation formerly assigned this internal clock
divider to the MC6809E and not to the MC6809; the confusion resulting
from this error is in the process of being straightened out.
Maximum clock ratings:
Q & E EXTAL
MC6809(E) 1.0 MHz 4.0 MHz
MC68A09(E) 1.5 MHz 6.0 MHz
MC68B09(E) 2.0 MHz 8.0 MHz
HD63B09(E) 2.0 MHz 8.0 MHz
HD63C09(E) 3.0 MHz 12.0 MHz
*****************************************************************************/
#include "emu.h"
@ -128,10 +104,8 @@ March 2013 NPW:
// DEVICE INTERFACE
//**************************************************************************
DEFINE_DEVICE_TYPE(MC6809, mc6809_device, "mc6809", "MC6809")
DEFINE_DEVICE_TYPE(MC6809E, mc6809e_device, "mc6809e", "MC6809E")
DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "MC6809 (legacy)")
DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "MC6809E (legacy)")
DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "M6809")
DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "M6809E")
//-------------------------------------------------
@ -603,28 +577,6 @@ void m6809_base_device::mi_default::write(uint16_t adr, uint8_t val)
//-------------------------------------------------
// mc6809_device
//-------------------------------------------------
mc6809_device::mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6809_base_device(mconfig, tag, owner, clock, MC6809, 4)
{
}
//-------------------------------------------------
// mc6809e_device
//-------------------------------------------------
mc6809e_device::mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6809_base_device(mconfig, tag, owner, clock, MC6809E, 1)
{
}
//-------------------------------------------------
// m6809_device
//-------------------------------------------------

41
src/devices/cpu/m6809/m6809.h
View File

@ -19,8 +19,6 @@
//**************************************************************************
// device type definition
DECLARE_DEVICE_TYPE(MC6809, mc6809_device)
DECLARE_DEVICE_TYPE(MC6809E, mc6809e_device)
DECLARE_DEVICE_TYPE(M6809, m6809_device)
DECLARE_DEVICE_TYPE(M6809E, m6809e_device)
@ -294,33 +292,7 @@ private:
const char *inputnum_string(int inputnum);
};
// ======================> mc6809_device
class mc6809_device : public m6809_base_device
{
public:
// construction/destruction
mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// ======================> mc6809e_device
// MC6809E has LIC line to indicate opcode/data fetch
#define MCFG_MC6809E_LIC_CB(_devcb) \
devcb = &mc6809e_device::set_lic_cb(*device, DEVCB_##_devcb);
class mc6809e_device : public m6809_base_device
{
public:
// construction/destruction
mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast<mc6809e_device &>(device).m_lic_func.set_callback(object); }
};
// ======================> m6809_device (LEGACY)
// ======================> m6809_device
class m6809_device : public m6809_base_device
{
@ -329,13 +301,20 @@ public:
m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// ======================> m6809e_device (LEGACY)
// ======================> m6809e_device
#define MCFG_M6809E_LIC_CB(_devcb) \
devcb = &m6809e_device::set_lic_cb(*device, DEVCB_##_devcb);
class m6809e_device : public m6809_base_device
{
public:
// construction/destruction
m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast<m6809e_device &>(device).m_lic_func.set_callback(object); }
};
enum
@ -347,4 +326,6 @@ enum
#define M6809_IRQ_LINE 0 /* IRQ line number */
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
/* M6809e has LIC line to indicate opcode/data fetch */
#endif // MAME_CPU_M6809_M6809_H

2
src/devices/cpu/sm510/sm510.h
View File

@ -17,7 +17,7 @@
#define MCFG_SM510_READ_K_CB(_devcb) \
devcb = &sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
// when in halt state, any K input going High can wake up the CPU,
// driver is required to use set_input_line(SM510_INPUT_LINE_K, state)
// driver is required to use execute_set_input(SM510_INPUT_LINE_K, state)
#define SM510_INPUT_LINE_K 0
// 1-bit BA(aka alpha) input pin (pull-up)

2
src/devices/cpu/tms1000/tms0970.cpp
View File

@ -110,7 +110,7 @@ void tms0970_cpu_device::device_reset()
if (imask & 0x40 && (imask & 0x20) == 0)
msel = (op & 0xf) | (op >> 1 & 0x10);
msel = bitswap<8>(msel,7,6,5,0,1,2,3,4); // lines are reversed
msel = BITSWAP8(msel,7,6,5,0,1,2,3,4); // lines are reversed
u32 mmask = m_mpla->read(msel);
mmask ^= 0x09fe; // invert active-negative

4
src/devices/cpu/tms1000/tms0980.cpp
View File

@ -110,7 +110,7 @@ u32 tms0980_cpu_device::decode_fixed(u16 op)
u32 tms0980_cpu_device::decode_micro(u8 sel)
{
u32 decode = 0;
sel = bitswap<8>(sel,7,6,0,1,2,3,4,5); // lines are reversed
sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed
u32 mask = m_mpla->read(sel);
mask ^= 0x43fc3; // invert active-negative
@ -175,7 +175,7 @@ void tms0980_cpu_device::read_opcode()
{
debugger_instruction_hook(this, m_rom_address);
m_opcode = m_program->read_word(m_rom_address) & 0x1ff;
m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes
m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes
m_fixed = m_fixed_decode[m_opcode];
m_micro = read_micro();

20
src/devices/cpu/tms1000/tms1000.cpp
View File

@ -8,7 +8,7 @@
TODO:
- add TMS1270 (10 O pins, how does that work?)
- add TMS1200C (has L input pins like TMS1600)
- add TMS1000C-specific mpla
- add HALT input pin for TMS1000C
*/
@ -34,13 +34,6 @@ DEFINE_DEVICE_TYPE(TMS1700, tms1700_cpu_device, "tms1700", "TMS1700") // 28-p
DEFINE_DEVICE_TYPE(TMS1730, tms1730_cpu_device, "tms1730", "TMS1730") // 20-pin DIP, same die as TMS1700, package has less pins: 6 R pins, 5 O pins (output PLA is still 8-bit, O1,O3,O5 unused)
// CMOS versions (3-level stack, HALT pin)
// - RAM at top-left, ROM at top-right(rotate CCW)
// - ROM ordering is different:
// * row select is linear (0-63)
// * bit select is 7-0 instead of 0-7
// * page select doesn't flip in the middle
// - 32-term mpla at bottom-right, different order
// - 32-term opla at bottom-left, ordered O7-O0(0 or 1), and A8,4,2,1,S
DEFINE_DEVICE_TYPE(TMS1000C, tms1000c_cpu_device, "tms1000c", "TMS1000C") // 28-pin SDIP, 10 R pins
// 2nd source Motorola chips
@ -129,17 +122,6 @@ MACHINE_CONFIG_MEMBER(tms1000_cpu_device::device_add_mconfig)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig)
// microinstructions PLA, output PLA
//MCFG_PLA_ADD("mpla", 8, 16, 32)
MCFG_PLA_ADD("mpla", 8, 16, 30)
MCFG_PLA_FILEFORMAT(BERKELEY)
MCFG_PLA_ADD("opla", 5, 8, 32)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
// disasm
util::disasm_interface *tms1000_cpu_device::create_disassembler()
{

2
src/devices/cpu/tms1000/tms1000.h
View File

@ -69,8 +69,6 @@ public:
protected:
// overrides
virtual void device_add_mconfig(machine_config &config) override;
virtual void op_br() override { op_br3(); } // 3-level stack
virtual void op_call() override { op_call3(); } // "
virtual void op_retn() override { op_retn3(); } // "

5
src/devices/cpu/tms1000/tms1100.cpp
View File

@ -4,9 +4,6 @@
TMS1000 family - TMS1100, TMS1170, TMS1300, TMS1370
TODO:
- add TMS1100C when needed
*/
#include "emu.h"
@ -18,7 +15,7 @@
DEFINE_DEVICE_TYPE(TMS1100, tms1100_cpu_device, "tms1100", "TMS1100") // 28-pin DIP, 11 R pins
DEFINE_DEVICE_TYPE(TMS1170, tms1170_cpu_device, "tms1170", "TMS1170") // high voltage version
DEFINE_DEVICE_TYPE(TMS1300, tms1300_cpu_device, "tms1300", "TMS1300") // 40-pin DIP, 16 R pins
DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version, also seen in 28-pin package(some O/R pins unavailable)
DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version
// internal memory maps

43
src/devices/cpu/tms1000/tms1k_base.cpp
View File

@ -5,7 +5,7 @@
TMS1000 family - base/shared
TODO:
- accurate INIT pin (currently, just use INPUT_LINE_RESET)
- INIT pin
The TMS0980 and TMS1000-family MCU cores are very similar. The TMS0980 has a
@ -144,7 +144,6 @@ void tms1k_base_device::device_start()
m_r = 0;
m_o = 0;
m_o_index = 0;
m_halt = false;
m_cki_bus = 0;
m_c4 = 0;
m_p = 0;
@ -184,7 +183,6 @@ void tms1k_base_device::device_start()
save_item(NAME(m_r));
save_item(NAME(m_o));
save_item(NAME(m_o_index));
save_item(NAME(m_halt));
save_item(NAME(m_cki_bus));
save_item(NAME(m_c4));
save_item(NAME(m_p));
@ -226,14 +224,6 @@ void tms1k_base_device::device_start()
m_icountptr = &m_icount;
}
device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_DATA, &m_data_config)
};
}
//-------------------------------------------------
@ -269,6 +259,13 @@ void tms1k_base_device::device_reset()
m_power_off(0);
}
device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_DATA, &m_data_config)
};
}
//-------------------------------------------------
@ -294,7 +291,7 @@ void tms1k_base_device::read_opcode()
{
debugger_instruction_hook(this, m_rom_address);
m_opcode = m_program->read_byte(m_rom_address);
m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes
m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes
m_fixed = m_fixed_decode[m_opcode];
m_micro = m_micro_decode[m_opcode];
@ -308,15 +305,6 @@ void tms1k_base_device::read_opcode()
// i/o handling
//-------------------------------------------------
void tms1k_base_device::execute_set_input(int line, int state)
{
if (line != TMS1XXX_INPUT_LINE_HALT)
return;
// HALT pin (CMOS only)
m_halt = bool(state);
}
void tms1k_base_device::write_o_output(u8 index)
{
// a hardcoded table is supported if the output pla is unknown
@ -609,17 +597,9 @@ void tms1k_base_device::op_sbl()
void tms1k_base_device::execute_run()
{
while (m_icount > 0)
do
{
m_icount--;
if (m_halt)
{
// not running (output pins remain unchanged)
m_icount = 0;
return;
}
switch (m_subcycle)
{
case 0:
@ -742,7 +722,6 @@ void tms1k_base_device::execute_run()
// execute: br/call 1/2
break;
}
m_subcycle = (m_subcycle + 1) % 6;
}
} while (m_icount > 0);
}

89
src/devices/cpu/tms1000/tms1k_base.h
View File

@ -38,9 +38,6 @@
#define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \
devcb = &tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb);
// HALT input pin on CMOS chips (use set_input_line)
#define TMS1XXX_INPUT_LINE_HALT 0
// pinout reference
@ -108,7 +105,6 @@ protected:
virtual u32 execute_min_cycles() const override { return 1; }
virtual u32 execute_max_cycles() const override { return 6; }
virtual u32 execute_input_lines() const override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
// device_memory_interface overrides
@ -218,51 +214,50 @@ protected:
optional_device<pla_device> m_opla;
optional_device<pla_device> m_spla;
u8 m_pc; // 6 or 7-bit program counter
u32 m_sr; // 6 or 7-bit subroutine return register(s)
u8 m_pa; // 4-bit page address register
u8 m_pb; // 4-bit page buffer register
u16 m_ps; // 4-bit page subroutine register(s)
u8 m_a; // 4-bit accumulator
u8 m_x; // 2,3,or 4-bit RAM X register
u8 m_y; // 4-bit RAM Y register
u8 m_ca; // chapter address register
u8 m_cb; // chapter buffer register
u16 m_cs; // chapter subroutine register(s)
u16 m_r;
u16 m_o;
u8 m_cki_bus;
u8 m_c4;
u8 m_p; // 4-bit adder p(lus)-input
u8 m_n; // 4-bit adder n(egative)-input
u8 m_adder_out; // adder result
u8 m_carry_in; // adder carry-in bit
u8 m_carry_out; // adder carry-out bit
u8 m_status;
u8 m_status_latch;
u8 m_eac; // end around carry bit
u8 m_clatch; // call latch bit(s)
u8 m_add; // add latch bit
u8 m_bl; // branch latch bit
u8 m_pc; // 6 or 7-bit program counter
u32 m_sr; // 6 or 7-bit subroutine return register(s)
u8 m_pa; // 4-bit page address register
u8 m_pb; // 4-bit page buffer register
u16 m_ps; // 4-bit page subroutine register(s)
u8 m_a; // 4-bit accumulator
u8 m_x; // 2,3,or 4-bit RAM X register
u8 m_y; // 4-bit RAM Y register
u8 m_ca; // chapter address register
u8 m_cb; // chapter buffer register
u16 m_cs; // chapter subroutine register(s)
u16 m_r;
u16 m_o;
u8 m_cki_bus;
u8 m_c4;
u8 m_p; // 4-bit adder p(lus)-input
u8 m_n; // 4-bit adder n(egative)-input
u8 m_adder_out; // adder result
u8 m_carry_in; // adder carry-in bit
u8 m_carry_out; // adder carry-out bit
u8 m_status;
u8 m_status_latch;
u8 m_eac; // end around carry bit
u8 m_clatch; // call latch bit(s)
u8 m_add; // add latch bit
u8 m_bl; // branch latch bit
u8 m_ram_in;
u8 m_dam_in;
int m_ram_out; // signed!
u8 m_ram_address;
u16 m_rom_address;
u16 m_opcode;
u32 m_fixed;
u32 m_micro;
int m_subcycle;
int m_icount;
u8 m_o_index;
bool m_halt; // halt pin state
u8 m_ram_in;
u8 m_dam_in;
int m_ram_out; // signed!
u8 m_ram_address;
u16 m_rom_address;
u16 m_opcode;
u32 m_fixed;
u32 m_micro;
int m_subcycle;
int m_icount;
u8 m_o_index;
u8 m_o_pins; // how many O pins
u8 m_r_pins; // how many R pins
u8 m_pc_bits; // how many program counter bits
u8 m_byte_bits; // how many bits per 'byte'
u8 m_x_bits; // how many X register bits
u8 m_o_pins; // how many O pins
u8 m_r_pins; // how many R pins
u8 m_pc_bits; // how many program counter bits
u8 m_byte_bits; // how many bits per 'byte'
u8 m_x_bits; // how many X register bits
address_space *m_program;
address_space *m_data;

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