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https://github.com/holub/mame
synced 2025-04-19 15:11:37 +03:00
iwm: Fix the random track trashing due to not clearing the write buffer correctly
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parent
f6c18c498e
commit
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@ -130,7 +130,7 @@ void iwm_device::write(offs_t offset, u8 data)
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void iwm_device::flush_write()
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{
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if(m_floppy && m_last_sync > m_flux_write_start) {
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if(m_floppy && m_flux_write_start && m_last_sync > m_flux_write_start) {
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if(m_flux_write_count && m_flux_write[m_flux_write_count-1] == m_last_sync)
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m_flux_write_count--;
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attotime start = cycles_to_time(m_flux_write_start);
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@ -139,9 +139,9 @@ void iwm_device::flush_write()
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for(u32 i=0; i != m_flux_write_count; i++)
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fluxes[i] = cycles_to_time(m_flux_write[i]);
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m_floppy->write_flux(start, end, m_flux_write_count, m_flux_write_count ? &fluxes[0] : nullptr);
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m_flux_write_start = m_last_sync;
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}
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m_flux_write_count = 0;
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m_flux_write_start = m_last_sync;
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}
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u8 iwm_device::control(int offset, u8 data)
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@ -176,6 +176,7 @@ u8 iwm_device::control(int offset, u8 data)
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} else {
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if(m_mode & 0x04) {
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flush_write();
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m_flux_write_start = 0;
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m_active = MODE_IDLE;
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m_status &= ~0x20;
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m_whd &= ~0x40;
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@ -191,8 +192,10 @@ u8 iwm_device::control(int offset, u8 data)
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if(changed & 0xd0) {
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if((m_control & 0xc0) == 0x00 && m_active) {
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if(m_rw == MODE_WRITE)
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if(m_rw == MODE_WRITE) {
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flush_write();
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m_flux_write_start = 0;
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}
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m_rw = MODE_READ;
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m_rw_state = S_IDLE;
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m_next_state_change = 0;
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@ -213,6 +216,7 @@ u8 iwm_device::control(int offset, u8 data)
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} else if(m_rw == MODE_WRITE) {
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if(!(m_control & 0x80)) {
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flush_write();
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m_flux_write_start = 0;
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m_rw = MODE_IDLE;
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}
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} else
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