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https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
ddenlovr: ACCESSING_BITS cleanup
This commit is contained in:
parent
bb11db2bd1
commit
5447b6e032
@ -265,24 +265,20 @@ public:
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DECLARE_CUSTOM_INPUT_MEMBER(mjflove_blitter_r);
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DECLARE_WRITE8_MEMBER(ddenlovr_bgcolor_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_bgcolor2_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_bgcolor_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_priority_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_priority2_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_priority_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_layer_enable_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_layer_enable2_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_layer_enable_w);
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DECLARE_WRITE8_MEMBER(hanakanz_blitter_reg_w);
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DECLARE_WRITE8_MEMBER(hanakanz_blitter_data_w);
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DECLARE_WRITE8_MEMBER(rongrong_blitter_w);
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DECLARE_WRITE16_MEMBER(ddenlovr_blitter_w);
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DECLARE_WRITE16_MEMBER(ddenlovr_blitter_irq_ack_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_blitter_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_blitter_irq_ack_w);
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DECLARE_READ8_MEMBER(rongrong_gfxrom_r);
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DECLARE_READ16_MEMBER(ddenlovr_gfxrom_r);
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DECLARE_WRITE16_MEMBER(ddenlovr_coincounter_0_w);
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DECLARE_WRITE16_MEMBER(ddenlovr_coincounter_1_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_coincounter_0_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_coincounter_1_w);
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DECLARE_WRITE8_MEMBER(rongrong_palette_w);
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DECLARE_WRITE16_MEMBER(ddenlovr_palette_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_palette_base_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_palette_base2_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_palette_mask_w);
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@ -291,30 +287,24 @@ public:
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DECLARE_WRITE8_MEMBER(ddenlovr_transparency_pen2_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_transparency_mask_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_transparency_mask2_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_palette_base_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_palette_mask_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_transparency_pen_w);
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DECLARE_WRITE16_MEMBER(ddenlovr16_transparency_mask_w);
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DECLARE_READ8_MEMBER(unk_r);
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DECLARE_READ16_MEMBER(unk16_r);
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DECLARE_WRITE16_MEMBER(ddenlovr_select_16_w);
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DECLARE_WRITE8_MEMBER(ddenlovr_select2_w);
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DECLARE_WRITE16_MEMBER(ddenlovr_select2_16_w);
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DECLARE_READ8_MEMBER(rongrong_input2_r);
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DECLARE_READ16_MEMBER(quiz365_input2_r);
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DECLARE_WRITE8_MEMBER(rongrong_blitter_busy_w);
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DECLARE_READ8_MEMBER(rongrong_blitter_busy_r);
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DECLARE_WRITE16_MEMBER(quiz365_coincounter_w);
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DECLARE_WRITE8_MEMBER(quiz365_coincounter_w);
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DECLARE_READ16_MEMBER(quiz365_protection_r);
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DECLARE_WRITE16_MEMBER(quiz365_protection_w);
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DECLARE_READ16_MEMBER(ddenlovj_dsw_r);
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DECLARE_WRITE16_MEMBER(ddenlovj_coincounter_w);
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DECLARE_WRITE8_MEMBER(ddenlovj_coincounter_w);
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DECLARE_READ16_MEMBER(ddenlovrk_protection1_r);
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DECLARE_READ16_MEMBER(ddenlovrk_protection2_r);
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DECLARE_WRITE16_MEMBER(ddenlovrk_protection2_w);
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DECLARE_READ16_MEMBER(nettoqc_input_r);
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DECLARE_READ16_MEMBER(nettoqc_protection1_r);
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DECLARE_WRITE16_MEMBER(nettoqc_coincounter_w);
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DECLARE_WRITE8_MEMBER(nettoqc_coincounter_w);
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DECLARE_READ16_MEMBER(ultrchmp_protection2_r);
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DECLARE_WRITE16_MEMBER(ultrchmp_protection2_w);
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DECLARE_READ8_MEMBER(rongrong_input_r);
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@ -425,12 +415,12 @@ public:
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DECLARE_WRITE8_MEMBER(htengoku_dsw_w);
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DECLARE_READ8_MEMBER(htengoku_dsw_r);
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DECLARE_WRITE8_MEMBER( quizchq_oki_bank_w );
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DECLARE_WRITE16_MEMBER( ddenlovr_oki_bank_w );
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DECLARE_WRITE16_MEMBER( quiz365_oki_bank1_w );
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DECLARE_WRITE16_MEMBER( quiz365_oki_bank2_w );
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DECLARE_WRITE8_MEMBER( ddenlovr_oki_bank_w );
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DECLARE_WRITE8_MEMBER( quiz365_oki_bank1_w );
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DECLARE_WRITE8_MEMBER( quiz365_oki_bank2_w );
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DECLARE_WRITE8_MEMBER( ddenlovr_select_w );
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DECLARE_READ8_MEMBER( quiz365_input_r );
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DECLARE_WRITE16_MEMBER( nettoqc_oki_bank_w );
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DECLARE_WRITE8_MEMBER( nettoqc_oki_bank_w );
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DECLARE_WRITE8_MEMBER( hanakanz_oki_bank_w );
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DECLARE_WRITE8_MEMBER( mjchuuka_oki_bank_w );
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DECLARE_READ8_MEMBER( hginga_dsw_r );
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@ -605,13 +595,6 @@ WRITE8_MEMBER(ddenlovr_state::ddenlovr_bgcolor2_w)
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m_ddenlovr_bgcolor2 = data;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_bgcolor_w)
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{
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if (ACCESSING_BITS_0_7)
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ddenlovr_bgcolor_w(space, offset, data);
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}
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_priority_w)
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{
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m_ddenlovr_priority = data;
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@ -622,13 +605,6 @@ WRITE8_MEMBER(ddenlovr_state::ddenlovr_priority2_w)
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m_ddenlovr_priority2 = data;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_priority_w)
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{
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if (ACCESSING_BITS_0_7)
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ddenlovr_priority_w(space, offset, data);
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}
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_layer_enable_w)
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{
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m_ddenlovr_layer_enable = data;
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@ -640,14 +616,6 @@ WRITE8_MEMBER(ddenlovr_state::ddenlovr_layer_enable2_w)
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_layer_enable_w)
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{
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if (ACCESSING_BITS_0_7)
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ddenlovr_layer_enable_w(space, offset, data);
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}
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void ddenlovr_state::do_plot( int x, int y, int pen )
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{
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int addr, temp;
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@ -1511,26 +1479,22 @@ WRITE8_MEMBER(ddenlovr_state::rongrong_blitter_w)
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blitter_w(space, 0, offset, data, 0xf8);
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_blitter_w)
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_blitter_w)
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{
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if (ACCESSING_BITS_0_7)
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blitter_w(space, 0, offset, data & 0xff, 0);
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blitter_w(space, 0, offset, data, 0);
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_blitter_irq_ack_w)
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_blitter_irq_ack_w)
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{
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if (ACCESSING_BITS_0_7)
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if (data & 1)
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{
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if (data & 1)
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{
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m_ddenlovr_blitter_irq_enable = 1;
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}
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else
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{
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m_ddenlovr_blitter_irq_enable = 0;
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m_ddenlovr_blitter_irq_flag = 0;
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}
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m_ddenlovr_blitter_irq_enable = 1;
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}
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else
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{
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m_ddenlovr_blitter_irq_enable = 0;
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m_ddenlovr_blitter_irq_flag = 0;
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}
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}
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@ -1701,15 +1665,14 @@ CUSTOM_INPUT_MEMBER(ddenlovr_state::ddenlovr_blitter_irq_r)
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return m_ddenlovr_blitter_irq_flag;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_coincounter_0_w)
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_coincounter_0_w)
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{
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if (ACCESSING_BITS_0_7)
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machine().bookkeeping().coin_counter_w(0, data & 1);
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machine().bookkeeping().coin_counter_w(0, data & 1);
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_coincounter_1_w)
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_coincounter_1_w)
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{
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if (ACCESSING_BITS_0_7)
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machine().bookkeeping().coin_counter_w(1, data & 1);
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machine().bookkeeping().coin_counter_w(1, data & 1);
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}
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@ -1731,13 +1694,6 @@ WRITE8_MEMBER(ddenlovr_state::rongrong_palette_w)
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m_palette->set_pen_color(indx, pal5bit(r), pal5bit(g), pal5bit(b));
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_palette_w)
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{
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if (ACCESSING_BITS_0_7)
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rongrong_palette_w(space, offset, data & 0xff);
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}
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_palette_base_w)
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{
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m_ddenlovr_palette_base[offset] = data;
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@ -1781,62 +1737,26 @@ WRITE8_MEMBER(ddenlovr_state::ddenlovr_transparency_mask2_w)
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_palette_base_w)
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{
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if (ACCESSING_BITS_0_7)
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m_ddenlovr_palette_base[offset] = data & 0xff;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_palette_mask_w)
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{
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if (ACCESSING_BITS_0_7)
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m_ddenlovr_palette_mask[offset] = data & 0xff;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_transparency_pen_w)
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{
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if (ACCESSING_BITS_0_7)
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m_ddenlovr_transparency_pen[offset] = data & 0xff;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr16_transparency_mask_w)
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{
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if (ACCESSING_BITS_0_7)
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m_ddenlovr_transparency_mask[offset] = data & 0xff;
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}
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WRITE8_MEMBER(ddenlovr_state::quizchq_oki_bank_w )
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{
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m_oki->set_rom_bank(data & 1);
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_oki_bank_w )
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_oki_bank_w )
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{
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if (ACCESSING_BITS_0_7)
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{
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m_oki->set_rom_bank(data & 7);
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}
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m_oki->set_rom_bank(data & 7);
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}
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WRITE16_MEMBER(ddenlovr_state::quiz365_oki_bank1_w )
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WRITE8_MEMBER(ddenlovr_state::quiz365_oki_bank1_w )
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{
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if (ACCESSING_BITS_0_7)
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{
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m_okibank = (m_okibank & 2) | (data & 1);
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m_oki->set_rom_bank(m_okibank);
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}
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m_okibank = (m_okibank & 2) | (data & 1);
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m_oki->set_rom_bank(m_okibank);
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}
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WRITE16_MEMBER(ddenlovr_state::quiz365_oki_bank2_w )
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WRITE8_MEMBER(ddenlovr_state::quiz365_oki_bank2_w )
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{
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if (ACCESSING_BITS_0_7)
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{
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m_okibank = (m_okibank & 1) | ((data & 1) << 1);
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m_oki->set_rom_bank(m_okibank);
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}
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m_okibank = (m_okibank & 1) | ((data & 1) << 1);
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m_oki->set_rom_bank(m_okibank);
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}
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@ -1857,23 +1777,11 @@ WRITE8_MEMBER(ddenlovr_state::ddenlovr_select_w )
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m_dsw_sel = data;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_select_16_w)
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{
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if (ACCESSING_BITS_0_7)
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m_dsw_sel = data;
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}
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WRITE8_MEMBER(ddenlovr_state::ddenlovr_select2_w)
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{
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m_input_sel = data;
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}
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WRITE16_MEMBER(ddenlovr_state::ddenlovr_select2_16_w)
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{
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if (ACCESSING_BITS_0_7)
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m_input_sel = data;
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}
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READ8_MEMBER(ddenlovr_state::rongrong_input2_r)
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{
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// logerror("%04x: input2_r offset %d select %x\n", space.device().safe_pc(), offset, m_input_sel);
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@ -1933,15 +1841,12 @@ READ8_MEMBER(ddenlovr_state::rongrong_blitter_busy_r)
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}
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WRITE16_MEMBER(ddenlovr_state::quiz365_coincounter_w)
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WRITE8_MEMBER(ddenlovr_state::quiz365_coincounter_w)
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{
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if (ACCESSING_BITS_0_7)
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if (m_input_sel == 0x1c)
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{
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if (m_input_sel == 0x1c)
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{
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machine().bookkeeping().coin_counter_w(0, ~data & 1);
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machine().bookkeeping().coin_counter_w(1, ~data & 4);
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}
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machine().bookkeeping().coin_counter_w(0, ~data & 1);
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machine().bookkeeping().coin_counter_w(1, ~data & 4);
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}
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}
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@ -1968,25 +1873,25 @@ WRITE16_MEMBER(ddenlovr_state::quiz365_protection_w)
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static ADDRESS_MAP_START( quiz365_map, AS_PROGRAM, 16, ddenlovr_state )
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AM_RANGE(0x000000, 0x17ffff) AM_ROM // ROM
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AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w) // Palette
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AM_RANGE(0x200000, 0x2003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
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AM_RANGE(0x200c02, 0x200c03) AM_READ(quiz365_protection_r) // Protection
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AM_RANGE(0x200e0a, 0x200e0d) AM_WRITE(quiz365_protection_w) // Protection
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// AM_RANGE(0x201000, 0x2017ff) AM_WRITEONLY // ?
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AM_RANGE(0x300200, 0x300201) AM_WRITE(ddenlovr_select2_16_w)
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AM_RANGE(0x300202, 0x300203) AM_WRITE(quiz365_coincounter_w) // Coin Counters + more stuff written on startup
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AM_RANGE(0x300200, 0x300201) AM_WRITE8(ddenlovr_select2_w, 0x00ff)
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AM_RANGE(0x300202, 0x300203) AM_WRITE8(quiz365_coincounter_w, 0x00ff) // Coin Counters + more stuff written on startup
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AM_RANGE(0x300204, 0x300207) AM_READ(quiz365_input2_r) //
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AM_RANGE(0x300240, 0x300247) AM_WRITE(ddenlovr16_palette_base_w)
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AM_RANGE(0x300248, 0x30024f) AM_WRITE(ddenlovr16_palette_mask_w)
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AM_RANGE(0x300250, 0x300257) AM_WRITE(ddenlovr16_transparency_pen_w)
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AM_RANGE(0x300258, 0x30025f) AM_WRITE(ddenlovr16_transparency_mask_w)
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AM_RANGE(0x300268, 0x300269) AM_WRITE(ddenlovr16_bgcolor_w)
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AM_RANGE(0x30026a, 0x30026b) AM_WRITE(ddenlovr16_priority_w)
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AM_RANGE(0x30026c, 0x30026d) AM_WRITE(ddenlovr16_layer_enable_w)
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AM_RANGE(0x300240, 0x300247) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
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AM_RANGE(0x300248, 0x30024f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
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AM_RANGE(0x300250, 0x300257) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
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AM_RANGE(0x300258, 0x30025f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
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AM_RANGE(0x300268, 0x300269) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
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AM_RANGE(0x30026a, 0x30026b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
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AM_RANGE(0x30026c, 0x30026d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
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AM_RANGE(0x300270, 0x300271) AM_READ(unk16_r) // ? must be 78 on startup (not necessary in ddlover)
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AM_RANGE(0x300280, 0x300283) AM_WRITE(ddenlovr_blitter_w)
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AM_RANGE(0x300280, 0x300283) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
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AM_RANGE(0x300286, 0x300287) AM_READ(ddenlovr_gfxrom_r) // Video Chip
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AM_RANGE(0x3002c0, 0x3002c1) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)// Sound
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@ -1994,9 +1899,9 @@ static ADDRESS_MAP_START( quiz365_map, AS_PROGRAM, 16, ddenlovr_state )
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AM_RANGE(0x300340, 0x30035f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
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AM_RANGE(0x300380, 0x300383) AM_DEVWRITE8("aysnd", ay8910_device, address_data_w, 0x00ff)
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AM_RANGE(0x300384, 0x300385) AM_DEVREAD8("aysnd", ay8910_device, data_r, 0x00ff)
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AM_RANGE(0x3003c2, 0x3003c3) AM_WRITE(quiz365_oki_bank1_w)
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AM_RANGE(0x3003ca, 0x3003cb) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
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AM_RANGE(0x3003cc, 0x3003cd) AM_WRITE(quiz365_oki_bank2_w)
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AM_RANGE(0x3003c2, 0x3003c3) AM_WRITE8(quiz365_oki_bank1_w, 0x00ff)
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AM_RANGE(0x3003ca, 0x3003cb) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0x3003cc, 0x3003cd) AM_WRITE8(quiz365_oki_bank2_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xff0000, 0xffffff) AM_RAM // RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -2011,14 +1916,11 @@ READ16_MEMBER(ddenlovr_state::ddenlovj_dsw_r)
|
||||
return dsw;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(ddenlovr_state::ddenlovj_coincounter_w)
|
||||
WRITE8_MEMBER(ddenlovr_state::ddenlovj_coincounter_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x01);
|
||||
machine().bookkeeping().coin_counter_w(1, data & 0x04);
|
||||
// data & 0x80 ?
|
||||
}
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x01);
|
||||
machine().bookkeeping().coin_counter_w(1, data & 0x04);
|
||||
// data & 0x80 ?
|
||||
}
|
||||
|
||||
CUSTOM_INPUT_MEMBER(ddenlovr_state::ddenlovj_blitter_r)
|
||||
@ -2029,18 +1931,18 @@ CUSTOM_INPUT_MEMBER(ddenlovr_state::ddenlovj_blitter_r)
|
||||
static ADDRESS_MAP_START( ddenlovj_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
|
||||
|
||||
AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0x200000, 0x2003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
// AM_RANGE(0x201000, 0x2017ff) AM_WRITEONLY // ? B0 on startup, then 00
|
||||
|
||||
AM_RANGE(0x300040, 0x300047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0x300048, 0x30004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0x300050, 0x300057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0x300058, 0x30005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0x300068, 0x300069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0x30006a, 0x30006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0x30006c, 0x30006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0x300040, 0x300047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0x300048, 0x30004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0x300050, 0x300057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0x300058, 0x30005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0x300068, 0x300069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0x30006a, 0x30006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0x30006c, 0x30006d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
|
||||
AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r) // ? must be 78 on startup (not necessary in ddlover)
|
||||
AM_RANGE(0x300080, 0x300083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0x300080, 0x300083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
AM_RANGE(0x3000c0, 0x3000c3) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0x300100, 0x30011f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
|
||||
@ -2049,10 +1951,10 @@ static ADDRESS_MAP_START( ddenlovj_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
|
||||
AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0x300186, 0x300187) AM_READ(ddenlovj_dsw_r) // DSW
|
||||
AM_RANGE(0x300188, 0x300189) AM_WRITE(ddenlovj_coincounter_w) // Coin Counters
|
||||
AM_RANGE(0x300188, 0x300189) AM_WRITE8(ddenlovj_coincounter_w, 0x00ff)
|
||||
AM_RANGE(0x30018a, 0x30018b) AM_WRITEONLY AM_SHARE("dsw_sel16") // DSW select
|
||||
AM_RANGE(0x30018c, 0x30018d) AM_WRITE(ddenlovr_oki_bank_w)
|
||||
AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0x30018c, 0x30018d) AM_WRITE8(ddenlovr_oki_bank_w, 0x00ff)
|
||||
AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0x300240, 0x300241) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)// Sound
|
||||
AM_RANGE(0xff0000, 0xffffff) AM_RAM // RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -2087,27 +1989,27 @@ static ADDRESS_MAP_START( ddenlovrk_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x100000, 0x100001) AM_RAM_READ(ddenlovrk_protection1_r) AM_SHARE("protection1")
|
||||
AM_RANGE(0x200000, 0x200001) AM_READWRITE(ddenlovrk_protection2_r, ddenlovrk_protection2_w) AM_SHARE("protection2")
|
||||
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
// AM_RANGE(0xd01000, 0xd017ff) AM_RAM // ? B0 on startup, then 00
|
||||
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
|
||||
AM_RANGE(0xe00070, 0xe00071) AM_READNOP
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
|
||||
AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
|
||||
AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
|
||||
AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w) // Coin Counters
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w) //
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE8(ddenlovr_coincounter_0_w, 0x00ff)
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE8(ddenlovr_coincounter_1_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
|
||||
@ -2123,29 +2025,29 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( ddenlovr_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
|
||||
|
||||
AM_RANGE(0x300000, 0x300001) AM_WRITE( ddenlovr_oki_bank_w)
|
||||
AM_RANGE(0x300000, 0x300001) AM_WRITE8(ddenlovr_oki_bank_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
// AM_RANGE(0xd01000, 0xd017ff) AM_RAM // ? B0 on startup, then 00
|
||||
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
|
||||
AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r) // ? must be 78 on startup (not necessary in ddlover)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
|
||||
AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
|
||||
AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
|
||||
AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w) // Coin Counters
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w) //
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE8(ddenlovr_coincounter_0_w, 0x00ff)
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE8(ddenlovr_coincounter_1_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
|
||||
@ -2185,41 +2087,35 @@ READ16_MEMBER(ddenlovr_state::nettoqc_protection1_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(ddenlovr_state::nettoqc_coincounter_w)
|
||||
WRITE8_MEMBER(ddenlovr_state::nettoqc_coincounter_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x01);
|
||||
machine().bookkeeping().coin_counter_w(1, data & 0x04);
|
||||
// data & 0x80 ?
|
||||
}
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x01);
|
||||
machine().bookkeeping().coin_counter_w(1, data & 0x04);
|
||||
// data & 0x80 ?
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(ddenlovr_state::nettoqc_oki_bank_w )
|
||||
WRITE8_MEMBER(ddenlovr_state::nettoqc_oki_bank_w )
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
m_oki->set_rom_bank(data & 3);
|
||||
}
|
||||
m_oki->set_rom_bank(data & 3);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( nettoqc_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x000000, 0x17ffff) AM_ROM // ROM
|
||||
|
||||
AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0x200000, 0x2003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
AM_RANGE(0x200c02, 0x200c03) AM_READ(nettoqc_protection1_r) // Protection 1
|
||||
AM_RANGE(0x200e0a, 0x200e0d) AM_WRITEONLY AM_SHARE("protection1") // ""
|
||||
AM_RANGE(0x201000, 0x2017ff) AM_WRITEONLY // ?
|
||||
|
||||
AM_RANGE(0x300040, 0x300047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0x300048, 0x30004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0x300050, 0x300057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0x300058, 0x30005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0x300068, 0x300069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0x30006a, 0x30006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0x30006c, 0x30006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0x300040, 0x300047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0x300048, 0x30004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0x300050, 0x300057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0x300058, 0x30005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0x300068, 0x300069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0x30006a, 0x30006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0x30006c, 0x30006d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
|
||||
AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r) // ? must be 78 on startup (not necessary in ddlover)
|
||||
AM_RANGE(0x300080, 0x300083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0x300080, 0x300083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
AM_RANGE(0x3000c0, 0x3000c3) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0x300100, 0x30011f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
|
||||
@ -2228,10 +2124,10 @@ static ADDRESS_MAP_START( nettoqc_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
|
||||
AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0x300186, 0x300187) AM_READ(nettoqc_input_r) // DSW's
|
||||
AM_RANGE(0x300188, 0x300189) AM_WRITE(nettoqc_coincounter_w) // Coin Counters
|
||||
AM_RANGE(0x30018a, 0x30018b) AM_WRITE(ddenlovr_select_16_w) //
|
||||
AM_RANGE(0x30018c, 0x30018d) AM_WRITE(nettoqc_oki_bank_w)
|
||||
AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0x300188, 0x300189) AM_WRITE8(nettoqc_coincounter_w, 0x00ff)
|
||||
AM_RANGE(0x30018a, 0x30018b) AM_WRITE8(ddenlovr_select_w, 0x00ff)
|
||||
AM_RANGE(0x30018c, 0x30018d) AM_WRITE8(nettoqc_oki_bank_w, 0x00ff)
|
||||
AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0x300240, 0x300241) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // Sound
|
||||
AM_RANGE(0xff0000, 0xffffff) AM_RAM // RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -2258,31 +2154,31 @@ static ADDRESS_MAP_START( ultrchmp_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x224680, 0x224681) AM_RAM_READ(ultrchmp_protection2_r) AM_SHARE("protection2") // Protection 2
|
||||
AM_RANGE(0x313570, 0x313571) AM_WRITE(ultrchmp_protection2_w) // "" + OKI bank
|
||||
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xd00c02, 0xd00c03) AM_READ(nettoqc_protection1_r) // Protection 1
|
||||
AM_RANGE(0xd00e0a, 0xd00e0d) AM_WRITEONLY AM_SHARE("protection1") // ""
|
||||
|
||||
AM_RANGE(0xd01000, 0xd017ff) AM_WRITEONLY // ?
|
||||
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE8(ddenlovr_layer_enable_w, 0x00ff)
|
||||
AM_RANGE(0xe00070, 0xe00071) AM_READNOP
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
|
||||
AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
|
||||
AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
|
||||
AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w) // Coin Counters
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w) //
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE8(ddenlovr_coincounter_0_w, 0x00ff)
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE8(ddenlovr_coincounter_1_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write,0x00ff)
|
||||
@ -3749,18 +3645,18 @@ static ADDRESS_MAP_START( akamaru_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0x213570, 0x213571) AM_WRITE(akamaru_protection1_w) // OKI bank
|
||||
AM_RANGE(0x624680, 0x624681) AM_READ(akamaru_protection1_r)
|
||||
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
|
||||
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE8(rongrong_palette_w, 0x00ff)
|
||||
// AM_RANGE(0xd01000, 0xd017ff) AM_WRITEONLY // 0
|
||||
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE(ddenlovr16_transparency_mask_w)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
|
||||
AM_RANGE(0xe00040, 0xe00047) AM_WRITE8(ddenlovr_palette_base_w, 0x00ff)
|
||||
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE8(ddenlovr_palette_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00050, 0xe00057) AM_WRITE8(ddenlovr_transparency_pen_w, 0x00ff)
|
||||
AM_RANGE(0xe00058, 0xe0005f) AM_WRITE8(ddenlovr_transparency_mask_w, 0x00ff)
|
||||
AM_RANGE(0xe00068, 0xe00069) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE8(ddenlovr_priority_w, 0x00ff)
|
||||
AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE8(ddenlovr_bgcolor_w, 0x00ff)
|
||||
AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r) // ? must be 78 on startup (not necessary in ddlover)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
|
||||
AM_RANGE(0xe00080, 0xe00083) AM_WRITE8(ddenlovr_blitter_w, 0x00ff)
|
||||
AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r) // Video Chip
|
||||
|
||||
AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
|
||||
@ -3774,11 +3670,11 @@ static ADDRESS_MAP_START( akamaru_map, AS_PROGRAM, 16, ddenlovr_state )
|
||||
AM_RANGE(0xe00200, 0xe00201) AM_READ(akamaru_dsw_r) // DSW
|
||||
|
||||
AM_RANGE(0xe00204, 0xe00205) AM_READ(akamaru_blitter_r) // Blitter Busy & IRQ
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w) // Blitter irq acknowledge
|
||||
AM_RANGE(0xe00302, 0xe00303) AM_WRITE8(ddenlovr_blitter_irq_ack_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xe00304, 0xe00307) AM_WRITEONLY AM_SHARE("dsw_sel16") // DSW select
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w) // Coin Counters
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w) //
|
||||
AM_RANGE(0xe00308, 0xe00309) AM_WRITE8(ddenlovr_coincounter_0_w, 0x00ff)
|
||||
AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE8(ddenlovr_coincounter_1_w, 0x00ff)
|
||||
|
||||
AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
|
||||
AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_device, read, write, 0x00ff)
|
||||
|
Loading…
Reference in New Issue
Block a user