From 54f329652180cc072eb9b2ccf4e84a7f20223967 Mon Sep 17 00:00:00 2001 From: Tomasz Slanina Date: Sat, 28 May 2011 14:32:44 +0000 Subject: [PATCH] New games added or promoted from NOT_WORKING status --------------------------------------------------- Reality Tennis [Tomasz Slanina, Antonio 'Peluko' Carrillo, Smitdogg, The Dumping Union] --- .gitattributes | 3 + src/mame/drivers/rltennis.c | 234 +++++++++++++++++++++++++++++ src/mame/includes/rltennis.h | 54 +++++++ src/mame/mame.lst | 1 + src/mame/mame.mak | 1 + src/mame/video/rltennis.c | 277 +++++++++++++++++++++++++++++++++++ 6 files changed, 570 insertions(+) create mode 100644 src/mame/drivers/rltennis.c create mode 100644 src/mame/includes/rltennis.h create mode 100644 src/mame/video/rltennis.c diff --git a/.gitattributes b/.gitattributes index 7f38ea0fa94..01203820f67 100644 --- a/.gitattributes +++ b/.gitattributes @@ -2511,6 +2511,7 @@ src/mame/drivers/relief.c svneol=native#text/plain src/mame/drivers/renegade.c svneol=native#text/plain src/mame/drivers/retofinv.c svneol=native#text/plain src/mame/drivers/rgum.c svneol=native#text/plain +src/mame/drivers/rltennis.c svneol=native#text/plain src/mame/drivers/rmhaihai.c svneol=native#text/plain src/mame/drivers/rockrage.c svneol=native#text/plain src/mame/drivers/rocnrope.c svneol=native#text/plain @@ -3333,6 +3334,7 @@ src/mame/includes/redalert.h svneol=native#text/plain src/mame/includes/relief.h svneol=native#text/plain src/mame/includes/renegade.h svneol=native#text/plain src/mame/includes/retofinv.h svneol=native#text/plain +src/mame/includes/rltennis.h svneol=native#text/plain src/mame/includes/rockrage.h svneol=native#text/plain src/mame/includes/rocnrope.h svneol=native#text/plain src/mame/includes/rohga.h svneol=native#text/plain @@ -4442,6 +4444,7 @@ src/mame/video/redclash.c svneol=native#text/plain src/mame/video/relief.c svneol=native#text/plain src/mame/video/renegade.c svneol=native#text/plain src/mame/video/retofinv.c svneol=native#text/plain +src/mame/video/rltennis.c svneol=native#text/plain src/mame/video/rockrage.c svneol=native#text/plain src/mame/video/rocnrope.c svneol=native#text/plain src/mame/video/rohga.c svneol=native#text/plain diff --git a/src/mame/drivers/rltennis.c b/src/mame/drivers/rltennis.c new file mode 100644 index 00000000000..f24fd8881ca --- /dev/null +++ b/src/mame/drivers/rltennis.c @@ -0,0 +1,234 @@ +/**************************************************************************************** +Reality Tennis - (c) 1993 TCH + + driver by Tomasz Slanina + + based on informations provided by Antonio 'Peluko' Carrillo + +Game Credits: +Antonio 'Peluko' Carrillo: programmer and game designer +David Sandoval: hardware designer + +PCB Layout +---------- + +|-----------------------------------------------------| +| |-----| KM424C257 tennis_6 tennis_12 - | +| |Bt478| KM424C257 | +| |-----| tennis_5 tennis_11 - | +| |-------| | +| |Actel | |-------| tennis_10 - | +| | A1020B| |Actel | | +|J |-------| | A1020B| tennis_9 - | +|A 32MHz JOAQUIN |-------| | +|M JUANA tennis_8 - | +|M 28C264 | +|A tennis_1 tennis_2 tennis_7 tennis_14 | +| GAL22V10 | +| MT5C256 MT5C256 tennis_13 | +| |------------------| 74HC404 | +| | 68000P8 | tennis_3 tennis_4 | +| |------------------| | +| NE555 DAC DAC | +|-----------------------------------------------------| + +Video hardware: +--------------- +Blitter based. Two layers with tricky doublebuffering. +Two Actel FPGA chips (marked as JOAQUIN and JUANA). +Juana can read data from ROMs. JOAQUIN - write to VRAM. +Both can access 256x256 pixel pages. +Size and direction of data read/write, as well as active page is +selectable for each of the chips. + +Sound hardware (verify): +------------------------ +~15 kHz 8 bit sigend (music) and unsigned (sfx) sample player. +Two custom DACs are conencted directly to data lines of sound ROMs. +A0-A10 address lines are controlled by a counter, clocked by scaline +clock ( not verified, just guessed ). Top lines are controlled by cpu, +and select 2k sample to play. There's probably no way to stop the sample +player - when there's nothing to play - first, empty 2k of ROMs are selected. + + TODO: +- proper timing and interrupts (remove extra hacky blitter int generation @ vblank) +- fix various gfx glitches here and there, mostly related to wrong size of data + (what's the correct size? based on src or dest rectangle ? is there some kind of zoom? or just rect clipping?) +- what the 70000a blitter reg is for ? + + +****************************************************************************************/ +#include "emu.h" +#include "includes/rltennis.h" +#include "cpu/m68000/m68000.h" +#include "machine/nvram.h" +#include "sound/dac.h" + +#define RLT_REFRESH_RATE 60 +#define RLT_TIMER_FREQ (RLT_REFRESH_RATE*256) +#define RLT_XTAL XTAL_12MHz + +static READ16_HANDLER( rlt_io_r ) +{ + rltennis_state *state = space->machine().driver_data(); + + return (input_port_read(space->machine(), "P1" )&0x1fff) | (state->m_unk_counter<<13); /* top 3 bits controls smaple address update */ +} + +static WRITE16_HANDLER(rlt_snd1_w) +{ + rltennis_state *state = space->machine().driver_data(); + COMBINE_DATA(&state->m_data760000); +} + +static WRITE16_HANDLER(rlt_snd2_w) +{ + rltennis_state *state = space->machine().driver_data(); + COMBINE_DATA(&state->m_data740000); +} + +static ADDRESS_MAP_START( rltennis_main, AS_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x0fffff) AM_ROM + AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram") + AM_RANGE(0x200000, 0x20ffff) AM_RAM + AM_RANGE(0x700000, 0x70000f) AM_WRITE(rlt_blitter_w) + AM_RANGE(0x720000, 0x720001) AM_WRITE(rlt_ramdac_address_wm_w) + AM_RANGE(0x720002, 0x720003) AM_READWRITE(rlt_ramdac_data_r, rlt_ramdac_data_w) + AM_RANGE(0x720006, 0x720007) AM_WRITE(rlt_ramdac_address_rm_w) + AM_RANGE(0x740000, 0x740001) AM_WRITE(rlt_snd1_w) + AM_RANGE(0x760000, 0x760001) AM_WRITE(rlt_snd2_w) + AM_RANGE(0x780000, 0x780001) AM_WRITENOP /* sound control, unknown, usually = 0x0044 */ + AM_RANGE(0x7a0000, 0x7a0003) AM_READNOP /* unknown, read only at boot time*/ + AM_RANGE(0x7e0000, 0x7e0001) AM_READ(rlt_io_r) + AM_RANGE(0x7e0002, 0x7e0003) AM_READ_PORT("P2") +ADDRESS_MAP_END + +static INPUT_PORTS_START( rltennis ) + PORT_START("P1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) + + PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P2") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +static TIMER_CALLBACK( sample_player ) +{ + rltennis_state *state = machine.driver_data(); + + if((state->m_dac_counter&0x7ff) == 0x7ff) /* reload top address bits */ + { + state->m_sample_rom_offset_1=(( state->m_data740000 >> state->m_offset_shift ) & 0xff )<<11; + state->m_sample_rom_offset_2=(( state->m_data760000 >> state->m_offset_shift ) & 0xff )<<11; + state->m_offset_shift^=8; /* switch between MSB and LSB */ + } + ++state->m_dac_counter; /* update low address bits */ + + dac_signed_data_w(state->m_dac_1, state->m_samples_1[state->m_sample_rom_offset_1 + ( state->m_dac_counter&0x7ff )]); + dac_data_w(state->m_dac_2, state->m_samples_2[state->m_sample_rom_offset_2 + ( state->m_dac_counter&0x7ff )]); + state->m_timer->adjust(attotime::from_hz( RLT_TIMER_FREQ )); +} + +static INTERRUPT_GEN( rltennis_interrupt ) +{ + rltennis_state *state = device->machine().driver_data(); + ++state->m_unk_counter; /* frame counter? verify */ + device_set_input_line(device, 4, HOLD_LINE); + device_set_input_line(device, 1, HOLD_LINE); /* hack, to avoid dead loop */ +} + +static MACHINE_START( rltennis ) +{ + rltennis_state *state = machine.driver_data(); + state->m_maincpu = machine.device( "maincpu"); + state->m_screen = machine.device( "screen"); + state->m_palette = auto_alloc_array(machine, UINT8, 256*3 ); + state->m_dac_1 = machine.device("dac1"); + state->m_dac_2 = machine.device("dac2"); + state->m_samples_1 = machine.region("samples1")->base(); + state->m_samples_2 = machine.region("samples2")->base(); + state->m_gfx = machine.region("gfx1")->base(); + state->m_timer = machine.scheduler().timer_alloc(FUNC(sample_player)); +} + +static MACHINE_RESET( rltennis ) +{ + rltennis_state *state = machine.driver_data(); + state->m_timer->adjust(attotime::from_hz(RLT_TIMER_FREQ)); +} + +static MACHINE_CONFIG_START( rltennis, rltennis_state ) + + MCFG_CPU_ADD("maincpu", M68000, RLT_XTAL/2) /* 68000P8 ??? */ + MCFG_CPU_PROGRAM_MAP(rltennis_main) + MCFG_CPU_VBLANK_INT("screen", rltennis_interrupt) + + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_REFRESH_RATE( RLT_REFRESH_RATE ) + MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) + MCFG_SCREEN_SIZE(320, 240) + MCFG_SCREEN_VISIBLE_AREA(0,319, 0, 239) + + MCFG_SCREEN_UPDATE(rltennis) + MCFG_PALETTE_LENGTH(256) + + MCFG_MACHINE_START( rltennis ) + MCFG_MACHINE_RESET( rltennis ) + MCFG_NVRAM_ADD_0FILL("nvram") + + MCFG_VIDEO_START( rltennis ) + + MCFG_SPEAKER_STANDARD_MONO("mono") + + MCFG_SOUND_ADD("dac1", DAC, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", .5) + MCFG_SOUND_ADD("dac2", DAC, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", .5) + +MACHINE_CONFIG_END + +ROM_START( rltennis ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "tennis_1.u12", 0x00001, 0x80000, CRC(2ded10d7) SHA1(cca1e858c9c759ef5c0aca6ee50d23d5d532534c) ) + ROM_LOAD16_BYTE( "tennis_2.u19", 0x00000, 0x80000, CRC(a0dbd2ed) SHA1(8db7dbb6a36fd0fb382a4938d7eba1f7662aa672) ) + + ROM_REGION( 0x1000000, "gfx1", ROMREGION_ERASE00 ) + ROM_LOAD( "tennis_5.u33", 0x000000, 0x80000, CRC(067a2e4b) SHA1(ab5a227de2b0c51b17aeca68c8af1bf224904ac8) ) + ROM_LOAD( "tennis_6.u34", 0x080000, 0x80000, CRC(901df2c1) SHA1(7e57d7c7e281ddc02a3e34178d3e471bd8e1d572) ) + ROM_LOAD( "tennis_7.u35", 0x100000, 0x80000, CRC(8d70fb37) SHA1(250c4c3d32e5a7e17413ee41e1abccb0492b63fd) ) + ROM_LOAD( "tennis_8.u36", 0x180000, 0x80000, CRC(26d202ba) SHA1(0e841e35de328f23624a19780a734a18f5409d69) ) + ROM_LOAD( "tennis_9.u37", 0x200000, 0x80000, CRC(1d164ee0) SHA1(b9c80b3c0dadbff36a04141b8995a5282a8d10f7) ) + ROM_LOAD( "tennis_10.u38",0x280000, 0x80000, CRC(fd2c6647) SHA1(787f236d5b72ee24d39e783eb2453bea58f07290) ) + ROM_LOAD( "tennis_11.u39",0x300000, 0x80000, CRC(a59dc0c8) SHA1(48f258e74fbb64b7538c9777d7598774ca8396eb) ) + ROM_LOAD( "tennis_12.u40",0x380000, 0x80000, CRC(b9677887) SHA1(84b79864555d3d6e9c443913910a055e27d30d08) ) + ROM_LOAD( "tennis_13.u41",0x400000, 0x80000, CRC(3d4fbcac) SHA1(e01f479d7d516ff83cbbd82d83617146d7a242d3) ) + ROM_LOAD( "tennis_14.u42",0x480000, 0x80000, CRC(37fe0f5d) SHA1(7593f1ea07bc0a741c952e6850bed1bf0a824510) ) + + ROM_REGION( 0x080000, "samples1", 0 ) + ROM_LOAD( "tennis_4.u59", 0x00000, 0x80000, CRC(f56462ea) SHA1(638777e12f2649a5b4366f034f0ba721fc4580a8) ) + + ROM_REGION( 0x080000, "samples2", 0 ) + ROM_LOAD( "tennis_3.u52", 0x00000, 0x80000, CRC(517dcd0e) SHA1(b2703e185ee8cf7e115ea07151e7bee8be34948b) ) +ROM_END + +GAME( 1993, rltennis, 0, rltennis, rltennis, 0, ROT0, "TCH", "Reality Tennis", GAME_IMPERFECT_GRAPHICS) diff --git a/src/mame/includes/rltennis.h b/src/mame/includes/rltennis.h new file mode 100644 index 00000000000..6ca770ccf0e --- /dev/null +++ b/src/mame/includes/rltennis.h @@ -0,0 +1,54 @@ + +#define RLT_NUM_BLITTER_REGS 8 +#define RLT_NUM_BITMAPS 8 + +class rltennis_state : public driver_device +{ +public: + rltennis_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), + m_data760000(0), m_data740000(0), m_dac_counter(0), m_sample_rom_offset_1(0), m_sample_rom_offset_2(0), + m_offset_shift(0){ } + + device_t *m_maincpu; + device_t *m_screen; + + UINT16 m_blitter[RLT_NUM_BLITTER_REGS]; + + UINT8 *m_palette; + INT32 m_palpos_r; + INT32 m_palpos_w; + + INT32 m_data760000; + INT32 m_data740000; + INT32 m_dac_counter; + INT32 m_sample_rom_offset_1; + INT32 m_sample_rom_offset_2; + + INT32 m_offset_shift; + + INT32 m_unk_counter; + + bitmap_t *m_tmp_bitmap[RLT_NUM_BITMAPS]; + + device_t *m_dac_1; + device_t *m_dac_2; + + UINT8 *m_samples_1; + UINT8 *m_samples_2; + + UINT8 *m_gfx; + + emu_timer *m_timer; + +}; + + + +WRITE16_HANDLER( rlt_blitter_w ); +WRITE16_HANDLER( rlt_ramdac_address_wm_w ); +WRITE16_HANDLER( rlt_ramdac_address_rm_w ); +WRITE16_HANDLER( rlt_ramdac_data_w ); +READ16_HANDLER( rlt_ramdac_data_r ); +VIDEO_START( rltennis ); +SCREEN_UPDATE( rltennis ); + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 83f97543418..b7273a614eb 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -9651,6 +9651,7 @@ quarterha // (c) 1983 Electro-Sports quarterhb // (c) 1983 Electro-Sports qc // (c) 1995 ArJay Exports/Prestige Games trvquest // (c) 1984 Sunn / Techstar +rltennis // (c) 1993 TCH wheelfir // (c) 199? TCH littlerb // (c) 1993 TCH tattack // (c) 198? Shonan diff --git a/src/mame/mame.mak b/src/mame/mame.mak index 2dfdbb836cb..5be9026a74b 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -1414,6 +1414,7 @@ $(MAMEOBJ)/tatsumi.a: \ $(MAMEOBJ)/tch.a: \ $(DRIVERS)/kickgoal.o $(VIDEO)/kickgoal.o \ $(DRIVERS)/littlerb.o \ + $(DRIVERS)/rltennis.o $(VIDEO)/rltennis.o \ $(DRIVERS)/speedspn.o $(VIDEO)/speedspn.o \ $(DRIVERS)/wheelfir.o \ diff --git a/src/mame/video/rltennis.c b/src/mame/video/rltennis.c new file mode 100644 index 00000000000..8f8412d3b05 --- /dev/null +++ b/src/mame/video/rltennis.c @@ -0,0 +1,277 @@ +/**************************************************************************************** + Reality Tennis - (c) 1993 TCH + + + +Blitter registers description (reg/bit names selected arbitrary ) : + +700000 - BLT_X_START + JOANA JOAQUIN + fedcba98 76543210 + -------- xxxxxxxx dst x start + xxxxxxxx -------- src x start + + +700002 - BLT_X_END + JOANA JOAQUIN + fedcba98 76543210 + -------- xxxxxxxx dst x end + xxxxxxxx -------- src x end + + +700004 - BLT_Y_START + JOANA JOAQUIN + fedcba98 76543210 x start + -------- xxxxxxxx + xxxxxxxx -------- + + +700006 - BLT_Y_END + JOANA JOAQUIN + fedcba98 76543210 x start + -------- xxxxxxxx + xxxxxxxx -------- + + +700008 - BLT_FLAGS + JOANA JOAQUIN + fedcba98 76543210 + -------- -------x BLTFLAG_DST_X_DIR x dst direction (step inc or dec) + -------- ------x- BLTFLAG_DST_Y_DIR y dst direction + -------- -----x-- BLTFLAG_DST_LR LR and UD controlls the quarter of framebuffer to use + -------- ----x--- BLTFLAG_DST_UD / + -------- ---?---- unknown + -------- --x----- BLTFLAG_DISPLAY_UD display buffer select + -------- ??------ unknown + -------x -------- BLTFLAG_SRC_X_DIR x src direction + ------x- -------- BLTFLAG_SRC_Y_DIR y src direction + -----x-- -------- BLTFLAG_SRC_LR LR and UD controlls the quarter of src buffer to use + ----x--- -------- BLTFLAG_SRC_UD / + xxxx---- -------- src ROM num + + +70000a - BLT_UNK + JOANA JOAQUIN + fedcba98 76543210 + ???????? ???????? unknown (used during gameplay ... zoom factors ?) + + +70000c - BLT_START + fedcba98 76543210 + --?????- ???????? unknown + -------x -------- BLTSTRT_ROM_MSB src ROM MSB + -x------ -------- BLTSTRT_TRIGGER blit start + x------- -------- BLTSTRT_LAYER FG or BG layer of framebuffer + +70000e - BLT_UNK2 + JOANA JOAQUIN + fedcba98 76543210 + ???????? ???????? unknown (set to 0 @ boot) + +****************************************************************************************/ +#include "emu.h" +#include "includes/rltennis.h" + +enum +{ + BLT_X_START = 0, + BLT_X_END, + BLT_Y_START, + BLT_Y_END, + BLT_FLAGS, + BLT_UNK, + BLT_START, + BLT_UNK2, +}; + +enum +{ + BITMAP_BG=0, + BITMAP_FG_1, + BITMAP_FG_2, + BITMAP_FG_DISPLAY, +}; + +#define BLTFLAG_DST_X_DIR (1<<0) +#define BLTFLAG_DST_Y_DIR (1<<1) +#define BLTFLAG_DST_LR (1<<2) +#define BLTFLAG_DST_UD (1<<3) +#define BLTFLAG_DISPLAY_UD (1<<5) + +#define BLTFLAG_SRC_X_DIR (1<<8) +#define BLTFLAG_SRC_Y_DIR (1<<9) +#define BLTFLAG_SRC_LR (1<<10) +#define BLTFLAG_SRC_UD (1<<11) + + +#define BLTSTRT_ROM_MSB (1<<8) +#define BLTSTRT_TRIGGER (1<<14) +#define BLTSTRT_LAYER (1<<15) + +#define SRC_SHIFT 8 + +WRITE16_HANDLER(rlt_blitter_w) +{ + rltennis_state *state = space->machine().driver_data(); + + int old_data=state->m_blitter[offset]; + COMBINE_DATA(&state->m_blitter[offset]); + int new_data=state->m_blitter[offset]; + + if(offset==BLT_FLAGS && ((new_data^old_data) & BLTFLAG_DISPLAY_UD) ) /* visible page flip and clear */ + { + if(new_data & BLTFLAG_DISPLAY_UD) + { + copybitmap(state->m_tmp_bitmap[BITMAP_FG_DISPLAY], state->m_tmp_bitmap[BITMAP_FG_1], 0, 0, 0, 0, NULL); + bitmap_fill(state->m_tmp_bitmap[BITMAP_FG_1], NULL, 0); + } + else + { + copybitmap(state->m_tmp_bitmap[BITMAP_FG_DISPLAY], state->m_tmp_bitmap[BITMAP_FG_2], 0, 0, 0, 0, NULL); + bitmap_fill(state->m_tmp_bitmap[BITMAP_FG_2], NULL, 0); + } + } + + if(offset == BLT_START && (((new_data ^ old_data ) & new_data) & BLTSTRT_TRIGGER)) /* blit strobe 0->1 */ + { + device_set_input_line(state->m_maincpu, 1, HOLD_LINE); + + int src_x0=(state->m_blitter[BLT_X_START]>>SRC_SHIFT)+((state->m_blitter[BLT_FLAGS] & BLTFLAG_SRC_LR)?256:0); + int src_y0=(state->m_blitter[BLT_Y_START]>>SRC_SHIFT)+((state->m_blitter[BLT_FLAGS]>>3)&0xff00)+(((state->m_blitter[BLT_START]) & BLTSTRT_ROM_MSB)?(1<<0xd):0); + + int dst_x0=(state->m_blitter[BLT_X_START]&0xff); + int dst_y0=(state->m_blitter[BLT_Y_START]&0xff); + + int dst_x1=(state->m_blitter[BLT_X_END]&0xff); + int dst_y1=(state->m_blitter[BLT_Y_END]&0xff); + + int src_x1=((state->m_blitter[BLT_X_END]>>SRC_SHIFT)&0xff)+((state->m_blitter[BLT_FLAGS] & BLTFLAG_SRC_LR)?256:0); + int src_y1=((state->m_blitter[BLT_Y_END]>>SRC_SHIFT)&0xff)+((state->m_blitter[BLT_FLAGS]>>3)&0xff00)+(((state->m_blitter[BLT_START]) & BLTSTRT_ROM_MSB)?(1<<0xd):0); + + int x_dst_step=(state->m_blitter[BLT_FLAGS] & BLTFLAG_DST_X_DIR)?1:-1; + int y_dst_step=(state->m_blitter[BLT_FLAGS] & BLTFLAG_DST_Y_DIR)?1:-1; + + int x_src_step=(state->m_blitter[BLT_FLAGS] & BLTFLAG_SRC_X_DIR)?1:-1; + int y_src_step=(state->m_blitter[BLT_FLAGS] & BLTFLAG_SRC_Y_DIR)?1:-1; + + int x,y; + + int idx_x,idx_y; + + int blit_w=src_x1-src_x0; + int blit_h=src_y1-src_y0; + + int blit_w1=dst_x1-dst_x0; + int blit_h1=dst_y1-dst_y0; + + if(blit_w1<0) blit_w1=(-blit_w1)^0xff; /* is it correct ? game does that when flips images */ + if(blit_h1<0) blit_h1=-blit_h1; + + if(blit_w<0) blit_w=-blit_w; + if(blit_h<0) blit_h=-blit_h; + + { + /* wrong, causes gfx glitches (wrong size , but gives (so far) the best results */ + if(blit_w1m_blitter[BLT_START] & BLTSTRT_LAYER )?BITMAP_BG:BITMAP_FG_1; + + if(layer==BITMAP_FG_1) + { + if(state->m_blitter[BLT_FLAGS] & BLTFLAG_DST_UD ) + { + layer=BITMAP_FG_2; + } + } + + bool force_blit=false; + + if(blit_w==1 && blit_h==1) /* seems to be bg layer color fill */ + { + force_blit=true; + } + + for( x=dst_x0, idx_x=0 ; idx_x<=blit_w1; x+=x_dst_step, idx_x++ ) + { + for( y=dst_y0, idx_y=0 ; idx_y<=blit_h1;y+=y_dst_step, idx_y++) + { + + int xx=src_x0+(x_src_step*idx_x); + int yy=src_y0+(y_src_step*idx_y); + + if(force_blit) + { + xx=src_x0; + yy=src_y0; + } + + int address=yy*512+xx; + + int pix = state->m_gfx[ address & 0x0ffffff ]; + int screen_x=(x&0xff)+((state->m_blitter[BLT_FLAGS] & BLTFLAG_DST_LR )?256:0); + + if((pix || force_blit)&& screen_x >0 && y >0 && screen_x < 512 && y < 256 ) + { + *BITMAP_ADDR16(state->m_tmp_bitmap[layer], y , screen_x ) = pix; + } + } + } + } +} + +WRITE16_HANDLER(rlt_ramdac_address_wm_w ) +{ + rltennis_state *state = space->machine().driver_data(); + state->m_palpos_w = data*3; +} + +WRITE16_HANDLER(rlt_ramdac_address_rm_w ) +{ + rltennis_state *state = space->machine().driver_data(); + state->m_palpos_r = data*3; +} + +WRITE16_HANDLER( rlt_ramdac_data_w ) +{ + rltennis_state *state = space->machine().driver_data(); + int color=state->m_palpos_w/3; + state->m_palette[state->m_palpos_w] = data & 0xff; + ++state->m_palpos_w; + + state->m_palpos_w %=256*3; + + { + int r = state->m_palette[color*3]; + int g = state->m_palette[color*3+1]; + int b = state->m_palette[color*3+2]; + palette_set_color(space->machine(), color, MAKE_RGB(r,g,b)); + } +} + +READ16_HANDLER( rlt_ramdac_data_r ) +{ + rltennis_state *state = space->machine().driver_data(); + int data=state->m_palette[state->m_palpos_r]; + ++state->m_palpos_r; + state->m_palpos_r %=256*3; + return data; +} + +VIDEO_START( rltennis ) +{ + rltennis_state *state = machine.driver_data(); + state->m_tmp_bitmap[BITMAP_BG] = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16); + state->m_tmp_bitmap[BITMAP_FG_1] = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16); + state->m_tmp_bitmap[BITMAP_FG_2] = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16); + state->m_tmp_bitmap[BITMAP_FG_DISPLAY] = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16); +} + +SCREEN_UPDATE( rltennis ) +{ + rltennis_state *state = screen->machine().driver_data(); + copybitmap(bitmap, state->m_tmp_bitmap[BITMAP_BG], 0, 0, 0, 0, cliprect); + copybitmap_trans(bitmap, state->m_tmp_bitmap[BITMAP_FG_DISPLAY], 0, 0, 0, 0, cliprect, 0); + return 0; +} \ No newline at end of file