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Completed device up to current knowledge, added to Namco System 21 as test bed.

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This commit is contained in:
angelosa 2016-12-30 04:09:35 +01:00
parent cb1023eb00
commit 5508c8532f
4 changed files with 157 additions and 31 deletions
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151
src/mame/drivers/namcos21.cpp
View File

@ -1261,14 +1261,14 @@ static ADDRESS_MAP_START( master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
AM_IMPORT_FROM( common_map )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_RAM /* private work RAM */
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
AM_IMPORT_FROM( common_map )
ADDRESS_MAP_END
@ -1469,7 +1469,7 @@ static ADDRESS_MAP_START( winrun_master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_SHARE("winrun_polydata")
AM_RANGE(0x260000, 0x26ffff) AM_RAM /* unused? */
AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_SHARE("winrun_dspbios")
@ -1488,7 +1488,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( winrun_slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_RAM
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_SHARE("gpu_comram")
AM_RANGE(0x800000, 0x87ffff) AM_ROM AM_REGION("data", 0)
AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
@ -1581,7 +1581,7 @@ static ADDRESS_MAP_START( driveyes_master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_SHARE("winrun_polydata")
AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_SHARE("winrun_dspbios")
AM_RANGE(0x380000, 0x38000f) AM_READWRITE(winrun_dspcomram_control_r,winrun_dspcomram_control_w)
@ -1594,7 +1594,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( driveyes_slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
AM_IMPORT_FROM( driveyes_common_map )
ADDRESS_MAP_END
@ -1852,15 +1852,123 @@ MACHINE_START_MEMBER(namcos21_state,namcos21)
namcos2_kickstart = namcos21_kickstart;
}
// TODO: temp
TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::screen_scanline)
{
int scanline = param;
if(scanline == 240*2)
{
m_master_intc->vblank_irq_trigger();
m_slave_intc->vblank_irq_trigger();
if(m_gpu_intc)
m_gpu_intc->vblank_irq_trigger();
}
if(scanline == m_master_intc->get_posirq_line()*2)
{
m_master_intc->pos_irq_trigger();
// TODO: wrong place!
m_screen->update_partial(param);
}
if(scanline == m_slave_intc->get_posirq_line()*2)
{
m_slave_intc->pos_irq_trigger();
// TODO: wrong place!
m_screen->update_partial(param);
}
if(m_gpu_intc != nullptr)
{
if(scanline == m_gpu_intc->get_posirq_line()*2)
{
m_gpu_intc->pos_irq_trigger();
// TODO: wrong place!
m_screen->update_partial(param);
}
}
}
WRITE8_MEMBER(namcos21_state::sound_reset_w)
{
address_space &masterspace = m_maincpu->space(AS_PROGRAM);
if (data & 0x01)
{
/* Resume execution */
m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
masterspace.device().execute().yield();
}
else
{
/* Suspend execution */
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
if (namcos2_kickstart != nullptr)
{
//printf( "dspkick=0x%x\n", data );
if (data & 0x04)
{
(*namcos2_kickstart)(space.machine(), 1);
}
}
}
WRITE8_MEMBER(namcos21_state::system_reset_w)
{
address_space &masterspace = m_maincpu->space(AS_PROGRAM);
m_slave->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
m_mcu->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
switch( m_gametype )
{
case NAMCOS21_SOLVALOU:
case NAMCOS21_STARBLADE:
case NAMCOS21_AIRCOMBAT:
case NAMCOS21_CYBERSLED:
m_dspmaster->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
m_dspslave->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
break;
}
if (data & 0x01)
masterspace.device().execute().yield();
#if 0
if (data & 0x01)
{ /* Resume execution */
//reset_all_subcpus(CLEAR_LINE);
/* Give the new CPU an immediate slice of the action */
}
else
{ /* Suspend execution */
//reset_all_subcpus(ASSERT_LINE);
}
#endif
}
static MACHINE_CONFIG_START( configure_c148_standard, namcos21_state )
MCFG_NAMCO_C148_ADD("master_intc","maincpu",true)
namco_c148_device::link_c148_device(*device,"slave_intc");
MCFG_NAMCO_C148_EXT1_CB(WRITE8(namcos21_state, sound_reset_w))
MCFG_NAMCO_C148_EXT2_CB(WRITE8(namcos21_state, system_reset_w))
MCFG_NAMCO_C148_ADD("slave_intc","slave",false)
namco_c148_device::link_c148_device(*device,"master_intc");
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( namcos21, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
MCFG_CPU_PROGRAM_MAP(master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
MCFG_CPU_PROGRAM_MAP(sound_map)
@ -1899,6 +2007,8 @@ static MACHINE_CONFIG_START( namcos21, namcos21_state )
MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21)
MCFG_SCREEN_PALETTE("palette")
MCFG_FRAGMENT_ADD(configure_c148_standard)
MCFG_GFXDECODE_ADD("gfxdecode", "palette", namcos21)
MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS)
MCFG_PALETTE_FORMAT(XBRG)
@ -1921,11 +2031,10 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( driveyes, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
MCFG_CPU_PROGRAM_MAP(driveyes_master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
MCFG_CPU_PROGRAM_MAP(driveyes_slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
MCFG_CPU_PROGRAM_MAP(sound_map)
@ -1953,6 +2062,8 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0)
MCFG_FRAGMENT_ADD(configure_c148_standard)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS_NAMCO480I
MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_driveyes)
@ -1976,28 +2087,13 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
MCFG_SOUND_ROUTE(1, "rspeaker", 0.30)
MACHINE_CONFIG_END
TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::winrun_gpu_scanline)
{
int scanline = param;
if(scanline == 240*2)
m_gpu_intc->vblank_irq_trigger();
if(scanline == m_gpu_intc->get_posirq_line()*2)
{
m_gpu_intc->pos_irq_trigger();
m_screen->update_partial(param);
}
}
static MACHINE_CONFIG_START( winrun, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
MCFG_CPU_PROGRAM_MAP(winrun_master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
MCFG_CPU_PROGRAM_MAP(winrun_slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
MCFG_CPU_PROGRAM_MAP(sound_map)
@ -2019,9 +2115,8 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
MCFG_CPU_ADD("gpu", M68000,12288000) /* graphics coprocessor */
MCFG_CPU_PROGRAM_MAP(winrun_gpu_map)
// TODO: Needs a single namco_crtc_device
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, winrun_gpu_scanline, "screen", 0, 1)
MCFG_FRAGMENT_ADD(configure_c148_standard)
MCFG_NAMCO_C148_ADD("gpu_intc","gpu",false)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */

10
src/mame/includes/namcos21.h
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@ -56,6 +56,8 @@ public:
m_ptrom16(*this,"point16"),
m_dsp(*this, "dsp"),
m_io_gearbox(*this, "gearbox"),
m_master_intc(*this, "master_intc"),
m_slave_intc(*this, "slave_intc"),
m_gpu_intc(*this, "gpu_intc")
{ }
@ -70,6 +72,8 @@ public:
optional_device<cpu_device> m_dsp;
optional_device<namcoio_gearbox_device> m_io_gearbox;
required_device<namco_c148_device> m_master_intc;
required_device<namco_c148_device> m_slave_intc;
optional_device<namco_c148_device> m_gpu_intc;
std::unique_ptr<uint8_t[]> m_videoram;
@ -163,8 +167,12 @@ public:
DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w);
DECLARE_READ16_MEMBER(winrun_gpu_videoram_r);
TIMER_DEVICE_CALLBACK_MEMBER(winrun_gpu_scanline);
DECLARE_WRITE8_MEMBER(sound_reset_w);
DECLARE_WRITE8_MEMBER(system_reset_w);
TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline);
TIMER_DEVICE_CALLBACK_MEMBER(winrun_gpu_scanline);
uint8_t m_gearbox_state;
DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r);
DECLARE_DRIVER_INIT(driveyes);

14
src/mame/machine/namco_c148.cpp
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@ -56,7 +56,10 @@ const device_type NAMCO_C148 = &device_creator<namco_c148_device>;
namco_c148_device::namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, NAMCO_C148, "Namco C148 Interrupt Controller", tag, owner, clock, "namco_c148", __FILE__),
m_hostcpu_tag(nullptr)
m_out_ext1_cb(*this),
m_out_ext2_cb(*this),
m_hostcpu_tag(nullptr),
m_linked_c148_tag(nullptr)
{
}
@ -90,6 +93,9 @@ void namco_c148_device::device_start()
{
m_hostcpu = machine().device<cpu_device>(m_hostcpu_tag);
m_linked_c148 = machine().device<namco_c148_device>(m_linked_c148_tag);
m_out_ext1_cb.resolve_safe();
m_out_ext2_cb.resolve_safe();
// TODO: link to SCI, EX and the screen device controller devices
}
@ -102,6 +108,9 @@ void namco_c148_device::device_reset()
{
m_irqlevel.vblank = 0;
m_irqlevel.pos = 0;
m_irqlevel.sci = 0;
m_irqlevel.ex = 0;
m_irqlevel.cpu = 0;
}
//**************************************************************************
@ -152,11 +161,12 @@ READ8_MEMBER( namco_c148_device::ext_r )
WRITE8_MEMBER( namco_c148_device::ext1_w )
{
m_out_ext1_cb(data & 7);
}
WRITE8_MEMBER( namco_c148_device::ext2_w )
{
m_out_ext2_cb(data & 7);
// TODO: bit 1/2 in Winning Run GPU might be irq enable?
}

13
src/mame/machine/namco_c148.h
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@ -21,6 +21,13 @@ Template for skeleton device
MCFG_DEVICE_ADD(_tag, NAMCO_C148, 0) \
namco_c148_device::configure_device(*device, _cputag, _cpumaster);
#define MCFG_NAMCO_C148_EXT1_CB(_cb) \
devcb = &namco_c148_device::set_out_ext1_callback(*device, DEVCB_##_cb);
#define MCFG_NAMCO_C148_EXT2_CB(_cb) \
devcb = &namco_c148_device::set_out_ext2_callback(*device, DEVCB_##_cb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -49,6 +56,12 @@ public:
dev.m_linked_c148_tag = tag;
}
template<class _Object> static devcb_base &set_out_ext1_callback(device_t &device, _Object object) { return downcast<namco_c148_device &>(device).m_out_ext1_cb.set_callback(object); }
template<class _Object> static devcb_base &set_out_ext2_callback(device_t &device, _Object object) { return downcast<namco_c148_device &>(device).m_out_ext2_cb.set_callback(object); }
devcb_write8 m_out_ext1_cb;
devcb_write8 m_out_ext2_cb;
DECLARE_READ8_MEMBER( vblank_irq_level_r );
DECLARE_WRITE8_MEMBER( vblank_irq_level_w );
DECLARE_READ16_MEMBER( vblank_irq_ack_r );