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https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
finished modernizing the mb3883 (nw)
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8804710dd2
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@ -31,34 +31,13 @@ mb3773_device::mb3773_device( const machine_config &mconfig, const char *tag, de
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}
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void mb3773_device::device_config_complete()
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{
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}
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//-------------------------------------------------
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// device_validity_check - perform validity checks
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// on this device
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//-------------------------------------------------
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void mb3773_device::device_validity_check(validity_checker &valid) const
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void mb3773_device::device_start()
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{
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m_watchdog_timer = machine().scheduler().timer_alloc( FUNC(watchdog_timeout), this );
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m_watchdog_timer = timer_alloc();
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reset_timer();
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save_item( NAME(m_ck) );
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@ -74,21 +53,18 @@ void mb3773_device::device_reset()
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m_ck = 0;
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}
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE_LINE_DEVICE_HANDLER( mb3773_set_ck )
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void mb3773_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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downcast<mb3773_device *>( device )->set_ck( state );
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machine().schedule_soft_reset();
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}
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void mb3773_device::set_ck( int state )
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void mb3773_device::reset_timer()
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{
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state &= 1;
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m_watchdog_timer->adjust( attotime::from_seconds( 5 ) );
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}
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WRITE_LINE_MEMBER( mb3773_device::write_line_ck )
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{
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if( state == 0 && m_ck != 0 )
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{
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reset_timer();
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@ -96,18 +72,3 @@ void mb3773_device::set_ck( int state )
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m_ck = state;
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}
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//**************************************************************************
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// INTERNAL HELPERS
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//**************************************************************************
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void mb3773_device::reset_timer()
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{
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m_watchdog_timer->adjust( attotime::from_seconds( 5 ) );
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}
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TIMER_CALLBACK( mb3773_device::watchdog_timeout )
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{
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reinterpret_cast<mb3773_device *>(ptr)->machine().schedule_soft_reset();
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}
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@ -30,17 +30,16 @@ public:
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mb3773_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock );
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// I/O operations
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void set_ck( int state );
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WRITE_LINE_MEMBER( write_line_ck );
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protected:
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// device-level overrides
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virtual void device_config_complete();
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virtual void device_validity_check(validity_checker &valid) const;
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virtual void device_start();
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virtual void device_reset();
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// internal helpers
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static TIMER_CALLBACK( watchdog_timeout );
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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private:
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void reset_timer();
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// internal state
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@ -52,11 +51,4 @@ protected:
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// device type definition
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extern const device_type MB3773;
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE_LINE_DEVICE_HANDLER( mb3773_set_ck );
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#endif
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@ -341,7 +341,8 @@ public:
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m_card(*this,"card"),
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m_maincpu(*this, "maincpu"),
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m_mn10200(*this, "mn10200"),
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m_flashbank(*this, "flashbank")
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m_flashbank(*this, "flashbank"),
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m_mb3773(*this, "mb3773")
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{
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}
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@ -393,6 +394,7 @@ private:
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_mn10200;
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required_device<address_map_bank_device> m_flashbank;
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required_device<mb3773_device> m_mb3773;
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};
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@ -511,15 +513,9 @@ WRITE8_MEMBER(taitogn_state::control_w)
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// 20 = watchdog
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// 04 = select bank
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// According to the rom code, bits 1-0 may be part of the bank
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// selection too, but they're always 0.
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UINT32 p = m_control;
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device_t *mb3773 = machine().device("mb3773");
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COMBINE_DATA(&m_control);
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mb3773_set_ck(mb3773, (m_control & 0x20) >> 5);
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m_mb3773->write_line_ck((data & 0x20) >> 5);
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#if 0
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if((p ^ control) & ~0x20)
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@ -534,8 +530,9 @@ WRITE8_MEMBER(taitogn_state::control_w)
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machine().describe_context());
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#endif
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if((p ^ m_control) & 0x04)
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m_flashbank->set_bank(m_control & 4 ? 1 : 0);
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// According to the rom code, bits 1-0 may be part of the bank
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// selection too, but they're always 0.
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m_flashbank->set_bank(m_control & 4);
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}
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WRITE16_MEMBER(taitogn_state::control2_w)
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@ -756,18 +753,18 @@ static MACHINE_CONFIG_START( coh3002t, taitogn_state )
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MCFG_MB3773_ADD("mb3773")
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MCFG_DEVICE_ADD("flashbank", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(flashbank_map)
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MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000000)
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MCFG_INTEL_TE28F160_ADD("biosflash")
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MCFG_INTEL_E28F400_ADD("pgmflash")
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MCFG_INTEL_TE28F160_ADD("sndflash0")
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MCFG_INTEL_TE28F160_ADD("sndflash1")
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MCFG_INTEL_TE28F160_ADD("sndflash2")
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MCFG_DEVICE_ADD("flashbank", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(flashbank_map)
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MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000000)
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MCFG_FRAGMENT_ADD( taito_zoom_sound )
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MACHINE_CONFIG_END
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@ -43,7 +43,8 @@ public:
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m_audiocpu(*this, "audiocpu"),
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m_ram(*this, "maincpu:ram"),
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m_cbaj_fifo1(*this, "cbaj_fifo1"),
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m_cbaj_fifo2(*this, "cbaj_fifo2")
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m_cbaj_fifo2(*this, "cbaj_fifo2"),
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m_mb3773(*this, "mb3773")
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{
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}
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@ -127,6 +128,7 @@ private:
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required_device<ram_device> m_ram;
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optional_device<fifo7200_device> m_cbaj_fifo1;
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optional_device<fifo7200_device> m_cbaj_fifo2;
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optional_device<mb3773_device> m_mb3773;
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};
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inline void ATTR_PRINTF(3,4) zn_state::verboselog( int n_level, const char *s_fmt, ... )
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@ -1081,9 +1083,10 @@ Notes:
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WRITE8_MEMBER(zn_state::bank_coh1000t_w)
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{
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device_t *mb3773 = machine().device("mb3773");
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mb3773_set_ck(mb3773, (data & 0x20) >> 5);
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verboselog(1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
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m_mb3773->write_line_ck((data & 0x20) >> 5);
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membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( ( data & 3 ) * 0x800000 ) );
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}
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