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Allow the non-DRC RSP core to build again
(controlled by a #define like the SH-2 core) [Atari Ace] ---------- Forwarded message ---------- From: Atari Ace <atari_ace@verizon.net> Date: Mon, Jul 5, 2010 at 3:50 PM Subject: [patch] Fixup non-DRC rsp core To: submit@mamedev.org Cc: atariace@hotmail.com Hi mamedev, This patch fixes the non-DRC rsp core to be buildable again (controlled by a #define like the sh2 core). It also cleans up the whitespace/commented-out code in that core as well. ~aa
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@ -1232,10 +1232,13 @@ $(CPUOBJ)/minx/minx.o: $(CPUSRC)/minx/minx.c \
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ifneq ($(filter RSP,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/rsp
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CPUOBJS += $(CPUOBJ)/rsp/rspdrc.o $(CPUOBJ)/rsp/rspfe.o $(DRCOBJ)
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CPUOBJS += $(CPUOBJ)/rsp/rsp.o $(CPUOBJ)/rsp/rspdrc.o $(CPUOBJ)/rsp/rspfe.o $(DRCOBJ)
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DASMOBJS += $(CPUOBJ)/rsp/rsp_dasm.o
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endif
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$(CPUOBJ)/rsp/rsp.o: $(CPUSRC)/rsp/rsp.c \
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$(CPUSRC)/rsp/rsp.h
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$(CPUOBJ)/rsp/rspdrc.o: $(CPUSRC)/rsp/rspdrc.c \
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$(CPUSRC)/rsp/rsp.h \
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$(CPUSRC)/rsp/rspfe.h \
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@ -10,6 +10,8 @@
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CPU_DISASSEMBLE( rsp );
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#ifndef USE_RSPDRC
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#define LOG_INSTRUCTION_EXECUTION 0
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#define SAVE_DISASM 0
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#define SAVE_DMEM 0
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@ -183,11 +185,11 @@ static UINT32 get_cop0_reg(rsp_state *rsp, int reg)
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{
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if (reg >= 0 && reg < 8)
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{
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return (rsp->config->sp_reg_r)(rsp->program, reg, 0x00000000);
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return (rsp->config->sp_reg_r)(rsp->device, reg, 0x00000000);
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}
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else if (reg >= 8 && reg < 16)
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{
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return (rsp->config->dp_reg_r)(rsp->program, reg - 8, 0x00000000);
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return (rsp->config->dp_reg_r)(rsp->device, reg - 8, 0x00000000);
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}
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else
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{
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@ -199,11 +201,11 @@ static void set_cop0_reg(rsp_state *rsp, int reg, UINT32 data)
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{
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if (reg >= 0 && reg < 8)
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{
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(rsp->config->sp_reg_w)(rsp->program, reg, data, 0x00000000);
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(rsp->config->sp_reg_w)(rsp->device, reg, data, 0x00000000);
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}
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else if (reg >= 8 && reg < 16)
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{
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(rsp->config->dp_reg_w)(rsp->program, reg - 8, data, 0x00000000);
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(rsp->config->dp_reg_w)(rsp->device, reg - 8, data, 0x00000000);
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}
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else
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{
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@ -2989,4 +2991,22 @@ CPU_GET_INFO( rsp )
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}
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}
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void rspdrc_set_options(running_device *device, UINT32 options)
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{
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}
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void rspdrc_add_imem(running_device *device, void *base)
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{
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}
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void rspdrc_add_dmem(running_device *device, void *base)
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{
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}
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void rspdrc_flush_drc_cache(running_device *device)
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{
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}
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DEFINE_LEGACY_CPU_DEVICE(RSP, rsp);
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#endif // USE_RSPDRC
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@ -16,7 +16,7 @@
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#ifndef __RSP_H__
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#define __RSP_H__
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#define USE_RSPDRC
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/***************************************************************************
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REGISTER ENUMERATION
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@ -31,6 +31,8 @@ CPU_DISASSEMBLE( rsp );
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extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
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#ifdef USE_RSPDRC
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/***************************************************************************
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DEBUGGING
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***************************************************************************/
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@ -546,12 +548,14 @@ void rspdrc_add_dmem(running_device *device, void *base)
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debugging
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-------------------------------------------------*/
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//static void cfunc_printf_debug(void *param)
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//{
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// rsp_state *rsp = (rsp_state *)param;
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// printf(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
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// logerror(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
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//}
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#ifdef UNUSED_FUNCTION
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static void cfunc_printf_debug(void *param)
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{
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rsp_state *rsp = (rsp_state *)param;
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printf(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
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logerror(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
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}
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#endif
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/*-------------------------------------------------
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@ -559,13 +563,14 @@ void rspdrc_add_dmem(running_device *device, void *base)
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debugging 64-bit values
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-------------------------------------------------*/
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//static void cfunc_printf_debug64(void *param)
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//{
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// rsp_state *rsp = (rsp_state *)param;
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// printf(rsp->impstate->format, (UINT32)(rsp->impstate->arg64 >> 32), (UINT32)(rsp->impstate->arg64 & 0x00000000ffffffff));
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// logerror(rsp->impstate->format, (UINT32)(rsp->impstate->arg64 >> 32), (UINT32)(rsp->impstate->arg64 & 0x00000000ffffffff));
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//}
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#ifdef UNUSED_FUNCTION
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static void cfunc_printf_debug64(void *param)
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{
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rsp_state *rsp = (rsp_state *)param;
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printf(rsp->impstate->format, (UINT32)(rsp->impstate->arg64 >> 32), (UINT32)(rsp->impstate->arg64 & 0x00000000ffffffff));
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logerror(rsp->impstate->format, (UINT32)(rsp->impstate->arg64 >> 32), (UINT32)(rsp->impstate->arg64 & 0x00000000ffffffff));
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}
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#endif
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static void cfunc_get_cop0_reg(void *param)
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{
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@ -1452,14 +1457,14 @@ static int generate_lwc2(rsp_state *rsp, drcuml_block *block, compiler_state *co
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#endif
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case 0x07: /* LUV */
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#if (DRC_LUV)
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/*
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#ifdef UNUSED_CODE
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ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
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for (i=0; i < 8; i++)
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{
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W_VREG_S(dest, i, READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7);
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}
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*/
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#endif
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offset <<= 3;
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UML_ADD(block, IREG(2), R32(RSREG), IMM(offset)); // add i2,<rsreg>,offset
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@ -2115,7 +2120,7 @@ static int generate_swc2(rsp_state *rsp, drcuml_block *block, compiler_state *co
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#if (DRC_VMADN)
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static void generate_saturate_accum_unsigned(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int accum)
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{
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/*
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#ifdef UNUSED_CODE
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int skip, skip2;
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UML_CMP(block, VACCUMWMH(accum), IMM(-32768));
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@ -2133,7 +2138,7 @@ static void generate_saturate_accum_unsigned(rsp_state *rsp, drcuml_block *block
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UML_SEXT(block, IREG(0), VACCUMHL(accum), WORD);
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UML_AND(block, IREG(0), IREG(0), IMM(0x0000ffff));
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UML_LABEL(block, skip2);
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*/
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#endif
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UML_SEXT(block, IREG(0), VACCUMHL(accum), WORD);
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UML_AND(block, IREG(0), IREG(0), IMM(0x0000ffff));
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UML_CMP(block, VACCUMWMH(accum), IMM(-32768));
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@ -2865,7 +2870,7 @@ INLINE void cfunc_rsp_vmudm(void *param)
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break;
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}
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/*
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#ifdef UNUSED_CODE
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for (i=0; i < 8; i++)
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{
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int del = VEC_EL_1(EL, i);
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@ -2881,7 +2886,7 @@ INLINE void cfunc_rsp_vmudm(void *param)
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vres[del] = ACCUM(del).h.mid;
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}
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WRITEBACK_RESULT();
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*/
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#endif
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}
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#endif
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@ -7306,10 +7311,12 @@ static void cfunc_unimplemented(void *param)
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cfunc_fatalerror - a generic fatalerror call
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-------------------------------------------------*/
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//static void cfunc_fatalerror(void *param)
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//{
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//fatalerror("fatalerror");
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//}
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#ifdef UNUSED_CODE
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static void cfunc_fatalerror(void *param)
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{
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fatalerror("fatalerror");
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}
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#endif
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/***************************************************************************
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@ -7654,12 +7661,14 @@ static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, c
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}
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/* if we hit an unmapped address, fatal error */
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//if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
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//{
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// UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc)); // mov [pc],desc->pc
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// save_fast_iregs(rsp, block);
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// UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE)); // exit EXECUTE_UNMAPPED_CODE
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//}
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#if 0
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if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
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{
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UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc)); // mov [pc],desc->pc
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save_fast_iregs(rsp, block);
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UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE)); // exit EXECUTE_UNMAPPED_CODE
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}
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#endif
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/* otherwise, unless this is a virtual no-op, it's a regular instruction */
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/*else*/ if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
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@ -8196,7 +8205,7 @@ static int generate_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *
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/* ----- unimplemented/illegal instructions ----- */
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// default: /* ??? */ invalid_instruction(op); break;
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//default: /* ??? */ invalid_instruction(op); break;
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}
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return FALSE;
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@ -8719,3 +8728,5 @@ CPU_GET_INFO( rsp )
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}
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DEFINE_LEGACY_CPU_DEVICE(RSP, rsp);
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#endif // USE_RSPDRC
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