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New driver for Lucky Ball 96, from Sielcon Games.
[Roberto Fresca] New machines marked as NOT_WORKING ---------------------------------- Lucky Ball 96 (Ver 3.50 - 627) [Roberto Fresca]
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RobertoFresca
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@ -4617,6 +4617,7 @@ files {
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MAME_DIR .. "src/mame/video/lethalj.cpp",
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MAME_DIR .. "src/mame/drivers/limenko.cpp",
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MAME_DIR .. "src/mame/drivers/ltcasino.cpp",
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MAME_DIR .. "src/mame/drivers/luckybal.cpp",
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MAME_DIR .. "src/mame/drivers/magic10.cpp",
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MAME_DIR .. "src/mame/drivers/magicard.cpp",
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MAME_DIR .. "src/mame/drivers/magicfly.cpp",
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@ -638,6 +638,7 @@ looping.cpp
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lordgun.cpp
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lsasquad.cpp
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ltcasino.cpp
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luckybal.cpp
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ltd.cpp
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luckgrln.cpp
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lucky74.cpp
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208
src/mame/drivers/luckybal.cpp
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208
src/mame/drivers/luckybal.cpp
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@ -0,0 +1,208 @@
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// license:BSD-3-Clause
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// copyright-holders: Roberto Fresca
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/********************************************************************
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Lucky Ball 96.
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6-player LEDs Roulette.
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Copyright 1991/96 by Sielcon Games.
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Industria Argentina.
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Driver by Roberto Fresca.
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*********************************************************************
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Notes:
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- Programming mode is driven through POS#5 controls (joystick + bet button)
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- Identified the CPU as Zilog Z180.
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*********************************************************************
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Media files (27c4001)
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00000-085ff GFX
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08600-0ffff blank
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10000-7ffff samples
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Samples are 8-bit unsigned PCM.
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*********************************************************************/
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#define CPU_CLOCK XTAL_12_288MHz
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#define VID_CLOCK XTAL_21_4772MHz
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#define VDP_MEM 0x40000
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#include "emu.h"
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#include "cpu/z180/z180.h"
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#include "video/v9938.h"
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#include "screen.h"
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class luckybal_state : public driver_device
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{
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public:
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luckybal_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_v9938(*this, "v9938")
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, m_maincpu(*this, "maincpu")
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{ }
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DECLARE_DRIVER_INIT(luckybal);
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required_device<v9938_device> m_v9938;
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required_device<cpu_device> m_maincpu;
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};
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/**************************************
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* Memory Map *
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**************************************/
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static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, luckybal_state )
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AM_RANGE(0x0000, 0x57ff) AM_ROM
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AM_RANGE(0xe000, 0xffff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( main_io, AS_IO, 8, luckybal_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0xe0, 0xe3) AM_DEVREADWRITE("v9938", v9938_device, read, write) // guess
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ADDRESS_MAP_END
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/**************************************
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* Input Ports *
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**************************************/
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static INPUT_PORTS_START( luckybal )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8")
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8")
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("IN2-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("IN2-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("IN2-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("IN2-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("IN2-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8")
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PORT_START("IN3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8")
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PORT_START("IN4")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8")
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PORT_START("DSW1")
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PORT_DIPNAME( 0x01, 0x01, "DSW1_01" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "DSW1_02" )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "DSW1_04" )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "DSW1_08" )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "DSW1_10" )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "DSW1_20" )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "DSW1_40" )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "DSW1_80" )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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/**************************************
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* Machine Driver *
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**************************************/
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static MACHINE_CONFIG_START( luckybal )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z180, CPU_CLOCK)
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MCFG_CPU_PROGRAM_MAP(main_map)
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MCFG_CPU_IO_MAP(main_io)
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/* video hardware */
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MCFG_V9938_ADD("v9938", "screen", VDP_MEM, VID_CLOCK)
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MCFG_V99X8_INTERRUPT_CALLBACK(INPUTLINE("maincpu", 0))
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MCFG_V99X8_SCREEN_ADD_NTSC("screen", "v9938", VID_CLOCK)
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MACHINE_CONFIG_END
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/**************************************
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* ROM Load *
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**************************************/
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ROM_START( luckybal ) // luckyball96 v350-627
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD( "lb97_627_m27c512.u15", 0x00000, 0x10000, CRC(c1bcffef) SHA1(da5db0ab0555cd98ff8e0206c1ee4ebd3d7447ef) )
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ROM_REGION( 0x100000, "audiocpu", 0 )
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ROM_LOAD( "lb97_627_m27c4001.u20", 0x00000, 0x80000, CRC(dbc45c4a) SHA1(720c6861fa2bfa9c9dad69d687f12bd1e0a71afb) )
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ROM_END
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/************************************
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* Driver Init *
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************************************/
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DRIVER_INIT_MEMBER(luckybal_state, luckybal)
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{
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}
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/**************************************
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* Game Driver(s) *
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**************************************/
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/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */
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GAME( 1996, luckybal, 0, luckybal, luckybal, luckybal_state, luckybal, ROT0, "Sielcon Games", "Lucky Ball 96 (Ver 3.50 - 627)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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@ -1,4 +1,4 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Aaron Giles
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/******************************************************************************
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@ -39208,3 +39208,6 @@ simpr8210 // Pioneer PR-8210
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@source:odyssey.cpp
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odyssey
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@source:luckybal.cpp
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luckybal
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