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r9751: Clean up and add timer register

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This commit is contained in:
Brandon Munger 2016-01-02 02:40:36 -05:00
parent 72f5e11450
commit 55f85f46c0
1 changed files with 8 additions and 27 deletions
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35
src/mame/drivers/r9751.cpp
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@ -67,8 +67,8 @@ public:
DECLARE_READ32_MEMBER(r9751_mmio_5ff_r); DECLARE_READ32_MEMBER(r9751_mmio_5ff_r);
DECLARE_WRITE32_MEMBER(r9751_mmio_5ff_w); DECLARE_WRITE32_MEMBER(r9751_mmio_5ff_w);
DECLARE_READ32_MEMBER(r9751_mmio_ff05_r); DECLARE_READ32_MEMBER(r9751_mmio_ff05_r);
DECLARE_WRITE32_MEMBER(r9751_mmio_ff05_w); DECLARE_WRITE32_MEMBER(r9751_mmio_ff05_w);
DECLARE_READ32_MEMBER(r9751_mmio_fff8_r); DECLARE_READ32_MEMBER(r9751_mmio_fff8_r);
DECLARE_WRITE32_MEMBER(r9751_mmio_fff8_w); DECLARE_WRITE32_MEMBER(r9751_mmio_fff8_w);
@ -77,7 +77,6 @@ public:
DECLARE_DRIVER_INIT(r9751); DECLARE_DRIVER_INIT(r9751);
//DECLARE_FLOPPY_FORMATS( floppy_formats );
private: private:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<pdc_device> m_pdc; required_device<pdc_device> m_pdc;
@ -87,14 +86,13 @@ private:
// Begin registers // Begin registers
UINT32 reg_ff050004; UINT32 reg_ff050004;
UINT32 reg_ff050320; // Counter?
UINT32 reg_fff80040; UINT32 reg_fff80040;
UINT32 fdd_dest_address; // 5FF080B0 UINT32 fdd_dest_address; // 5FF080B0
UINT32 fdd_cmd_complete; UINT32 fdd_cmd_complete;
UINT32 smioc_out_addr; UINT32 smioc_out_addr;
attotime timer_32khz_last;
// End registers // End registers
// UINT32 fdd_scsi_command;
address_space *m_mem; address_space *m_mem;
// functions // functions
@ -117,14 +115,12 @@ READ8_MEMBER(r9751_state::pdc_dma_r)
WRITE8_MEMBER(r9751_state::pdc_dma_w) WRITE8_MEMBER(r9751_state::pdc_dma_w)
{ {
/* NOTE: This needs to be changed to a function that accepts an address and data */
m_maincpu->space(AS_PROGRAM).write_byte(m_pdc->fdd_68k_dma_address,data); m_maincpu->space(AS_PROGRAM).write_byte(m_pdc->fdd_68k_dma_address,data);
} }
DRIVER_INIT_MEMBER(r9751_state,r9751) DRIVER_INIT_MEMBER(r9751_state,r9751)
{ {
reg_ff050004 = 0; reg_ff050004 = 0;
reg_ff050320 = 1;
reg_fff80040 = 0; reg_fff80040 = 0;
fdd_dest_address = 0; fdd_dest_address = 0;
// fdd_scsi_command = 0; // fdd_scsi_command = 0;
@ -158,20 +154,16 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
/* PDC HDD region (0x24, device 9) */ /* PDC HDD region (0x24, device 9) */
case 0x5FF00824: /* HDD Command result code */ case 0x5FF00824: /* HDD Command result code */
return 0x10; return 0x10;
break;
case 0x5FF03024: /* HDD SCSI command completed successfully */ case 0x5FF03024: /* HDD SCSI command completed successfully */
data = 0x1; data = 0x1;
if(TRACE_HDC) logerror("SCSI HDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address); if(TRACE_HDC) logerror("SCSI HDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
return data; return data;
break;
/* SMIOC region (0x98, device 26) */ /* SMIOC region (0x98, device 26) */
case 0x5FF00898: /* Serial status or DMA status */ case 0x5FF00898: /* Serial status or DMA status */
return 0x40; return 0x40;
break;
/* PDC FDD region (0xB0, device 44 */ /* PDC FDD region (0xB0, device 44 */
case 0x5FF008B0: /* FDD Command result code */ case 0x5FF008B0: /* FDD Command result code */
return 0x10; return 0x10;
break;
case 0x5FF010B0: /* Clear 5FF030B0 ?? */ case 0x5FF010B0: /* Clear 5FF030B0 ?? */
if(TRACE_FDC) logerror("--- FDD 0x5FF010B0 READ (0)\n"); if(TRACE_FDC) logerror("--- FDD 0x5FF010B0 READ (0)\n");
return 0; return 0;
@ -179,7 +171,6 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
data = (m_pdc->reg_p5 << 8) + m_pdc->reg_p4; data = (m_pdc->reg_p5 << 8) + m_pdc->reg_p4;
if(TRACE_FDC) logerror("--- SCSI FDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address); if(TRACE_FDC) logerror("--- SCSI FDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
return data; return data;
break;
default: default:
if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, 0, mem_mask); if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, 0, mem_mask);
return 0; return 0;
@ -306,23 +297,16 @@ READ32_MEMBER( r9751_state::r9751_mmio_ff05_r )
{ {
case 0xFF050004: case 0xFF050004:
return reg_ff050004; return reg_ff050004;
break;
case 0xFF050300: case 0xFF050300:
return 0x1B | (1<<0x14); return 0x1B | (1<<0x14);
break;
case 0xFF050320: /* Some type of counter */ case 0xFF050320: /* Some type of counter */
reg_ff050320++; return (machine().time() - timer_32khz_last).as_ticks(32768) & 0xFFFF;
return reg_ff050320;
break;
case 0xFF050584: case 0xFF050584:
return 0; return 0;
break;
case 0xFF050610: case 0xFF050610:
return 0xabacabac; return 0xabacabac;
break;
case 0xFF060014: case 0xFF060014:
return 0x80; return 0x80;
break;
default: default:
data = 0; data = 0;
if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask); if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
@ -339,11 +323,11 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_ff05_w )
case 0xFF050004: case 0xFF050004:
reg_ff050004 = data; reg_ff050004 = data;
return; return;
break;
case 0xFF05000C: /* CPU LED hex display indicator */ case 0xFF05000C: /* CPU LED hex display indicator */
if(TRACE_LED) logerror("\n*** LED: %02x, Instruction: %08x ***\n\n", data, space.machine().firstcpu->pc()); if(TRACE_LED) logerror("\n*** LED: %02x, Instruction: %08x ***\n\n", data, space.machine().firstcpu->pc());
return; return;
break; case 0xFF050320:
timer_32khz_last = machine().time();
default: default:
if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask); if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
return; return;
@ -359,7 +343,6 @@ READ32_MEMBER( r9751_state::r9751_mmio_fff8_r )
{ {
case 0xFFF80040: case 0xFFF80040:
return reg_fff80040; return reg_fff80040;
break;
default: default:
data = 0; data = 0;
if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask); if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
@ -376,7 +359,6 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_fff8_w )
case 0xFFF80040: case 0xFFF80040:
reg_fff80040 = data; reg_fff80040 = data;
return; return;
break;
default: default:
if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask); if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
} }
@ -389,10 +371,9 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_fff8_w )
static ADDRESS_MAP_START(r9751_mem, AS_PROGRAM, 32, r9751_state) static ADDRESS_MAP_START(r9751_mem, AS_PROGRAM, 32, r9751_state)
//ADDRESS_MAP_UNMAP_HIGH //ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000000,0x00ffffff) AM_RAM AM_SHARE("main_ram") // 16MB AM_RANGE(0x00000000,0x00ffffff) AM_RAM AM_SHARE("main_ram") // 16MB
//AM_RANGE(0x01000000,0x07ffffff) AM_NOP
AM_RANGE(0x08000000,0x0800ffff) AM_ROM AM_REGION("prom", 0) AM_RANGE(0x08000000,0x0800ffff) AM_ROM AM_REGION("prom", 0)
AM_RANGE(0x5FF00000,0x5FFFFFFF) AM_READWRITE(r9751_mmio_5ff_r, r9751_mmio_5ff_w) AM_RANGE(0x5FF00000,0x5FFFFFFF) AM_READWRITE(r9751_mmio_5ff_r, r9751_mmio_5ff_w)
AM_RANGE(0xFF050000,0xFF06FFFF) AM_READWRITE(r9751_mmio_ff05_r, r9751_mmio_ff05_w) AM_RANGE(0xFF050000,0xFF06FFFF) AM_READWRITE(r9751_mmio_ff05_r, r9751_mmio_ff05_w)
AM_RANGE(0xFFF80000,0xFFF8FFFF) AM_READWRITE(r9751_mmio_fff8_r, r9751_mmio_fff8_w) AM_RANGE(0xFFF80000,0xFFF8FFFF) AM_READWRITE(r9751_mmio_fff8_r, r9751_mmio_fff8_w)
//AM_RANGE(0xffffff00,0xffffffff) AM_RAM // Unknown area //AM_RANGE(0xffffff00,0xffffffff) AM_RAM // Unknown area
ADDRESS_MAP_END ADDRESS_MAP_END