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https://github.com/holub/mame
synced 2025-06-29 15:38:53 +03:00
a2600.c: Reimplemented FE mapper. Fixes decathlon; partial fix for MT05345.
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661d49f28c
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@ -55,7 +55,8 @@ public:
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m_joy1(*this, CONTROL1_TAG),
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m_joy1(*this, CONTROL1_TAG),
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m_joy2(*this, CONTROL2_TAG) ,
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m_joy2(*this, CONTROL2_TAG) ,
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m_maincpu(*this, "maincpu"),
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m_maincpu(*this, "maincpu"),
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m_cassette(*this, "cassette") { }
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m_cassette(*this, "cassette"),
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m_modeFE_trigger_on_next_access(false) { }
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dpc_t m_dpc;
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dpc_t m_dpc;
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memory_region* m_extra_RAM;
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memory_region* m_extra_RAM;
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@ -77,13 +78,9 @@ public:
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UINT16 m_modeSS_last_address;
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UINT16 m_modeSS_last_address;
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unsigned m_FVlocked;
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unsigned m_FVlocked;
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UINT16 m_current_screen_height;
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UINT16 m_current_screen_height;
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int m_FETimer;
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direct_update_delegate m_FE_old_opbase_handler;
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DECLARE_DIRECT_UPDATE_MEMBER(modeF6_opbase);
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DECLARE_DIRECT_UPDATE_MEMBER(modeF6_opbase);
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DECLARE_DIRECT_UPDATE_MEMBER(modeDPC_opbase_handler);
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DECLARE_DIRECT_UPDATE_MEMBER(modeDPC_opbase_handler);
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DECLARE_DIRECT_UPDATE_MEMBER(modeFE_opbase_handler);
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DECLARE_READ8_MEMBER(modeF8_switch_r);
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DECLARE_READ8_MEMBER(modeF8_switch_r);
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DECLARE_READ8_MEMBER(modeFA_switch_r);
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DECLARE_READ8_MEMBER(modeFA_switch_r);
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DECLARE_READ8_MEMBER(modeF6_switch_r);
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DECLARE_READ8_MEMBER(modeF6_switch_r);
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@ -115,6 +112,7 @@ public:
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DECLARE_WRITE8_MEMBER(modeDPC_w);
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DECLARE_WRITE8_MEMBER(modeDPC_w);
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DECLARE_READ8_MEMBER(modeFE_switch_r);
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DECLARE_READ8_MEMBER(modeFE_switch_r);
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DECLARE_WRITE8_MEMBER(modeFE_switch_w);
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DECLARE_WRITE8_MEMBER(modeFE_switch_w);
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DECLARE_READ8_MEMBER(modeFE_rom_r);
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DECLARE_READ8_MEMBER(current_bank_r);
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DECLARE_READ8_MEMBER(current_bank_r);
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DECLARE_READ16_MEMBER(a2600_read_input_port);
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DECLARE_READ16_MEMBER(a2600_read_input_port);
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DECLARE_READ8_MEMBER(a2600_get_databus_contents);
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DECLARE_READ8_MEMBER(a2600_get_databus_contents);
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@ -150,7 +148,6 @@ protected:
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void mode3E_RAM_switch(UINT16 offset, UINT8 data);
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void mode3E_RAM_switch(UINT16 offset, UINT8 data);
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void modeFV_switch(UINT16 offset, UINT8 data);
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void modeFV_switch(UINT16 offset, UINT8 data);
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void modeJVP_switch(UINT16 offset, UINT8 data);
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void modeJVP_switch(UINT16 offset, UINT8 data);
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void modeFE_switch(UINT16 offset, UINT8 data);
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void install_banks(int count, unsigned init);
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void install_banks(int count, unsigned init);
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UINT8 *m_cart;
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UINT8 *m_cart;
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@ -169,8 +166,9 @@ protected:
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int detect_32K_mode3F();
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int detect_32K_mode3F();
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int detect_super_chip();
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int detect_super_chip();
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unsigned long detect_2600controllers();
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unsigned long detect_2600controllers();
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required_device<cpu_device> m_maincpu;
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required_device<m6502_device> m_maincpu;
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required_device<cassette_image_device> m_cassette;
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required_device<cassette_image_device> m_cassette;
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bool m_modeFE_trigger_on_next_access;
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};
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};
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@ -1205,45 +1203,59 @@ depending on last byte & 0x20 -> 0x00 -> switch to bank #1
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*/
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*/
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DIRECT_UPDATE_MEMBER(a2600_state::modeFE_opbase_handler)
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{
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/* Still cheating a bit here by looking bit 13 of the address..., but the high byte of the
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cpu should be the last byte that was on the data bus and so should determine the bank
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we should switch in. */
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m_bank_base[1] = memregion("user1")->base() + 0x1000 * ( ( m_maincpu->pc() & 0x2000 ) ? 0 : 1 );
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membank("bank1")->set_base(m_bank_base[1] );
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/* and restore old opbase handler */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(m_FE_old_opbase_handler);
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return address;
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}
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void a2600_state::modeFE_switch(UINT16 offset, UINT8 data)
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{
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address_space& space = m_maincpu->space(AS_PROGRAM);
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/* Retrieve last byte read by the cpu (for this mapping scheme this
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should be the last byte that was on the data bus
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*/
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m_FE_old_opbase_handler = space.set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeFE_opbase_handler), this));
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}
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READ8_MEMBER(a2600_state::modeFE_switch_r)
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READ8_MEMBER(a2600_state::modeFE_switch_r)
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{
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{
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UINT8 data = space.read_byte(0xFE + offset );
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if ( ! space.debugger_access() )
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if ( ! space.debugger_access() )
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{
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{
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modeFE_switch(offset, 0 );
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switch ( offset & 1 )
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{
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case 0:
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/* The next byte on the data bus determines which bank to switch to */
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m_modeFE_trigger_on_next_access = true;
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break;
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case 1:
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if ( m_modeFE_trigger_on_next_access ) {
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m_bank_base[1] = m_cart + 0x1000 * ( ( data & 0x20 ) ? 0 : 1 );
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m_modeFE_trigger_on_next_access = false;
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}
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break;
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}
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}
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}
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return space.read_byte(0xFE);
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return data;
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}
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}
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WRITE8_MEMBER(a2600_state::modeFE_switch_w)
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WRITE8_MEMBER(a2600_state::modeFE_switch_w)
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{
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{
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space.write_byte(0xFE, data );
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space.write_byte(0xFE, data );
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if ( ! space.debugger_access() )
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if ( ! space.debugger_access() )
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{
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{
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modeFE_switch(offset, 0 );
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/* The next byte on the data bus determines which bank to switch to */
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m_modeFE_trigger_on_next_access = true;
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}
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}
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}
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}
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READ8_MEMBER(a2600_state::modeFE_rom_r)
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{
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UINT8 data = m_bank_base[1][offset];;
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if ( ! space.debugger_access() )
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{
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if ( m_modeFE_trigger_on_next_access )
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{
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m_bank_base[1] = m_cart + 0x1000 * ( ( data & 0x20 ) ? 0 : 1 );
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m_modeFE_trigger_on_next_access = false;
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}
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}
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return data;
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}
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READ8_MEMBER(a2600_state::current_bank_r)
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READ8_MEMBER(a2600_state::current_bank_r)
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{
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{
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return m_current_bank;
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return m_current_bank;
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@ -1799,7 +1811,9 @@ void a2600_state::machine_reset()
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case modeFE:
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case modeFE:
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space.install_write_handler(0x01fe, 0x01fe, write8_delegate(FUNC(a2600_state::modeFE_switch_w),this));
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space.install_write_handler(0x01fe, 0x01fe, write8_delegate(FUNC(a2600_state::modeFE_switch_w),this));
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space.install_read_handler(0x01fe, 0x01fe, read8_delegate(FUNC(a2600_state::modeFE_switch_r),this));
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space.install_read_handler(0x01fe, 0x01ff, read8_delegate(FUNC(a2600_state::modeFE_switch_r),this));
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space.install_read_handler(0x1000, 0x1fff, read8_delegate(FUNC(a2600_state::modeFE_rom_r),this));
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m_modeFE_trigger_on_next_access = false;
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break;
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break;
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case mode3E:
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case mode3E:
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