ti99: Hexbus floppy now working for 99/2

src/devices/bus/hexbus/hexbus.cpp

@@ -246,8 +246,8 @@ void hexbus_chained_device::hexbus_write(uint8_t data)
 	// This is emulated by pulling the data lines to ones.
 	uint8_t newvalue = (otherval | 0xc3) & m_myvalue;
 
-	// If it changed, propagate to both directions.
+	// If it changed (with respect to HSK* or BAV*), propagate to both directions.
-	if (newvalue != m_current_bus_value)
+	if ((newvalue & (HEXBUS_LINE_HSK | HEXBUS_LINE_BAV)) != (m_current_bus_value & (HEXBUS_LINE_HSK | HEXBUS_LINE_BAV)))
 	{
 		LOGMASKED(LOG_WRITE, "Trying to write %02x, actually: %02x (current=%02x)\n", data, newvalue, m_current_bus_value);
 
@@ -260,6 +260,7 @@ void hexbus_chained_device::hexbus_write(uint8_t data)
 			m_hexbus_outbound->write(OUTBOUND, m_current_bus_value);
 
 	}
+	else LOGMASKED(LOG_WRITE, "No change on hexbus\n");
 }
 
 /*
@@ -318,9 +319,9 @@ void hexbus_chained_device::bus_write(int dir, uint8_t data)
 	m_current_bus_value = data;
 
 	// Notify device
-	// Caution: Calling hexbus_value_changed may cause further activities
+	// Caution: Calling hexbus_value_changed may cause further activities that change the bus again
-	// that change the bus again
+	// Data changes alone shall not trigger the callback
-	if (data != oldvalue)
+	if ((data & (HEXBUS_LINE_HSK | HEXBUS_LINE_BAV)) != (oldvalue & (HEXBUS_LINE_HSK | HEXBUS_LINE_BAV)))
 	{
 		LOGMASKED(LOG_WRITE, "Hexbus value changed: %02x -> %02x\n", oldvalue, data);
 		hexbus_value_changed(data);

src/devices/bus/hexbus/tp0370.cpp

@@ -144,6 +144,7 @@ ibc_device::ibc_device(const machine_config &mconfig, const char *tag, device_t
 	m_int_pending(false),
 	m_incoming_message(false),
 	m_message_started(false),
+	m_latch_inhibit(false),
 	m_data(0),
 	m_transmit(0xff)
 {
@@ -229,12 +230,15 @@ void ibc_device::set_disable_inhibit(bool dis, bool inh)
 }
 
 /*
-    Called from the HSK latch or by command.
+    Called by a command, not automatically.
 */
 void ibc_device::set_lines(bool bav, bool hsk)
 {
 	LOGMASKED(LOG_LINES, "%s BAV*, %s HSK*\n", bav? "Pull down" : "Release",  hsk? "Pull down" : "Release");
 
+	// We're in the response phase.
+	if (hsk) m_latch_inhibit = true;
+
 	// Assert HSK*  (110 0 0111)
 	// Release HSK* (110 1 0111)
 	// Assert BAV*  (11010 0 11)
@@ -245,7 +249,6 @@ void ibc_device::set_lines(bool bav, bool hsk)
 	if (m_transmit != 0xff) LOGMASKED(LOG_LINES, "Data = %01x\n", m_transmit>>4);
 
 	m_hexout(val);
-	m_transmit=0xff; // TODO: Check this
 }
 
 /*
@@ -280,6 +283,14 @@ void ibc_device::from_hexbus(uint8_t val)
 			m_inhibit = false;
 			m_incoming_message = true;
 		}
+		else
+		{
+			if (!m_bav && m_bavold)
+			{
+				LOGMASKED(LOG_LINES, "Bus released\n");
+				m_latch_inhibit = false;
+			}
+		}
 
 		// The message may combine a change of BAV* and of HSK*.
 		if (!m_inhibit)
@@ -287,27 +298,34 @@ void ibc_device::from_hexbus(uint8_t val)
 			// Falling edge of HSK*
 			if (m_hsk && !m_hskold)
 			{
-				// On this falling edge, the nibble is supposed to be stable,
+				if (m_latch_inhibit)
-				// so keep it
-				m_data = data;
-				if (m_incoming_message && !m_message_started)
 				{
-					// Set flag for new message
+					LOGMASKED(LOG_LINES, "Not latching HSK* in response phase\n");
-					m_incoming_message = false;
-					m_message_started = true;
-					LOGMASKED(LOG_DETAIL, "New message started\n", data);
 				}
 				else
-					m_message_started = false;
+				{
+					// On this falling edge, the nibble is supposed to be stable,
+					// so keep it
+					m_data = data;
+					if (m_incoming_message && !m_message_started)
+					{
+						// Set flag for new message
+						m_incoming_message = false;
+						m_message_started = true;
+						LOGMASKED(LOG_DETAIL, "New message started\n", data);
+					}
+					else
+						m_message_started = false;
 
-				LOGMASKED(LOG_DETAIL, "Data reg <- %1x\n", data);
+					LOGMASKED(LOG_DETAIL, "Data reg <- %1x\n", data);
 
-				// set the latch
+					// set the latch
-				m_latch(ASSERT_LINE);
+					m_latch(ASSERT_LINE);
 
-				// and set interrupt
+					// and set interrupt
-				m_int_pending = true;
+					m_int_pending = true;
-				m_int(ASSERT_LINE);
+					m_int(ASSERT_LINE);
+				}
 			}
 		}
 	}

src/devices/bus/hexbus/tp0370.h

@@ -57,6 +57,7 @@ private:
 	bool m_int_pending;
 	bool m_incoming_message;
 	bool m_message_started;
+	bool m_latch_inhibit;
 
 	uint8_t m_data;
 	uint8_t m_transmit;

src/devices/bus/ti99/internal/992board.cpp

@@ -12,7 +12,6 @@
 ***************************************************************************/
 
 #include "emu.h"
-#include "998board.h"
 
 #define LOG_WARN        (1U<<1)   // Warnings
 #define LOG_CRU         (1U<<2)     // CRU logging
@@ -21,7 +20,7 @@
 #define LOG_BANK        (1U<<5)     // Change ROM banks
 #define LOG_KEYBOARD    (1U<<6)   // Keyboard operation
 
-#define VERBOSE ( LOG_GENERAL | LOG_WARN )
+#define VERBOSE ( LOG_WARN )
 
 #include "logmacro.h"
 #include "992board.h"
@@ -357,7 +356,8 @@ io992_device::io992_device(const machine_config &mconfig, device_type type, cons
 		m_key_row(0),
 		m_latch_out(0xd7),
 		m_latch_in(0xd7),
-		m_communication_disable(true)
+		m_communication_disable(true),
+		m_response_phase(false)
 {
 }
 
@@ -479,6 +479,9 @@ READ8_MEMBER(io992_device::cruread)
 			if ((m_latch_in & m_hexbval[i])==0) value &= ~bit;
 			bit <<= 1;
 		}
+		// e80c (bit 6) seems to be a latch for the response phase
+		if (!m_response_phase)
+			value &= ~0x40;
 
 		inp = m_cassette->input();
 		if (inp > 0)
@@ -540,8 +543,12 @@ WRITE8_MEMBER(io992_device::cruwrite)
 		else m_latch_out &= ~m_hexbval[offset & 0x07];
 		LOGMASKED(LOG_HEXBUS, "Hexbus latch out = %02x\n", m_latch_out);
 		break;
-	case 0xe808:  // HSK
 	case 0xe80a:  // BAV
+		// Undocumented, but makes sense according to the ROM
+		if (data==0)
+			m_response_phase = false;
+		// no break
+	case 0xe808:  // HSK
 		if (data != 0) m_latch_out |= m_hexbval[offset & 0x07];
 		else m_latch_out &= ~m_hexbval[offset & 0x07];
 
@@ -556,6 +563,7 @@ WRITE8_MEMBER(io992_device::cruwrite)
 				LOGMASKED(LOG_HEXBUS, "Enabling Hexbus\n");
 				m_communication_disable = false;
 			}
+			LOGMASKED(LOG_HEXBUS, "Writing to Hexbus: BAV*=%d, HSK*=%d, DATA=%01x\n", (m_latch_out&0x04)!=0, (m_latch_out&0x10)!=0, ((m_latch_out>>4)&0x0c)|(m_latch_out&0x03));
 			hexbus_write(m_latch_out);
 			// Check how the bus has changed. This depends on the states of all
 			// connected peripherals
@@ -598,6 +606,21 @@ void io992_device::hexbus_value_changed(uint8_t data)
 	{
 		LOGMASKED(LOG_HEXBUS, "Hexbus changed and latched: %02x\n", data);
 		m_latch_in = data;
+
+		if ((data & bus::hexbus::HEXBUS_LINE_HSK)==0)
+		{
+			// If HSK* is lowered and we as the host have it up, this indicates
+			// the response phase.
+			if (!m_response_phase && (m_myvalue & bus::hexbus::HEXBUS_LINE_HSK)!=0)
+			{
+				LOGMASKED(LOG_HEXBUS, "Incoming response\n");
+				m_response_phase = true;
+			}
+			// We cannot wait for the CPU explicitly latching HSK*
+			// as designed, because this implies a true parallel execution
+			LOGMASKED(LOG_HEXBUS, "Latching HSK*\n");
+			m_myvalue &= ~bus::hexbus::HEXBUS_LINE_HSK;
+		}
 	}
 	else
 		LOGMASKED(LOG_HEXBUS, "Ignoring Hexbus change (to %02x), latch=%s, BAV*=%d\n", data, m_communication_disable? "inhibit":"enabled", bav_asserted? 0:1);

src/devices/bus/ti99/internal/992board.h

@@ -137,6 +137,9 @@ private:
 
 	// Hexbus inhibit. This prevents the incoming latches to store the data.
 	bool m_communication_disable;
+
+	// Bit 6. It is not documented, but likely to indicate the response phase.
+	bool m_response_phase;
 };