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nes/bus: Minor cleanups for Taito boards. (#9607)
* nes/bus: Minor cleanups for Taito boards. - Fixed address masks for TC0190FMC and X1-005, reflecting hardware pin connections. - Fixed off-by-one in TC0190FMC+PAL IRQ due to using two's complement instead of one's complement. * Fixed khstad88's release date.
This commit is contained in:
0kmg
GitHub
parent
520bb02d97
commit
564c57f168
@ -21353,7 +21353,7 @@ license:CC0
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<year>1988</year>
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<publisher>Taito</publisher>
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<info name="serial" value="TFC-KHS-5500 (18)"/>
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<info name="release" value="19880628"/>
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<info name="release" value="19881216"/>
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<info name="alt_title" value="究極ハリキリスタジアム"/>
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<part name="cart" interface="nes_cart">
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<feature name="slot" value="x1_005" />
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@ -66024,7 +66024,7 @@ We don't include these hacks because they were not burned into real carts nor so
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</part>
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</software>
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<software name="queenbee">
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<software name="queenbee" cloneof="insectx">
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<description>Queen Bee V (Asia)</description>
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<year>1994</year>
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<publisher>Nitra</publisher>
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@ -461,7 +461,6 @@ void nes_disksys_device::load_disk(device_image_interface &image)
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// if there is an header, skip it
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image.fseek(header, SEEK_SET);
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image.fread(m_fds_data.get(), 65500 * m_fds_sides);
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return;
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}
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void nes_disksys_device::unload_disk(device_image_interface &image)
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@ -1802,10 +1802,9 @@ void nes_txc_tw_device::write_l(offs_t offset, uint8_t data)
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prg32((data >> 4) | data);
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}
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// writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (beacuse it is handled by low writes)
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// writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (because it is handled by low writes)
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void nes_txc_tw_device::prg_cb(int start, int bank)
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{
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return;
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}
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/*-------------------------------------------------
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@ -2030,10 +2029,9 @@ u8 nes_gouder_device::read_l(offs_t offset)
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return get_open_bus();
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}
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// writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (beacuse it is handled by low writes)
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// writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (because it is handled by low writes)
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void nes_gouder_device::prg_cb(int start, int bank)
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{
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return;
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}
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@ -46,22 +46,22 @@ DEFINE_DEVICE_TYPE(NES_X1_005, nes_x1_005_device, "nes_x1_
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DEFINE_DEVICE_TYPE(NES_X1_017, nes_x1_017_device, "nes_x1_017", "NES Cart Taito X1-017 PCB")
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nes_tc0190fmc_device::nes_tc0190fmc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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nes_tc0190fmc_device::nes_tc0190fmc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
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: nes_nrom_device(mconfig, type, tag, owner, clock)
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{
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}
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nes_tc0190fmc_device::nes_tc0190fmc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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nes_tc0190fmc_device::nes_tc0190fmc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: nes_tc0190fmc_device(mconfig, NES_TC0190FMC, tag, owner, clock)
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{
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}
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nes_tc0190fmc_pal16r4_device::nes_tc0190fmc_pal16r4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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nes_tc0190fmc_pal16r4_device::nes_tc0190fmc_pal16r4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: nes_tc0190fmc_device(mconfig, NES_TC0190FMC_PAL16R4, tag, owner, clock), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0)
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{
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}
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nes_x1_005_device::nes_x1_005_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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nes_x1_005_device::nes_x1_005_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: nes_nrom_device(mconfig, NES_X1_005, tag, owner, clock), m_latch(0)
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{
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}
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@ -75,7 +75,6 @@ nes_x1_017_device::nes_x1_017_device(const machine_config &mconfig, const char *
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void nes_tc0190fmc_device::pcb_reset()
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{
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m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
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prg16_89ab(0);
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prg16_cdef(m_prg_chunks - 1);
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chr8(0, m_chr_source);
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@ -83,7 +82,7 @@ void nes_tc0190fmc_device::pcb_reset()
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void nes_tc0190fmc_pal16r4_device::device_start()
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{
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common_start();
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nes_tc0190fmc_device::device_start();
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_count));
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save_item(NAME(m_irq_count_latch));
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@ -91,10 +90,7 @@ void nes_tc0190fmc_pal16r4_device::device_start()
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void nes_tc0190fmc_pal16r4_device::pcb_reset()
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{
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m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
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prg16_89ab(0);
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prg16_cdef(m_prg_chunks - 1);
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chr8(0, m_chr_source);
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nes_tc0190fmc_device::pcb_reset();
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m_irq_enable = 0;
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m_irq_count = 0;
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@ -114,7 +110,6 @@ void nes_x1_005_device::device_start()
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void nes_x1_005_device::pcb_reset()
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{
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m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
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prg16_89ab(0);
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prg16_cdef(m_prg_chunks - 1);
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chr8(0, m_chr_source);
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@ -173,15 +168,15 @@ void nes_x1_017_device::pcb_reset()
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iNES: mapper 33
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In MESS: Supported.
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In MAME: Supported.
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-------------------------------------------------*/
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void nes_tc0190fmc_device::tc0190fmc_write(offs_t offset, uint8_t data)
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void nes_tc0190fmc_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("tc0190fmc_write, offset: %04x, data: %02x\n", offset, data));
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LOG_MMC(("tc0190fmc write_h, offset: %04x, data: %02x\n", offset, data));
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switch (offset & 0x7003)
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switch (offset & 0x6003)
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{
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case 0x0000:
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set_nt_mirroring(BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
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@ -191,22 +186,14 @@ void nes_tc0190fmc_device::tc0190fmc_write(offs_t offset, uint8_t data)
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prg8_ab(data);
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break;
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case 0x0002:
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chr2_0(data, CHRROM);
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break;
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case 0x0003:
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chr2_2(data, CHRROM);
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chr2_x((offset & 1) << 1, data, CHRROM);
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break;
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case 0x2000:
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chr1_4(data, CHRROM);
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break;
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case 0x2001:
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chr1_5(data, CHRROM);
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break;
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case 0x2002:
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chr1_6(data, CHRROM);
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break;
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case 0x2003:
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chr1_7(data, CHRROM);
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chr1_x((offset & 0x03) | 4, data, CHRROM);
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break;
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}
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}
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@ -226,30 +213,30 @@ void nes_tc0190fmc_device::tc0190fmc_write(offs_t offset, uint8_t data)
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iNES: mapper 48
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In MESS: Supported.
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In MAME: Supported.
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-------------------------------------------------*/
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void nes_tc0190fmc_pal16r4_device::hblank_irq( int scanline, int vblank, int blanked )
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void nes_tc0190fmc_pal16r4_device::hblank_irq(int scanline, int vblank, int blanked)
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{
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if (scanline < ppu2c0x_device::BOTTOM_VISIBLE_SCANLINE)
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{
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int prior_count = m_irq_count;
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if (m_irq_count == 0)
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m_irq_count = m_irq_count_latch;
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else
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if (m_irq_count)
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{
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m_irq_count--;
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if (m_irq_enable && !blanked && (m_irq_count == 0) && prior_count)
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set_irq_line(ASSERT_LINE);
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if (m_irq_enable && !blanked && !m_irq_count)
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set_irq_line(ASSERT_LINE);
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}
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else
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m_irq_count = m_irq_count_latch;
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}
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}
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void nes_tc0190fmc_pal16r4_device::write_h(offs_t offset, uint8_t data)
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void nes_tc0190fmc_pal16r4_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("tc0190fmc pal16r4 write_h, offset: %04x, data: %02x\n", offset, data));
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switch (offset & 0x7003)
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switch (offset & 0x6003)
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{
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case 0x0000:
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prg8_89(data);
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@ -261,10 +248,10 @@ void nes_tc0190fmc_pal16r4_device::write_h(offs_t offset, uint8_t data)
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case 0x2001:
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case 0x2002:
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case 0x2003:
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tc0190fmc_write(offset, data);
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nes_tc0190fmc_device::write_h(offset, data);
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break;
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case 0x4000:
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m_irq_count_latch = (0x100 - data) & 0xff;
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m_irq_count_latch = ~data;
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break;
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case 0x4001:
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m_irq_count = m_irq_count_latch;
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@ -293,71 +280,58 @@ void nes_tc0190fmc_pal16r4_device::write_h(offs_t offset, uint8_t data)
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-------------------------------------------------*/
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void nes_x1_005_device::write_m(offs_t offset, uint8_t data)
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void nes_x1_005_device::write_m(offs_t offset, u8 data)
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{
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LOG_MMC(("x1_005 write_m, offset: %04x, data: %02x\n", offset, data));
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switch (offset)
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if ((offset & 0x1f70) == 0x1e70) // A7 is not connected
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{
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case 0x1ef0:
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chr2_0(BIT(data, 1, 6), CHRROM);
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if (m_x1_005_alt_mirroring)
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{
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set_nt_page(0, CIRAM, BIT(data, 7), 1);
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set_nt_page(1, CIRAM, BIT(data, 7), 1);
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}
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break;
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case 0x1ef1:
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chr2_2(BIT(data, 1, 6), CHRROM);
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if (m_x1_005_alt_mirroring)
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{
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set_nt_page(2, CIRAM, BIT(data, 7), 1);
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set_nt_page(3, CIRAM, BIT(data, 7), 1);
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}
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break;
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case 0x1ef2:
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chr1_4(data, CHRROM);
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break;
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case 0x1ef3:
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chr1_5(data, CHRROM);
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break;
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case 0x1ef4:
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chr1_6(data, CHRROM);
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break;
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case 0x1ef5:
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chr1_7(data, CHRROM);
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break;
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case 0x1ef6:
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case 0x1ef7:
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if (!m_x1_005_alt_mirroring)
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set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
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break;
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case 0x1ef8:
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case 0x1ef9:
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m_latch = data;
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break;
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case 0x1efa:
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case 0x1efb:
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prg8_89(data);
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break;
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case 0x1efc:
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case 0x1efd:
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prg8_ab(data);
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break;
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case 0x1efe:
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case 0x1eff:
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prg8_cd(data);
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break;
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default:
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logerror("mapper80_m_w uncaught addr: %04x, value: %02x\n", offset + 0x6000, data);
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break;
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}
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u8 reg = offset & 0x0f;
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if (offset >= 0x1f00 && m_latch == 0xa3)
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switch (reg)
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{
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case 0x0:
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case 0x1:
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reg <<= 1;
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chr2_x(reg, BIT(data, 1, 6), CHRROM);
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if (m_x1_005_alt_mirroring)
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{
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set_nt_page(reg + 0, CIRAM, BIT(data, 7), 1);
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set_nt_page(reg + 1, CIRAM, BIT(data, 7), 1);
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}
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break;
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case 0x2:
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case 0x3:
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case 0x4:
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case 0x5:
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chr1_x(reg + 2, data, CHRROM);
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break;
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case 0x6:
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case 0x7:
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if (!m_x1_005_alt_mirroring)
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set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
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break;
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case 0x8:
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case 0x9:
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m_latch = data;
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break;
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case 0xa:
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case 0xb:
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case 0xc:
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case 0xd:
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case 0xe:
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case 0xf:
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prg8_x((reg - 0x0a) >> 1, data);
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break;
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}
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}
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else if (offset >= 0x1f00 && m_latch == 0xa3)
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m_x1_005_ram[offset & 0x7f] = data;
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else
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logerror("Taito X1-005 uncaught addr: %04x, value: %02x\n", offset + 0x6000, data);
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}
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uint8_t nes_x1_005_device::read_m(offs_t offset)
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u8 nes_x1_005_device::read_m(offs_t offset)
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{
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LOG_MMC(("x1_005 read_m, offset: %04x\n", offset));
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@ -434,7 +408,7 @@ void nes_x1_017_device::write_m(offs_t offset, u8 data)
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case 0x1efa:
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case 0x1efb:
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case 0x1efc:
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prg8_x((offset & 0x0f) - 0xa, bitswap<6>(data, 0, 1, 2, 3, 4, 5));
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prg8_x((offset & 0x0f) - 0x0a, bitswap<6>(data, 0, 1, 2, 3, 4, 5));
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break;
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case 0x1efd:
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m_irq_count_latch = data;
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@ -14,15 +14,14 @@ class nes_tc0190fmc_device : public nes_nrom_device
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{
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public:
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// construction/destruction
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nes_tc0190fmc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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nes_tc0190fmc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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void tc0190fmc_write(offs_t offset, uint8_t data);
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virtual void write_h(offs_t offset, uint8_t data) override { tc0190fmc_write(offset, data); }
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virtual void write_h(offs_t offset, u8 data) override;
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virtual void pcb_reset() override;
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protected:
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nes_tc0190fmc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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nes_tc0190fmc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
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};
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@ -32,9 +31,9 @@ class nes_tc0190fmc_pal16r4_device : public nes_tc0190fmc_device
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{
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public:
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// construction/destruction
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nes_tc0190fmc_pal16r4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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nes_tc0190fmc_pal16r4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual void write_h(offs_t offset, uint8_t data) override;
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virtual void write_h(offs_t offset, u8 data) override;
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virtual void hblank_irq(int scanline, int vblank, int blanked) override;
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virtual void pcb_reset() override;
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@ -44,8 +43,8 @@ protected:
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virtual void device_start() override;
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private:
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uint16_t m_irq_count, m_irq_count_latch;
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int m_irq_enable;
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u8 m_irq_count, m_irq_count_latch;
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u8 m_irq_enable;
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};
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@ -55,10 +54,10 @@ class nes_x1_005_device : public nes_nrom_device
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{
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public:
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// construction/destruction
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nes_x1_005_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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nes_x1_005_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual uint8_t read_m(offs_t offset) override;
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virtual void write_m(offs_t offset, uint8_t data) override;
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virtual u8 read_m(offs_t offset) override;
|
||||
virtual void write_m(offs_t offset, u8 data) override;
|
||||
|
||||
virtual void pcb_reset() override;
|
||||
|
||||
@ -67,9 +66,9 @@ protected:
|
||||
virtual void device_start() override;
|
||||
|
||||
private:
|
||||
uint8_t m_latch;
|
||||
u8 m_latch;
|
||||
// Taito X1-005 chip contains 80 bytes of internal ram, possibly battery backed up
|
||||
uint8_t m_x1_005_ram[0x80];
|
||||
u8 m_x1_005_ram[0x80];
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user