From 5695dfc045aab66d9a4eab23d293dd4e566d853c Mon Sep 17 00:00:00 2001 From: cracyc Date: Wed, 29 May 2013 23:15:35 +0000 Subject: [PATCH] pcshare: make all the common pc hardware in various pc based drivers inherit from pcat_base_state [Carl] --- src/mame/drivers/calchase.c | 301 +++------------------- src/mame/drivers/fruitpc.c | 472 +++-------------------------------- src/mame/drivers/funkball.c | 254 ++----------------- src/mame/drivers/gamecstl.c | 274 +------------------- src/mame/drivers/gammagic.c | 239 +----------------- src/mame/drivers/magtouch.c | 6 - src/mame/drivers/mediagx.c | 302 ++-------------------- src/mame/drivers/midqslvr.c | 245 +----------------- src/mame/drivers/pangofun.c | 6 - src/mame/drivers/pcat_dyn.c | 6 - src/mame/drivers/pcat_nit.c | 8 +- src/mame/drivers/photoply.c | 247 +----------------- src/mame/drivers/pinball2k.c | 321 +----------------------- src/mame/drivers/queen.c | 242 +----------------- src/mame/drivers/savquest.c | 243 +----------------- src/mame/drivers/su2000.c | 62 +---- src/mame/drivers/taitowlf.c | 296 +--------------------- src/mame/drivers/voyager.c | 257 +------------------ src/mame/drivers/xtom3d.c | 268 +------------------- src/mame/machine/pcshare.c | 24 +- src/mame/machine/pcshare.h | 11 +- 21 files changed, 223 insertions(+), 3861 deletions(-) diff --git a/src/mame/drivers/calchase.c b/src/mame/drivers/calchase.c index 9f1961bf899..4e8f5bd9f24 100644 --- a/src/mame/drivers/calchase.c +++ b/src/mame/drivers/calchase.c @@ -113,48 +113,30 @@ something wrong in the disk geometry reported by calchase.chd (20,255,63) since #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" #include "sound/dac.h" +#include "machine/pcshare.h" -class calchase_state : public driver_device +class calchase_state : public pcat_base_state { public: calchase_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), + : pcat_base_state(mconfig, type, tag), m_dac_l(*this, "dac_l"), - m_dac_r(*this, "dac_r") + m_dac_r(*this, "dac_r"), + m_ide(*this, "ide") { } UINT32 *m_bios_ram; UINT32 *m_bios_ext_ram; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - device_t *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; - UINT32 m_idle_skip_ram; - required_device m_maincpu; - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_WRITE32_MEMBER(bios_ext_ram_w); DECLARE_WRITE32_MEMBER(bios_ram_w); DECLARE_READ16_MEMBER(calchase_iocard1_r); @@ -164,172 +146,21 @@ public: DECLARE_READ16_MEMBER(calchase_iocard5_r); DECLARE_READ32_MEMBER(calchase_idle_skip_r); DECLARE_WRITE32_MEMBER(calchase_idle_skip_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); + DECLARE_WRITE16_MEMBER(calchase_dac_l_w); + DECLARE_WRITE16_MEMBER(calchase_dac_r_w); + DECLARE_DRIVER_INIT(calchase); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_WRITE16_MEMBER(calchase_dac_l_w); - DECLARE_WRITE16_MEMBER(calchase_dac_r_w); - DECLARE_WRITE_LINE_MEMBER(calchase_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); - DECLARE_DRIVER_INIT(calchase); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); required_device m_dac_l; required_device m_dac_r; + required_device m_ide; }; - - - -READ8_MEMBER(calchase_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(calchase_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -READ8_MEMBER(calchase_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(calchase_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(calchase_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w(state); -} - - -READ8_MEMBER(calchase_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(calchase_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - calchase_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(calchase_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(calchase_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(calchase_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(calchase_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(calchase_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(calchase_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(calchase_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(calchase_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(calchase_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(calchase_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(calchase_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - -READ32_MEMBER(calchase_state::ide_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(calchase_state::ide_w) -{ - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); -} - -READ32_MEMBER(calchase_state::fdc_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(calchase_state::fdc_w) -{ - device_t *device = machine().device("ide"); - //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); -} - - // Intel 82439TX System Controller (MXTC) // TODO: change with a VIA82C585VPX (North Bridge - APOLLO Chipset) @@ -543,6 +374,27 @@ WRITE16_MEMBER(calchase_state::calchase_dac_r_w) m_dac_r->write_unsigned16((data & 0xfff) << 4); } +READ32_MEMBER(calchase_state::ide_r) +{ + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); +} + +WRITE32_MEMBER(calchase_state::ide_w) +{ + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); +} + +READ32_MEMBER(calchase_state::fdc_r) +{ + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); +} + +WRITE32_MEMBER(calchase_state::fdc_w) +{ + //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); +} + static ADDRESS_MAP_START( calchase_map, AS_PROGRAM, 32, calchase_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", trident_vga_device, mem_r, mem_w, 0xffffffff) // VGA VRAM @@ -579,14 +431,7 @@ static ADDRESS_MAP_START( calchase_map, AS_PROGRAM, 32, calchase_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) //AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY AM_RANGE(0x0170, 0x0177) AM_NOP //To debug @@ -619,7 +464,6 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state ) AM_RANGE(0x4ae8, 0x4aef) AM_NOP //To debug AM_RANGE(0x83c0, 0x83cf) AM_RAM AM_SHARE("share1") AM_RANGE(0x92e8, 0x92ef) AM_NOP //To debug - ADDRESS_MAP_END #define AT_KEYB_HELPER(bit, text, key1) \ @@ -804,70 +648,14 @@ static INPUT_PORTS_START( calchase ) INPUT_PORTS_END #endif -IRQ_CALLBACK_MEMBER(calchase_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void calchase_state::machine_start() { m_bios_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); m_bios_ext_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(calchase_state::irq_callback),this)); - - m_pit8254 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_1" ); - m_pic8259_2 = machine().device( "pic8259_2" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(calchase_state::calchase_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(calchase_state::get_slave_ack) -{ - if (offset==2) { - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config calchase_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - void calchase_state::machine_reset() { //membank("bank1")->set_base(memregion("bios")->base() + 0x10000); @@ -875,43 +663,20 @@ void calchase_state::machine_reset() membank("bios_ext")->set_base(memregion("bios")->base() + 0); } -READ8_MEMBER(calchase_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(calchase_state,get_out2) -}; - static MACHINE_CONFIG_START( calchase, calchase_state ) MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // Cyrix 686MX-PR200 CPU MCFG_CPU_PROGRAM_MAP(calchase_map) MCFG_CPU_IO_MAP(calchase_io) - MCFG_PIT8254_ADD( "pit8254", calchase_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(calchase_state,calchase_pic8259_1_set_int_line), VCC, READ8(calchase_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) + MCFG_FRAGMENT_ADD( pcat_common ) + MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_trident_vga ) diff --git a/src/mame/drivers/fruitpc.c b/src/mame/drivers/fruitpc.c index e61eb8cc255..4eddff1b53c 100644 --- a/src/mame/drivers/fruitpc.c +++ b/src/mame/drivers/fruitpc.c @@ -13,28 +13,18 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/am9517a.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" #include "sound/dac.h" +#include "machine/pcshare.h" -class fruitpc_state : public driver_device +class fruitpc_state : public pcat_base_state { public: fruitpc_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_pit8254(*this,"pit8254"), - m_pic8259_1(*this,"pic8259_1"), - m_pic8259_2(*this,"pic8259_2"), - m_dma8237_1(*this,"dma8237_1") , - m_dma8237_2(*this,"dma8237_2") , - m_maincpu(*this, "maincpu"), + : pcat_base_state(mconfig, type, tag), m_ide(*this, "ide"), m_inp1(*this, "INP1"), m_inp2(*this, "INP2"), @@ -42,16 +32,6 @@ public: m_inp4(*this, "INP4") { } - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - - required_device m_pit8254; - required_device m_pic8259_1; - required_device m_pic8259_2; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_maincpu; required_device m_ide; required_ioport m_inp1; @@ -59,146 +39,32 @@ public: required_ioport m_inp3; required_ioport m_inp4; - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); + DECLARE_DRIVER_INIT(fruitpc); + DECLARE_READ8_MEMBER(fruit_inp_r); + virtual void machine_start(); + virtual void machine_reset(); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_WRITE_LINE_MEMBER(fruitpc_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); - DECLARE_DRIVER_INIT(fruitpc); - DECLARE_READ8_MEMBER(get_out2); - DECLARE_READ8_MEMBER(fruit_inp_r); - virtual void machine_start(); - virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); }; - - - -READ8_MEMBER(fruitpc_state::at_dma8237_2_r) +READ8_MEMBER(fruitpc_state::fruit_inp_r) { - return m_dma8237_2->read(space, offset / 2); -} - -WRITE8_MEMBER(fruitpc_state::at_dma8237_2_w) -{ - m_dma8237_2->write(space, offset / 2, data); -} - -READ8_MEMBER(fruitpc_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; + switch(offset) + { + case 0: + return m_inp1->read(); + case 1: + return m_inp2->read(); + case 2: + return m_inp3->read(); + case 3: + return m_inp4->read(); } - return data; + return 0; } - -WRITE8_MEMBER(fruitpc_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(fruitpc_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->hack_w(state); -} - - -READ8_MEMBER(fruitpc_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(fruitpc_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - fruitpc_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(fruitpc_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(fruitpc_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(fruitpc_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(fruitpc_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(fruitpc_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(fruitpc_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - READ32_MEMBER(fruitpc_state::ide_r) { return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); @@ -220,22 +86,6 @@ WRITE32_MEMBER(fruitpc_state::fdc_w) ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } -READ8_MEMBER(fruitpc_state::fruit_inp_r) -{ - switch(offset) - { - case 0: - return m_inp1->read(); - case 1: - return m_inp2->read(); - case 2: - return m_inp3->read(); - case 3: - return m_inp4->read(); - } - return 0; -} - static ADDRESS_MAP_START( fruitpc_map, AS_PROGRAM, 32, fruitpc_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) // VGA VRAM @@ -247,72 +97,36 @@ static ADDRESS_MAP_START( fruitpc_map, AS_PROGRAM, 32, fruitpc_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( fruitpc_io, AS_IO, 32, fruitpc_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", am9517a_device, read, write, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) - //AM_RANGE(0x00e8, 0x00eb) AM_NOP - AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY - AM_RANGE(0x0170, 0x0177) AM_NOP //To debug + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) - AM_RANGE(0x0200, 0x021f) AM_NOP //To debug - AM_RANGE(0x0260, 0x026f) AM_NOP //To debug - AM_RANGE(0x0278, 0x027b) AM_WRITENOP//AM_WRITE(pnp_config_w) - AM_RANGE(0x0280, 0x0287) AM_NOP //To debug - AM_RANGE(0x02a0, 0x02a7) AM_NOP //To debug - AM_RANGE(0x02c0, 0x02c7) AM_NOP //To debug - AM_RANGE(0x02e0, 0x02ef) AM_NOP //To debug - AM_RANGE(0x0278, 0x02ff) AM_NOP //To debug - AM_RANGE(0x02f8, 0x02ff) AM_NOP //To debug AM_RANGE(0x0310, 0x0313) AM_READ8(fruit_inp_r, 0xffffffff) - AM_RANGE(0x0320, 0x038f) AM_NOP //To debug - AM_RANGE(0x03a0, 0x03a7) AM_NOP //To debug AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff) AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff) AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff) - AM_RANGE(0x03e0, 0x03ef) AM_NOP //To debug - AM_RANGE(0x0378, 0x037f) AM_NOP //To debug - // AM_RANGE(0x0300, 0x03af) AM_NOP - // AM_RANGE(0x03b0, 0x03df) AM_NOP AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w) - AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1: - AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE(pnp_data_w) - AM_RANGE(0x42e8, 0x43ef) AM_NOP //To debug - AM_RANGE(0x43c0, 0x43cf) AM_RAM AM_SHARE("share1") - AM_RANGE(0x46e8, 0x46ef) AM_NOP //To debug - AM_RANGE(0x4ae8, 0x4aef) AM_NOP //To debug - AM_RANGE(0x83c0, 0x83cf) AM_RAM AM_SHARE("share1") - AM_RANGE(0x92e8, 0x92ef) AM_NOP //To debug - ADDRESS_MAP_END #define AT_KEYB_HELPER(bit, text, key1) \ PORT_BIT( bit, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME(text) PORT_CODE(key1) - -#if 1 static INPUT_PORTS_START( fruitpc ) PORT_START("pc_keyboard_0") - PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */ - AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */ +// PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */ +// AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */ PORT_START("pc_keyboard_1") - AT_KEYB_HELPER( 0x0010, "T", KEYCODE_T ) /* T 14 94 */ - AT_KEYB_HELPER( 0x0020, "Y", KEYCODE_Y ) /* Y 15 95 */ - AT_KEYB_HELPER( 0x0100, "O", KEYCODE_O ) /* O 18 98 */ - AT_KEYB_HELPER( 0x1000, "Enter", KEYCODE_ENTER ) /* Enter 1C 9C */ +// AT_KEYB_HELPER( 0x0010, "T", KEYCODE_T ) /* T 14 94 */ +// AT_KEYB_HELPER( 0x0020, "Y", KEYCODE_Y ) /* Y 15 95 */ +// AT_KEYB_HELPER( 0x0100, "O", KEYCODE_O ) /* O 18 98 */ +// AT_KEYB_HELPER( 0x1000, "Enter", KEYCODE_ENTER ) /* Enter 1C 9C */ PORT_START("pc_keyboard_2") PORT_START("pc_keyboard_3") - AT_KEYB_HELPER( 0x0001, "B", KEYCODE_B ) /* B 30 B0 */ - AT_KEYB_HELPER( 0x0002, "N", KEYCODE_N ) /* N 31 B1 */ - AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */ +// AT_KEYB_HELPER( 0x0001, "B", KEYCODE_B ) /* B 30 B0 */ +// AT_KEYB_HELPER( 0x0002, "N", KEYCODE_N ) /* N 31 B1 */ +// AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */ // AT_KEYB_HELPER( 0x8000, "F5", KEYCODE_F5 ) PORT_START("pc_keyboard_4") @@ -321,13 +135,13 @@ static INPUT_PORTS_START( fruitpc ) PORT_START("pc_keyboard_5") PORT_START("pc_keyboard_6") - AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */ - AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */ - AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */ - AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ - AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ - AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ +// AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */ +// AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */ +// AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */ +// AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ +// AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ +// AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ +// AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") @@ -353,237 +167,27 @@ static INPUT_PORTS_START( fruitpc ) PORT_BIT( 0x00f0, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("INP4") PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN ) -/* - PORT_START("IOCARD1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START1 ) - PORT_DIPNAME( 0x0008, 0x0008, "1" ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Accelerator") - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("IOCARD2") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) // guess - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset SW") - PORT_DIPNAME( 0x0004, 0x0004, "2" ) - PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Turbo") - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) // returns back to MS-DOS (likely to be unmapped and actually used as a lame protection check) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("IOCARD3") - PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") - PORT_BIT( 0xdfff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("IOCARD4") - PORT_DIPNAME( 0x01, 0x01, "DSWA" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, "DSWA" ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_START("IOCARD5") - PORT_DIPNAME( 0x01, 0x01, "DSWA" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, "DSWA" ) - PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) -*/ INPUT_PORTS_END -#endif - -IRQ_CALLBACK_MEMBER(fruitpc_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} void fruitpc_state::machine_start() { m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fruitpc_state::irq_callback),this)); } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -READ8_MEMBER(fruitpc_state::get_slave_ack) -{ - if (offset==2) { - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config fruitpc_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - void fruitpc_state::machine_reset() { } -READ8_MEMBER(fruitpc_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(fruitpc_state,get_out2) -}; - static MACHINE_CONFIG_START( fruitpc, fruitpc_state ) MCFG_CPU_ADD("maincpu", I486, 66000000) // ST STPCD0166BTC3 66 MHz 486 CPU MCFG_CPU_PROGRAM_MAP(fruitpc_map) MCFG_CPU_IO_MAP(fruitpc_io) - MCFG_PIT8254_ADD( "pit8254", fruitpc_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", INPUTLINE("maincpu", 0), VCC, READ8(fruitpc_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) + MCFG_FRAGMENT_ADD( pcat_common ) + MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) diff --git a/src/mame/drivers/funkball.c b/src/mame/drivers/funkball.c index 4d5d190a33c..c1196742157 100644 --- a/src/mame/drivers/funkball.c +++ b/src/mame/drivers/funkball.c @@ -69,35 +69,21 @@ Notes: #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/voodoo.h" +#include "machine/pcshare.h" -class funkball_state : public driver_device +class funkball_state : public pcat_base_state { public: funkball_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2"), + : pcat_base_state(mconfig, type, tag), m_voodoo(*this, "voodoo_0"), m_unk_ram(*this, "unk_ram"){ } - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - UINT8 m_funkball_config_reg_sel; UINT8 m_funkball_config_regs[256]; UINT32 m_cx5510_regs[256/4]; @@ -109,12 +95,6 @@ public: UINT32 m_biu_ctrl_reg[256/4]; // devices - required_device m_maincpu; - required_device m_pit8254; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_pic8259_1; - required_device m_pic8259_2; required_device m_voodoo; required_shared_ptr m_unk_ram; @@ -125,10 +105,12 @@ public: DECLARE_WRITE8_MEMBER( flash_data_w ); // DECLARE_WRITE8_MEMBER( bios_ram_w ); DECLARE_READ8_MEMBER( test_r ); - DECLARE_READ8_MEMBER( fdc_r ); DECLARE_WRITE8_MEMBER( fdc_w ); + UINT8 funkball_config_reg_r(); + void funkball_config_reg_w(UINT8 data); + virtual void video_start(); UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -140,10 +122,6 @@ public: UINT32 init_enable; } m_voodoo_pci_regs; - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_READ32_MEMBER(biu_ctrl_r); DECLARE_WRITE32_MEMBER(biu_ctrl_w); DECLARE_WRITE8_MEMBER(bios_ram_w); @@ -151,21 +129,11 @@ public: DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); DECLARE_READ8_MEMBER(io20_r); DECLARE_WRITE8_MEMBER(io20_w); - DECLARE_WRITE_LINE_MEMBER(funkball_pic8259_1_set_int_line); virtual void machine_start(); virtual void machine_reset(); UINT32 screen_update_funkball(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - IRQ_CALLBACK_MEMBER(irq_callback); - DECLARE_READ8_MEMBER(get_out2); }; void funkball_state::video_start() @@ -291,138 +259,20 @@ WRITE8_MEMBER( funkball_state::fdc_w ) } } - -READ8_MEMBER(funkball_state::at_page8_r) +UINT8 funkball_state::funkball_config_reg_r() { - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(funkball_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -READ8_MEMBER(funkball_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(funkball_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -WRITE_LINE_MEMBER(funkball_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(funkball_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(funkball_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - funkball_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(funkball_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(funkball_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(funkball_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(funkball_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(funkball_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(funkball_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(funkball_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(funkball_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(funkball_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(funkball_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(funkball_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - -static UINT8 funkball_config_reg_r(device_t *device) -{ - funkball_state *state = device->machine().driver_data(); - //mame_printf_debug("funkball_config_reg_r %02X\n", funkball_config_reg_sel); - return state->m_funkball_config_regs[state->m_funkball_config_reg_sel]; + return m_funkball_config_regs[m_funkball_config_reg_sel]; } -static void funkball_config_reg_w(device_t *device, UINT8 data) +void funkball_state::funkball_config_reg_w(UINT8 data) { - funkball_state *state = device->machine().driver_data(); - //mame_printf_debug("funkball_config_reg_w %02X, %02X\n", funkball_config_reg_sel, data); - state->m_funkball_config_regs[state->m_funkball_config_reg_sel] = data; + m_funkball_config_regs[m_funkball_config_reg_sel] = data; } READ8_MEMBER(funkball_state::io20_r) { - pic8259_device *device = machine().device("pic8259_1"); UINT8 r = 0; // 0x22, 0x23, Cyrix configuration registers @@ -431,19 +281,17 @@ READ8_MEMBER(funkball_state::io20_r) } else if (offset == 0x03) { - r = funkball_config_reg_r(device); + r = funkball_config_reg_r(); } else { - r = device->read(space, offset); + r = m_pic8259_1->read(space, offset); } return r; } WRITE8_MEMBER(funkball_state::io20_w) { - pic8259_device *device = machine().device("pic8259_1"); - // 0x22, 0x23, Cyrix configuration registers if (offset == 0x02) { @@ -451,11 +299,11 @@ WRITE8_MEMBER(funkball_state::io20_w) } else if (offset == 0x03) { - funkball_config_reg_w(device, data); + funkball_config_reg_w(data); } else { - device->write(space, offset, data); + m_pic8259_1->write(space, offset, data); } } @@ -586,14 +434,8 @@ static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state) ADDRESS_MAP_END static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x0020, 0x003f) AM_READWRITE8(io20_r, io20_w, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) AM_RANGE(0x00e8, 0x00ef) AM_NOP // AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) @@ -1012,61 +854,6 @@ static INPUT_PORTS_START( funkball ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END -static const struct pit8253_config funkball_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -WRITE_LINE_MEMBER(funkball_state::funkball_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER( funkball_state::get_slave_ack ) -{ - if (offset==2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -READ8_MEMBER(funkball_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(funkball_state,get_out2) -}; - -IRQ_CALLBACK_MEMBER(funkball_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void funkball_state::machine_start() { m_bios_ram = auto_alloc_array(machine(), UINT8, 0x20000); @@ -1113,14 +900,7 @@ static MACHINE_CONFIG_START( funkball, funkball_state ) MCFG_CPU_PROGRAM_MAP(funkball_map) MCFG_CPU_IO_MAP(funkball_io) - - MCFG_PIT8254_ADD( "pit8254", funkball_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(funkball_state,funkball_pic8259_1_set_int_line), VCC, READ8(funkball_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w) @@ -1129,8 +909,6 @@ static MACHINE_CONFIG_START( funkball, funkball_state ) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, voodoo_intf) diff --git a/src/mame/drivers/gamecstl.c b/src/mame/drivers/gamecstl.c index 86b81a9e2b4..d67581551f2 100644 --- a/src/mame/drivers/gamecstl.c +++ b/src/mame/drivers/gamecstl.c @@ -64,67 +64,40 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" -class gamecstl_state : public driver_device +class gamecstl_state : public pcat_base_state { public: gamecstl_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_cga_ram(*this, "cga_ram"), - m_maincpu(*this, "maincpu") { } + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide"), + m_cga_ram(*this, "cga_ram") { } + required_device m_ide; required_shared_ptr m_cga_ram; UINT32 *m_bios_ram; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - device_t *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; DECLARE_WRITE32_MEMBER(pnp_config_w); DECLARE_WRITE32_MEMBER(pnp_data_w); DECLARE_WRITE32_MEMBER(bios_ram_w); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(gamecstl_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); DECLARE_DRIVER_INIT(gamecstl); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); virtual void video_start(); UINT32 screen_update_gamecstl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - IRQ_CALLBACK_MEMBER(irq_callback); void draw_char(bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, int ch, int att, int x, int y); void intel82439tx_init(); - required_device m_maincpu; }; @@ -191,16 +164,6 @@ UINT32 gamecstl_state::screen_update_gamecstl(screen_device &screen, bitmap_ind1 return 0; } -READ8_MEMBER(gamecstl_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(gamecstl_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - // Intel 82439TX System Controller (MXTC) static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function, int reg) @@ -365,27 +328,23 @@ WRITE32_MEMBER(gamecstl_state::pnp_data_w) READ32_MEMBER(gamecstl_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(gamecstl_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } READ32_MEMBER(gamecstl_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(gamecstl_state::fdc_w) { - device_t *device = machine().device("ide"); //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } @@ -398,121 +357,6 @@ WRITE32_MEMBER(gamecstl_state::bios_ram_w) } } - -/************************************************************************* - * - * PC DMA stuff - * - *************************************************************************/ - - - -READ8_MEMBER(gamecstl_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) - { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(gamecstl_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) - { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(gamecstl_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(gamecstl_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(gamecstl_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - gamecstl_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(gamecstl_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(gamecstl_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(gamecstl_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(gamecstl_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(gamecstl_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(gamecstl_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - - - /*****************************************************************************/ static ADDRESS_MAP_START( gamecstl_map, AS_PROGRAM, 32, gamecstl_state ) @@ -527,14 +371,7 @@ static ADDRESS_MAP_START( gamecstl_map, AS_PROGRAM, 32, gamecstl_state ) ADDRESS_MAP_END static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x00ec, 0x00ef) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) @@ -604,18 +441,8 @@ static INPUT_PORTS_START(gamecstl) PORT_START("pc_keyboard_7") INPUT_PORTS_END -IRQ_CALLBACK_MEMBER(gamecstl_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void gamecstl_state::machine_start() { - m_pit8254 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_1" ); - m_pic8259_2 = machine().device( "pic8259_2" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); } void gamecstl_state::machine_reset() @@ -625,98 +452,21 @@ void gamecstl_state::machine_reset() m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gamecstl_state::irq_callback),this)); } - -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(gamecstl_state::gamecstl_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(gamecstl_state::get_slave_ack) -{ - if (offset==2) { // IRQ = 2 - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config gamecstl_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -READ8_MEMBER(gamecstl_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(gamecstl_state,get_out2) -}; - static MACHINE_CONFIG_START( gamecstl, gamecstl_state ) - /* basic machine hardware */ MCFG_CPU_ADD("maincpu", PENTIUM, 200000000) MCFG_CPU_PROGRAM_MAP(gamecstl_map) MCFG_CPU_IO_MAP(gamecstl_io) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w) - MCFG_PIT8254_ADD( "pit8254", gamecstl_pit8254_config ) - - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gamecstl_state,gamecstl_pic8259_1_set_int_line), VCC, READ8(gamecstl_state,get_slave_ack) ) - - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/gammagic.c b/src/mame/drivers/gammagic.c index 5a5d364b265..9e3ee8f0261 100644 --- a/src/mame/drivers/gammagic.c +++ b/src/mame/drivers/gammagic.c @@ -30,14 +30,10 @@ Additional CD-ROM games: "99 Bottles of Beer" #include "emu.h" #include "cpu/i386/i386.h" #include "machine/cr589.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" //#include "machine/i82371sb.h" //#include "machine/i82439tx.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "video/pc_vga.h" @@ -71,27 +67,11 @@ Additional CD-ROM games: "99 Bottles of Beer" #define MAX_TRANSFER_SIZE ( 63488 ) -class gammagic_state : public driver_device +class gammagic_state : public pcat_base_state { public: gammagic_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_pit8254(*this, "pit8254" ), - m_pic8259_1(*this, "pic8259_1" ), - m_pic8259_2(*this, "pic8259_2" ), - m_dma8237_1(*this, "dma8237_1" ), - m_dma8237_2(*this, "dma8237_2" ), - m_maincpu(*this, "maincpu") { } - - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - - required_device m_pit8254; - required_device m_pic8259_1; - required_device m_pic8259_2; - required_device m_dma8237_1; - required_device m_dma8237_2; + : pcat_base_state(mconfig, type, tag) { } emu_timer *m_atapi_timer; //SCSIInstance *m_inserted_cdrom; @@ -107,139 +87,12 @@ public: UINT8 m_atapi_data[ATAPI_DATA_SIZE]; DECLARE_DRIVER_INIT(gammagic); - IRQ_CALLBACK_MEMBER(irq_callback); - DECLARE_READ8_MEMBER(get_out2); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - void set_dma_channel(int channel, int state); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(gammagic_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); virtual void machine_start(); virtual void machine_reset(); void atapi_init(); - required_device m_maincpu; }; -READ8_MEMBER(gammagic_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(gammagic_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -READ8_MEMBER(gammagic_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(gammagic_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(gammagic_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w(state); -} - - -READ8_MEMBER(gammagic_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(gammagic_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -void gammagic_state::set_dma_channel(int channel, int state) -{ - if (!state) m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(gammagic_state::pc_dack0_w){ set_dma_channel(0, state); } -WRITE_LINE_MEMBER(gammagic_state::pc_dack1_w){ set_dma_channel(1, state); } -WRITE_LINE_MEMBER(gammagic_state::pc_dack2_w){ set_dma_channel(2, state); } -WRITE_LINE_MEMBER(gammagic_state::pc_dack3_w){ set_dma_channel(3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(gammagic_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(gammagic_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; /* READ32_MEMBER( gammagic_state::atapi_r ) { @@ -571,14 +424,7 @@ static ADDRESS_MAP_START( gammagic_map, AS_PROGRAM, 32, gammagic_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( gammagic_io, AS_IO, 32, gammagic_state) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x00e8, 0x00ef) AM_NOP AM_RANGE(0x00f0, 0x01ef) AM_NOP //AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(atapi_r, atapi_w) @@ -642,11 +488,6 @@ static INPUT_PORTS_START( gammagic ) INPUT_PORTS_END #endif -IRQ_CALLBACK_MEMBER(gammagic_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void gammagic_state::machine_start() { m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gammagic_state::irq_callback),this)); @@ -689,77 +530,13 @@ void gammagic_state::atapi_init() } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(gammagic_state::gammagic_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(gammagic_state::get_slave_ack) -{ - if (offset==2) { - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config gammagic_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -READ8_MEMBER(gammagic_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(gammagic_state,get_out2) -}; - static MACHINE_CONFIG_START( gammagic, gammagic_state ) MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // Intel Pentium 133 MCFG_CPU_PROGRAM_MAP(gammagic_map) MCFG_CPU_IO_MAP(gammagic_io) - MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gammagic_state,gammagic_pic8259_1_set_int_line), VCC, READ8(gammagic_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + + MCFG_FRAGMENT_ADD( pcat_common ) + // MCFG_I82371SB_ADD("i82371sb") // MCFG_I82439TX_ADD("i82439tx", "maincpu", "user") MCFG_PCI_BUS_ADD("pcibus", 0) @@ -768,8 +545,6 @@ static MACHINE_CONFIG_START( gammagic, gammagic_state ) /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) - MCFG_KBDC8042_ADD("kbdc", at8042) - MACHINE_CONFIG_END diff --git a/src/mame/drivers/magtouch.c b/src/mame/drivers/magtouch.c index 0f0c2423533..91a202fb42e 100644 --- a/src/mame/drivers/magtouch.c +++ b/src/mame/drivers/magtouch.c @@ -78,9 +78,6 @@ video card #include "machine/pcshare.h" #include "machine/ins8250.h" #include "machine/microtch.h" -#include "machine/8042kbdc.h" -#include "machine/pckeybrd.h" -#include "machine/pit8253.h" #include "video/pc_vga.h" @@ -219,9 +216,6 @@ static MACHINE_CONFIG_START( magtouch, magtouch_state ) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - -// MCFG_FRAGMENT_ADD( at_kbdc8042 ) MCFG_FRAGMENT_ADD( pcat_common ) MCFG_NS16450_ADD( "ns16450_0", magtouch_com0_interface, XTAL_1_8432MHz ) MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", magtouch_microtouch_interface, 9600 ) // rate? diff --git a/src/mame/drivers/mediagx.c b/src/mame/drivers/mediagx.c index 28d3118c0bd..d0ea05674ea 100644 --- a/src/mame/drivers/mediagx.c +++ b/src/mame/drivers/mediagx.c @@ -66,12 +66,8 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "sound/dmadac.h" @@ -85,17 +81,18 @@ struct speedup_entry UINT32 pc; }; -class mediagx_state : public driver_device +class mediagx_state : public pcat_base_state { public: mediagx_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide"), m_main_ram(*this, "main_ram"), m_cga_ram(*this, "cga_ram"), m_bios_ram(*this, "bios_ram"), - m_vram(*this, "vram"), - m_maincpu(*this, "maincpu") { } + m_vram(*this, "vram") { } + required_device m_ide; required_shared_ptr m_main_ram; required_shared_ptr m_cga_ram; required_shared_ptr m_bios_ram; @@ -136,16 +133,6 @@ public: dmadac_sound_device *m_dmadac[2]; - pit8254_device *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; - - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - #if SPEEDUP_HACKS const speedup_entry *m_speedup_table; UINT32 m_speedup_hits[12]; @@ -162,25 +149,12 @@ public: DECLARE_WRITE32_MEMBER(parallel_port_w); DECLARE_READ32_MEMBER(ad1847_r); DECLARE_WRITE32_MEMBER(ad1847_w); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); DECLARE_READ8_MEMBER(io20_r); DECLARE_WRITE8_MEMBER(io20_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(mediagx_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); DECLARE_DRIVER_INIT(a51site4); virtual void machine_start(); virtual void machine_reset(); @@ -198,9 +172,7 @@ public: DECLARE_READ32_MEMBER(speedup9_r); DECLARE_READ32_MEMBER(speedup10_r); DECLARE_READ32_MEMBER(speedup11_r); - DECLARE_READ8_MEMBER(get_out2); TIMER_DEVICE_CALLBACK_MEMBER(sound_timer_callback); - IRQ_CALLBACK_MEMBER(irq_callback); void draw_char(bitmap_rgb32 &bitmap, const rectangle &cliprect, gfx_element *gfx, int ch, int att, int x, int y); void draw_framebuffer(bitmap_rgb32 &bitmap, const rectangle &cliprect); void draw_cga(bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -209,7 +181,6 @@ public: void report_speedups(); void install_speedups(const speedup_entry *entries, int count); void init_mediagx(); - required_device m_maincpu; }; // Display controller registers @@ -443,39 +414,24 @@ WRITE32_MEMBER(mediagx_state::disp_ctrl_w) } -READ8_MEMBER(mediagx_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(mediagx_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - - READ32_MEMBER(mediagx_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(mediagx_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } READ32_MEMBER(mediagx_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(mediagx_state::fdc_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } @@ -547,25 +503,8 @@ WRITE32_MEMBER(mediagx_state::bios_ram_w) } #endif -static UINT8 mediagx_config_reg_r(device_t *device) -{ - mediagx_state *state = device->machine().driver_data(); - - //mame_printf_debug("mediagx_config_reg_r %02X\n", mediagx_config_reg_sel); - return state->m_mediagx_config_regs[state->m_mediagx_config_reg_sel]; -} - -static void mediagx_config_reg_w(device_t *device, UINT8 data) -{ - mediagx_state *state = device->machine().driver_data(); - - //mame_printf_debug("mediagx_config_reg_w %02X, %02X\n", mediagx_config_reg_sel, data); - state->m_mediagx_config_regs[state->m_mediagx_config_reg_sel] = data; -} - READ8_MEMBER(mediagx_state::io20_r) { - pic8259_device *device = machine().device("pic8259_master"); UINT8 r = 0; // 0x22, 0x23, Cyrix configuration registers @@ -574,19 +513,17 @@ READ8_MEMBER(mediagx_state::io20_r) } else if (offset == 0x03) { - r = mediagx_config_reg_r(device); + r = m_mediagx_config_regs[m_mediagx_config_reg_sel]; } else { - r = device->read(space, offset); + r = m_pic8259_1->read(space, offset); } return r; } WRITE8_MEMBER(mediagx_state::io20_w) { - pic8259_device *device = machine().device("pic8259_master"); - // 0x22, 0x23, Cyrix configuration registers if (offset == 0x02) { @@ -594,11 +531,11 @@ WRITE8_MEMBER(mediagx_state::io20_w) } else if (offset == 0x03) { - mediagx_config_reg_w(device, data); + m_mediagx_config_regs[m_mediagx_config_reg_sel] = data; } else { - device->write(space, offset, data); + m_pic8259_1->write(space, offset, data); } } @@ -828,119 +765,6 @@ WRITE32_MEMBER(mediagx_state::ad1847_w) } -/************************************************************************* - * - * PC DMA stuff - * - *************************************************************************/ - - -READ8_MEMBER(mediagx_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) - { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(mediagx_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) - { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(mediagx_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(mediagx_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(mediagx_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int _state) -{ - mediagx_state *state = device->machine().driver_data(); - - if (!_state) state->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(mediagx_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(mediagx_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(mediagx_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(mediagx_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(mediagx_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(mediagx_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(mediagx_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(mediagx_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(mediagx_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(mediagx_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(mediagx_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - - /*****************************************************************************/ static ADDRESS_MAP_START( mediagx_map, AS_PROGRAM, 32, mediagx_state ) @@ -957,14 +781,8 @@ static ADDRESS_MAP_START( mediagx_map, AS_PROGRAM, 32, mediagx_state ) ADDRESS_MAP_END static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, mediagx_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x0020, 0x003f) AM_READWRITE8(io20_r, io20_w, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_slave", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) AM_RANGE(0x00e8, 0x00eb) AM_NOP // I/O delay port AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w) @@ -1053,19 +871,8 @@ static INPUT_PORTS_START(mediagx) PORT_BIT( 0xf00, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3) INPUT_PORTS_END -IRQ_CALLBACK_MEMBER(mediagx_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void mediagx_state::machine_start() { - m_pit8254 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_master" ); - m_pic8259_2 = machine().device( "pic8259_slave" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); - m_dacl = auto_alloc_array(machine(), INT16, 65536); m_dacr = auto_alloc_array(machine(), INT16, 65536); } @@ -1085,54 +892,9 @@ void mediagx_state::machine_reset() m_dmadac[0] = machine().device("dac1"); m_dmadac[1] = machine().device("dac2"); dmadac_enable(&m_dmadac[0], 2, 1); - machine().device("ide")->reset(); + m_ide->reset(); } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(mediagx_state::mediagx_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(mediagx_state::get_slave_ack) -{ - if (offset==2) { // IRQ = 2 - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config mediagx_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - static ADDRESS_MAP_START( ramdac_map, AS_0, 8, mediagx_state ) AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w) ADDRESS_MAP_END @@ -1142,23 +904,6 @@ static RAMDAC_INTERFACE( ramdac_intf ) 0 }; -READ8_MEMBER(mediagx_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(mediagx_state,get_out2) -}; - static MACHINE_CONFIG_START( mediagx, mediagx_state ) /* basic machine hardware */ @@ -1166,27 +911,16 @@ static MACHINE_CONFIG_START( mediagx, mediagx_state ) MCFG_CPU_PROGRAM_MAP(mediagx_map) MCFG_CPU_IO_MAP(mediagx_io) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w) - MCFG_PIT8254_ADD( "pit8254", mediagx_pit8254_config ) - - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - - MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(mediagx_state,mediagx_pic8259_1_set_int_line), VCC, READ8(mediagx_state,get_slave_ack) ) - - MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL ) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) MCFG_TIMER_DRIVER_ADD("sound_timer", mediagx_state, sound_timer_callback) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map) /* video hardware */ @@ -1199,8 +933,6 @@ static MACHINE_CONFIG_START( mediagx, mediagx_state ) MCFG_GFXDECODE(CGA) MCFG_PALETTE_LENGTH(256) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") diff --git a/src/mame/drivers/midqslvr.c b/src/mame/drivers/midqslvr.c index 6492fc477a0..f3e8b38091b 100644 --- a/src/mame/drivers/midqslvr.c +++ b/src/mame/drivers/midqslvr.c @@ -24,29 +24,22 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class midqslvr_state : public driver_device +class midqslvr_state : public pcat_base_state { public: midqslvr_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2") + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide") { } + required_device m_ide; + UINT32 *m_bios_ram; UINT32 *m_bios_ext1_ram; UINT32 *m_bios_ext2_ram; @@ -54,22 +47,9 @@ public: UINT32 *m_bios_ext4_ram; UINT32 *m_isa_ram1; UINT32 *m_isa_ram2; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - // devices - required_device m_maincpu; - required_device m_pit8254; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_pic8259_1; - required_device m_pic8259_2; - - DECLARE_READ8_MEMBER( get_slave_ack ); - DECLARE_WRITE32_MEMBER( isa_ram1_w ); DECLARE_WRITE32_MEMBER( isa_ram2_w ); @@ -79,26 +59,12 @@ public: DECLARE_WRITE32_MEMBER( bios_ext4_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(midqslvr_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; @@ -396,141 +362,25 @@ WRITE32_MEMBER(midqslvr_state::bios_ram_w) READ32_MEMBER(midqslvr_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(midqslvr_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } READ32_MEMBER(midqslvr_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(midqslvr_state::fdc_w) { - device_t *device = machine().device("ide"); //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } -READ8_MEMBER(midqslvr_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(midqslvr_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - -READ8_MEMBER(midqslvr_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(midqslvr_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -WRITE_LINE_MEMBER(midqslvr_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(midqslvr_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(midqslvr_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - midqslvr_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(midqslvr_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(midqslvr_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(midqslvr_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(midqslvr_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(midqslvr_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(midqslvr_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - - static ADDRESS_MAP_START(midqslvr_map, AS_PROGRAM, 32, midqslvr_state) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) @@ -546,14 +396,7 @@ static ADDRESS_MAP_START(midqslvr_map, AS_PROGRAM, 32, midqslvr_state) ADDRESS_MAP_END static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w,0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x00e8, 0x00ef) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) @@ -565,61 +408,6 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write) ADDRESS_MAP_END -static const struct pit8253_config midqslvr_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -WRITE_LINE_MEMBER(midqslvr_state::midqslvr_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER( midqslvr_state::get_slave_ack ) -{ - if (offset==2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -READ8_MEMBER(midqslvr_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(midqslvr_state,get_out2) -}; - -IRQ_CALLBACK_MEMBER(midqslvr_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void midqslvr_state::machine_start() { m_bios_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); @@ -651,14 +439,7 @@ static MACHINE_CONFIG_START( midqslvr, midqslvr_state ) MCFG_CPU_PROGRAM_MAP(midqslvr_map) MCFG_CPU_IO_MAP(midqslvr_io) - - MCFG_PIT8254_ADD( "pit8254", midqslvr_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(midqslvr_state,midqslvr_pic8259_1_set_int_line), VCC, READ8(midqslvr_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE( 0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) @@ -667,8 +448,6 @@ static MACHINE_CONFIG_START( midqslvr, midqslvr_state ) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pangofun.c b/src/mame/drivers/pangofun.c index 7c17f193361..105119f6e0c 100644 --- a/src/mame/drivers/pangofun.c +++ b/src/mame/drivers/pangofun.c @@ -94,10 +94,6 @@ Arcade Version (Coin-Op) by InfoCube (Pisa, Italy) #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" -#include "machine/8042kbdc.h" #include "machine/pcshare.h" #include "video/pc_vga.h" @@ -128,7 +124,6 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( pcat_io, AS_IO, 32, pangofun_state ) AM_IMPORT_FROM(pcat32_io_common) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) AM_RANGE(0x00e0, 0x00e3) AM_WRITENOP AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff) AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff) @@ -186,7 +181,6 @@ static MACHINE_CONFIG_START( pangofun, pangofun_state ) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_FRAGMENT_ADD( pcat_common ) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pcat_dyn.c b/src/mame/drivers/pcat_dyn.c index bff21bb8621..9d9020cf748 100644 --- a/src/mame/drivers/pcat_dyn.c +++ b/src/mame/drivers/pcat_dyn.c @@ -29,10 +29,6 @@ keyboard trick; #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" -#include "machine/8042kbdc.h" #include "machine/pcshare.h" #include "video/pc_vga.h" @@ -67,7 +63,6 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( pcat_io, AS_IO, 32, pcat_dyn_state ) AM_IMPORT_FROM(pcat32_io_common) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff) AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff) AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff) @@ -123,7 +118,6 @@ static MACHINE_CONFIG_START( pcat_dyn, pcat_dyn_state ) MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_FRAGMENT_ADD( pcat_common ) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pcat_nit.c b/src/mame/drivers/pcat_nit.c index cf3cc66b9b0..ca3396128e8 100644 --- a/src/mame/drivers/pcat_nit.c +++ b/src/mame/drivers/pcat_nit.c @@ -83,15 +83,11 @@ Smitdogg #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/pic8259.h" -#include "machine/mc146818.h" #include "machine/pcshare.h" #include "machine/ins8250.h" #include "machine/microtch.h" #include "video/pc_vga.h" #include "machine/nvram.h" -#include "machine/8042kbdc.h" -#include "machine/pit8253.h" class pcat_nit_state : public pcat_base_state { @@ -126,7 +122,7 @@ WRITE_LINE_MEMBER(pcat_nit_state::microtouch_in) WRITE_LINE_MEMBER(pcat_nit_state::at_com_interrupt_1) { - machine().device("pic8259_1")->ir4_w(state); + m_pic8259_1->ir4_w(state); } static const ins8250_interface pcat_nit_com0_interface = @@ -248,8 +244,6 @@ static MACHINE_CONFIG_START( pcat_nit, pcat_nit_state ) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - // MCFG_FRAGMENT_ADD( at_kbdc8042 ) MCFG_FRAGMENT_ADD( pcat_common ) MCFG_NS16450_ADD( "ns16450_0", pcat_nit_com0_interface, XTAL_1_8432MHz ) diff --git a/src/mame/drivers/photoply.c b/src/mame/drivers/photoply.c index 5cb4779fb68..8ed4214cd74 100644 --- a/src/mame/drivers/photoply.c +++ b/src/mame/drivers/photoply.c @@ -11,167 +11,33 @@ TODO: #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class photoply_state : public driver_device +class photoply_state : public pcat_base_state { public: photoply_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") { } + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide") { } - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_vga_address; - device_t *m_pit8253; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(dma_page_select_r); - DECLARE_WRITE8_MEMBER(dma_page_select_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); - DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed); - DECLARE_WRITE_LINE_MEMBER(at_pit8254_out2_changed); DECLARE_DRIVER_INIT(photoply); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); - IRQ_CALLBACK_MEMBER(irq_callback); - required_device m_maincpu; + + required_device m_ide; }; -/****************** -DMA8237 Controller -******************/ - - -WRITE_LINE_MEMBER(photoply_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(photoply_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(photoply_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -READ8_MEMBER(photoply_state::dma_page_select_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) - { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(photoply_state::dma_page_select_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) - { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - photoply_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(photoply_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(photoply_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(photoply_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(photoply_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(photoply_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(photoply_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(photoply_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(photoply_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(photoply_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(photoply_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(photoply_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - READ32_MEMBER(photoply_state::ide_r) { device_t *device = machine().device("ide"); @@ -197,63 +63,6 @@ WRITE32_MEMBER(photoply_state::fdc_w) ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); } - -/****************** -8259 IRQ controller -******************/ - -WRITE_LINE_MEMBER(photoply_state::pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(photoply_state::get_slave_ack) -{ - if (offset==2) { // IRQ = 2 - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -IRQ_CALLBACK_MEMBER(photoply_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - -WRITE_LINE_MEMBER(photoply_state::at_pit8254_out0_changed) -{ - if ( m_pic8259_1 ) - { - m_pic8259_1->ir0_w(state); - } -} - - -WRITE_LINE_MEMBER(photoply_state::at_pit8254_out2_changed) -{ - //at_speaker_set_input( state ? 1 : 0 ); -} - - -static const struct pit8253_config at_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DRIVER_LINE_MEMBER(photoply_state,at_pit8254_out0_changed) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_DRIVER_LINE_MEMBER(photoply_state,at_pit8254_out2_changed) - } - } -}; - static ADDRESS_MAP_START( photoply_map, AS_PROGRAM, 32, photoply_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) // VGA RAM @@ -267,14 +76,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( photoply_io, AS_IO, 32, photoply_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_RAM//DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8("dma8237_2", i8237_device, i8237_r, i8237_w, 0xffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) AM_RANGE(0x0278, 0x027f) AM_RAM //parallel port 2 @@ -320,31 +122,9 @@ static INPUT_PORTS_START( photoply ) PORT_START("pc_keyboard_7") INPUT_PORTS_END -READ8_MEMBER(photoply_state::get_out2) -{ - return pit8253_get_output( m_pit8253, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(photoply_state,get_out2) -}; - void photoply_state::machine_start() { m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(photoply_state::irq_callback),this)); - m_pit8253 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_1" ); - m_pic8259_2 = machine().device( "pic8259_2" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); } static const gfx_layout CGA_charlayout = @@ -369,23 +149,14 @@ static MACHINE_CONFIG_START( photoply, photoply_state ) MCFG_CPU_PROGRAM_MAP(photoply_map) MCFG_CPU_IO_MAP(photoply_io) + MCFG_FRAGMENT_ADD( pcat_common ) + MCFG_GFXDECODE( photoply ) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - -// MCFG_FRAGMENT_ADD( at_kbdc8042 ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(photoply_state,pic8259_1_set_int_line), VCC, READ8(photoply_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_FRAGMENT_ADD( pcvideo_vga ) - - MCFG_KBDC8042_ADD("kbdc", at8042) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pinball2k.c b/src/mame/drivers/pinball2k.c index 0abded5fc1e..276343a2ba1 100644 --- a/src/mame/drivers/pinball2k.c +++ b/src/mame/drivers/pinball2k.c @@ -19,26 +19,21 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/ramdac.h" -class pinball2k_state : public driver_device +class pinball2k_state : public pcat_base_state { public: pinball2k_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + : pcat_base_state(mconfig, type, tag), m_main_ram(*this, "main_ram"), m_cga_ram(*this, "cga_ram"), m_bios_ram(*this, "bios_ram"), - m_vram(*this, "vram"), - m_maincpu(*this, "maincpu") { } + m_vram(*this, "vram") { } required_shared_ptr m_main_ram; required_shared_ptr m_cga_ram; @@ -69,16 +64,6 @@ public: UINT32 m_cx5510_regs[256/4]; - pit8254_device *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; - - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - DECLARE_READ32_MEMBER(disp_ctrl_r); DECLARE_WRITE32_MEMBER(disp_ctrl_w); DECLARE_READ32_MEMBER(memory_ctrl_r); @@ -90,37 +75,17 @@ public: DECLARE_WRITE32_MEMBER(parallel_port_w); DECLARE_READ32_MEMBER(ad1847_r); DECLARE_WRITE32_MEMBER(ad1847_w); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_READ32_MEMBER(ide_r); - DECLARE_WRITE32_MEMBER(ide_w); - DECLARE_READ32_MEMBER(fdc_r); - DECLARE_WRITE32_MEMBER(fdc_w); DECLARE_READ8_MEMBER(io20_r); DECLARE_WRITE8_MEMBER(io20_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(mediagx_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); DECLARE_DRIVER_INIT(pinball2k); virtual void machine_start(); virtual void machine_reset(); virtual void video_start(); UINT32 screen_update_mediagx(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - DECLARE_READ8_MEMBER(get_out2); - IRQ_CALLBACK_MEMBER(irq_callback); void draw_char(bitmap_rgb32 &bitmap, const rectangle &cliprect, gfx_element *gfx, int ch, int att, int x, int y); void draw_framebuffer(bitmap_rgb32 &bitmap, const rectangle &cliprect); void draw_cga(bitmap_rgb32 &bitmap, const rectangle &cliprect); void init_mediagx(); - required_device m_maincpu; }; // Display controller registers @@ -349,43 +314,6 @@ WRITE32_MEMBER(pinball2k_state::disp_ctrl_w) } -READ8_MEMBER(pinball2k_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(pinball2k_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - - -READ32_MEMBER(pinball2k_state::ide_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(pinball2k_state::ide_w) -{ - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); -} - -READ32_MEMBER(pinball2k_state::fdc_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(pinball2k_state::fdc_w) -{ - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); -} - - - READ32_MEMBER(pinball2k_state::memory_ctrl_r) { return m_memory_ctrl_reg[offset]; @@ -453,25 +381,8 @@ WRITE32_MEMBER(pinball2k_state::bios_ram_w) } #endif -static UINT8 mediagx_config_reg_r(device_t *device) -{ - pinball2k_state *state = device->machine().driver_data(); - - //mame_printf_debug("mediagx_config_reg_r %02X\n", mediagx_config_reg_sel); - return state->m_mediagx_config_regs[state->m_mediagx_config_reg_sel]; -} - -static void mediagx_config_reg_w(device_t *device, UINT8 data) -{ - pinball2k_state *state = device->machine().driver_data(); - - //mame_printf_debug("mediagx_config_reg_w %02X, %02X\n", mediagx_config_reg_sel, data); - state->m_mediagx_config_regs[state->m_mediagx_config_reg_sel] = data; -} - READ8_MEMBER(pinball2k_state::io20_r) { - pic8259_device *device = machine().device("pic8259_master"); UINT8 r = 0; // 0x22, 0x23, Cyrix configuration registers @@ -480,19 +391,17 @@ READ8_MEMBER(pinball2k_state::io20_r) } else if (offset == 0x03) { - r = mediagx_config_reg_r(device); + r = m_mediagx_config_regs[m_mediagx_config_reg_sel]; } else { - r = device->read(space, offset); + r = m_pic8259_1->read(space, offset); } return r; } WRITE8_MEMBER(pinball2k_state::io20_w) { - pic8259_device *device = machine().device("pic8259_master"); - // 0x22, 0x23, Cyrix configuration registers if (offset == 0x02) { @@ -500,11 +409,11 @@ WRITE8_MEMBER(pinball2k_state::io20_w) } else if (offset == 0x03) { - mediagx_config_reg_w(device, data); + m_mediagx_config_regs[m_mediagx_config_reg_sel] = data; } else { - device->write(space, offset, data); + m_pic8259_1->write(space, offset, data); } } @@ -540,119 +449,6 @@ static void cx5510_pci_w(device_t *busdevice, device_t *device, int function, in COMBINE_DATA(state->m_cx5510_regs + (reg/4)); } -/************************************************************************* - * - * PC DMA stuff - * - *************************************************************************/ - - -READ8_MEMBER(pinball2k_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) - { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(pinball2k_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) - { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(pinball2k_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(pinball2k_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(pinball2k_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int _state) -{ - pinball2k_state *state = device->machine().driver_data(); - - if (!_state) state->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(pinball2k_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(pinball2k_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(pinball2k_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(pinball2k_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(pinball2k_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(pinball2k_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - - /*****************************************************************************/ static ADDRESS_MAP_START( mediagx_map, AS_PROGRAM, 32, pinball2k_state ) @@ -669,18 +465,10 @@ static ADDRESS_MAP_START( mediagx_map, AS_PROGRAM, 32, pinball2k_state ) ADDRESS_MAP_END static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, pinball2k_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x0020, 0x003f) AM_READWRITE8(io20_r, io20_w, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_slave", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) AM_RANGE(0x00e8, 0x00eb) AM_NOP // I/O delay port - AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w) - AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write) ADDRESS_MAP_END @@ -764,18 +552,8 @@ static INPUT_PORTS_START(mediagx) PORT_BIT( 0xf00, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3) INPUT_PORTS_END -IRQ_CALLBACK_MEMBER(pinball2k_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void pinball2k_state::machine_start() { - m_pit8254 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_master" ); - m_pic8259_2 = machine().device( "pic8259_slave" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); } void pinball2k_state::machine_reset() @@ -786,55 +564,8 @@ void pinball2k_state::machine_reset() memcpy(m_bios_ram, rom, 0x40000); m_maincpu->reset(); - - machine().device("ide")->reset(); } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(pinball2k_state::mediagx_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(pinball2k_state::get_slave_ack) -{ - if (offset==2) { // IRQ = 2 - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config mediagx_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - static ADDRESS_MAP_START( ramdac_map, AS_0, 8, pinball2k_state ) AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w) ADDRESS_MAP_END @@ -844,23 +575,6 @@ static RAMDAC_INTERFACE( ramdac_intf ) 0 }; -READ8_MEMBER(pinball2k_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(pinball2k_state,get_out2) -}; - static MACHINE_CONFIG_START( mediagx, pinball2k_state ) /* basic machine hardware */ @@ -868,24 +582,13 @@ static MACHINE_CONFIG_START( mediagx, pinball2k_state ) MCFG_CPU_PROGRAM_MAP(mediagx_map) MCFG_CPU_IO_MAP(mediagx_io) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w) - MCFG_PIT8254_ADD( "pit8254", mediagx_pit8254_config ) - - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - - MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pinball2k_state,mediagx_pic8259_1_set_int_line), VCC, READ8(pinball2k_state,get_slave_ack) ) - - MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL ) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) - MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map) @@ -899,8 +602,6 @@ static MACHINE_CONFIG_START( mediagx, pinball2k_state ) MCFG_GFXDECODE(CGA) MCFG_PALETTE_LENGTH(256) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") MACHINE_CONFIG_END diff --git a/src/mame/drivers/queen.c b/src/mame/drivers/queen.c index cced7b36d47..d7de8807220 100644 --- a/src/mame/drivers/queen.c +++ b/src/mame/drivers/queen.c @@ -26,71 +26,38 @@ processor speed is 533MHz <- likely to be a Celeron or a Pentium III class CPU - #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class queen_state : public driver_device +class queen_state : public pcat_base_state { public: queen_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2") + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide") { } UINT32 *m_bios_ram; UINT32 *m_bios_ext_ram; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; // devices - required_device m_maincpu; - required_device m_pit8254; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_pic8259_1; - required_device m_pic8259_2; - - DECLARE_READ8_MEMBER( get_slave_ack ); + required_device m_ide; DECLARE_WRITE32_MEMBER( bios_ext_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(queen_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; @@ -265,141 +232,25 @@ WRITE32_MEMBER(queen_state::bios_ram_w) READ32_MEMBER(queen_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(queen_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } READ32_MEMBER(queen_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(queen_state::fdc_w) { - device_t *device = machine().device("ide"); //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } -READ8_MEMBER(queen_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(queen_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -READ8_MEMBER(queen_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(queen_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -WRITE_LINE_MEMBER(queen_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(queen_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(queen_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - queen_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(queen_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(queen_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(queen_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(queen_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(queen_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(queen_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(queen_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(queen_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(queen_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(queen_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(queen_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - static ADDRESS_MAP_START( queen_map, AS_PROGRAM, 32, queen_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) @@ -410,14 +261,7 @@ static ADDRESS_MAP_START( queen_map, AS_PROGRAM, 32, queen_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) AM_RANGE(0x00e8, 0x00ef) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) @@ -429,61 +273,6 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state ) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write) ADDRESS_MAP_END -static const struct pit8253_config queen_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -WRITE_LINE_MEMBER(queen_state::queen_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER( queen_state::get_slave_ack ) -{ - if (offset==2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -READ8_MEMBER(queen_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(queen_state,get_out2) -}; - -IRQ_CALLBACK_MEMBER(queen_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void queen_state::machine_start() { m_bios_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); @@ -506,14 +295,7 @@ static MACHINE_CONFIG_START( queen, queen_state ) MCFG_CPU_PROGRAM_MAP(queen_map) MCFG_CPU_IO_MAP(queen_io) - - MCFG_PIT8254_ADD( "pit8254", queen_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(queen_state,queen_pic8259_1_set_int_line), VCC, READ8(queen_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) @@ -524,8 +306,6 @@ static MACHINE_CONFIG_START( queen, queen_state ) /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) - - MCFG_KBDC8042_ADD("kbdc", at8042) MACHINE_CONFIG_END diff --git a/src/mame/drivers/savquest.c b/src/mame/drivers/savquest.c index 9d5ef6b8c5b..9380703d211 100644 --- a/src/mame/drivers/savquest.c +++ b/src/mame/drivers/savquest.c @@ -29,28 +29,19 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class savquest_state : public driver_device +class savquest_state : public pcat_base_state { public: savquest_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2") + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide") { } UINT32 *m_bios_f0000_ram; @@ -73,21 +64,12 @@ public: UINT8 m_port379; int m_hasp_passmode; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[8][256]; // devices - required_device m_maincpu; - required_device m_pit8254; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_pic8259_1; - required_device m_pic8259_2; + required_device m_ide; - DECLARE_READ8_MEMBER( get_slave_ack ); DECLARE_WRITE32_MEMBER( bios_f0000_ram_w ); DECLARE_WRITE32_MEMBER( bios_e0000_ram_w ); DECLARE_WRITE32_MEMBER( bios_e4000_ram_w ); @@ -103,26 +85,12 @@ protected: // driver_device overrides // virtual void video_start(); public: - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(savquest_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; @@ -569,142 +537,25 @@ WRITE32_MEMBER(savquest_state::parallel_port_w) READ32_MEMBER(savquest_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(savquest_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } READ32_MEMBER(savquest_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(savquest_state::fdc_w) { - device_t *device = machine().device("ide"); //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } -READ8_MEMBER(savquest_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(savquest_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -READ8_MEMBER(savquest_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(savquest_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -WRITE_LINE_MEMBER(savquest_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(savquest_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(savquest_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - savquest_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(savquest_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(savquest_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(savquest_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(savquest_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(savquest_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(savquest_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(savquest_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(savquest_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(savquest_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(savquest_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(savquest_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - - static ADDRESS_MAP_START(savquest_map, AS_PROGRAM, 32, savquest_state) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) @@ -720,14 +571,8 @@ static ADDRESS_MAP_START(savquest_map, AS_PROGRAM, 32, savquest_state) ADDRESS_MAP_END static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) + AM_RANGE(0x00e8, 0x00ef) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) @@ -745,61 +590,6 @@ ADDRESS_MAP_END static INPUT_PORTS_START( savquest ) INPUT_PORTS_END -static const struct pit8253_config savquest_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -WRITE_LINE_MEMBER(savquest_state::savquest_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER( savquest_state::get_slave_ack ) -{ - if (offset==2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -READ8_MEMBER(savquest_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(savquest_state,get_out2) -}; - -IRQ_CALLBACK_MEMBER(savquest_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void savquest_state::machine_start() { m_bios_f0000_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); @@ -826,14 +616,7 @@ static MACHINE_CONFIG_START( savquest, savquest_state ) MCFG_CPU_PROGRAM_MAP(savquest_map) MCFG_CPU_IO_MAP(savquest_io) - - MCFG_PIT8254_ADD( "pit8254", savquest_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(savquest_state,savquest_pic8259_1_set_int_line), VCC, READ8(savquest_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) @@ -844,8 +627,6 @@ static MACHINE_CONFIG_START( savquest, savquest_state ) /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) - - MCFG_KBDC8042_ADD("kbdc", at8042) MACHINE_CONFIG_END ROM_START( savquest ) diff --git a/src/mame/drivers/su2000.c b/src/mame/drivers/su2000.c index aa199def0a3..aea762d7c9e 100644 --- a/src/mame/drivers/su2000.c +++ b/src/mame/drivers/su2000.c @@ -33,16 +33,10 @@ #include "emu.h" #include "cpu/i386/i386.h" #include "cpu/tms32031/tms32031.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pcshare.h" -#include "machine/8042kbdc.h" -#include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" - +#include "machine/pckeybrd.h" /************************************* * @@ -70,12 +64,6 @@ public: su2000_state(const machine_config &mconfig, device_type type, const char *tag) : pcat_base_state(mconfig, type, tag){ } - device_t *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - device_t *m_dma8237_1; - device_t *m_dma8237_2; - UINT32 *m_pc_ram; DECLARE_WRITE_LINE_MEMBER(su2000_pic8259_1_set_int_line); DECLARE_READ8_MEMBER(get_slave_ack); @@ -144,52 +132,12 @@ READ8_MEMBER(su2000_state::get_slave_ack) if (offset == 2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); + //logerror("pic8259_slave_ACK!\n"); return m_pic8259_2->acknowledge(); } return 0x00; } -//static const struct pic8259_interface su2000_pic8259_1_config = -//{ -// DEVCB_DRIVER_LINE_MEMBER(su2000_state,su2000_pic8259_1_set_int_line), -// DEVCB_LINE_VCC, -// DEVCB_DRIVER_MEMBER(su2000_state,get_slave_ack) -//}; -// -//static const struct pic8259_interface su2000_pic8259_2_config = -//{ -// DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), -// DEVCB_LINE_GND, -// DEVCB_NULL -//}; - - -/************************************************************* - * - * PIT8254 Configuration - * - *************************************************************/ - -static const struct pit8253_config su2000_pit8254_config = -{ - { - { - 4772720/4, /* Heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* DRAM refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* PIO port C pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - /************************************* * * Initialization @@ -200,12 +148,6 @@ void su2000_state::machine_start() { address_space &space = m_maincpu->space(AS_PROGRAM); - m_pit8254 = machine().device("pit8254"); - m_pic8259_1 = machine().device("pic8259_1"); - m_pic8259_2 = machine().device("pic8259_2"); - m_dma8237_1 = machine().device("dma8237_1"); - m_dma8237_2 = machine().device("dma8237_2"); - /* Configure RAM */ m_pc_ram = auto_alloc_array_clear(machine(), UINT32, PC_RAM_SIZE); diff --git a/src/mame/drivers/taitowlf.c b/src/mame/drivers/taitowlf.c index e98d946ff7f..3109629418c 100644 --- a/src/mame/drivers/taitowlf.c +++ b/src/mame/drivers/taitowlf.c @@ -27,29 +27,18 @@ clocks 50MHz (near 3DFX) and 14.31818MHz (near RAMDAC) #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" -#include "machine/idectrl.h" #if ENABLE_VGA #include "video/pc_vga.h" #endif -class taitowlf_state : public driver_device +class taitowlf_state : public pcat_base_state { public: taitowlf_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), + : pcat_base_state(mconfig, type, tag), m_region_user1(*this, "user1"), m_region_user5(*this, "user5"), m_bank1(*this, "bank1") { } @@ -57,48 +46,20 @@ public: UINT32 *m_bios_ram; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; - required_device m_maincpu; - required_device m_pit8254; - required_device m_pic8259_1; - required_device m_pic8259_2; - required_device m_dma8237_1; - required_device m_dma8237_2; required_memory_region m_region_user1; required_memory_region m_region_user5; required_memory_bank m_bank1; DECLARE_WRITE32_MEMBER(pnp_config_w); DECLARE_WRITE32_MEMBER(pnp_data_w); DECLARE_WRITE32_MEMBER(bios_ram_w); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_READ32_MEMBER(ide_r); - DECLARE_WRITE32_MEMBER(ide_w); - DECLARE_READ32_MEMBER(fdc_r); - DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(taitowlf_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); DECLARE_DRIVER_INIT(taitowlf); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); #if !ENABLE_VGA virtual void palette_init(); #endif UINT32 screen_update_taitowlf(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; @@ -132,16 +93,6 @@ UINT32 taitowlf_state::screen_update_taitowlf(screen_device &screen, bitmap_rgb3 #endif -READ8_MEMBER(taitowlf_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(taitowlf_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - // Intel 82439TX System Controller (MXTC) static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function, int reg) @@ -305,33 +256,6 @@ WRITE32_MEMBER(taitowlf_state::pnp_data_w) -READ32_MEMBER(taitowlf_state::ide_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(taitowlf_state::ide_w) -{ - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); -} - -READ32_MEMBER(taitowlf_state::fdc_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(taitowlf_state::fdc_w) -{ - device_t *device = machine().device("ide"); - //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); -} - - - WRITE32_MEMBER(taitowlf_state::bios_ram_w) { if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled @@ -341,130 +265,6 @@ WRITE32_MEMBER(taitowlf_state::bios_ram_w) } -/************************************************************************* - * - * PC DMA stuff - * - *************************************************************************/ - - - -READ8_MEMBER(taitowlf_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) - { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(taitowlf_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) - { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(taitowlf_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(taitowlf_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(taitowlf_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - - -WRITE_LINE_MEMBER(taitowlf_state::pc_dack0_w) -{ - if (state) m_dma_channel = 0; -} - -WRITE_LINE_MEMBER(taitowlf_state::pc_dack1_w) -{ - if (state) m_dma_channel = 1; -} - -WRITE_LINE_MEMBER(taitowlf_state::pc_dack2_w) -{ - if (state) m_dma_channel = 2; -} - -WRITE_LINE_MEMBER(taitowlf_state::pc_dack3_w) -{ - if (state) m_dma_channel = 3; -} - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(taitowlf_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(taitowlf_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - -/*****************************************************************************/ - static ADDRESS_MAP_START( taitowlf_map, AS_PROGRAM, 32, taitowlf_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM #if ENABLE_VGA @@ -486,16 +286,9 @@ static ADDRESS_MAP_START( taitowlf_map, AS_PROGRAM, 32, taitowlf_state ) ADDRESS_MAP_END static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) + AM_RANGE(0x00e8, 0x00eb) AM_NOP - AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) AM_RANGE(0x0300, 0x03af) AM_NOP AM_RANGE(0x03b0, 0x03df) AM_NOP AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w) @@ -504,7 +297,6 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state ) AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff) AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff) #endif - AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w) AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write) ADDRESS_MAP_END @@ -547,11 +339,6 @@ static INPUT_PORTS_START(taitowlf) INPUT_PORTS_END #endif -IRQ_CALLBACK_MEMBER(taitowlf_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void taitowlf_state::machine_start() { m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(taitowlf_state::irq_callback),this)); @@ -563,51 +350,6 @@ void taitowlf_state::machine_reset() } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(taitowlf_state::taitowlf_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(taitowlf_state::get_slave_ack) -{ - if (offset==2) { // IRQ = 2 - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config taitowlf_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - #if !ENABLE_VGA /* debug purpose*/ void taitowlf_state::palette_init() @@ -620,23 +362,6 @@ void taitowlf_state::palette_init() } #endif -READ8_MEMBER(taitowlf_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(taitowlf_state,get_out2) -}; - static MACHINE_CONFIG_START( taitowlf, taitowlf_state ) /* basic machine hardware */ @@ -649,16 +374,7 @@ static MACHINE_CONFIG_START( taitowlf, taitowlf_state ) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w) - MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(taitowlf_state,taitowlf_pic8259_1_set_int_line), VCC, READ8(taitowlf_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) - MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) - - MCFG_KBDC8042_ADD("kbdc", at8042) + MCFG_FRAGMENT_ADD( pcat_common ) /* video hardware */ #if ENABLE_VGA diff --git a/src/mame/drivers/voyager.c b/src/mame/drivers/voyager.c index 4b24f23bd17..357b771bb8c 100644 --- a/src/mame/drivers/voyager.c +++ b/src/mame/drivers/voyager.c @@ -14,205 +14,58 @@ TODO: VIA KT133a chipset support, GeForce 2MX video support, lots of things ;-) #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class voyager_state : public driver_device +class voyager_state : public pcat_base_state { public: voyager_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") + : pcat_base_state(mconfig, type, tag), + m_ide(*this, "ide") { } UINT32 *m_bios_ram; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - device_t *m_pit8254; - pic8259_device *m_pic8259_1; - pic8259_device *m_pic8259_2; - i8237_device *m_dma8237_1; - i8237_device *m_dma8237_2; + required_device m_ide; UINT32 m_idle_skip_ram; - required_device m_maincpu; - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); DECLARE_WRITE32_MEMBER(bios_ram_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); DECLARE_READ32_MEMBER(ide_r); DECLARE_WRITE32_MEMBER(ide_w); DECLARE_READ32_MEMBER(fdc_r); DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_WRITE_LINE_MEMBER(voyager_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_slave_ack); - DECLARE_READ8_MEMBER(get_out2); DECLARE_DRIVER_INIT(voyager); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; -READ8_MEMBER(voyager_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(voyager_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -READ8_MEMBER(voyager_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(voyager_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -WRITE_LINE_MEMBER(voyager_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(voyager_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(voyager_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - voyager_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(voyager_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(voyager_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(voyager_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(voyager_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(voyager_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(voyager_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(voyager_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(voyager_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(voyager_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(voyager_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(voyager_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - READ32_MEMBER(voyager_state::ide_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x1f0/4 + offset, mem_mask); } WRITE32_MEMBER(voyager_state::ide_w) { - device_t *device = machine().device("ide"); - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x1f0/4 + offset, data, mem_mask); } - - - - READ32_MEMBER(voyager_state::fdc_r) { - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); + return ide_controller32_r(m_ide, space, 0x3f0/4 + offset, mem_mask); } WRITE32_MEMBER(voyager_state::fdc_w) { - device_t *device = machine().device("ide"); //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); + ide_controller32_w(m_ide, space, 0x3f0/4 + offset, data, mem_mask); } @@ -418,14 +271,8 @@ static ADDRESS_MAP_START( voyager_map, AS_PROGRAM, 32, voyager_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) + //AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY AM_RANGE(0x0170, 0x0177) AM_NOP //To debug @@ -643,111 +490,31 @@ static INPUT_PORTS_START( voyager ) INPUT_PORTS_END #endif -IRQ_CALLBACK_MEMBER(voyager_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void voyager_state::machine_start() { m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(voyager_state::irq_callback),this)); - - m_pit8254 = machine().device( "pit8254" ); - m_pic8259_1 = machine().device( "pic8259_1" ); - m_pic8259_2 = machine().device( "pic8259_2" ); - m_dma8237_1 = machine().device( "dma8237_1" ); - m_dma8237_2 = machine().device( "dma8237_2" ); } -/************************************************************* - * - * pic8259 configuration - * - *************************************************************/ - -WRITE_LINE_MEMBER(voyager_state::voyager_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER(voyager_state::get_slave_ack) -{ - if (offset==2) { - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - - -/************************************************************* - * - * pit8254 configuration - * - *************************************************************/ - -static const struct pit8253_config voyager_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - void voyager_state::machine_reset() { //membank("bank1")->set_base(memregion("bios")->base() + 0x10000); membank("bank1")->set_base(memregion("bios")->base()); } -READ8_MEMBER(voyager_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(voyager_state,get_out2) -}; - static MACHINE_CONFIG_START( voyager, voyager_state ) MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // actually AMD Duron CPU of unknown clock MCFG_CPU_PROGRAM_MAP(voyager_map) MCFG_CPU_IO_MAP(voyager_io) + MCFG_FRAGMENT_ADD( pcat_common ) - MCFG_PIT8254_ADD( "pit8254", voyager_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(voyager_state,voyager_pic8259_1_set_int_line), VCC, READ8(voyager_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w) - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_trident_vga ) diff --git a/src/mame/drivers/xtom3d.c b/src/mame/drivers/xtom3d.c index e74432d9dd6..ed37c8a3593 100644 --- a/src/mame/drivers/xtom3d.c +++ b/src/mame/drivers/xtom3d.c @@ -40,28 +40,18 @@ MX29F1610MC 16M FlashROM (x7) #include "emu.h" #include "cpu/i386/i386.h" -#include "machine/8237dma.h" -#include "machine/pic8259.h" -#include "machine/pit8253.h" -#include "machine/mc146818.h" #include "machine/pci.h" -#include "machine/8042kbdc.h" +#include "machine/pcshare.h" #include "machine/pckeybrd.h" #include "machine/idectrl.h" #include "video/pc_vga.h" -class xtom3d_state : public driver_device +class xtom3d_state : public pcat_base_state { public: xtom3d_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pit8254(*this, "pit8254"), - m_dma8237_1(*this, "dma8237_1"), - m_dma8237_2(*this, "dma8237_2"), - m_pic8259_1(*this, "pic8259_1"), - m_pic8259_2(*this, "pic8259_2") + : pcat_base_state(mconfig, type, tag) { } UINT32 *m_bios_ram; @@ -71,22 +61,9 @@ public: UINT32 *m_bios_ext4_ram; UINT32 *m_isa_ram1; UINT32 *m_isa_ram2; - int m_dma_channel; - UINT8 m_dma_offset[2][4]; - UINT8 m_at_pages[0x10]; UINT8 m_mxtc_config_reg[256]; UINT8 m_piix4_config_reg[4][256]; - // devices - required_device m_maincpu; - required_device m_pit8254; - required_device m_dma8237_1; - required_device m_dma8237_2; - required_device m_pic8259_1; - required_device m_pic8259_2; - - DECLARE_READ8_MEMBER( get_slave_ack ); - DECLARE_WRITE32_MEMBER( isa_ram1_w ); DECLARE_WRITE32_MEMBER( isa_ram2_w ); @@ -96,26 +73,8 @@ public: DECLARE_WRITE32_MEMBER( bios_ext4_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(pc_dma_read_byte); - DECLARE_WRITE8_MEMBER(pc_dma_write_byte); - DECLARE_READ32_MEMBER(ide_r); - DECLARE_WRITE32_MEMBER(ide_w); - DECLARE_READ32_MEMBER(fdc_r); - DECLARE_WRITE32_MEMBER(fdc_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); - DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); - DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); - DECLARE_WRITE_LINE_MEMBER(xtom3d_pic8259_1_set_int_line); - DECLARE_READ8_MEMBER(get_out2); virtual void machine_start(); virtual void machine_reset(); - IRQ_CALLBACK_MEMBER(irq_callback); void intel82439tx_init(); }; @@ -382,146 +341,6 @@ WRITE32_MEMBER(xtom3d_state::bios_ram_w) } } -READ32_MEMBER(xtom3d_state::ide_r) -{ - device_t *device = machine().device("ide"); - return -1; // crashes otherwise - - return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(xtom3d_state::ide_w) -{ - device_t *device = machine().device("ide"); - if(0) // crashes otherwise - ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask); -} - -READ32_MEMBER(xtom3d_state::fdc_r) -{ - device_t *device = machine().device("ide"); - return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask); -} - -WRITE32_MEMBER(xtom3d_state::fdc_w) -{ - device_t *device = machine().device("ide"); - //mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask); - ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask); -} - -READ8_MEMBER(xtom3d_state::at_page8_r) -{ - UINT8 data = m_at_pages[offset % 0x10]; - - switch(offset % 8) { - case 1: - data = m_dma_offset[(offset / 8) & 1][2]; - break; - case 2: - data = m_dma_offset[(offset / 8) & 1][3]; - break; - case 3: - data = m_dma_offset[(offset / 8) & 1][1]; - break; - case 7: - data = m_dma_offset[(offset / 8) & 1][0]; - break; - } - return data; -} - - -WRITE8_MEMBER(xtom3d_state::at_page8_w) -{ - m_at_pages[offset % 0x10] = data; - - switch(offset % 8) { - case 1: - m_dma_offset[(offset / 8) & 1][2] = data; - break; - case 2: - m_dma_offset[(offset / 8) & 1][3] = data; - break; - case 3: - m_dma_offset[(offset / 8) & 1][1] = data; - break; - case 7: - m_dma_offset[(offset / 8) & 1][0] = data; - break; - } -} - - -READ8_MEMBER(xtom3d_state::at_dma8237_2_r) -{ - return m_dma8237_2->i8237_r(space, offset / 2); -} - -WRITE8_MEMBER(xtom3d_state::at_dma8237_2_w) -{ - m_dma8237_2->i8237_w(space, offset / 2, data); -} - -WRITE_LINE_MEMBER(xtom3d_state::pc_dma_hrq_changed) -{ - m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); - - /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); -} - - -READ8_MEMBER(xtom3d_state::pc_dma_read_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - return space.read_byte(page_offset + offset); -} - - -WRITE8_MEMBER(xtom3d_state::pc_dma_write_byte) -{ - offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) - & 0xFF0000; - - space.write_byte(page_offset + offset, data); -} - -static void set_dma_channel(device_t *device, int channel, int state) -{ - xtom3d_state *drvstate = device->machine().driver_data(); - if (!state) drvstate->m_dma_channel = channel; -} - -WRITE_LINE_MEMBER(xtom3d_state::pc_dack0_w){ set_dma_channel(m_dma8237_1, 0, state); } -WRITE_LINE_MEMBER(xtom3d_state::pc_dack1_w){ set_dma_channel(m_dma8237_1, 1, state); } -WRITE_LINE_MEMBER(xtom3d_state::pc_dack2_w){ set_dma_channel(m_dma8237_1, 2, state); } -WRITE_LINE_MEMBER(xtom3d_state::pc_dack3_w){ set_dma_channel(m_dma8237_1, 3, state); } - -static I8237_INTERFACE( dma8237_1_config ) -{ - DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,pc_dma_hrq_changed), - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(xtom3d_state, pc_dma_read_byte), - DEVCB_DRIVER_MEMBER(xtom3d_state, pc_dma_write_byte), - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,pc_dack3_w) } -}; - -static I8237_INTERFACE( dma8237_2_config ) -{ - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, - { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } -}; - static ADDRESS_MAP_START(xtom3d_map, AS_PROGRAM, 32, xtom3d_state) AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) @@ -537,81 +356,18 @@ static ADDRESS_MAP_START(xtom3d_map, AS_PROGRAM, 32, xtom3d_state) ADDRESS_MAP_END static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) - AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) - AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) - AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) + AM_IMPORT_FROM(pcat32_io_common) + AM_RANGE(0x00e8, 0x00ef) AM_NOP - AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w) AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff) AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff) AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff) - AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write) ADDRESS_MAP_END -static const struct pit8253_config xtom3d_pit8254_config = -{ - { - { - 4772720/4, /* heartbeat IRQ */ - DEVCB_NULL, - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w) - }, { - 4772720/4, /* dram refresh */ - DEVCB_NULL, - DEVCB_NULL - }, { - 4772720/4, /* pio port c pin 4, and speaker polling enough */ - DEVCB_NULL, - DEVCB_NULL - } - } -}; - -WRITE_LINE_MEMBER(xtom3d_state::xtom3d_pic8259_1_set_int_line) -{ - m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); -} - -READ8_MEMBER( xtom3d_state::get_slave_ack ) -{ - if (offset==2) { // IRQ = 2 - logerror("pic8259_slave_ACK!\n"); - return m_pic8259_2->acknowledge(); - } - return 0x00; -} - -READ8_MEMBER(xtom3d_state::get_out2) -{ - return pit8253_get_output( m_pit8254, 2 ); -} - -static const struct kbdc8042_interface at8042 = -{ - KBDC8042_AT386, - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET), - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20), - DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w), - DEVCB_NULL, - - DEVCB_NULL, - DEVCB_DRIVER_MEMBER(xtom3d_state,get_out2) -}; - -IRQ_CALLBACK_MEMBER(xtom3d_state::irq_callback) -{ - return m_pic8259_1->acknowledge(); -} - void xtom3d_state::machine_start() { m_bios_ram = auto_alloc_array(machine(), UINT32, 0x10000/4); @@ -642,24 +398,12 @@ static MACHINE_CONFIG_START( xtom3d, xtom3d_state ) MCFG_CPU_PROGRAM_MAP(xtom3d_map) MCFG_CPU_IO_MAP(xtom3d_io) - - MCFG_PIT8254_ADD( "pit8254", xtom3d_pit8254_config ) - MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) - MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) - MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(xtom3d_state,xtom3d_pic8259_1_set_int_line), VCC, READ8(xtom3d_state,get_slave_ack) ) - MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL ) - - MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_FRAGMENT_ADD( pcat_common ) MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w) - MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) - MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) - - MCFG_KBDC8042_ADD("kbdc", at8042) - /* video hardware */ MCFG_FRAGMENT_ADD( pcvideo_vga ) MACHINE_CONFIG_END diff --git a/src/mame/machine/pcshare.c b/src/mame/machine/pcshare.c index b58905d553a..9386329fd8d 100644 --- a/src/mame/machine/pcshare.c +++ b/src/mame/machine/pcshare.c @@ -9,15 +9,6 @@ 'Ralph Browns Interrupt List' Release 52, Last Change 20oct96 - TODO: - clean up (maybe split) the different pieces of hardware - PIC, PIT, DMA... add support for LPT, COM (almost done) - emulation of a serial mouse on a COM port (almost done) - support for Game Controller port at 0x0201 - support for XT harddisk (under the way, see machine/pc_hdc.c) - whatever 'hardware' comes to mind, - maybe SoundBlaster? EGA? VGA? - ***************************************************************************/ #include "emu.h" @@ -26,6 +17,7 @@ #include "machine/pckeybrd.h" #include "machine/8042kbdc.h" #include "machine/mc146818.h" +#include "machine/idectrl.h" /****************** @@ -38,7 +30,7 @@ WRITE_LINE_MEMBER( pcat_base_state::pc_dma_hrq_changed ) m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); /* Assert HLDA */ - m_dma8237_1->i8237_hlda_w( state ); + m_dma8237_1->hack_w( state ); } @@ -213,16 +205,20 @@ static const struct kbdc8042_interface at8042 = DEVCB_DRIVER_MEMBER(pcat_base_state,get_out2) }; +static const struct mc146818_interface at_mc146818_config = +{ + DEVCB_DEVICE_LINE_MEMBER("pic8259_2", pic8259_device, ir0_w) +}; ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state ) - AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", i8237_device, i8237_r, i8237_w, 0xffffffff) + AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", am9517a_device, read, write, 0xffffffff) AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff) - AM_RANGE(0x0070, 0x007f) AM_RAM //AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) + AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) AM_RANGE(0x0080, 0x009f) AM_READWRITE8(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff) - AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8("dma8237_2", i8237_device, i8237_r, i8237_w, 0xffff) + AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8("dma8237_2", am9517a_device, read, write, 0xffffffff) ADDRESS_MAP_END MACHINE_CONFIG_FRAGMENT(pcat_common) @@ -231,7 +227,7 @@ MACHINE_CONFIG_FRAGMENT(pcat_common) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) -// MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) + MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, at_mc146818_config) MCFG_KBDC8042_ADD("kbdc", at8042) MACHINE_CONFIG_END diff --git a/src/mame/machine/pcshare.h b/src/mame/machine/pcshare.h index 7d12c8727fa..332109e3813 100644 --- a/src/mame/machine/pcshare.h +++ b/src/mame/machine/pcshare.h @@ -1,6 +1,7 @@ -#include "machine/8237dma.h" +#include "machine/am9517a.h" #include "machine/pic8259.h" #include "machine/pit8253.h" +#include "machine/mc146818.h" class pcat_base_state : public driver_device { @@ -9,17 +10,21 @@ public: : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_dma8237_1(*this, "dma8237_1"), + m_dma8237_2(*this, "dma8237_2"), m_pic8259_1(*this, "pic8259_1"), m_pic8259_2(*this, "pic8259_2"), - m_pit8254(*this, "pit8254") { } + m_pit8254(*this, "pit8254"), + m_mc146818(*this, "rtc") { } IRQ_CALLBACK_MEMBER(irq_callback); required_device m_maincpu; - required_device m_dma8237_1; + required_device m_dma8237_1; + required_device m_dma8237_2; required_device m_pic8259_1; required_device m_pic8259_2; required_device m_pit8254; + required_device m_mc146818; DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); DECLARE_READ8_MEMBER(pc_dma_read_byte);