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https://github.com/holub/mame
synced 2025-04-27 18:53:05 +03:00
a2065: Fix DMA/memory accesses
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parent
05449c1ca3
commit
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@ -33,8 +33,8 @@ void a2065_device::device_add_mconfig(machine_config &config)
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{
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{
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AM7990(config, m_lance);
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AM7990(config, m_lance);
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m_lance->intr_out().set(FUNC(a2065_device::lance_irq_w));
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m_lance->intr_out().set(FUNC(a2065_device::lance_irq_w));
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m_lance->dma_in().set(FUNC(a2065_device::ram_r));
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m_lance->dma_in().set(FUNC(a2065_device::lance_ram_r));
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m_lance->dma_out().set(FUNC(a2065_device::ram_w));
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m_lance->dma_out().set(FUNC(a2065_device::lance_ram_w));
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}
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}
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@ -97,8 +97,8 @@ void a2065_device::autoconfig_base_address(offs_t address)
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// install access to onboard ram (32k)
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// install access to onboard ram (32k)
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m_slot->m_space->install_readwrite_handler(address + 0x8000, address + 0x8000 + 0x7fff,
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m_slot->m_space->install_readwrite_handler(address + 0x8000, address + 0x8000 + 0x7fff,
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read16_delegate(FUNC(a2065_device::ram_r), this),
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read16_delegate(FUNC(a2065_device::host_ram_r), this),
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write16_delegate(FUNC(a2065_device::ram_w), this), 0xffff);
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write16_delegate(FUNC(a2065_device::host_ram_w), this), 0xffff);
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// we're done
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// we're done
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m_slot->cfgout_w(0);
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m_slot->cfgout_w(0);
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@ -117,7 +117,7 @@ WRITE_LINE_MEMBER( a2065_device::cfgin_w )
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autoconfig_product(0x70);
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autoconfig_product(0x70);
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autoconfig_manufacturer(0x0202);
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autoconfig_manufacturer(0x0202);
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autoconfig_serial(0x00000000); // last 3 bytes = last 3 bytes of mac address
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autoconfig_serial(0x00123456); // last 3 bytes = last 3 bytes of mac address
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autoconfig_link_into_memory(false);
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autoconfig_link_into_memory(false);
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autoconfig_rom_vector_valid(false);
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autoconfig_rom_vector_valid(false);
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@ -132,16 +132,30 @@ WRITE_LINE_MEMBER( a2065_device::cfgin_w )
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}
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}
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}
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}
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READ16_MEMBER( a2065_device::ram_r )
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READ16_MEMBER( a2065_device::host_ram_r )
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{
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{
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// logerror("read offset %04x\n", offset);
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// logerror("host read offset %04x\n", offset);
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return m_ram[offset & 0x3fff];
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return m_ram[offset & 0x3fff];
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}
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}
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WRITE16_MEMBER( a2065_device::ram_w )
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WRITE16_MEMBER( a2065_device::host_ram_w )
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{
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{
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// logerror("write %04x = %04x\n", offset, data);
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// logerror("host write %04x = %04x\n", offset, data);
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m_ram[offset & 0x3fff] = data;
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COMBINE_DATA(&m_ram[offset]);
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}
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READ16_MEMBER( a2065_device::lance_ram_r )
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{
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offset = (offset >> 1) & 0x3fff;
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// logerror("lance read offset %04x\n", offset);
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return m_ram[offset];
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}
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WRITE16_MEMBER( a2065_device::lance_ram_w )
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{
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offset = (offset >> 1) & 0x3fff;
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// logerror("lance write %04x = %04x\n", offset, data);
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COMBINE_DATA(&m_ram[offset]);
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}
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}
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WRITE_LINE_MEMBER( a2065_device::lance_irq_w )
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WRITE_LINE_MEMBER( a2065_device::lance_irq_w )
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@ -30,9 +30,11 @@ public:
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// construction/destruction
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// construction/destruction
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a2065_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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a2065_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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DECLARE_READ16_MEMBER( ram_r );
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DECLARE_READ16_MEMBER( host_ram_r );
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DECLARE_WRITE16_MEMBER( ram_w );
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DECLARE_WRITE16_MEMBER( host_ram_w );
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DECLARE_READ16_MEMBER( lance_ram_r );
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DECLARE_WRITE16_MEMBER( lance_ram_w );
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DECLARE_WRITE_LINE_MEMBER( lance_irq_w );
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DECLARE_WRITE_LINE_MEMBER( lance_irq_w );
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protected:
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protected:
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