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https://github.com/holub/mame
synced 2025-05-15 18:32:02 +03:00
Implemented proper FIFO read
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9b7d1a6d2f
commit
57116c6699
@ -16,7 +16,7 @@
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// default address map
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static ADDRESS_MAP_START( h63484_vram, AS_0, 8 )
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AM_RANGE(0x00000, 0x7ffff) AM_RAM
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AM_RANGE(0x80000, 0xbffff) AM_NOP
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AM_RANGE(0x80000, 0xfffff) AM_NOP
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ADDRESS_MAP_END
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@ -35,7 +35,7 @@ h63484_device::h63484_device(const machine_config &mconfig, const char *tag, dev
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m_param_ptr(0),
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m_rwp(0),
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m_rwp_dn(0),
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m_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(h63484_vram))
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m_space_config("videoram", ENDIANNESS_LITTLE, 8, 20, 0, NULL, *ADDRESS_MAP_NAME(h63484_vram))
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{
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m_shortname = "h63484";
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}
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@ -358,6 +358,26 @@ const rom_entry *h63484_device::device_rom_region() const
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return ROM_NAME( h63484 );
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}
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//-------------------------------------------------
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// readbyte - read a byte at the given address
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//-------------------------------------------------
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inline UINT8 h63484_device::readbyte(offs_t address)
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{
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return space()->read_byte(address);
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}
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//-------------------------------------------------
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// writebyte - write a byte at the given address
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//-------------------------------------------------
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inline void h63484_device::writebyte(offs_t address, UINT8 data)
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{
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space()->write_byte(address, data);
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}
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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@ -449,7 +469,7 @@ inline void h63484_device::fifo_r_clear()
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inline void h63484_device::queue_r(UINT8 data)
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{
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if (m_fifo_ptr < 15)
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if (m_fifo_r_ptr < 15)
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{
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m_fifo_r_ptr++;
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@ -484,8 +504,8 @@ inline void h63484_device::dequeue_r(UINT8 *data)
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m_sr &= ~H63484_SR_RFF;
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if (m_fifo_ptr == -1)
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m_sr &= H63484_SR_RFR;
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if (m_fifo_r_ptr == -1)
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m_sr &= ~H63484_SR_RFR;
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}
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}
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@ -650,9 +670,10 @@ void h63484_device::process_fifo()
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case COMMAND_RD:
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if (m_param_ptr == 0)
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{
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//queue_r(h63484, h63484->space->read_byte((h63484->rwp+0) & 0xfffff));
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//queue_r(h63484, h63484->space->read_byte((h63484->rwp+1) & 0xfffff));
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queue_r(readbyte((m_rwp+0) & 0xfffff));
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queue_r(readbyte((m_rwp+1) & 0xfffff));
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m_rwp+=2;
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m_rwp&=0xfffff;
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command_end_seq();
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}
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break;
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@ -694,6 +715,20 @@ READ16_MEMBER( h63484_device::data_r )
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res = 0xffff;
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if(m_ar == 0) // FIFO read
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{
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UINT8 data;
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dequeue_r(&data);
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res = (data & 0xff) << 8;
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dequeue_r(&data);
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res |= data & 0xff;
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}
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else
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{
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if(LOG) printf("%s R\n",acrtc_regnames[m_ar/2]);
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}
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return res;
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}
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