r65c52: simplify update_irq, add call to update_irq at each place ier or isr changes, add debugger side effects check on reads,

misc: update notes
This commit is contained in:
hap 2024-07-06 13:53:38 +02:00
parent c8c964065c
commit 574e71a61b
5 changed files with 54 additions and 50 deletions

View File

@ -56,23 +56,24 @@ r65c52_device::r65c52_device(const machine_config &mconfig, const char *tag, dev
}
const int r65c52_device::internal_divider[16] =
{
4608,
2096,
1713,
1536,
768,
384,
192,
128,
96,
64,
48,
32,
24,
12,
6,
1};
{
4608,
2096,
1713,
1536,
768,
384,
192,
128,
96,
64,
48,
32,
24,
12,
6,
1
};
void r65c52_device::device_add_mconfig(machine_config &config)
{
@ -258,19 +259,8 @@ void r65c52_device::output_dtr(int idx, int dtr)
void r65c52_device::update_irq(int idx)
{
bool irq = false;
LOG("R65C52: %x IER %x ISR %x\n", idx + 1, m_ier[idx], m_isr[idx]);
for (int i = 0; i < 7; i++)
{
int ier_bit = BIT(m_ier[idx],i);
int isr_bit = BIT(m_isr[idx],i);
if ((ier_bit == isr_bit) && (ier_bit ==1))
{
irq = true;
}
}
output_irq(idx, irq);
output_irq(idx, (m_ier[idx] & m_isr[idx] & 0x7f) ? 1 : 0);
}
void r65c52_device::update_divider(int idx)
@ -310,21 +300,27 @@ void r65c52_device::update_divider(int idx)
u8 r65c52_device::read_rdr(int idx)
{
m_status[idx] &= ~(SR_BRK | SR_FRAMING_ERROR);
m_isr[idx] &= ~(IRQ_PAR | IRQ_FOB | IRQ_RDRF);
m_rdrf[idx] = false;
m_parity_err[idx] = false;
m_overrun[idx] = false;
update_irq(idx);
LOG("R65C52: %x RDR %x \n", idx + 1, m_rdr[idx]);
if (!machine().side_effects_disabled())
{
m_status[idx] &= ~(SR_BRK | SR_FRAMING_ERROR);
m_isr[idx] &= ~(IRQ_PAR | IRQ_FOB | IRQ_RDRF);
m_rdrf[idx] = false;
m_parity_err[idx] = false;
m_overrun[idx] = false;
LOG("R65C52: %x RDR %x \n", idx + 1, m_rdr[idx]);
update_irq(idx);
}
return m_rdr[idx];
}
u8 r65c52_device::read_status(int idx)
{
LOG("R65C52: %x STATUS %x \n", idx + 1, m_status[idx]);
m_dtr[idx] = false;
m_rts[idx] = false;
if (!machine().side_effects_disabled())
{
LOG("R65C52: %x STATUS %x \n", idx + 1, m_status[idx]);
m_dtr[idx] = false;
m_rts[idx] = false;
}
return m_status[idx];
}
@ -340,6 +336,7 @@ void r65c52_device::write_ier(int idx, u8 data)
}
LOG("R65C52: %x IER %x \n", idx + 1, m_ier[idx]);
update_irq(idx);
}
void r65c52_device::write_tdr(int idx, u8 data)
@ -347,7 +344,9 @@ void r65c52_device::write_tdr(int idx, u8 data)
m_tdr[idx] = data;
m_tdre[idx] = false;
m_isr[idx] &= ~IRQ_TDRE;
LOG("R65C52: %x TDR %x \n", idx + 1, m_tdr[idx]);
update_irq(idx);
}
void r65c52_device::write_control(int idx, u8 data)
@ -416,15 +415,14 @@ void r65c52_device::write_compare(int idx, u8 data)
u8 r65c52_device::read_isr(int idx)
{
u8 isr = m_isr[idx];
if (m_status[idx] & SR_BRK || m_status[idx] & SR_FRAMING_ERROR || m_overrun[idx])
{
m_isr[idx] |= IRQ_FOB;
isr |= IRQ_FOB;
}
u8 isr = m_isr[idx];
if (isr != 0)
if ((isr & 0x7f) != 0)
{
isr |= 0x80;
}
@ -440,9 +438,14 @@ u8 r65c52_device::read_isr(int idx)
isr &= ~0x80;
}
m_isr[idx] &= ~(IRQ_CTS | IRQ_DCD | IRQ_DSR | IRQ_FOB);
isr &= ~(IRQ_CTS | IRQ_DCD | IRQ_DSR | IRQ_FOB);
LOG("R65C52: %x ISR %x \n", idx + 1, m_isr[idx]);
if (!machine().side_effects_disabled())
{
m_isr[idx] = isr;
LOG("R65C52: %x ISR %x \n", idx + 1, m_isr[idx]);
update_irq(idx);
}
return isr;
}

View File

@ -3,7 +3,7 @@
// thanks-to:Sean Riddle
/*******************************************************************************
Excalibur Ivan The Terrible
Excalibur Ivan The Terrible (model 701E)
The chess engine is by Ron Nelson, similar to the one in Excalibur Mirage. It
has speech, and also sound effects that are reminiscent of Battle Chess.

View File

@ -69,7 +69,7 @@ ESB 6000 board interface (via external port):
- TC4081, TC4082, TC4017, 74373, 74374
ESB II/6000 chessboard:
- 64 reed switches (magnet sensors)
- 128 reed switches (magnet sensors, 2 per square)
- 64 leds + power led
ESB 3000 hardware is probably same as ESB 6000.
@ -317,7 +317,7 @@ void brikett_state::esb6_w(u8 data)
int brikett_state::esb6_r()
{
// EF1: read chessboard sensor
// EF1: read chessboard square
if (m_inputs[5].read_safe(0))
return (m_board->read_file(m_esb_select - 2) & ~m_esb_row) ? 0 : 1;
else

View File

@ -5,6 +5,7 @@
Mephisto Risc 1MB/II (stylized "risc")
The chess engine in Mephisto Risc is also compatible with Tasc's The ChessMachine,
it is more or less equivalent to Gideon 3.0 (Risc 1MB) and Gideon 3.1 (Risc II),
see ROM defs for details. "Main" CPU is slow, but all the chess calculations are
done with the ARM.

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@ -14,7 +14,7 @@ If this is not done, NVRAM won't save properly.
TODO:
- if/when MAME supports an exit callback, hook up power-off switch to that
********************************************************************************
================================================================================
Hardware notes:
@ -50,7 +50,7 @@ is either VCC or GND to distinguish between the two.
The Tandy clones run at a lower clock frequency, 3MHz and 6MHz respectively.
********************************************************************************
================================================================================
CXG Enterprise "S" / Star Chess is on very similar hardware, so it's emulated
in this driver too.