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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
r65c52: simplify update_irq, add call to update_irq at each place ier or isr changes, add debugger side effects check on reads,
misc: update notes
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c8c964065c
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@ -56,23 +56,24 @@ r65c52_device::r65c52_device(const machine_config &mconfig, const char *tag, dev
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}
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const int r65c52_device::internal_divider[16] =
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{
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4608,
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2096,
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1713,
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1536,
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768,
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384,
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192,
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128,
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96,
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64,
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48,
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32,
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24,
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12,
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6,
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1};
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{
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4608,
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2096,
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1713,
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1536,
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768,
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384,
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192,
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128,
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96,
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64,
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48,
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32,
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24,
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12,
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6,
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1
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};
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void r65c52_device::device_add_mconfig(machine_config &config)
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{
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@ -258,19 +259,8 @@ void r65c52_device::output_dtr(int idx, int dtr)
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void r65c52_device::update_irq(int idx)
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{
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bool irq = false;
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LOG("R65C52: %x IER %x ISR %x\n", idx + 1, m_ier[idx], m_isr[idx]);
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for (int i = 0; i < 7; i++)
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{
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int ier_bit = BIT(m_ier[idx],i);
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int isr_bit = BIT(m_isr[idx],i);
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if ((ier_bit == isr_bit) && (ier_bit ==1))
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{
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irq = true;
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}
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}
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output_irq(idx, irq);
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output_irq(idx, (m_ier[idx] & m_isr[idx] & 0x7f) ? 1 : 0);
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}
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void r65c52_device::update_divider(int idx)
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@ -310,21 +300,27 @@ void r65c52_device::update_divider(int idx)
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u8 r65c52_device::read_rdr(int idx)
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{
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m_status[idx] &= ~(SR_BRK | SR_FRAMING_ERROR);
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m_isr[idx] &= ~(IRQ_PAR | IRQ_FOB | IRQ_RDRF);
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m_rdrf[idx] = false;
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m_parity_err[idx] = false;
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m_overrun[idx] = false;
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update_irq(idx);
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LOG("R65C52: %x RDR %x \n", idx + 1, m_rdr[idx]);
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if (!machine().side_effects_disabled())
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{
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m_status[idx] &= ~(SR_BRK | SR_FRAMING_ERROR);
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m_isr[idx] &= ~(IRQ_PAR | IRQ_FOB | IRQ_RDRF);
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m_rdrf[idx] = false;
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m_parity_err[idx] = false;
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m_overrun[idx] = false;
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LOG("R65C52: %x RDR %x \n", idx + 1, m_rdr[idx]);
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update_irq(idx);
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}
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return m_rdr[idx];
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}
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u8 r65c52_device::read_status(int idx)
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{
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LOG("R65C52: %x STATUS %x \n", idx + 1, m_status[idx]);
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m_dtr[idx] = false;
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m_rts[idx] = false;
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if (!machine().side_effects_disabled())
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{
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LOG("R65C52: %x STATUS %x \n", idx + 1, m_status[idx]);
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m_dtr[idx] = false;
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m_rts[idx] = false;
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}
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return m_status[idx];
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}
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@ -340,6 +336,7 @@ void r65c52_device::write_ier(int idx, u8 data)
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}
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LOG("R65C52: %x IER %x \n", idx + 1, m_ier[idx]);
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update_irq(idx);
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}
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void r65c52_device::write_tdr(int idx, u8 data)
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@ -347,7 +344,9 @@ void r65c52_device::write_tdr(int idx, u8 data)
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m_tdr[idx] = data;
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m_tdre[idx] = false;
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m_isr[idx] &= ~IRQ_TDRE;
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LOG("R65C52: %x TDR %x \n", idx + 1, m_tdr[idx]);
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update_irq(idx);
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}
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void r65c52_device::write_control(int idx, u8 data)
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@ -416,15 +415,14 @@ void r65c52_device::write_compare(int idx, u8 data)
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u8 r65c52_device::read_isr(int idx)
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{
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u8 isr = m_isr[idx];
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if (m_status[idx] & SR_BRK || m_status[idx] & SR_FRAMING_ERROR || m_overrun[idx])
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{
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m_isr[idx] |= IRQ_FOB;
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isr |= IRQ_FOB;
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}
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u8 isr = m_isr[idx];
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if (isr != 0)
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if ((isr & 0x7f) != 0)
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{
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isr |= 0x80;
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}
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@ -440,9 +438,14 @@ u8 r65c52_device::read_isr(int idx)
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isr &= ~0x80;
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}
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m_isr[idx] &= ~(IRQ_CTS | IRQ_DCD | IRQ_DSR | IRQ_FOB);
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isr &= ~(IRQ_CTS | IRQ_DCD | IRQ_DSR | IRQ_FOB);
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LOG("R65C52: %x ISR %x \n", idx + 1, m_isr[idx]);
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if (!machine().side_effects_disabled())
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{
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m_isr[idx] = isr;
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LOG("R65C52: %x ISR %x \n", idx + 1, m_isr[idx]);
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update_irq(idx);
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}
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return isr;
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}
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@ -3,7 +3,7 @@
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// thanks-to:Sean Riddle
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/*******************************************************************************
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Excalibur Ivan The Terrible
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Excalibur Ivan The Terrible (model 701E)
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The chess engine is by Ron Nelson, similar to the one in Excalibur Mirage. It
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has speech, and also sound effects that are reminiscent of Battle Chess.
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@ -69,7 +69,7 @@ ESB 6000 board interface (via external port):
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- TC4081, TC4082, TC4017, 74373, 74374
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ESB II/6000 chessboard:
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- 64 reed switches (magnet sensors)
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- 128 reed switches (magnet sensors, 2 per square)
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- 64 leds + power led
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ESB 3000 hardware is probably same as ESB 6000.
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@ -317,7 +317,7 @@ void brikett_state::esb6_w(u8 data)
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int brikett_state::esb6_r()
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{
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// EF1: read chessboard sensor
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// EF1: read chessboard square
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if (m_inputs[5].read_safe(0))
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return (m_board->read_file(m_esb_select - 2) & ~m_esb_row) ? 0 : 1;
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else
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@ -5,6 +5,7 @@
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Mephisto Risc 1MB/II (stylized "risc")
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The chess engine in Mephisto Risc is also compatible with Tasc's The ChessMachine,
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it is more or less equivalent to Gideon 3.0 (Risc 1MB) and Gideon 3.1 (Risc II),
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see ROM defs for details. "Main" CPU is slow, but all the chess calculations are
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done with the ARM.
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@ -14,7 +14,7 @@ If this is not done, NVRAM won't save properly.
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TODO:
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- if/when MAME supports an exit callback, hook up power-off switch to that
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********************************************************************************
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================================================================================
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Hardware notes:
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@ -50,7 +50,7 @@ is either VCC or GND to distinguish between the two.
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The Tandy clones run at a lower clock frequency, 3MHz and 6MHz respectively.
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********************************************************************************
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================================================================================
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CXG Enterprise "S" / Star Chess is on very similar hardware, so it's emulated
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in this driver too.
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