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Merge pull request #3 from mamedev/master

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ImJezze 2015-05-22 18:39:34 +02:00
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26
README.md
View File

@ -3,6 +3,7 @@
[![Join the chat at https://gitter.im/mamedev/mame](https://badges.gitter.im/Join%20Chat.svg)](https://gitter.im/mamedev/mame?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
What is MAME?
=============
@ -10,6 +11,7 @@ MAME stands for Multiple Arcade Machine Emulator.
MAME's purpose is to preserve decades of video-game history. As gaming technology continues to rush forward, MAME prevents these important "vintage" games from being lost and forgotten. This is achieved by documenting the hardware and how it functions. The source code to MAME serves as this documentation. The fact that the games are playable serves primarily to validate the accuracy of the documentation (how else can you prove that you have recreated the hardware faithfully?).
What is MESS?
=============
@ -17,6 +19,7 @@ MESS (Multi Emulator Super System) is the sister project of MAME. MESS documents
The MESS and MAME projects live in the same source repository and share much of the same code, but are different build targets.
How to compile?
=============
@ -26,19 +29,38 @@ If you're on a *nix system, it could be as easy as typing
make
```
for a MAME build, or
for a MAME build,
```
make TARGET=mess
make SUBTARGET=arcade
```
for an arcade-only build, or
```
make SUBTARGET=mess
```
for a MESS build (provided you have all the [prerequisites](http://forums.bannister.org/ubbthreads.php?ubb=showflat&Number=35138)).
For Windows users, we provide a ready-made [build environment](http://mamedev.org/tools/) based on MinGW-w64. [Visual Studio builds](http://wiki.mamedev.org/index.php?title=Building_MAME_using_Microsoft_Visual_Studio_compilers) are also possible.
Where can I find out more?
=============
* [Official MAME Development Team Site](http://mamedev.org/) (includes binary downloads for MAME and MESS, wiki, forums, and more)
* [Official MESS Wiki](http://www.mess.org/)
* [MAME Testers](http://mametesters.org/) (official bug tracker for MAME and MESS)
Contributing
=============
## Coding standard
MAME source code should be viewed and edited with your editor set to use four spaces per tab. Tabs are used for initial indentation of lines, with one tab used per indentation level. Spaces are used for other alignment within a line.
Some parts of the code follow [GNU style](http://www.gnu.org/prep/standards/html_node/Formatting.html); some parts of the code follow [K&R style](https://en.wikipedia.org/wiki/Indent_style#K.26R_style) -- mostly depending on who wrote the original version. **Above all else, be consistent with what you modify, and keep whitespace changes to a minimum when modifying existing source.** For new code, the majority tends to prefer GNU style, so if you don't care much, use that.

2
hash/c64_cart.xml
View File

@ -4149,7 +4149,7 @@
</software>
<software name="aspargp">
<description>Aspar GTP Master</description>
<description>Aspar GP Master</description>
<year>1989</year>
<publisher>Dinamic Software</publisher>
<part name="cart" interface="c64_cart">

17
hash/c65_flop.xml Normal file
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@ -0,0 +1,17 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="c65_flop" description="Commodore 65 diskettes">
<software name="demo">
<description>C65 Demo</description>
<year>2002</year>
<publisher>K2</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="819200">
<rom name="demo.d81" size="819200" crc="dabb3256" sha1="61a5d638f6166e09d3bbbb12b653f6bf3fb2393f" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

12
hash/gbcolor.xml
View File

@ -23524,6 +23524,18 @@ These were produced between 2000 and 2001 by Rocket Games, run by Datel Design
</part>
</software>
<software name="4in1_01c">
<description>4 in 1 (4B-001)</description>
<year>20??</year>
<publisher>Sachen</publisher>
<part name="cart" interface="gameboy_cart">
<feature name="slot" value="rom_sachen1" />
<dataarea name="rom" size="524288">
<rom name="4b-001.gbc" size="524288" crc="42a2fdf8" sha1="79a4faddfd1aca397e56d7895e45b1bc12900dab" offset="000000" />
</dataarea>
</part>
</software>
<software name="mc_8in1">
<description>8 in 1 (Tw)</description>
<year>19??</year>

113
hash/nascom_flop.xml Normal file
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@ -0,0 +1,113 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="nascom_flop" description="Nascom disk images">
<software name="asteroid">
<description>Asteroids</description>
<year>1985</year>
<publisher>Richard C. Espley</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="asteroid.dsk" size="655360" crc="96d6b7b6" sha1="ecf667413ec6fdec7a421ececcf572a00354ff10" offset="0" />
</dataarea>
</part>
</software>
<software name="avc-demo">
<description>AVC Demo Disk</description>
<year>1982</year>
<publisher>Lucas Logic</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="avc-demo.dsk" size="655360" crc="81877f78" sha1="11fadb5ea69a949fdeadac3938683b14728b18df" offset="0" />
</dataarea>
</part>
</software>
<software name="divtools">
<description>Tools &amp; Toolkits</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="divtools.dsk" size="655360" crc="58751dc6" sha1="7078e928c2ef17fccd53e1d1eb2fd9bfe9371c2c" offset="0" />
</dataarea>
</part>
</software>
<software name="dosadv">
<description>Nascom Disk Adventure</description>
<year>1983</year>
<publisher>Richard C. Espley</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="dosadv.dsk" size="655360" crc="bd37aa35" sha1="b9483567951830955c6fe944c934c5b3ddf2007c" offset="0" />
</dataarea>
</part>
</software>
<software name="nas-sem">
<description>NAS-Sembler 1.5</description>
<year>1982</year>
<publisher>Lucas Logic</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="nas-sem.dsk" size="655360" crc="997e014a" sha1="ce86f41ebbb57322ff026b693dd49603e104f55c" offset="0" />
</dataarea>
</part>
</software>
<software name="utd1066">
<description>NAS-DOS Utility Disk</description>
<year>1982</year>
<publisher>M F Hessey</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="655360">
<rom name="utd1066.dsk" size="655360" crc="ad1bf5b1" sha1="99c15344cdf4bdfe628a237f6e1759dc5b023e32" offset="0" />
</dataarea>
</part>
</software>
<!-- The CP/M system disks are not original disks supplied by Lucas Logic, -->
<!-- but custom disks that have been created to use all available memory. -->
<!-- Note that single sided disks can't be read on double sided drives and -->
<!-- vice versa. Lucas Logic supplied an utility called SINGLE.COM to -->
<!-- allow reading of single sided disks on double sided drives. -->
<software name="cpmv22s">
<description>CP/M 2.2 rev 2.1 System Disk (Single Sided)</description>
<year>1982</year>
<publisher>Lucas Logic</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="394240">
<rom name="cpmv22s.dsk" size="394240" crc="dee5c9d2" sha1="00f187d9828d87fba14d8267cd020bd13d8cbdb9" offset="0" />
</dataarea>
</part>
</software>
<software name="cpmv22d">
<description>CP/M 2.2 rev 2.1 System Disk (Double Sided)</description>
<year>1982</year>
<publisher>Lucas Logic</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="788480">
<rom name="cpmv22d.dsk" size="788480" crc="16724ed8" sha1="3db077c46c2cb52794443fa853621538323c352f" offset="0" />
</dataarea>
</part>
</software>
<!-- The manual for CP/M 2.2 rev 3.2 is available, but no hardware/software. -->
<software name="cpmgames">
<description>CP/M Games for the AVC</description>
<year>19??</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="394240">
<rom name="cpmgames.dsk" size="394240" crc="626c680a" sha1="9bd57fa8edce2017ad94a45d9721c86a37657d3b" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

45
hash/nascom_socket.xml Normal file
View File

@ -0,0 +1,45 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!-- Nascom internal sockets for ROM/RAM -->
<softwarelist name="nascom_socket" description="Nascom internal sockets">
<software name="nasdos">
<description>NAS-DOS</description>
<year>1982</year>
<publisher>Lucas Control Systems</publisher>
<info name="usage" value="Enter ED000 to start" />
<part name="socket" interface="nascom_socket">
<dataarea name="d000" size="0x1000">
<!-- Normally supplied as 4 1k ROMs -->
<rom name="nasdos.rom" size="0x1000" crc="54a36f6d" sha1="1d063d04be5024f128bd589e6edc066e9a63fc1b" offset="0" />
</dataarea>
</part>
</software>
<software name="odebdis">
<description>Super-Debug 3.1 &amp; Nas-Dis</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<info name="usage" value="Enter EC000 to start Super-Debug or EC400 to start Nas-Dis" />
<part name="socket" interface="nascom_socket">
<dataarea name="c000" size="0x1000">
<rom name="odebdis.rom" size="0x1000" crc="b0dce113" sha1="545466ab12bcf2ab613d6aff90946efa319bd943" offset="0" />
</dataarea>
</part>
</software>
<software name="zeap">
<description>ZEAP Z80 Editor-Assembler 2.1</description>
<year>1980?</year>
<publisher>Sigma Accouting &amp; Management Services</publisher>
<info name="usage" value="Enter ED000 to start" />
<part name="socket" interface="nascom_socket">
<dataarea name="d000" size="0x1000">
<rom name="zeap.rom" size="0x1000" crc="87ce8f68" sha1="e6dff4c30eecc9a5557395088d1d83776b9b4514" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

16
scripts/genie.lua
View File

@ -369,6 +369,8 @@ flags {
configuration { "vs*" }
flags {
"ExtraWarnings",
"NoEditAndContinue",
"EnableMinimalRebuild",
}
if not _OPTIONS["NOWERROR"] then
flags{
@ -664,6 +666,13 @@ if _OPTIONS["VERBOSE"] then
}
end
-- only show shadow warnings when enabled
if (_OPTIONS["SHADOW_CHECK"]=="1") then
buildoptions {
"-Wshadow"
}
end
-- only show deprecation warnings when enabled
if _OPTIONS["DEPRECATED"]~="1" then
buildoptions {
@ -811,7 +820,6 @@ end
"-Wno-cast-align",
"-Wno-tautological-compare",
"-Wno-dynamic-class-memaccess",
"-Wno-self-assign-field",
}
if (version >= 30200) then
buildoptions {
@ -820,7 +828,6 @@ end
end
if (version >= 30400) then
buildoptions {
"-Wno-inline-new-delete",
"-Wno-constant-logical-operand",
}
end
@ -832,11 +839,6 @@ end
}
end
else
if (_OPTIONS["SHADOW_CHECK"]=="1") then
buildoptions {
"-Wshadow"
}
end
if (version == 40201) then
buildoptions {
"-Wno-cast-align"

15
scripts/src/3rdparty.lua
View File

@ -272,6 +272,15 @@ project "lua"
uuid "d9e2eed1-f1ab-4737-a6ac-863700b1a5a9"
kind "StaticLib"
-- uncomment the options below to
-- compile using c++. Do the same
-- in lsqlite3.
-- In addition comment out the "extern "C""
-- in lua.hpp and do the same in luaengine.c line 47
--options {
-- "ForceCPP",
--}
configuration { }
defines {
"LUA_COMPAT_ALL",
@ -342,6 +351,10 @@ project "lsqlite3"
uuid "1d84edab-94cf-48fb-83ee-b75bc697660e"
kind "StaticLib"
-- options {
-- "ForceCPP",
-- }
configuration { }
defines {
"LUA_COMPAT_ALL",
@ -446,7 +459,7 @@ project "sqllite3"
--------------------------------------------------
-- portmidi library objects
--------------------------------------------------
if _OPTIONS["NO_USE_MIDI"]=="0" then
if _OPTIONS["NO_USE_MIDI"]~="1" then
project "portmidi"
uuid "587f2da6-3274-4a65-86a2-f13ea315bb98"
kind "StaticLib"

34
scripts/src/bus.lua
View File

@ -2414,3 +2414,37 @@ if (BUSES["PSX_CONTROLLER"]~=null) then
MAME_DIR .. "src/emu/bus/psx/memcard.h",
}
end
---------------------------------------------------
--
--@src/emu/bus/nasbus/nasbus.h,BUSES += NASBUS
---------------------------------------------------
if (BUSES["NASBUS"]~=null) then
files {
MAME_DIR .. "src/emu/bus/nasbus/nasbus.c",
MAME_DIR .. "src/emu/bus/nasbus/nasbus.h",
MAME_DIR .. "src/emu/bus/nasbus/cards.c",
MAME_DIR .. "src/emu/bus/nasbus/cards.h",
MAME_DIR .. "src/emu/bus/nasbus/avc.c",
MAME_DIR .. "src/emu/bus/nasbus/avc.h",
MAME_DIR .. "src/emu/bus/nasbus/floppy.c",
MAME_DIR .. "src/emu/bus/nasbus/floppy.h",
}
end
---------------------------------------------------
--
--@src/emu/bus/cgenie/expansion.h,BUSES += CGENIE_EXPANSION
---------------------------------------------------
if (BUSES["CGENIE_EXPANSION"]~=null) then
files {
MAME_DIR .. "src/emu/bus/cgenie/expansion.c",
MAME_DIR .. "src/emu/bus/cgenie/expansion.h",
MAME_DIR .. "src/emu/bus/cgenie/carts.c",
MAME_DIR .. "src/emu/bus/cgenie/carts.h",
MAME_DIR .. "src/emu/bus/cgenie/floppy.c",
MAME_DIR .. "src/emu/bus/cgenie/floppy.h",
}
end

18
scripts/src/cpu.lua
View File

@ -1051,6 +1051,24 @@ if (CPUS["PSX"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/psx/psxdasm.c")
end
--------------------------------------------------
-- Mitsubishi MELPS 4 series
---@src/emu/cpu/melps4/melps4.h,CPUS += MELPS4
--------------------------------------------------
if (CPUS["MELPS4"]~=null) then
files {
MAME_DIR .. "src/emu/cpu/melps4/melps4.c",
MAME_DIR .. "src/emu/cpu/melps4/melps4.h",
MAME_DIR .. "src/emu/cpu/melps4/m58846.c",
MAME_DIR .. "src/emu/cpu/melps4/m58846.h",
}
end
if (CPUS["MELPS4"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/melps4/melps4d.c")
end
--------------------------------------------------
-- Mitsubishi M37702 and M37710 (based on 65C816)
---@src/emu/cpu/m37710/m37710.h,CPUS += M37710

4
scripts/src/lib.lua
View File

@ -176,6 +176,8 @@ project "formats"
MAME_DIR .. "src/lib/formats/ccvf_dsk.h",
MAME_DIR .. "src/lib/formats/cgen_cas.c",
MAME_DIR .. "src/lib/formats/cgen_cas.h",
MAME_DIR .. "src/lib/formats/cgenie_dsk.c",
MAME_DIR .. "src/lib/formats/cgenie_dsk.h",
MAME_DIR .. "src/lib/formats/coco_cas.c",
MAME_DIR .. "src/lib/formats/coco_cas.h",
MAME_DIR .. "src/lib/formats/coco_dsk.c",
@ -279,6 +281,8 @@ project "formats"
MAME_DIR .. "src/lib/formats/mz_cas.h",
MAME_DIR .. "src/lib/formats/nanos_dsk.c",
MAME_DIR .. "src/lib/formats/nanos_dsk.h",
MAME_DIR .. "src/lib/formats/nascom_dsk.c",
MAME_DIR .. "src/lib/formats/nascom_dsk.h",
MAME_DIR .. "src/lib/formats/naslite_dsk.c",
MAME_DIR .. "src/lib/formats/naslite_dsk.h",
MAME_DIR .. "src/lib/formats/nes_dsk.c",

20
scripts/src/main.lua
View File

@ -104,7 +104,7 @@ function mainProject(_target, _subtarget)
"jsoncpp",
"mongoose",
}
if _OPTIONS["NO_USE_MIDI"]=="0" then
if _OPTIONS["NO_USE_MIDI"]~="1" then
links {
"portmidi",
}
@ -120,7 +120,7 @@ function mainProject(_target, _subtarget)
override_resources = false;
maintargetosdoptions(_target)
maintargetosdoptions(_target,_subtarget)
includedirs {
MAME_DIR .. "src/osd",
@ -146,25 +146,27 @@ function mainProject(_target, _subtarget)
}
end
local rctarget = _subtarget
if _OPTIONS["targetos"]=="windows" and (not override_resources) then
local rcfile = MAME_DIR .. "src/" .. _target .. "/osd/".._OPTIONS["osd"].."/" .. _subtarget .. "/" .. _subtarget ..".rc"
local rcfile = MAME_DIR .. "src/" .. _target .. "/osd/".._OPTIONS["osd"].."/" .. _subtarget .. "/" .. rctarget ..".rc"
if not os.isfile(rcfile) then
rcfile = MAME_DIR .. "src/" .. _target .. "/osd/windows/" .. _subtarget .. "/" .. _subtarget ..".rc"
rcfile = MAME_DIR .. "src/" .. _target .. "/osd/windows/" .. _subtarget .. "/" .. rctarget ..".rc"
end
if os.isfile(rcfile) then
files {
rcfile,
}
dependency {
{ "$(OBJDIR)/".._subtarget ..".res" , GEN_DIR .. "/resource/" .. _subtarget .. "vers.rc", true },
{ "$(OBJDIR)/".._subtarget ..".res" , GEN_DIR .. "/resource/" .. rctarget .. "vers.rc", true },
}
else
rctarget = "mame"
files {
MAME_DIR .. "src/mame/osd/windows/mame/mame.rc",
}
dependency {
{ "$(OBJDIR)/mame.res" , GEN_DIR .. "/resource/" .. _subtarget .. "vers.rc", true },
{ "$(OBJDIR)/mame.res" , GEN_DIR .. "/resource/" .. rctarget .. "vers.rc", true },
}
end
end
@ -185,14 +187,14 @@ function mainProject(_target, _subtarget)
configuration { "mingw*" }
custombuildtask {
{ MAME_DIR .. "src/version.c" , GEN_DIR .. "/resource/" .. _subtarget .. "vers.rc", { MAME_DIR .. "src/build/verinfo.py" }, {"@echo Emitting " .. _subtarget .. "vers.rc" .. "...", PYTHON .. " $(1) -r -b " .. _subtarget .. " $(<) > $(@)" }},
{ MAME_DIR .. "src/version.c" , GEN_DIR .. "/resource/" .. rctarget .. "vers.rc", { MAME_DIR .. "src/build/verinfo.py" }, {"@echo Emitting " .. rctarget .. "vers.rc" .. "...", PYTHON .. " $(1) -r -b " .. rctarget .. " $(<) > $(@)" }},
}
configuration { "vs*" }
prebuildcommands {
"mkdir " .. path.translate(GEN_DIR .. "/resource/","\\") .. " 2>NUL",
"@echo Emitting ".. _subtarget .. "vers.rc...",
PYTHON .. " " .. path.translate(MAME_DIR .. "src/build/verinfo.py","\\") .. " -r -b " .. _subtarget .. " " .. path.translate(MAME_DIR .. "src/version.c","\\") .. " > " .. path.translate(GEN_DIR .. "/resource/" .. _subtarget .. "vers.rc", "\\") ,
"@echo Emitting ".. rctarget .. "vers.rc...",
PYTHON .. " " .. path.translate(MAME_DIR .. "src/build/verinfo.py","\\") .. " -r -b " .. rctarget .. " " .. path.translate(MAME_DIR .. "src/version.c","\\") .. " > " .. path.translate(GEN_DIR .. "/resource/" .. rctarget .. "vers.rc", "\\") ,
}

1
scripts/src/netlist.lua
View File

@ -116,5 +116,6 @@ files {
MAME_DIR .. "src/emu/netlist/devices/nld_system.h",
MAME_DIR .. "src/emu/netlist/devices/nld_cmos.h",
MAME_DIR .. "src/emu/netlist/devices/nld_signal.h",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.c",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.h",
}

2
scripts/src/osd/osdmini.lua
View File

@ -1,7 +1,7 @@
-- license:BSD-3-Clause
-- copyright-holders:MAMEdev Team
function maintargetosdoptions(_target)
function maintargetosdoptions(_target,_subtarget)
end

2
scripts/src/osd/sdl.lua
View File

@ -4,7 +4,7 @@
dofile("modules.lua")
function maintargetosdoptions(_target)
function maintargetosdoptions(_target,_subtarget)
osdmodulestargetconf()
if _OPTIONS["USE_DISPATCH_GL"]~="1" and _OPTIONS["MESA_INSTALL_ROOT"] then

2
scripts/src/osd/windows.lua
View File

@ -4,7 +4,7 @@
dofile("modules.lua")
function maintargetosdoptions(_target)
function maintargetosdoptions(_target,_subtarget)
osdmodulestargetconf()
configuration { "mingw*-gcc" }

7
scripts/target/mame/arcade.lua
View File

@ -127,6 +127,7 @@ CPUS["ARCOMPACT"] = true
--CPUS["UCOM4"] = true
CPUS["HMCS40"] = true
--CPUS["E0C6200"] = true
--CPUS["MELPS4"] = true
--------------------------------------------------
-- specify available sound cores
@ -602,7 +603,7 @@ BUSES["ISA"] = true
--BUSES["KC"] = true
--BUSES["LPCI"] = true
--BUSES["MACPDS"] = true
--BUSES["MIDI"] = true
BUSES["MIDI"] = true
--BUSES["MEGADRIVE"] = true
--BUSES["MSX_SLOT"] = true
BUSES["NEOGEO"] = true
@ -611,7 +612,7 @@ BUSES["NEOGEO"] = true
--BUSES["O2"] = true
--BUSES["ORICEXT"] = true
--BUSES["PCE"] = true
--BUSES["PC_JOY"] = true
BUSES["PC_JOY"] = true
--BUSES["PC_KBD"] = true
--BUSES["PET"] = true
--BUSES["PLUS4"] = true
@ -2140,9 +2141,7 @@ files {
MAME_DIR .. "src/mame/video/neogeo.c",
MAME_DIR .. "src/mame/drivers/neogeo_noslot.c",
MAME_DIR .. "src/mame/video/neogeo_spr.c",
MAME_DIR .. "src/mame/machine/neoboot.c",
MAME_DIR .. "src/mame/machine/neocrypt.c",
MAME_DIR .. "src/mame/machine/neoprot.c",
MAME_DIR .. "src/mame/machine/ng_memcard.c",
}

8
scripts/target/mame/mess.lua
View File

@ -127,6 +127,7 @@ CPUS["AMIS2000"] = true
CPUS["UCOM4"] = true
CPUS["HMCS40"] = true
CPUS["E0C6200"] = true
CPUS["MELPS4"] = true
--------------------------------------------------
-- specify available sound cores; some of these are
@ -578,6 +579,7 @@ BUSES["C64"] = true
BUSES["CBM2"] = true
BUSES["CBMIEC"] = true
BUSES["CENTRONICS"] = true
BUSES["CGENIE_EXPANSION"] = true
BUSES["CHANNELF"] = true
BUSES["COCO"] = true
BUSES["COLECO"] = true
@ -606,6 +608,7 @@ BUSES["MACPDS"] = true
BUSES["MIDI"] = true
BUSES["MEGADRIVE"] = true
BUSES["MSX_SLOT"] = true
BUSES["NASBUS"] = true
BUSES["NEOGEO"] = true
BUSES["NES"] = true
BUSES["NES_CTRL"] = true
@ -948,9 +951,7 @@ files {
MAME_DIR .. "src/mame/machine/315-5881_crypt.c",
MAME_DIR .. "src/mame/video/powervr2.c",
MAME_DIR .. "src/mame/drivers/neogeo.c",
MAME_DIR .. "src/mame/machine/neoboot.c",
MAME_DIR .. "src/mame/machine/neocrypt.c",
MAME_DIR .. "src/mame/machine/neoprot.c",
MAME_DIR .. "src/mame/machine/ng_memcard.c",
MAME_DIR .. "src/mame/video/neogeo.c",
MAME_DIR .. "src/mame/video/neogeo_spr.c",
@ -1754,6 +1755,7 @@ files {
createMESSProjects(_target, _subtarget, "mitsubishi")
files {
MAME_DIR .. "src/mess/drivers/hh_melps4.c",
MAME_DIR .. "src/mess/drivers/multi8.c",
MAME_DIR .. "src/mess/drivers/multi16.c",
}
@ -1790,8 +1792,6 @@ files {
createMESSProjects(_target, _subtarget, "nascom")
files {
MAME_DIR .. "src/mess/drivers/nascom1.c",
MAME_DIR .. "src/mess/machine/nascom1.c",
MAME_DIR .. "src/mess/video/nascom1.c",
}
createMESSProjects(_target, _subtarget, "ne")

8
scripts/target/mame/tiny.lua
View File

@ -13,7 +13,7 @@
--------------------------------------------------
-- Specify all the CPU cores necessary for the
-- drivers referenced in tiny.c.
-- drivers referenced in tiny.lst.
--------------------------------------------------
CPUS["Z80"] = true
@ -28,7 +28,7 @@ CPUS["COP400"] = true
--------------------------------------------------
-- Specify all the sound cores necessary for the
-- drivers referenced in tiny.c.
-- drivers referenced in tiny.lst.
--------------------------------------------------
SOUNDS["SAMPLES"] = true
@ -72,7 +72,7 @@ BUSES["CENTRONICS"] = true
--------------------------------------------------
-- This is the list of files that are necessary
-- for building all of the drivers referenced
-- in tiny.c
-- in tiny.lst
--------------------------------------------------
function createProjects_mame_tiny(_target, _subtarget)
@ -142,4 +142,4 @@ function linkProjects_mame_tiny(_target, _subtarget)
links {
"mame_tiny",
}
end
end

2
src/emu/bus/a7800/a78_carts.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_CARTS_H
#define __A78_CARTS_H

2
src/emu/bus/a7800/a78_slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/a7800/a78_slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_SLOT_H
#define __A78_SLOT_H

2
src/emu/bus/a7800/cpuwiz.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A7800 CPUWIZ's homebrew boards (MegaCart+ and VersaBoard)

2
src/emu/bus/a7800/cpuwiz.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_CPUWIZ_H
#define __A78_CPUWIZ_H

2
src/emu/bus/a7800/hiscore.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A7800 HighScore passthrough cart emulation

2
src/emu/bus/a7800/hiscore.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_HISCORE_H
#define __A78_HISCORE_H

2
src/emu/bus/a7800/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A7800 ROM cart emulation

2
src/emu/bus/a7800/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_ROM_H
#define __A78_ROM_H

2
src/emu/bus/a7800/xboard.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A7800 XBoarD & XM expansions emulation

2
src/emu/bus/a7800/xboard.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A78_XBOARD_H
#define __A78_XBOARD_H

2
src/emu/bus/a800/a800_carts.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A800_CARTS_H
#define __A800_CARTS_H

2
src/emu/bus/a800/a800_slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/a800/a800_slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A800_SLOT_H
#define __A800_SLOT_H

2
src/emu/bus/a800/oss.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A800 ROM cart emulation

2
src/emu/bus/a800/oss.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A800_OSS_H
#define __A800_OSS_H

2
src/emu/bus/a800/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A800/A5200/XEGS ROM cart emulation

2
src/emu/bus/a800/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A800_ROM_H
#define __A800_ROM_H

2
src/emu/bus/a800/sparta.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
A800 SpartaDOS cart emulation

2
src/emu/bus/a800/sparta.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __A800_SPARTA_H
#define __A800_SPARTA_H

94
src/emu/bus/abckb/abc77.c
View File

@ -421,58 +421,58 @@ inline void abc77_device::key_down(int state)
// abc77_device - constructor
//-------------------------------------------------
abc77_device::abc77_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ABC77, "Luxor ABC 77", tag, owner, clock, "abc77", __FILE__),
abc_keyboard_interface(mconfig, *this),
m_maincpu(*this, I8035_TAG),
m_discrete(*this, DISCRETE_TAG),
m_x0(*this, "X0"),
m_x1(*this, "X1"),
m_x2(*this, "X2"),
m_x3(*this, "X3"),
m_x4(*this, "X4"),
m_x5(*this, "X5"),
m_x6(*this, "X6"),
m_x7(*this, "X7"),
m_x8(*this, "X8"),
m_x9(*this, "X9"),
m_x10(*this, "X10"),
m_x11(*this, "X11"),
m_dsw(*this, "DSW"),
m_txd(1),
m_keydown(1),
m_clock(0),
m_stb(1)
abc77_device::abc77_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ABC77, "Luxor ABC 77", tag, owner, clock, "abc77", __FILE__),
abc_keyboard_interface(mconfig, *this),
m_maincpu(*this, I8035_TAG),
m_discrete(*this, DISCRETE_TAG),
m_x0(*this, "X0"),
m_x1(*this, "X1"),
m_x2(*this, "X2"),
m_x3(*this, "X3"),
m_x4(*this, "X4"),
m_x5(*this, "X5"),
m_x6(*this, "X6"),
m_x7(*this, "X7"),
m_x8(*this, "X8"),
m_x9(*this, "X9"),
m_x10(*this, "X10"),
m_x11(*this, "X11"),
m_dsw(*this, "DSW"),
m_txd(1),
m_keydown(1),
m_clock(0),
m_stb(1)
{
}
abc77_device::abc77_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
abc_keyboard_interface(mconfig, *this),
m_maincpu(*this, I8035_TAG),
m_discrete(*this, DISCRETE_TAG),
m_x0(*this, "X0"),
m_x1(*this, "X1"),
m_x2(*this, "X2"),
m_x3(*this, "X3"),
m_x4(*this, "X4"),
m_x5(*this, "X5"),
m_x6(*this, "X6"),
m_x7(*this, "X7"),
m_x8(*this, "X8"),
m_x9(*this, "X9"),
m_x10(*this, "X10"),
m_x11(*this, "X11"),
m_dsw(*this, "DSW"),
m_txd(1),
m_keydown(1),
m_clock(0),
m_stb(1)
abc77_device::abc77_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
abc_keyboard_interface(mconfig, *this),
m_maincpu(*this, I8035_TAG),
m_discrete(*this, DISCRETE_TAG),
m_x0(*this, "X0"),
m_x1(*this, "X1"),
m_x2(*this, "X2"),
m_x3(*this, "X3"),
m_x4(*this, "X4"),
m_x5(*this, "X5"),
m_x6(*this, "X6"),
m_x7(*this, "X7"),
m_x8(*this, "X8"),
m_x9(*this, "X9"),
m_x10(*this, "X10"),
m_x11(*this, "X11"),
m_dsw(*this, "DSW"),
m_txd(1),
m_keydown(1),
m_clock(0),
m_stb(1)
{
}
abc55_device::abc55_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: abc77_device(mconfig, ABC55, "Luxor ABC 55", tag, owner, clock, "abc55", __FILE__) { }
abc55_device::abc55_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
abc77_device(mconfig, ABC55, "Luxor ABC 55", tag, owner, clock, "abc55", __FILE__) { }
//-------------------------------------------------
@ -503,6 +503,8 @@ void abc77_device::device_reset()
m_reset_timer->adjust(attotime::from_msec(t));
m_maincpu->set_input_line(MCS48_INPUT_EA, ea ? CLEAR_LINE : ASSERT_LINE);
m_slot->write_rx(1);
}

2
src/emu/bus/abckb/abc99.c
View File

@ -542,6 +542,8 @@ void abc99_device::device_reset()
// set EA lines
m_maincpu->set_input_line(MCS48_INPUT_EA, ASSERT_LINE);
m_mousecpu->set_input_line(MCS48_INPUT_EA, ASSERT_LINE);
m_slot->write_rx(1);
}

2
src/emu/bus/apf/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/apf/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __APF_ROM_H
#define __APF_ROM_H

2
src/emu/bus/apf/slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
APF Imagination / M-1000 cart emulation

2
src/emu/bus/apf/slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __APF_SLOT_H
#define __APF_SLOT_H

2
src/emu/bus/arcadia/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/arcadia/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ARCADIA_ROM_H
#define __ARCADIA_ROM_H

2
src/emu/bus/arcadia/slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
Emerson Arcadia 2001 (and clones) cart emulation

2
src/emu/bus/arcadia/slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ARCADIA_SLOT_H
#define __ARCADIA_SLOT_H

2
src/emu/bus/astrocde/exp.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
Bally Astrocade Expansion port

2
src/emu/bus/astrocde/exp.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ASTROCADE_EXP_H
#define __ASTROCADE_EXP_H

2
src/emu/bus/astrocde/ram.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/astrocde/ram.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ASTROCADE_RAM_H
#define __ASTROCADE_RAM_H

2
src/emu/bus/astrocde/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/astrocde/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ASTROCADE_ROM_H
#define __ASTROCADE_ROM_H

2
src/emu/bus/astrocde/slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
Bally Astrocade cart emulation

2
src/emu/bus/astrocde/slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __ASTROCADE_SLOT_H
#define __ASTROCADE_SLOT_H

2
src/emu/bus/centronics/epson_lx810l.c
View File

@ -3,8 +3,6 @@
/*
* Epson LX-810L dot matrix printer emulation
* License: BSD-3-Clause
*
* IC list:
* uPD7810HG (cpu)
* E05A30 (gate array)

13
src/emu/bus/cgenie/carts.c Normal file
View File

@ -0,0 +1,13 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Expansion Carts
***************************************************************************/
#include "carts.h"
SLOT_INTERFACE_START( expansion_slot_carts )
SLOT_INTERFACE("floppy", CGENIE_FDC)
SLOT_INTERFACE_END

20
src/emu/bus/cgenie/carts.h Normal file
View File

@ -0,0 +1,20 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Expansion Carts
***************************************************************************/
#pragma once
#ifndef __CGENIE_CARTS_H__
#define __CGENIE_CARTS_H__
#include "emu.h"
#include "floppy.h"
SLOT_INTERFACE_EXTERN( expansion_slot_carts );
#endif // __CGENIE_CARTS_H__

108
src/emu/bus/cgenie/expansion.c Normal file
View File

@ -0,0 +1,108 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Expansion Slot
50-pin slot
***************************************************************************/
#include "expansion.h"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type EXPANSION_SLOT = &device_creator<expansion_slot_device>;
//**************************************************************************
// SLOT DEVICE
//**************************************************************************
//-------------------------------------------------
// expansion_slot_device - constructor
//-------------------------------------------------
expansion_slot_device::expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, EXPANSION_SLOT, "Expansion Slot", tag, owner, clock, "expansion_slot", __FILE__),
device_slot_interface(mconfig, *this),
m_program(NULL),
m_io(NULL),
m_cart(NULL),
m_int_handler(*this),
m_nmi_handler(*this),
m_reset_handler(*this)
{
}
//-------------------------------------------------
// expansion_slot_device - destructor
//-------------------------------------------------
expansion_slot_device::~expansion_slot_device()
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void expansion_slot_device::device_start()
{
// resolve callbacks
m_int_handler.resolve_safe();
m_nmi_handler.resolve_safe();
m_reset_handler.resolve_safe();
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void expansion_slot_device::device_reset()
{
}
//-------------------------------------------------
// set_program_space - set address space we are attached to
//-------------------------------------------------
void expansion_slot_device::set_program_space(address_space *program)
{
m_program = program;
}
//-------------------------------------------------
// set_io_space - set address space we are attached to
//-------------------------------------------------
void expansion_slot_device::set_io_space(address_space *io)
{
m_io = io;
}
//**************************************************************************
// CARTRIDGE INTERFACE
//**************************************************************************
//-------------------------------------------------
// device_expansion_interface - constructor
//-------------------------------------------------
device_expansion_interface::device_expansion_interface(const machine_config &mconfig, device_t &device) :
device_slot_card_interface(mconfig, device)
{
m_slot = dynamic_cast<expansion_slot_device *>(device.owner());
}
//-------------------------------------------------
// ~device_expansion_interface - destructor
//-------------------------------------------------
device_expansion_interface::~device_expansion_interface()
{
}

128
src/emu/bus/cgenie/expansion.h Normal file
View File

@ -0,0 +1,128 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Expansion Slot
50-pin slot
1 GND 26 /MREQ
2 A8 27 /WR
3 A7 28 /C4
4 A6 29 (not used)
5 A9 30 /C1
6 A5 31 BD3
7 A4 32 /C3
8 A3 33 (not used)
9 A10 34 /C2
10 A2 35 DB6
11 A11 36 /RD
12 A1 37 BD4
13 A0 38 (not used)
14 A12 39 BD7
15 A14 40 (not used)
16 A13 41 BD5
17 /RFSH 42 (not useD)
18 A15 43 BD0
19 /INT 44 (not used)
20 /BUSRQ 45 BD2
21 /NMI 46 /RESET
22 /WAIT 47 /M1
23 /HALT 48 /IORQ
24 /BUSAK 49 BD1
25 /ROMDIS 50 +5V
***************************************************************************/
#pragma once
#ifndef __CGENIE_EXPANSION_H__
#define __CGENIE_EXPANSION_H__
#include "emu.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_EXPANSION_SLOT_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, EXPANSION_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(expansion_slot_carts, NULL, false)
#define MCFG_EXPANSION_SLOT_INT_HANDLER(_devcb) \
devcb = &expansion_slot_device::set_int_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_SLOT_NMI_HANDLER(_devcb) \
devcb = &expansion_slot_device::set_nmi_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_SLOT_RESET_HANDLER(_devcb) \
devcb = &expansion_slot_device::set_reset_handler(*device, DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class device_expansion_interface;
class expansion_slot_device : public device_t, public device_slot_interface
{
public:
// construction/destruction
expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual ~expansion_slot_device();
void set_program_space(address_space *program);
void set_io_space(address_space *io);
// callbacks
template<class _Object> static devcb_base &set_int_handler(device_t &device, _Object object)
{ return downcast<expansion_slot_device &>(device).m_int_handler.set_callback(object); }
template<class _Object> static devcb_base &set_nmi_handler(device_t &device, _Object object)
{ return downcast<expansion_slot_device &>(device).m_nmi_handler.set_callback(object); }
template<class _Object> static devcb_base &set_reset_handler(device_t &device, _Object object)
{ return downcast<expansion_slot_device &>(device).m_reset_handler.set_callback(object); }
// called from cart device
DECLARE_WRITE_LINE_MEMBER( int_w ) { m_int_handler(state); }
DECLARE_WRITE_LINE_MEMBER( nmi_w ) { m_nmi_handler(state); }
DECLARE_WRITE_LINE_MEMBER( reset_w ) { m_reset_handler(state); }
address_space *m_program;
address_space *m_io;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
device_expansion_interface *m_cart;
private:
devcb_write_line m_int_handler;
devcb_write_line m_nmi_handler;
devcb_write_line m_reset_handler;
};
// class representing interface-specific live expansion device
class device_expansion_interface : public device_slot_card_interface
{
public:
// construction/destruction
device_expansion_interface(const machine_config &mconfig, device_t &device);
virtual ~device_expansion_interface();
protected:
expansion_slot_device *m_slot;
};
// device type definition
extern const device_type EXPANSION_SLOT;
// include here so drivers don't need to
#include "carts.h"
#endif // __CGENIE_EXPANSION_H__

193
src/emu/bus/cgenie/floppy.c Normal file
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@ -0,0 +1,193 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Floppy Disc Controller
TODO:
- What's the exact FD1793 model?
- How does it turn off the motor?
- How does it switch between FM/MFM?
***************************************************************************/
#include "floppy.h"
#include "formats/cgenie_dsk.h"
#include "bus/generic/carts.h"
//**************************************************************************
// CONSTANTS/MACROS
//**************************************************************************
#define VERBOSE 0
// set to 1 to test fm disk formats
#define FM_MODE 0
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type CGENIE_FDC = &device_creator<cgenie_fdc_device>;
FLOPPY_FORMATS_MEMBER( cgenie_fdc_device::floppy_formats )
FLOPPY_CGENIE_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START( cgenie_floppies )
SLOT_INTERFACE("sssd", FLOPPY_525_SSSD)
SLOT_INTERFACE("sd", FLOPPY_525_SD)
SLOT_INTERFACE("ssdd", FLOPPY_525_SSDD)
SLOT_INTERFACE("dd", FLOPPY_525_DD)
SLOT_INTERFACE("ssqd", FLOPPY_525_SSQD)
SLOT_INTERFACE("qd", FLOPPY_525_QD)
SLOT_INTERFACE_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
ROM_START( cgenie_fdc )
ROM_REGION(0x3000, "software", 0)
ROM_LOAD("cgdos.rom", 0x0000, 0x2000, CRC(2a96cf74) SHA1(6dcac110f87897e1ee7521aefbb3d77a14815893))
ROM_END
const rom_entry *cgenie_fdc_device::device_rom_region() const
{
return ROM_NAME( cgenie_fdc );
}
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( cgenie_fdc )
MCFG_FD1793x_ADD("fd1793", XTAL_16MHz / 4 / 4)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(cgenie_fdc_device, intrq_w))
MCFG_FLOPPY_DRIVE_ADD("fd1793:0", cgenie_floppies, "ssdd", cgenie_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1793:1", cgenie_floppies, "ssdd", cgenie_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1793:2", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1793:3", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
// MCFG_SOFTWARE_LIST_ADD("floppy_list", "cgenie_flop")
MCFG_GENERIC_SOCKET_ADD("socket", generic_plain_slot, "cgenie_socket")
MCFG_GENERIC_EXTENSIONS("bin,rom")
MCFG_GENERIC_LOAD(cgenie_fdc_device, socket_load)
MCFG_SOFTWARE_LIST_ADD("cart_list", "cgenie_cart")
MACHINE_CONFIG_END
machine_config_constructor cgenie_fdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( cgenie_fdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// cgenie_fdc_device - constructor
//-------------------------------------------------
cgenie_fdc_device::cgenie_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, CGENIE_FDC, "Colour Genie Floppy Disc Controller", tag, owner, clock, "cgenie_fdc", __FILE__),
device_expansion_interface(mconfig, *this),
m_fdc(*this, "fd1793"),
m_floppy0(*this, "fd1793:0"),
m_floppy1(*this, "fd1793:1"),
m_floppy2(*this, "fd1793:2"),
m_floppy3(*this, "fd1793:3"),
m_socket(*this, "socket"),
m_floppy(NULL)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void cgenie_fdc_device::device_start()
{
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void cgenie_fdc_device::device_reset()
{
// dos rom
m_slot->m_program->install_rom(0xc000, 0xdfff, memregion("software")->base());
// memory mapped i/o
m_slot->m_program->install_write_handler(0xffe0, 0xffe3, 0, 0x10, write8_delegate(FUNC(cgenie_fdc_device::select_w), this));
m_slot->m_program->install_read_handler( 0xffec, 0xffef, 0, 0x10, read8_delegate(FUNC(fd1793_t::read), m_fdc.target()));
m_slot->m_program->install_write_handler(0xffec, 0xffef, 0, 0x10, write8_delegate(FUNC(fd1793_t::write), m_fdc.target()));
// map extra socket
if (m_socket->exists())
{
m_slot->m_program->install_read_handler(0xe000, 0xefff, read8_delegate(FUNC(generic_slot_device::read_rom), (generic_slot_device *) m_socket));
}
}
//**************************************************************************
// IMPLEMENTATION
//**************************************************************************
DEVICE_IMAGE_LOAD_MEMBER( cgenie_fdc_device, socket_load )
{
UINT32 size = m_socket->common_get_size("rom");
if (size > 0x1000)
{
image.seterror(IMAGE_ERROR_UNSPECIFIED, "Unsupported ROM size");
return IMAGE_INIT_FAIL;
}
m_socket->rom_alloc(0x1000, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE);
m_socket->common_load_rom(m_socket->get_rom_base(), size, "rom");
return IMAGE_INIT_PASS;
}
WRITE_LINE_MEMBER( cgenie_fdc_device::intrq_w )
{
if (VERBOSE)
logerror("cgenie_fdc_device::intrq_w: %d\n", state);
// forward to host
m_slot->int_w(state);
}
WRITE8_MEMBER( cgenie_fdc_device::select_w )
{
if (VERBOSE)
logerror("cgenie_fdc_device::motor_w: 0x%02x\n", data);
if (FM_MODE)
m_fdc->dden_w(1);
m_floppy = NULL;
if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
if (BIT(data, 2)) m_floppy = m_floppy2->get_device();
if (BIT(data, 3)) m_floppy = m_floppy3->get_device();
m_fdc->set_floppy(m_floppy);
if (m_floppy)
{
m_floppy->ss_w(BIT(data, 4));
m_floppy->mon_w(0);
}
}

59
src/emu/bus/cgenie/floppy.h Normal file
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@ -0,0 +1,59 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
EACA Colour Genie Floppy Controller Cartridge
***************************************************************************/
#pragma once
#ifndef __CGENIE_EXPANSION_FLOPPY_H__
#define __CGENIE_EXPANSION_FLOPPY_H__
#include "emu.h"
#include "expansion.h"
#include "machine/wd_fdc.h"
#include "bus/generic/slot.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> floppy_controller_device
class cgenie_fdc_device : public device_t, public device_expansion_interface
{
public:
// construction/destruction
cgenie_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER(intrq_w);
DECLARE_WRITE8_MEMBER(select_w);
DECLARE_FLOPPY_FORMATS(floppy_formats);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(socket_load);
protected:
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
virtual void device_start();
virtual void device_reset();
private:
required_device<fd1793_t> m_fdc;
required_device<floppy_connector> m_floppy0;
required_device<floppy_connector> m_floppy1;
required_device<floppy_connector> m_floppy2;
required_device<floppy_connector> m_floppy3;
required_device<generic_slot_device> m_socket;
floppy_image_device *m_floppy;
};
// device type definition
extern const device_type CGENIE_FDC;
#endif // __CGENIE_EXPANSION_FLOPPY_H__

2
src/emu/bus/chanf/rom.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/chanf/rom.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __CHANF_ROM_H
#define __CHANF_ROM_H

2
src/emu/bus/chanf/slot.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
Fairchild Channel F cart emulation

2
src/emu/bus/chanf/slot.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __CHANF_SLOT_H
#define __CHANF_SLOT_H

2
src/emu/bus/crvision/rom.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/crvision/rom.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __CRVISION_ROM_H
#define __CRVISION_ROM_H

2
src/emu/bus/crvision/slot.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
V-Tech CreatiVision cart emulation

2
src/emu/bus/crvision/slot.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __CRVISION_SLOT_H
#define __CRVISION_SLOT_H

2
src/emu/bus/gameboy/gb_slot.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
/***********************************************************************************************************

2
src/emu/bus/gameboy/gb_slot.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
#ifndef __GB_SLOT_H
#define __GB_SLOT_H

213
src/emu/bus/gameboy/mbc.c
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
/***********************************************************************************************************
Game Boy carts with MBC (Memory Bank Controller)
@ -26,8 +26,8 @@ const device_type GB_ROM_MBC6 = &device_creator<gb_rom_mbc6_device>;
const device_type GB_ROM_MBC7 = &device_creator<gb_rom_mbc7_device>;
const device_type GB_ROM_M161_M12 = &device_creator<gb_rom_m161_device>;
const device_type GB_ROM_MMM01 = &device_creator<gb_rom_mmm01_device>;
const device_type GB_ROM_SACHEN1 = &device_creator<gb_rom_sachen1_device>;
const device_type GB_ROM_SACHEN2 = &device_creator<gb_rom_sachen1_device>; // Just a placeholder for the moment...
const device_type GB_ROM_SACHEN1 = &device_creator<gb_rom_sachen_mmc1_device>;
const device_type GB_ROM_SACHEN2 = &device_creator<gb_rom_sachen_mmc2_device>;
const device_type GB_ROM_188IN1 = &device_creator<gb_rom_188in1_device>;
const device_type GB_ROM_SINTAX = &device_creator<gb_rom_sintax_device>;
const device_type GB_ROM_CHONGWU = &device_creator<gb_rom_chongwu_device>;
@ -97,8 +97,18 @@ gb_rom_mmm01_device::gb_rom_mmm01_device(const machine_config &mconfig, const ch
{
}
gb_rom_sachen1_device::gb_rom_sachen1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: gb_rom_mbc1_device(mconfig, GB_ROM_SACHEN1, "GB Sachen MMC1 Carts", tag, owner, clock, "gb_rom_sachen1", __FILE__)
gb_rom_sachen_mmc1_device::gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: gb_rom_mbc_device(mconfig, GB_ROM_SACHEN1, "GB Sachen MMC1 Carts", tag, owner, clock, "gb_rom_sachen1", __FILE__)
{
}
gb_rom_sachen_mmc1_device::gb_rom_sachen_mmc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
}
gb_rom_sachen_mmc2_device::gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: gb_rom_sachen_mmc1_device(mconfig, GB_ROM_SACHEN2, "GB Sachen MMC2 Carts", tag, owner, clock, "gb_rom_sachen2", __FILE__)
{
}
@ -233,18 +243,40 @@ void gb_rom_mmm01_device::device_reset()
m_reg = 0;
}
void gb_rom_sachen1_device::device_start()
void gb_rom_sachen_mmc1_device::device_start()
{
shared_start();
save_item(NAME(m_base_bank));
save_item(NAME(m_mask));
save_item(NAME(m_mode));
save_item(NAME(m_unlock_cnt));
}
void gb_rom_sachen1_device::device_reset()
void gb_rom_sachen_mmc1_device::device_reset()
{
shared_reset();
m_base_bank = 0;
m_mask = 0;
m_base_bank = 0x00;
m_mask = 0x00;
m_mode = MODE_LOCKED;
m_unlock_cnt = 0x00;
}
void gb_rom_sachen_mmc2_device::device_start()
{
shared_start();
save_item(NAME(m_base_bank));
save_item(NAME(m_mask));
save_item(NAME(m_mode));
save_item(NAME(m_unlock_cnt));
}
void gb_rom_sachen_mmc2_device::device_reset()
{
shared_reset();
m_base_bank = 0x00;
m_mask = 0x00;
m_mode = MODE_LOCKED_DMG;
m_unlock_cnt = 0x00;
}
void gb_rom_sintax_device::device_start()
@ -310,18 +342,18 @@ WRITE8_MEMBER(gb_rom_mbc_device::write_ram)
READ8_MEMBER(gb_rom_mbc1_device::read_rom)
{
if (offset < 0x4000)
{
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_ram_bank << (5 + m_shift)) | m_latch_bank2] * 0x4000 + (offset & 0x3fff)];
else
{ /* RB0 */
int bank = (m_mode == MODE_4M_256k) ? (m_ram_bank << (5 + m_shift)) : 0;
return m_rom[rom_bank_map[bank] * 0x4000 + (offset & 0x3fff)];
}
else
return m_rom[rom_bank_map[(m_ram_bank << (5 + m_shift)) | m_latch_bank2] * 0x4000 + (offset & 0x3fff)];
}
WRITE8_MEMBER(gb_rom_mbc1_device::write_bank)
{
// the mapper only uses inputs A13-A15
// the mapper only uses inputs A15..A13
switch (offset & 0xe000)
{
case 0x0000: // RAM Enable Register
@ -395,7 +427,7 @@ WRITE8_MEMBER(gb_rom_mbc2_device::write_bank)
READ8_MEMBER(gb_rom_mbc2_device::read_ram)
{
if (!m_ram.empty() && m_ram_enable)
return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)];
return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] | 0xF0;
else
return 0xff;
}
@ -403,7 +435,7 @@ READ8_MEMBER(gb_rom_mbc2_device::read_ram)
WRITE8_MEMBER(gb_rom_mbc2_device::write_ram)
{
if (!m_ram.empty() && m_ram_enable)
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data;
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] = data & 0x0F;
}
@ -661,6 +693,14 @@ WRITE8_MEMBER(gb_rom_m161_device::write_bank)
// MMM01
// This mmm01 implementation is mostly guess work, no clue how correct it all is
/* TODO: This implementation is wrong. Tauwasser
*
* Register 0: Map Latch, AA Mask, RAM Enable
* Register 1: EA1..EA0, RA18..RA14
* Register 2: ??, AA18..AA15, AA14..AA13
* Register 3: AA Multiplex, RA Mask, ???, MBC1 Mode
*
*/
READ8_MEMBER(gb_rom_mmm01_device::read_rom)
{
@ -704,37 +744,140 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_bank)
}
}
// Sachen MMC1
READ8_MEMBER(gb_rom_sachen1_device::read_rom)
READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
{
if (offset < 0x4000)
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
UINT16 off_edit = offset;
/* Wait for 0x31 transitions of A15 (hi -> lo), i.e. ROM accesses; A15 = HI while in bootstrap */
/* This is 0x31 transitions, because we increment counter _after_ checking it */
if (m_unlock_cnt == 0x30)
m_mode = MODE_UNLOCKED;
else
m_unlock_cnt++;
/* Logo Switch */
if (m_mode == MODE_LOCKED)
off_edit |= 0x80;
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
off_edit |= ((offset >> 6) & 0x01) << 0;
off_edit |= ((offset >> 4) & 0x01) << 1;
off_edit |= ((offset >> 1) & 0x01) << 4;
off_edit |= ((offset >> 0) & 0x01) << 6;
}
//logerror("read from %04X (%04X)\n", offset, off_edit);
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank & ~m_mask)] * 0x4000 + (off_edit & 0x3fff)];
}
WRITE8_MEMBER(gb_rom_sachen1_device::write_bank)
WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
{
if (offset < 0x2000) // Base ROM Bank register
/* Only A15..A6, A4, A1..A0 are connected */
/* We only decode upper three bits */
switch ((offset & 0xFFD3) & 0xE000)
{
if ((m_latch_bank2 & 0x30) == 0x30 && data)
m_base_bank = data & 0x0f;
//logerror("write to base bank %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
case 0x0000: /* Base ROM Bank Register */
if ((m_latch_bank2 & 0x30) == 0x30)
m_base_bank = data;
//logerror("write to base bank %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x2000: /* ROM Bank Register */
m_latch_bank2 = data ? data : 0x01;
//logerror("write to latch %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x4000: /* ROM Bank Mask Register */
if ((m_latch_bank2 & 0x30) == 0x30)
m_mask = data;
//logerror("write to mask %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x6000:
/* nothing happens when writing to 0x6000-0x7fff, as verified by Tauwasser */
break;
default:
//logerror("write to unknown/unmapped area %04X <= %02X\n", offset, data);
/* did not extensively test other unlikely ranges */
break;
}
else if (offset < 0x4000) // ROM Bank Register
{
m_latch_bank2 = data ? data : 1;
//logerror("write to latch %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
}
// Sachen MMC2
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
{
UINT16 off_edit = offset;
/* Wait for 0x30 transitions of A15 (lo -> hi), i.e. ROM accesses; A15 = HI while in bootstrap */
/* This is 0x30 transitions, because we increment counter _after_ checking it, but A15 lo -> hi*/
/* transition means first read (hi -> lo transition) must not count */
if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_DMG) {
m_mode = MODE_LOCKED_CGB;
m_unlock_cnt = 0x00;
} else if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_CGB) {
m_mode = MODE_UNLOCKED;
}
else if (offset < 0x6000) // ROM bank mask register
{
if ((m_latch_bank2 & 0x30) == 0x30)
m_mask = data;
//logerror("write to mask %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
if (m_unlock_cnt != 0x30)
m_unlock_cnt++;
/* Logo Switch */
if (m_mode == MODE_LOCKED_CGB)
off_edit |= 0x80;
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
off_edit |= ((offset >> 6) & 0x01) << 0;
off_edit |= ((offset >> 4) & 0x01) << 1;
off_edit |= ((offset >> 1) & 0x01) << 4;
off_edit |= ((offset >> 0) & 0x01) << 6;
}
// nothing happens when writing to 0x6000-0x7fff, as verified by Tauwasser
//logerror("read from %04X (%04X) cnt: %02X\n", offset, off_edit, m_unlock_cnt);
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank & ~m_mask)] * 0x4000 + (off_edit & 0x3fff)];
}
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
}
return 0xFF;
}
WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
}
}

41
src/emu/bus/gameboy/mbc.h
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@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
#ifndef __GB_MBC_H
#define __GB_MBC_H
@ -191,14 +191,20 @@ public:
UINT8 m_bank_mask, m_bank, m_reg;
};
// ======================> gb_rom_sachen1_device
// ======================> gb_rom_sachen_mmc1_device
class gb_rom_sachen1_device : public gb_rom_mbc1_device
class gb_rom_sachen_mmc1_device : public gb_rom_mbc_device
{
public:
enum {
MODE_LOCKED,
MODE_UNLOCKED
};
// construction/destruction
gb_rom_sachen1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
gb_rom_sachen_mmc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// device-level overrides
virtual void device_start();
@ -209,7 +215,32 @@ public:
virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
virtual DECLARE_WRITE8_MEMBER(write_ram) { }
UINT8 m_base_bank, m_mask;
UINT8 m_base_bank, m_mask, m_mode, m_unlock_cnt;
};
// ======================> gb_rom_sachen_mmc2_device
class gb_rom_sachen_mmc2_device : public gb_rom_sachen_mmc1_device
{
public:
enum {
MODE_LOCKED_DMG,
MODE_LOCKED_CGB,
MODE_UNLOCKED
};
// construction/destruction
gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual DECLARE_READ8_MEMBER(read_rom);
virtual DECLARE_READ8_MEMBER(read_ram);
virtual DECLARE_WRITE8_MEMBER(write_ram);
};
// ======================> gb_rom_188in1_device

2
src/emu/bus/gameboy/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
/***********************************************************************************************************
Game Boy cart emulation

2
src/emu/bus/gameboy/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta, Wilbert Pol
// copyright-holders:Fabio Priuli, Wilbert Pol
#ifndef __GB_ROM_H
#define __GB_ROM_H

2
src/emu/bus/gamegear/ggext.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Sega Game Gear EXT port emulation

2
src/emu/bus/gamegear/ggext.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Sega Game Gear EXT port emulation

2
src/emu/bus/gamegear/smsctrladp.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Sega Game Gear "SMS Controller Adaptor" emulation

2
src/emu/bus/gamegear/smsctrladp.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Sega Game Gear "SMS Controller Adaptor" emulation

2
src/emu/bus/gba/gba_slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont,Ryan Holtz,etabeta
// copyright-holders:R. Belmont,Ryan Holtz,Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/gba/gba_slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont,Ryan Holtz,etabeta
// copyright-holders:R. Belmont,Ryan Holtz,Fabio Priuli
#ifndef __GBA_SLOT_H
#define __GBA_SLOT_H

2
src/emu/bus/gba/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont,Ryan Holtz,etabeta
// copyright-holders:R. Belmont,Ryan Holtz,Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/gba/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont,Ryan Holtz,etabeta
// copyright-holders:R. Belmont,Ryan Holtz,Fabio Priuli
#ifndef __GBA_ROM_H
#define __GBA_ROM_H

2
src/emu/bus/generic/carts.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Generic ROM / RAM socket slots

2
src/emu/bus/generic/carts.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/**********************************************************************
Generic ROM/RAM socket slots

2
src/emu/bus/generic/ram.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/generic/ram.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __GENERIC_RAM_H
#define __GENERIC_RAM_H

2
src/emu/bus/generic/rom.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************

2
src/emu/bus/generic/rom.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __GENERIC_ROM_H
#define __GENERIC_ROM_H

2
src/emu/bus/generic/slot.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
/***********************************************************************************************************
Generic ROM / RAM Socket and Cartslot device

2
src/emu/bus/generic/slot.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:etabeta
// copyright-holders:Fabio Priuli
#ifndef __GENERIC_SLOT_H
#define __GENERIC_SLOT_H

180
src/emu/bus/ieee488/c2040.c
View File

@ -170,10 +170,10 @@ const rom_entry *c4040_device::device_rom_region() const
static ADDRESS_MAP_START( c2040_main_mem, AS_PROGRAM, 8, c2040_device )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0100) AM_RAM // 6532 #1
AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0100) AM_RAM // 6532 #2
AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0d60) AM_DEVREADWRITE(M6532_0_TAG, riot6532_device, read, write)
AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d60) AM_DEVREADWRITE(M6532_1_TAG, riot6532_device, read, write)
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0100) AM_DEVICE(M6532_0_TAG, mos6532_t, ram_map)
AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0100) AM_DEVICE(M6532_1_TAG, mos6532_t, ram_map)
AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0d60) AM_DEVICE(M6532_0_TAG, mos6532_t, io_map)
AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d60) AM_DEVICE(M6532_1_TAG, mos6532_t, io_map)
AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share1")
AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share2")
AM_RANGE(0x3000, 0x33ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share3")
@ -188,9 +188,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( c2040_fdc_mem, AS_PROGRAM, 8, c2040_device )
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_RAM // 6530
AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6522_TAG, via6522_device, read, write)
AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6530_TAG, mos6530_device, read, write)
AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_DEVICE(M6530_TAG, mos6530_t, ram_map)
AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVICE(M6522_TAG, via6522_device, map)
AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVICE(M6530_TAG, mos6530_t, io_map)
AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("share2")
AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("share3")
@ -404,69 +404,6 @@ WRITE8_MEMBER( c2040_device::via_pb_w )
}
//-------------------------------------------------
// mos6530 uk3
//-------------------------------------------------
READ8_MEMBER( c2040_device::miot_pb_r )
{
/*
bit description
PB0
PB1
PB2
PB3 WPS
PB4
PB5
PB6 SYNC
PB7
*/
UINT8 data = 0;
// write protect sense
data |= m_fdc->wps_r() << 3;
// SYNC detected
data |= m_fdc->sync_r() << 6;
return data;
}
WRITE8_MEMBER( c2040_device::miot_pb_w )
{
/*
bit description
PB0 DRV SEL
PB1 DS0
PB2 DS1
PB3
PB4
PB5
PB6
PB7 M6504 IRQ
*/
// drive select
m_fdc->drv_sel_w(BIT(data, 0));
// density select
m_fdc->ds_w((data >> 1) & 0x03);
// interrupt
if (m_miot_irq != BIT(data, 7))
{
m_fdccpu->set_input_line(M6502_IRQ_LINE, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
m_miot_irq = BIT(data, 7);
}
}
//-------------------------------------------------
// SLOT_INTERFACE( c2040_floppies )
//-------------------------------------------------
@ -515,16 +452,16 @@ static MACHINE_CONFIG_FRAGMENT( c2040 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_16MHz/16)
MCFG_CPU_PROGRAM_MAP(c2040_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_16MHz/16)
@ -536,12 +473,16 @@ static MACHINE_CONFIG_FRAGMENT( c2040 )
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, mode_sel_w))
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_16MHz/16)
MCFG_MOS6530_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530_IN_PB_CB(READ8(c2040_device, miot_pb_r))
MCFG_MOS6530_OUT_PB_CB(WRITE8(c2040_device, miot_pb_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_16MHz/16)
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds0_w))
MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds1_w))
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c2040_fdc_t, wps_r))
MCFG_DEVICE_ADD(FDC_TAG, C2040_FDC, XTAL_16MHz)
MCFG_C2040_SYNC_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb6_w))
MCFG_C2040_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1))
MCFG_C2040_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1))
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", c2040_floppies, "525ssqd", c2040_device::floppy_formats)
@ -569,16 +510,16 @@ static MACHINE_CONFIG_FRAGMENT( c3040 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_16MHz/16)
MCFG_CPU_PROGRAM_MAP(c2040_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_16MHz/16)
@ -590,12 +531,16 @@ static MACHINE_CONFIG_FRAGMENT( c3040 )
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, mode_sel_w))
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_16MHz/16)
MCFG_MOS6530_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530_IN_PB_CB(READ8(c2040_device, miot_pb_r))
MCFG_MOS6530_OUT_PB_CB(WRITE8(c2040_device, miot_pb_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_16MHz/16)
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds0_w))
MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds1_w))
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c2040_fdc_t, wps_r))
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C2040_FDC, XTAL_16MHz)
MCFG_C2040_SYNC_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb6_w))
MCFG_C2040_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1))
MCFG_C2040_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1))
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", c2040_floppies, "525ssqd", c3040_device::floppy_formats)
@ -623,16 +568,16 @@ static MACHINE_CONFIG_FRAGMENT( c4040 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_16MHz/16)
MCFG_CPU_PROGRAM_MAP(c2040_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_16MHz/16)
MCFG_RIOT6532_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_16MHz/16)
MCFG_MOS6530n_IN_PA_CB(READ8(c2040_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c2040_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c2040_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c2040_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_16MHz/16)
@ -644,12 +589,16 @@ static MACHINE_CONFIG_FRAGMENT( c4040 )
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, mode_sel_w))
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c2040_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_16MHz/16)
MCFG_MOS6530_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530_IN_PB_CB(READ8(c2040_device, miot_pb_r))
MCFG_MOS6530_OUT_PB_CB(WRITE8(c2040_device, miot_pb_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_16MHz/16)
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c2040_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds0_w))
MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c2040_fdc_t, ds1_w))
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c2040_fdc_t, wps_r))
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C2040_FDC, XTAL_16MHz)
MCFG_C2040_SYNC_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb6_w))
MCFG_C2040_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1))
MCFG_C2040_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1))
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", c2040_floppies, "525ssqd", c4040_device::floppy_formats)
@ -741,8 +690,7 @@ c2040_device::c2040_device(const machine_config &mconfig, device_type type, cons
m_address(*this, "ADDRESS"),
m_rfdo(1),
m_daco(1),
m_atna(1),
m_miot_irq(CLEAR_LINE)
m_atna(1)
{
}
@ -762,8 +710,7 @@ c2040_device::c2040_device(const machine_config &mconfig, const char *tag, devic
m_address(*this, "ADDRESS"),
m_rfdo(1),
m_daco(1),
m_atna(1),
m_miot_irq(CLEAR_LINE)
m_atna(1)
{
}
@ -797,7 +744,7 @@ void c2040_device::device_start()
save_item(NAME(m_rfdo));
save_item(NAME(m_daco));
save_item(NAME(m_atna));
save_item(NAME(m_miot_irq));
save_item(NAME(m_ifc));
}
@ -820,6 +767,8 @@ void c2040_device::device_reset()
m_miot->reset();
m_via->reset();
m_riot1->pa7_w(0);
// turn off spindle motors
m_fdc->mtr0_w(1);
m_fdc->mtr1_w(1);
@ -834,8 +783,7 @@ void c2040_device::ieee488_atn(int state)
{
update_ieee_signals();
// set RIOT PA7
m_riot1->porta_in_set(!state << 7, 0x80);
m_riot1->pa7_w(!state);
}

16
src/emu/bus/ieee488/c2040.h
View File

@ -17,8 +17,7 @@
#include "cpu/m6502/m6502.h"
#include "cpu/m6502/m6504.h"
#include "machine/6522via.h"
#include "machine/6532riot.h"
#include "machine/mos6530.h"
#include "machine/mos6530n.h"
@ -29,7 +28,7 @@
// ======================> c2040_device
class c2040_device : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction
@ -50,8 +49,6 @@ public:
DECLARE_WRITE8_MEMBER( via_pb_w );
DECLARE_WRITE_LINE_MEMBER( mode_sel_w );
DECLARE_WRITE_LINE_MEMBER( rw_sel_w );
DECLARE_READ8_MEMBER( miot_pb_r );
DECLARE_WRITE8_MEMBER( miot_pb_w );
DECLARE_FLOPPY_FORMATS( floppy_formats );
@ -76,9 +73,9 @@ protected:
required_device<m6502_device> m_maincpu;
required_device<m6504_device> m_fdccpu;
required_device<riot6532_device> m_riot0;
required_device<riot6532_device> m_riot1;
required_device<mos6530_device> m_miot;
required_device<mos6532_t> m_riot0;
required_device<mos6532_t> m_riot1;
required_device<mos6530_t> m_miot;
required_device<via6522_device> m_via;
required_device<floppy_image_device> m_floppy0;
optional_device<floppy_image_device> m_floppy1;
@ -91,9 +88,6 @@ protected:
int m_daco; // not data accepted output
int m_atna; // attention acknowledge
int m_ifc;
// signals
int m_miot_irq; // MIOT interrupt
};

16
src/emu/bus/ieee488/c2040fdc.c
View File

@ -82,6 +82,8 @@ c2040_fdc_t::c2040_fdc_t(const machine_config &mconfig, const char *tag, device_
m_stp0(0),
m_stp1(0),
m_ds(0),
m_ds0(0),
m_ds1(0),
m_drv_sel(0),
m_mode_sel(0),
m_rw_sel(0),
@ -116,6 +118,8 @@ void c2040_fdc_t::device_start()
save_item(NAME(m_stp0));
save_item(NAME(m_stp1));
save_item(NAME(m_ds));
save_item(NAME(m_ds0));
save_item(NAME(m_ds1));
save_item(NAME(m_drv_sel));
save_item(NAME(m_mode_sel));
save_item(NAME(m_rw_sel));
@ -451,6 +455,18 @@ WRITE8_MEMBER( c2040_fdc_t::write )
}
}
WRITE_LINE_MEMBER( c2040_fdc_t::ds0_w )
{
m_ds0 = state;
}
WRITE_LINE_MEMBER( c2040_fdc_t::ds1_w )
{
m_ds1 = state;
ds_w(m_ds1 << 1 | m_ds0);
}
WRITE_LINE_MEMBER( c2040_fdc_t::drv_sel_w )
{
if (m_drv_sel != state)

4
src/emu/bus/ieee488/c2040fdc.h
View File

@ -54,6 +54,8 @@ public:
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( ds0_w );
DECLARE_WRITE_LINE_MEMBER( ds1_w );
DECLARE_WRITE_LINE_MEMBER( drv_sel_w );
DECLARE_WRITE_LINE_MEMBER( mode_sel_w );
DECLARE_WRITE_LINE_MEMBER( rw_sel_w );
@ -127,6 +129,8 @@ protected:
int m_stp0;
int m_stp1;
int m_ds;
int m_ds0;
int m_ds1;
int m_drv_sel;
int m_mode_sel;
int m_rw_sel;

94
src/emu/bus/ieee488/c8050.c
View File

@ -184,10 +184,10 @@ const rom_entry *sfd1001_device::device_rom_region() const
//-------------------------------------------------
static ADDRESS_MAP_START( c8050_main_mem, AS_PROGRAM, 8, c8050_device )
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0100) AM_RAM // 6532 #1
AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0100) AM_RAM // 6532 #2
AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0d60) AM_DEVREADWRITE(M6532_0_TAG, riot6532_device, read, write)
AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d60) AM_DEVREADWRITE(M6532_1_TAG, riot6532_device, read, write)
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0100) AM_DEVICE(M6532_0_TAG, mos6532_t, ram_map)
AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0100) AM_DEVICE(M6532_1_TAG, mos6532_t, ram_map)
AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0d60) AM_DEVICE(M6532_0_TAG, mos6532_t, io_map)
AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d60) AM_DEVICE(M6532_1_TAG, mos6532_t, io_map)
AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share1")
AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share2")
AM_RANGE(0x3000, 0x33ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share3")
@ -528,16 +528,16 @@ static MACHINE_CONFIG_FRAGMENT( c8050 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_12MHz/12)
MCFG_CPU_PROGRAM_MAP(c8050_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_12MHz/12)
@ -550,12 +550,13 @@ static MACHINE_CONFIG_FRAGMENT( c8050 )
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12)
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w))
MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w))
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c8050_fdc_t, wps_r))
MCFG_MOS6530n_IN_PB6_CB(VCC) // SINGLE SIDED
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2)
MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7))
@ -587,16 +588,16 @@ static MACHINE_CONFIG_FRAGMENT( c8250 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_12MHz/12)
MCFG_CPU_PROGRAM_MAP(c8050_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_12MHz/12)
@ -609,7 +610,6 @@ static MACHINE_CONFIG_FRAGMENT( c8250 )
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12)
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w))
@ -617,6 +617,7 @@ static MACHINE_CONFIG_FRAGMENT( c8250 )
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c8050_fdc_t, wps_r))
MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w))
MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2)
MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7))
@ -648,16 +649,16 @@ static MACHINE_CONFIG_FRAGMENT( c8250lp )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_12MHz/12)
MCFG_CPU_PROGRAM_MAP(c8050_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_12MHz/12)
@ -670,7 +671,6 @@ static MACHINE_CONFIG_FRAGMENT( c8250lp )
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12)
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write))
MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w))
@ -678,6 +678,7 @@ static MACHINE_CONFIG_FRAGMENT( c8250lp )
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c8050_fdc_t, wps_r))
MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w))
MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2)
MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7))
@ -709,16 +710,16 @@ static MACHINE_CONFIG_FRAGMENT( sfd1001 )
MCFG_CPU_ADD(M6502_TAG, M6502, XTAL_12MHz/12)
MCFG_CPU_PROGRAM_MAP(c8050_main_mem)
MCFG_DEVICE_ADD(M6532_0_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, dio_w))
MCFG_DEVICE_ADD(M6532_1_TAG, RIOT6532, XTAL_12MHz/12)
MCFG_RIOT6532_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_RIOT6532_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_RIOT6532_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_RIOT6532_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532n, XTAL_12MHz/12)
MCFG_MOS6530n_IN_PA_CB(READ8(c8050_device, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(c8050_device, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(c8050_device, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(c8050_device, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_TAG, INPUT_LINE_IRQ0))
// controller
MCFG_CPU_ADD(M6504_TAG, M6504, XTAL_12MHz/12)
@ -731,13 +732,13 @@ static MACHINE_CONFIG_FRAGMENT( sfd1001 )
MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w))
MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12)
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write))
MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w))
MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w))
MCFG_MOS6530n_IN_PB3_CB(DEVREADLINE(FDC_TAG, c8050_fdc_t, wps_r))
MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w))
MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED
MCFG_MOS6530n_OUT_PB7_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE))
MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2)
MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7))
@ -914,6 +915,8 @@ void c8050_device::device_reset()
m_miot->reset();
m_via->reset();
m_riot1->pa7_w(1);
// turn off spindle motors
m_fdc->mtr0_w(1);
m_fdc->mtr1_w(1);
@ -928,8 +931,7 @@ void c8050_device::ieee488_atn(int state)
{
update_ieee_signals();
// set RIOT PA7
m_riot1->porta_in_set(!state << 7, 0x80);
m_riot1->pa7_w(state);
}

5
src/emu/bus/ieee488/c8050.h
View File

@ -17,7 +17,6 @@
#include "cpu/m6502/m6502.h"
#include "cpu/m6502/m6504.h"
#include "machine/6522via.h"
#include "machine/6532riot.h"
#include "machine/mos6530n.h"
@ -66,8 +65,8 @@ protected:
required_device<m6502_device> m_maincpu;
required_device<m6504_device> m_fdccpu;
required_device<riot6532_device> m_riot0;
required_device<riot6532_device> m_riot1;
required_device<mos6532_t> m_riot0;
required_device<mos6532_t> m_riot1;
required_device<mos6530_t> m_miot;
required_device<via6522_device> m_via;
required_device<floppy_connector> m_floppy0;

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