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Merge pull request #6282 from 68bit/swtpc-os9l1v12
swtpc09: OS9 support, misc fixes.
This commit is contained in:
R. Belmont
GitHub
commit
57d4cd6e37
@ -12,14 +12,12 @@
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2. swtpc09i
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MP-09 with SBUG rom + HDrom, MP-ID, MP-S2, MP-T, DMAF2, PIAIDE.
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Will boot Flex operating system
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TODO: finish ide part and get this one working.
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3. swtpc09u
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MP-09 with UniBUG rom, MP-ID, MP-S2, DMAF2.
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Will boot UniFlex operating system
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4. swtpc09d3
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MP-09 with UniBUG U3 rom, MP-ID, MP-S2, DMAF3.
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Will boot UniFlex operating system
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TODO: add Harddisk support, DMAF3 has WD1000 interface
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***************************************************************************/
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@ -27,9 +25,9 @@
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#include "includes/swtpc09.h"
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#include "bus/ss50/interface.h"
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#include "formats/flex_dsk.h"
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#include "formats/os9_dsk.h"
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#include "formats/uniflex_dsk.h"
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/**************************************************************************
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Address maps
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@ -197,6 +195,29 @@ void swtpc09_state::uniflex_dmaf3_mem(address_map &map)
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map(0xff800, 0xfffff).rom().region("bankdev", 0xff800);
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}
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void swtpc09_state::os9_mem(address_map &map)
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{
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map(0x00000, 0xfffff).ram(); // by default everything is ram, 1MB ram emulated
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map(0x0e000, 0x0e7ff).rw(FUNC(swtpc09_state::unmapped_r), FUNC(swtpc09_state::unmapped_w));
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// 0x0e004, 0x0e005 ACIA
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map(0x0e000, 0x0e00f).rw("io0", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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// 0x0e014 0x0e018-0x0e01b DC5 FDC
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map(0x0e010, 0x0e01f).rw("io1", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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map(0x0e020, 0x0e02f).rw("io2", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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map(0x0e030, 0x0e03f).rw("io3", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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// MPT
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map(0x0e040, 0x0e04f).rw("io4", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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map(0x0e050, 0x0e05f).rw("io5", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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map(0x0e060, 0x0e06f).rw("io6", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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map(0x0e070, 0x0e07f).rw("io7", FUNC(ss50_interface_port_device::read), FUNC(ss50_interface_port_device::write));
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// MPID
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map(0x0e080, 0x0e083).mirror(0xc).rw(m_pia, FUNC(pia6821_device::read), FUNC(pia6821_device::write));
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map(0x0e090, 0x0e097).mirror(0x8).rw(m_ptm, FUNC(ptm6840_device::read), FUNC(ptm6840_device::write));
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map(0x0e400, 0x0ffff).rom().region("bankdev", 0x0e400);
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}
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/* Input ports */
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static INPUT_PORTS_START( swtpc09 )
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@ -234,36 +255,39 @@ static INPUT_PORTS_START( swtpc09 )
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PORT_CONFSETTING(0, "Low (x1)")
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PORT_CONFSETTING(1, "High (x4)")
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// Debug aid to hard code the density. The FLEX format uses single
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// density for track zero. Many virtual disks 'fix' the format to be
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// purely double density and often without properly implementing
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// driver support for that. This setting is an aid to report
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// unexpected usage, and it attempts to correct that. It is possible
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// to patch the software to work with these pure double density disks.
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// Debug aid to hard code the density. The OS9 format can use single
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// density for track zero head zero. The FLEX format can use single
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// density for track zero on all heads, and many virtual disks 'fix'
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// the format to be purely double density and often without properly
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// implementing driver support for that. This setting is an aid to
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// report unexpected usage, and it attempts to correct that.
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PORT_START("FLOPPY_EXPECTED_DENSITY")
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PORT_CONFNAME(0xff, 0, "DMAF2/3 expected density")
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PORT_CONFNAME(0x7, 0, "DMAF2/3 expected density")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(1, "single density")
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PORT_CONFSETTING(2, "double density, with single density track zero")
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PORT_CONFSETTING(3, "double density")
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PORT_CONFSETTING(2, "double density, with single density track zero head zero")
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PORT_CONFSETTING(3, "double density, with single density track zero all heads")
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PORT_CONFSETTING(4, "double density")
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// Debug aid, to check that the sector head or side is set as expected
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// for the sector ID being read for the FLEX floppy disk format. Many
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// FLEX disk images were developed for vitural machines that have
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// little regard for the actual head and can work off the sector ID
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// and their drivers can set the head incorrectly. E.g. a disk with 18
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// sectors per side might have a drive set to switch heads for sectors
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// above 10. Another issue is that double density disk images are
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// often 'fixed' so that they are pure double density without being
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// single density onthe first track, and the drivers might still set
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// the head based track zero being single density. This aid is not
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// intended to be a substitute for fixing the drivers but it does help
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// work through the issues while patching the disks.
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// little regard for the actual number of heads and can work off the
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// sector ID and their drivers can set the head incorrectly. E.g. a
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// disk with 18 sectors per side might have a driver incorrectly switch
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// heads for sectors above 10. Another issue is that double density
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// disk images are often 'fixed' so that they are pure double density
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// without being single density on the first track, and the drivers
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// might still set the head based on track zero being single
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// density. This aid is not intended to be a substitute for fixing the
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// drivers but it does help work through the issues while patching the
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// disks.
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PORT_START("FLOPPY_EXPECTED_SECTORS")
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PORT_CONFNAME(0xff, 0, "DMAF2/3 expected sectors per side")
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PORT_CONFNAME(0xff, 0, "DMAF2/3 FLEX expected sectors per side")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(10, "10") // 5 1/4" single density 256B
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PORT_CONFSETTING(15, "15") // 8" single density 256B
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PORT_CONFSETTING(16, "16") // 5 1/4" double density 256B, 8" DD 512B
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PORT_CONFSETTING(18, "18") // 5 1/4" double density 256B
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PORT_CONFSETTING(26, "26") // 8" double density 256B
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PORT_CONFSETTING(36, "36") // 3.5" 1.4M QD 256B
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@ -272,10 +296,11 @@ static INPUT_PORTS_START( swtpc09 )
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// driver sticks to that and if using a double density disk then set a
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// single density size here.
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PORT_START("FLOPPY_TRACK_ZERO_EXPECTED_SECTORS")
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PORT_CONFNAME(0xff, 0, "DMAF2/3 track zero expected sectors per side")
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PORT_CONFNAME(0xff, 0, "DMAF2/3 FLEX track zero expected sectors per side")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(10, "10") // 5 1/4" single density 256B
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PORT_CONFSETTING(15, "15") // 8" single density 256B
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PORT_CONFSETTING(16, "16") // 5 1/4" double density 256B, 8" DD 512B
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PORT_CONFSETTING(18, "18") // 5 1/4" double density 256B
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PORT_CONFSETTING(26, "26") // 8" double density 256B
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PORT_CONFSETTING(36, "36") // 3.5" 1.4M QD 256B
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@ -539,6 +564,17 @@ void swtpc09_state::swtpc09d3(machine_config &config)
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}
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/* MPU09, MPID, MPS2, DC5, MPT */
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void swtpc09_state::swtpc09o(machine_config &config)
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{
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swtpc09_base(config);
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m_bankdev->set_addrmap(AS_PROGRAM, &swtpc09_state::os9_mem);
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subdevice<ss50_interface_port_device>("io1")->set_default_option("dc5");
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subdevice<ss50_interface_port_device>("io1")->set_option_device_input_defaults("dc5", DEVICE_INPUT_DEFAULTS_NAME(dc5));
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subdevice<ss50_interface_port_device>("io4")->set_default_option("mpt");
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}
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/* ROM definition */
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ROM_START( swtpc09 )
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@ -562,6 +598,12 @@ ROM_START( swtpc09d3 )
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ROM_LOAD ( "uos3.bin", 0xff800, 0x00800, CRC(e95eb3e0) SHA1(3e971d3b7e143bc87e4b506e18a8c928c089c25a) )
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ROM_END
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ROM_START( swtpc09o )
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ROM_REGION(0x100000, "bankdev", 0)
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ROM_SYSTEM_BIOS(0, "os9l1v12", "OS9 Level 1 version 1.2")
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ROMX_LOAD("os9l1v12.bin", 0x0e400, 0x01c00, CRC(f2ee7523) SHA1(4e47f672c43ee2dbb5f332feb276d2c109f08e78), ROM_BIOS(0))
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ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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@ -569,3 +611,4 @@ COMP( 1980, swtpc09, 0, 0, swtpc09, swtpc09, swtpc09_state, init_
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COMP( 1980, swtpc09i, swtpc09, 0, swtpc09i, swtpc09, swtpc09_state, init_swtpc09i, "SWTPC", "swtpc S/09 Sbug + piaide", MACHINE_NO_SOUND_HW )
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COMP( 1980, swtpc09u, swtpc09, 0, swtpc09u, swtpc09, swtpc09_state, init_swtpc09u, "SWTPC", "swtpc S/09 UNIBug + DMAF2", MACHINE_NO_SOUND_HW )
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COMP( 1980, swtpc09d3, swtpc09, 0, swtpc09d3, swtpc09, swtpc09_state, init_swtpc09d3, "SWTPC", "swtpc S/09 UNIBug + DMAF3", MACHINE_NO_SOUND_HW )
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COMP( 1980, swtpc09o, swtpc09, 0, swtpc09o, swtpc09, swtpc09_state, init_swtpc09o, "SWTPC", "swtpc S/09 OS9", MACHINE_NO_SOUND_HW )
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@ -59,11 +59,13 @@ public:
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void swtpc09d3(machine_config &config);
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void swtpc09u(machine_config &config);
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void swtpc09(machine_config &config);
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void swtpc09o(machine_config &config);
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void init_swtpc09();
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void init_swtpc09i();
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void init_swtpc09u();
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void init_swtpc09d3();
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void init_swtpc09o();
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DECLARE_INPUT_CHANGED_MEMBER(maincpu_clock_change);
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DECLARE_INPUT_CHANGED_MEMBER(fdc_clock_change);
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@ -135,6 +137,7 @@ private:
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void mp09_mem(address_map &map);
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void uniflex_dmaf2_mem(address_map &map);
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void uniflex_dmaf3_mem(address_map &map);
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void os9_mem(address_map &map);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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@ -186,6 +189,7 @@ private:
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emu_timer *m_floppy_motor_timer;
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floppy_image_device *m_fdc_floppy; // Current selected floppy.
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uint8_t m_fdc_side; // Current floppy side.
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uint8_t m_fdc_dden; // Current dden state.
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uint8_t m_dmaf3_via_porta;
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uint8_t m_dmaf3_via_portb;
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uint8_t m_active_interrupt;
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@ -20,6 +20,7 @@
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#define UNIFLEX_DMAF2 2
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#define UNIFLEX_DMAF3 3
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#define FLEX_DC5_PIAIDE 4
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#define OS9_DC5 4
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READ8_MEMBER(swtpc09_state::unmapped_r)
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@ -138,8 +139,7 @@ void swtpc09_state::validate_floppy_side(uint8_t cmd)
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}
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}
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}
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if (expected_sectors)
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else if (expected_sectors)
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{
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uint8_t expected_side = sector > expected_sectors ? 1 : 0;
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@ -169,13 +169,13 @@ uint8_t swtpc09_state::validate_fdc_dden(uint8_t dden)
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return 1;
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case 2:
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{
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// Double density with track zero single density.
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// Double density with track zero head zero single density.
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uint8_t track = m_fdc->track_r();
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if (track == 0)
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if (track == 0 && m_fdc_side == 0)
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{
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if (!dden)
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logerror("%s Unexpected DDEN %d for single density trak 0\n", machine().describe_context(), dden);
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logerror("%s Unexpected DDEN %d for single density track 0 head 0\n", machine().describe_context(), dden);
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return 1;
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}
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if (dden)
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@ -183,6 +183,21 @@ uint8_t swtpc09_state::validate_fdc_dden(uint8_t dden)
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return 0;
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}
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case 3:
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{
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// Double density with track zero all heads single density.
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uint8_t track = m_fdc->track_r();
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if (track == 0)
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{
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if (!dden)
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logerror("%s Unexpected DDEN %d for single density track 0\n", machine().describe_context(), dden);
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return 1;
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}
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if (dden)
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logerror("%s Unexpected DDEN %d for double density\n", machine().describe_context(), dden);
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return 0;
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}
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case 4:
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// Pure double density.
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if (dden)
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logerror("%s Unexpected DDEN %d for double density\n", machine().describe_context(), dden);
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@ -229,6 +244,7 @@ WRITE8_MEMBER ( swtpc09_state::dmaf2_fdc_w )
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if (offset == 0) {
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validate_floppy_side(data);
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m_fdc->dden_w(validate_fdc_dden(m_fdc_dden));
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data = validate_fdc_sector_size(data);
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}
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@ -298,6 +314,7 @@ WRITE8_MEMBER ( swtpc09_state::dmaf2_control_reg_w )
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uint8_t dden = BIT(data, 5);
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dden = validate_fdc_dden(dden);
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m_fdc->dden_w(dden);
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m_fdc_dden = dden;
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}
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/* common interrupt handler */
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@ -410,6 +427,7 @@ WRITE8_MEMBER ( swtpc09_state::dmaf3_fdc_w )
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if (offset == 0) {
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validate_floppy_side(data);
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m_fdc->dden_w(validate_fdc_dden(m_fdc_dden));
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data = validate_fdc_sector_size(data);
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}
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@ -517,6 +535,7 @@ WRITE8_MEMBER ( swtpc09_state::dmaf3_control_reg_w )
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uint8_t dden = BIT(data, 5);
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dden = validate_fdc_dden(dden);
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m_fdc->dden_w(dden);
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m_fdc_dden = dden;
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}
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// DMAF3 WD1000 hard disk controller.
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@ -605,6 +624,8 @@ READ8_MEMBER(swtpc09_state::main_r)
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{
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if (offset < 0xff00)
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return m_banked_space->read_byte(dat_translate(offset));
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else if (m_system_type == OS9_DC5)
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return m_banked_space->read_byte(offset | 0x0ff00);
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else
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return m_banked_space->read_byte(offset | 0xfff00);
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}
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@ -613,13 +634,14 @@ WRITE8_MEMBER(swtpc09_state::main_w)
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{
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if (offset < 0xff00)
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m_banked_space->write_byte(dat_translate(offset), data);
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else if (m_system_type == OS9_DC5)
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m_banked_space->write_byte(offset | 0x0ff00, data);
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else
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m_banked_space->write_byte(offset | 0xfff00, data);
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}
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/* MC6844 DMA controller I/O */
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void swtpc09_state::m6844_update_interrupt()
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{
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uint8_t interrupt = 0;
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@ -983,6 +1005,7 @@ void swtpc09_state::machine_start()
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m_active_interrupt = false;
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m_fdc_side = 0;
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m_fdc_dden = 0;
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// Start with the IRQ disabled?
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m_dmaf2_interrupt_enable = 0;
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@ -1014,6 +1037,7 @@ void swtpc09_state::machine_start()
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save_item(NAME(m_fdc_status));
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save_item(NAME(m_floppy_motor_on));
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save_item(NAME(m_fdc_side));
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save_item(NAME(m_fdc_dden));
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save_item(NAME(m_dmaf3_via_porta));
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save_item(NAME(m_dmaf3_via_portb));
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save_item(NAME(m_active_interrupt));
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@ -1053,3 +1077,8 @@ void swtpc09_state::init_swtpc09d3()
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// UniFLEX numbers sectors from 1.
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m_hdc->set_sector_base(1);
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}
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void swtpc09_state::init_swtpc09o()
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{
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m_system_type = OS9_DC5;
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}
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@ -37834,8 +37834,9 @@ swtpcm // MPA2 MPC Mikbug rom
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@source:swtpc09.cpp
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swtpc09 // S09, DMF2 Floppy SBUG rom - FLEX
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swtpc09d3 // S09, DMF3 Floppy UNIBUG U3 rom - UniFLEX U3
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swtpc09i // S09, DC4 Floppy + PIA IDE SBUG rom - FLEX
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swtpc09i // S09, DC5 Floppy + PIA IDE SBUG rom - FLEX
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swtpc09u // S09, DMF2 Floppy UNIBUG rom - UniFLEX
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swtpc09o // S09, DC5 Floppy - OS9
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@source:swtpc8212.cpp
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swtpc8212 // Terminal
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