From 82bd03bd12c6e90224614adf80486d14a6d2bdf9 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Thu, 11 Jan 2018 03:54:32 +0000 Subject: [PATCH 1/3] new clones Cookie & Bibi 2 (set 2) [Hammy] note, protection data needs verifying for this, I had to hack the parent data because there are absolute jumps to rom addresses in the code provided by the MCU just to make sure it doesn't crash when inserting a coin, it's possible some ram addresses differ too, hence need for verification. --- src/mame/drivers/snowbros.cpp | 30 +++++++++++++++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/snowbros.cpp b/src/mame/drivers/snowbros.cpp index a7f4050b11e..284273284a4 100644 --- a/src/mame/drivers/snowbros.cpp +++ b/src/mame/drivers/snowbros.cpp @@ -2587,6 +2587,33 @@ ROM_START( cookbib2 ) ROM_LOAD( "cookbib2.03", 0x100000, 0x40000, CRC(e1604821) SHA1(bede6bdd8331128b9f2b229d718133470bf407c9) ) ROM_END +ROM_START( cookbib2a ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ + ROM_LOAD16_BYTE( "uh12.020", 0x00001, 0x40000, CRC(a44ec1f8) SHA1(0c741bf38f5cf667586cd1925417b6e17dbb8916) ) + ROM_LOAD16_BYTE( "ui12.020", 0x00000, 0x40000, CRC(bdbcd0d1) SHA1(9a6a85a492c21f6dd5daef964071a8a1c62f73c8) ) + + ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ + ROM_LOAD( "u1.512", 0x00000, 0x10000 , CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) + + ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */ + + ROM_REGION( 0x200, "user1", 0 ) /* Data from Shared RAM */ + /* this is not a real rom but instead the data extracted from + shared ram, the MCU puts it there + + this one is hacked from the cookbib2 one, absolute code jump needed to be changed at least */ + ROM_LOAD16_WORD_SWAP( "protdata_alt.bin", 0x00000, 0x200, BAD_DUMP CRC(bc136ead) SHA1(96459c2ccf7f95880421ba082c2414fa1040f3ed) ) + + ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_LOAD( "uj15.010", 0x00000, 0x20000, CRC(5e6f76b8) SHA1(725800143dfeaa6093ed5fcc5b9f15678ae9e547) ) + + ROM_REGION( 0x180000, "gfx1", 0 ) /* Sprites */ + ROM_LOAD( "ua4.040", 0x000000, 0x80000, CRC(f458d52e) SHA1(f6a145aaa57c64557479e63bb95732a98a7b8b85) ) + ROM_LOAD( "ua6.040", 0x080000, 0x80000, CRC(249e89b4) SHA1(2100eea2c3cee84a046ba7ff6cec1027966b895c) ) + ROM_LOAD( "ua8.040", 0x100000, 0x80000, CRC(caa25138) SHA1(784111255777f5774abf4d34c0a95b5e23a14c9f) ) +ROM_END + ROM_START( cookbib3 ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "u52.bin", 0x00001, 0x40000, CRC(65134893) SHA1(b1f26794d1a85893aedf55adb2195ad244f90132) ) @@ -2913,7 +2940,8 @@ GAME( 1996, toto, 0, snowbros, snowbros, snowbros_state, toto, R GAME( 1993, finalttr, 0, finalttr, finalttr, snowbros_state, 0, ROT0, "Jeil Computer System", "Final Tetris", MACHINE_SUPPORTS_SAVE ) GAME( 1995, hyperpac, 0, semicom_mcu, hyperpac, snowbros_state, hyperpac, ROT0, "SemiCom", "Hyper Pacman", MACHINE_SUPPORTS_SAVE ) GAME( 1995, hyperpacb, hyperpac, semicom, hyperpac, snowbros_state, 0, ROT0, "bootleg", "Hyper Pacman (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, cookbib2, 0, semiprot, cookbib2, snowbros_state, cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, cookbib2, 0, semiprot, cookbib2, snowbros_state, cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, cookbib2a, cookbib2, semiprot, cookbib2, snowbros_state, cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (set 2)", MACHINE_SUPPORTS_SAVE ) // older? test mode looks even worse on this, but neither shows the correct dip info anyway GAME( 1996, toppyrap, 0, semiprot, toppyrap, snowbros_state, 0, ROT0, "SemiCom", "Toppy & Rappy", MACHINE_SUPPORTS_SAVE ) GAME( 1997, cookbib3, 0, semiprot, cookbib3, snowbros_state, cookbib3, ROT0, "SemiCom", "Cookie & Bibi 3", MACHINE_SUPPORTS_SAVE ) GAME( 1997, pzlbreak, 0, semiprot, pzlbreak, snowbros_state, pzlbreak, ROT0, "SemiCom / Tirano", "Puzzle Break", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 6cda74d780a..bd2373f6994 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34856,6 +34856,7 @@ crystalca // 1998 JCD srl 4in1boot // (c) 2002 KISoft (includes hacks of Semicom games + Snowbros) ballboy // bootleg cookbib2 // (c) 1996 SemiCom +cookbib2a cookbib3 // (c) 1997 SemiCom finalttr // (c) 1993 Jeil Computer System honeydol // (c) 1995 Barko Corp From f3234fba01bf930977ffd08ace569feb17ded5ab Mon Sep 17 00:00:00 2001 From: David Haywood Date: Sat, 13 Jan 2018 17:38:29 +0000 Subject: [PATCH 2/3] Various progress on the Radica 6502 stuff (#3057) * radica 6502 tvgames: identify where gfx are coming from in each of the games in the space invaders pack so we can attempt to find the register that controls it, or dma etc. new NOT WORKING Tetris (Radica, Arcade Legends TV Game) [Sean Riddle, Incog] * this seems to be gfx base (nw) * latest findings (nw) * trying to work out what these are (nw) * typo (nw) * this looks like some kind of dma or sound (nw) * this seems to be mode select (nw) --- src/mame/drivers/radicasi.cpp | 443 +++++++++++++++++++++++++--------- 1 file changed, 324 insertions(+), 119 deletions(-) diff --git a/src/mame/drivers/radicasi.cpp b/src/mame/drivers/radicasi.cpp index cb17a2613de..39551c662c5 100644 --- a/src/mame/drivers/radicasi.cpp +++ b/src/mame/drivers/radicasi.cpp @@ -77,18 +77,36 @@ public: DECLARE_READ8_MEMBER(radicasi_sprite_gfxbase_hi_r); // unknown rom bases - DECLARE_WRITE8_MEMBER(radicasi_unkreg1_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg1_hi_r); - DECLARE_WRITE8_MEMBER(radicasi_unkreg2_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg2_hi_r); - DECLARE_WRITE8_MEMBER(radicasi_unkreg3_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg3_hi_r); - DECLARE_WRITE8_MEMBER(radicasi_unkreg4_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg4_hi_r); - DECLARE_WRITE8_MEMBER(radicasi_unkreg5_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg5_hi_r); - DECLARE_WRITE8_MEMBER(radicasi_unkreg6_hi_w); - DECLARE_READ8_MEMBER(radicasi_unkreg6_hi_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_0_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_0_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_1_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_1_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_2_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_2_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_3_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_3_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_4_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_4_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_0_5_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_0_5_r); + + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_0_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_0_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_1_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_1_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_2_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_2_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_3_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_3_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_4_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_4_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_1_5_w); + DECLARE_READ8_MEMBER(radicasi_unkregs_1_5_r); + + DECLARE_READ8_MEMBER(radicasi_unkregs_trigger_r); + DECLARE_WRITE8_MEMBER(radicasi_unkregs_trigger_w); + + DECLARE_WRITE8_MEMBER(radicasi_5027_w); DECLARE_READ8_MEMBER(radicasi_500b_r); DECLARE_READ8_MEMBER(radicasi_500d_r); @@ -109,6 +127,7 @@ private: required_device m_gfxdecode; uint8_t m_500d_data; + uint8_t m_5027_data; uint8_t m_palbase_lo_data; uint8_t m_palbase_hi_data; @@ -119,13 +138,21 @@ private: uint8_t m_sprite_gfxbase_lo_data; uint8_t m_sprite_gfxbase_hi_data; - uint8_t m_unkreg1_hi_data; - uint8_t m_unkreg2_hi_data; - uint8_t m_unkreg3_hi_data; - uint8_t m_unkreg4_hi_data; - uint8_t m_unkreg5_hi_data; - uint8_t m_unkreg6_hi_data; + uint16_t m_unkregs_0_address[6]; + uint8_t m_unkregs_0_unk[6]; + uint8_t m_unkregs_1_unk0[6]; + uint8_t m_unkregs_1_unk1[6]; + uint8_t m_unkregs_1_unk2[6]; + + uint8_t m_unkregs_trigger; + + void handle_trigger(int which); + + void handle_unkregs_0_w(int which, int offset, uint8_t data); + uint8_t handle_unkregs_0_r(int which, int offset); + void handle_unkregs_1_w(int which, int offset, uint8_t data); + uint8_t handle_unkregs_1_r(int which, int offset); int m_hackmode; }; @@ -148,7 +175,7 @@ uint32_t radica_6502_state::screen_update(screen_device &screen, bitmap_ind16 &b if (machine().input().code_pressed_once(KEYCODE_Q)) { m_hackmode++; - if (m_hackmode == 3) m_hackmode = 0; + if (m_hackmode == 2) m_hackmode = 0; } // it is unclear if the tilemap is an internal structure or something actually used by the video rendering @@ -157,70 +184,72 @@ uint32_t radica_6502_state::screen_update(screen_device &screen, bitmap_ind16 &b // we draw the tiles as 8x1 strips as that's how they're stored in ROM // it might be they're format shifted at some point tho as I doubt it draws direct from ROM - // is the data at 0x000 in ROM the palette? can't work out the format if so. - if (m_hackmode == 0) // 16x16 tiles 4bpp (menu) + if (m_hackmode == 0) { - for (int y = 0; y < 16; y++) + if (m_5027_data & 0x40) // 16x16 tiles { - for (int x = 0; x < 16; x++) + for (int y = 0; y < 16; y++) { - gfx_element *gfx = m_gfxdecode->gfx(0); - - int tile = m_ram[offs] + (m_ram[offs + 1] << 8); - int attr = (m_ram[offs + 3]); // set to 0x07 on the radica logo, 0x00 on the game select screen - - if (attr == 0) + for (int x = 0; x < 16; x++) { - /* this logic allows us to see the Taito logo and menu screen */ - gfx = m_gfxdecode->gfx(0); // 4bpp - tile = (tile & 0xf) + ((tile & ~0xf) * 16); + gfx_element *gfx = m_gfxdecode->gfx(0); + + int tile = m_ram[offs] + (m_ram[offs + 1] << 8); + //int attr = (m_ram[offs + 3]); // set to 0x07 on the radica logo, 0x00 on the game select screen + + if (m_5027_data & 0x20) // 4bpp mode + { + /* this logic allows us to see the Taito logo and menu screen */ + gfx = m_gfxdecode->gfx(0); // 4bpp + tile = (tile & 0xf) + ((tile & ~0xf) * 16); + tile += ((m_tile_gfxbase_lo_data | m_tile_gfxbase_hi_data << 8) << 5); + tile <<= 1; // due to 16 pixel wide + } + else + { + gfx = m_gfxdecode->gfx(2); // 8bpp + tile = (tile & 0xf) + ((tile & ~0xf) * 16); + tile <<= 1; // due to 16 pixel wide + + // why after the shift in this case? + tile += ((m_tile_gfxbase_lo_data | m_tile_gfxbase_hi_data << 8) << 5); + } + + for (int i = 0; i < 16; i++) + { + gfx->transpen(bitmap, cliprect, tile + i * 32, 0, 0, 0, x * 16, (y * 16) + i, 0); + gfx->transpen(bitmap, cliprect, (tile + i * 32) + 1, 0, 0, 0, (x * 16) + 8, (y * 16) + i, 0); + } + + offs += 4; + } + } + } + else // 8x8 tiles + { + gfx_element *gfx = m_gfxdecode->gfx(2); + + for (int y = 0; y < 32; y++) + { + for (int x = 0; x < 32; x++) + { + int tile = m_ram[offs] + (m_ram[offs + 1] << 8); + + tile = (tile & 0x1f) + ((tile & ~0x1f) * 8); tile += ((m_tile_gfxbase_lo_data | m_tile_gfxbase_hi_data << 8) << 5); - tile <<= 1; // due to 16 pixel wide - } - else - { - gfx = m_gfxdecode->gfx(2); // 8bpp - tile = (tile & 0xf) + ((tile & ~0xf) * 16); - tile <<= 1; // due to 16 pixel wide - // why after the shift in this case? - tile += ((m_tile_gfxbase_lo_data | m_tile_gfxbase_hi_data << 8) << 5); - } + for (int i = 0; i < 8; i++) + { + gfx->transpen(bitmap, cliprect, tile + i * 32, 0, 0, 0, x * 8, (y * 8) + i, 0); - for (int i = 0; i < 16; i++) - { - gfx->transpen(bitmap, cliprect, tile + i * 32, 0, 0, 0, x * 16, (y * 16) + i, 0); - gfx->transpen(bitmap, cliprect, (tile + i * 32) + 1, 0, 0, 0, (x * 16) + 8, (y * 16) + i, 0); + } + offs += 4; } - - offs += 4; } } } - else if (m_hackmode == 1) // 8x8 tiles (games) - { - gfx_element *gfx = m_gfxdecode->gfx(2); - - for (int y = 0; y < 32; y++) - { - for (int x = 0; x < 32; x++) - { - int tile = m_ram[offs] + (m_ram[offs + 1] << 8); - - tile = (tile & 0x1f) + ((tile & ~0x1f) * 8); - tile += ((m_tile_gfxbase_lo_data | m_tile_gfxbase_hi_data << 8) << 5); - - for (int i = 0; i < 8; i++) - { - gfx->transpen(bitmap, cliprect, tile + i * 32, 0, 0, 0, x * 8, (y * 8) + i, 0); - - } - offs += 4; - } - } - } - else if (m_hackmode == 2) // qix + else if (m_hackmode == 1) // qix { for (int y = 0; y < 224; y++) { @@ -347,81 +376,239 @@ READ8_MEMBER(radica_6502_state::radicasi_palbase_hi_r) } // unknown regs that seem to also be pointers +// seem to get set to sound data? - -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg1_hi_w) +void radica_6502_state::handle_unkregs_0_w(int which, int offset, uint8_t data) { - logerror("%s: radicasi_unkreg1_hi_w (unknown register 1 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg1_hi_data = data; + switch (offset) + { + case 0x00: + m_unkregs_0_unk[which] = data; + logerror("%s: unkregs_0 (%d) write to unknown param %02x\n", machine().describe_context().c_str(), which, data); + break; + + case 0x01: + m_unkregs_0_address[which] = (m_unkregs_0_address[which] & 0xff00) | data; + logerror("%s: unkregs_0 (%d) write lo address %02x (real address is now %08x)\n", machine().describe_context().c_str(), which, data, m_unkregs_0_address[which]*0x100); + break; + + case 0x02: + m_unkregs_0_address[which] = (m_unkregs_0_address[which] & 0x00ff) | (data<<8); + logerror("%s: unkregs_0 (%d) write hi address %02x (real address is now %08x)\n", machine().describe_context().c_str(), which, data, m_unkregs_0_address[which]*0x100); + break; + } } -READ8_MEMBER(radica_6502_state::radicasi_unkreg1_hi_r) +uint8_t radica_6502_state::handle_unkregs_0_r(int which, int offset) { - logerror("%s: radicasi_unkreg1_hi_r (unknown register 1 base upper)\n", machine().describe_context().c_str()); - return m_unkreg1_hi_data; + switch (offset) + { + case 0x00: + logerror("%s: unkregs_0 (%d) read from unknown param\n", machine().describe_context().c_str(), which); + return m_unkregs_0_unk[which]; + + case 0x01: + logerror("%s: unkregs_0 (%d) read lo address\n", machine().describe_context().c_str(), which); + return m_unkregs_0_address[which] & 0x00ff; + + case 0x02: + logerror("%s: unkregs_0 (%d) read hi address\n", machine().describe_context().c_str(), which); + return (m_unkregs_0_address[which]>>8) & 0x00ff; + } + + return 0x00; } -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg2_hi_w) +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_0_w) { - logerror("%s: radicasi_unkreg2_hi_w (unknown register 2 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg2_hi_data = data; + handle_unkregs_0_w(0,offset,data); } -READ8_MEMBER(radica_6502_state::radicasi_unkreg2_hi_r) +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_0_r) { - logerror("%s: radicasi_unkreg2_hi_r (unknown register 2 base upper)\n", machine().describe_context().c_str()); - return m_unkreg2_hi_data; + return handle_unkregs_0_r(0,offset); } -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg3_hi_w) +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_1_w) { - logerror("%s: radicasi_unkreg3_hi_w (unknown register 3 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg3_hi_data = data; + handle_unkregs_0_w(1,offset,data); } -READ8_MEMBER(radica_6502_state::radicasi_unkreg3_hi_r) +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_1_r) { - logerror("%s: radicasi_unkreg3_hi_r (unknown register 3 base upper)\n", machine().describe_context().c_str()); - return m_unkreg3_hi_data; + return handle_unkregs_0_r(1,offset); } -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg4_hi_w) +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_2_w) { - logerror("%s: radicasi_unkreg4_hi_w (unknown register 4 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg4_hi_data = data; + handle_unkregs_0_w(2,offset,data); } -READ8_MEMBER(radica_6502_state::radicasi_unkreg4_hi_r) +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_2_r) { - logerror("%s: radicasi_unkreg4_hi_r (unknown register 4 base upper)\n", machine().describe_context().c_str()); - return m_unkreg4_hi_data; + return handle_unkregs_0_r(2,offset); } -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg5_hi_w) +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_3_w) { - logerror("%s: radicasi_unkreg5_hi_w (unknown register 5 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg5_hi_data = data; + handle_unkregs_0_w(3,offset,data); } -READ8_MEMBER(radica_6502_state::radicasi_unkreg5_hi_r) +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_3_r) { - logerror("%s: radicasi_unkreg5_hi_r (unknown register 5 base upper)\n", machine().describe_context().c_str()); - return m_unkreg5_hi_data; + return handle_unkregs_0_r(3,offset); } -WRITE8_MEMBER(radica_6502_state::radicasi_unkreg6_hi_w) +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_4_w) { - logerror("%s: radicasi_unkreg6_hi_w (unknown register 6 base upper) %02x\n", machine().describe_context().c_str(), data); - m_unkreg6_hi_data = data; + handle_unkregs_0_w(4,offset,data); } -READ8_MEMBER(radica_6502_state::radicasi_unkreg6_hi_r) +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_4_r) { - logerror("%s: radicasi_unkreg6_hi_r (unknown register 6 base upper)\n", machine().describe_context().c_str()); - return m_unkreg6_hi_data; + return handle_unkregs_0_r(4,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_0_5_w) +{ + handle_unkregs_0_w(5,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_0_5_r) +{ + return handle_unkregs_0_r(5,offset); +} + +void radica_6502_state::handle_unkregs_1_w(int which, int offset, uint8_t data) +{ + switch (offset) + { + case 0x00: + m_unkregs_1_unk0[which] = data; + logerror("%s: unkregs_1 (%d) write to unknown param 0 %02x\n", machine().describe_context().c_str(), which, data); + break; + + case 0x01: + m_unkregs_1_unk1[which] = data; + logerror("%s: unkregs_1 (%d) write to unknown param 1 %02x\n", machine().describe_context().c_str(), which, data); + break; + + case 0x02: + m_unkregs_1_unk2[which] = data; + logerror("%s: unkregs_1 (%d) write to unknown param 2 %02x\n", machine().describe_context().c_str(), which, data); + break; + } +} + +uint8_t radica_6502_state::handle_unkregs_1_r(int which, int offset) +{ + switch (offset) + { + case 0x00: + logerror("%s: unkregs_1 (%d) read from unknown param 0\n", machine().describe_context().c_str(), which); + return m_unkregs_1_unk0[which]; + + case 0x01: + logerror("%s: unkregs_1 (%d) read from unknown param 1\n", machine().describe_context().c_str(), which); + return m_unkregs_1_unk1[which]; + + case 0x02: + logerror("%s: unkregs_1 (%d) read from unknown param 2\n", machine().describe_context().c_str(), which); + return m_unkregs_1_unk2[which]; + } + + return 0x00; +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_0_w) +{ + handle_unkregs_1_w(0,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_0_r) +{ + return handle_unkregs_1_r(0,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_1_w) +{ + handle_unkregs_1_w(1,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_1_r) +{ + return handle_unkregs_1_r(1,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_2_w) +{ + handle_unkregs_1_w(2,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_2_r) +{ + return handle_unkregs_1_r(2,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_3_w) +{ + handle_unkregs_1_w(3,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_3_r) +{ + return handle_unkregs_1_r(3,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_4_w) +{ + handle_unkregs_1_w(4,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_4_r) +{ + return handle_unkregs_1_r(4,offset); +} + +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_1_5_w) +{ + handle_unkregs_1_w(5,offset,data); +} + +READ8_MEMBER(radica_6502_state::radicasi_unkregs_1_5_r) +{ + return handle_unkregs_1_r(5,offset); +} + +// do something with the above.. +READ8_MEMBER(radica_6502_state::radicasi_unkregs_trigger_r) +{ + logerror("%s: unkregs read from trigger?\n", machine().describe_context().c_str()); + return m_unkregs_trigger; } +WRITE8_MEMBER(radica_6502_state::radicasi_unkregs_trigger_w) +{ + logerror("%s: unkregs write to trigger? %02x\n", machine().describe_context().c_str(), data); + m_unkregs_trigger= data; + + for (int i = 0; i < 6; i++) + { + int bit = (data >> i)&1; + + if (bit) + handle_trigger(i); + } + + if (data & 0xc0) + logerror(" UNEXPECTED BITS SET"); +} + +void radica_6502_state::handle_trigger(int which) +{ + logerror("Triggering operation on channel (%d) with params %02x %06x %02x %02x %02x\n", which, m_unkregs_0_unk[which], m_unkregs_0_address[which] * 0x100, m_unkregs_1_unk0[which], m_unkregs_1_unk1[which], m_unkregs_1_unk2[which]); +} READ8_MEMBER(radica_6502_state::radicasi_50a8_r) @@ -430,6 +617,18 @@ READ8_MEMBER(radica_6502_state::radicasi_50a8_r) return 0x3f; } +WRITE8_MEMBER(radica_6502_state::radicasi_5027_w) +{ + logerror("%s: radicasi_5027_w %02x (video control?)\n", machine().describe_context().c_str(), data); + /* + c3 8bpp 16x16 1100 0011 + e3 4bpp 16x16 1110 0011 + 83 8bpp 8x8 1000 0011 + 02 8bpp 8x8 (phoenix) 0000 0010 + */ + m_5027_data = data; +} + static ADDRESS_MAP_START( radicasi_map, AS_PROGRAM, 8, radica_6502_state ) AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("ram") // ends up copying code to ram, but could be due to banking issues AM_RANGE(0x4800, 0x49ff) AM_RAM @@ -441,27 +640,33 @@ static ADDRESS_MAP_START( radicasi_map, AS_PROGRAM, 8, radica_6502_state ) AM_RANGE(0x5010, 0x5010) AM_READWRITE(radicasi_palbase_lo_r, radicasi_palbase_lo_w) // palettebase AM_RANGE(0x5011, 0x5011) AM_READWRITE(radicasi_palbase_hi_r, radicasi_palbase_hi_w) // palettebase + AM_RANGE(0x5027, 0x5027) AM_WRITE(radicasi_5027_w) + AM_RANGE(0x5029, 0x5029) AM_READWRITE(radicasi_tile_gfxbase_lo_r, radicasi_tile_gfxbase_lo_w) // tilebase AM_RANGE(0x502a, 0x502a) AM_READWRITE(radicasi_tile_gfxbase_hi_r, radicasi_tile_gfxbase_hi_w) // tilebase AM_RANGE(0x502b, 0x502b) AM_READWRITE(radicasi_sprite_gfxbase_lo_r, radicasi_sprite_gfxbase_lo_w) // tilebase (spr?) AM_RANGE(0x502c, 0x502c) AM_READWRITE(radicasi_sprite_gfxbase_hi_r, radicasi_sprite_gfxbase_hi_w) // tilebase (spr?) - AM_RANGE(0x5041, 0x5041) AM_READ_PORT("IN0") // AM_READ(radicasi_5041_r) + AM_RANGE(0x5041, 0x5041) AM_READ_PORT("IN0") // These might be sound / DMA channels? - AM_RANGE(0x5082, 0x5082) AM_READWRITE(radicasi_unkreg1_hi_r, radicasi_unkreg1_hi_w) // set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x5080, 0x5082) AM_READWRITE(radicasi_unkregs_0_0_r, radicasi_unkregs_0_0_w) // 5082 set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x5083, 0x5085) AM_READWRITE(radicasi_unkregs_0_1_r, radicasi_unkregs_0_1_w) // 5085 set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x5086, 0x5088) AM_READWRITE(radicasi_unkregs_0_2_r, radicasi_unkregs_0_2_w) // 5088 set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x5089, 0x508b) AM_READWRITE(radicasi_unkregs_0_3_r, radicasi_unkregs_0_3_w) // 508b set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x508c, 0x508e) AM_READWRITE(radicasi_unkregs_0_4_r, radicasi_unkregs_0_4_w) // 508e set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x508f, 0x5091) AM_READWRITE(radicasi_unkregs_0_5_r, radicasi_unkregs_0_5_w) // 5091 set to 0x33, so probably another 'high' address bits reg + // these are set at the same time as the above, so probably additional params 0x5092 is used with 0x5080 etc. + AM_RANGE(0x5092, 0x5094) AM_READWRITE(radicasi_unkregs_1_0_r, radicasi_unkregs_1_0_w) + AM_RANGE(0x5095, 0x5097) AM_READWRITE(radicasi_unkregs_1_1_r, radicasi_unkregs_1_1_w) + AM_RANGE(0x5098, 0x509a) AM_READWRITE(radicasi_unkregs_1_2_r, radicasi_unkregs_1_2_w) + AM_RANGE(0x509b, 0x509d) AM_READWRITE(radicasi_unkregs_1_3_r, radicasi_unkregs_1_3_w) + AM_RANGE(0x509e, 0x50a0) AM_READWRITE(radicasi_unkregs_1_4_r, radicasi_unkregs_1_4_w) + AM_RANGE(0x50a1, 0x50a3) AM_READWRITE(radicasi_unkregs_1_5_r, radicasi_unkregs_1_5_w) - AM_RANGE(0x5085, 0x5085) AM_READWRITE(radicasi_unkreg2_hi_r, radicasi_unkreg2_hi_w) // set to 0x33, so probably another 'high' address bits reg - - AM_RANGE(0x5088, 0x5088) AM_READWRITE(radicasi_unkreg3_hi_r, radicasi_unkreg3_hi_w) // set to 0x33, so probably another 'high' address bits reg - - AM_RANGE(0x508b, 0x508b) AM_READWRITE(radicasi_unkreg4_hi_r, radicasi_unkreg4_hi_w) // set to 0x33, so probably another 'high' address bits reg - - AM_RANGE(0x508e, 0x508e) AM_READWRITE(radicasi_unkreg5_hi_r, radicasi_unkreg5_hi_w) // set to 0x33, so probably another 'high' address bits reg - - AM_RANGE(0x5091, 0x5091) AM_READWRITE(radicasi_unkreg6_hi_r, radicasi_unkreg6_hi_w) // set to 0x33, so probably another 'high' address bits reg + AM_RANGE(0x50a5, 0x50a5) AM_READWRITE(radicasi_unkregs_trigger_r, radicasi_unkregs_trigger_w) AM_RANGE(0x50a8, 0x50a8) AM_READ(radicasi_50a8_r) From c94f2a6f479cbc60ac05e0b42b39c9bd2b5e3cc1 Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Sat, 13 Jan 2018 12:54:02 -0800 Subject: [PATCH 3/3] New working software list additions ----------------------------------- ibm5150: Stellar 7 [Arcade Shadow] ibm5170: Blake Stone: Aliens of Gold (v2.1), Blake Stone: Aliens of Gold (v3.0), Simon the Sorcerer [Arcade Shadow] --- hash/ibm5150.xml | 23 ++++++++++++++++--- hash/ibm5170.xml | 58 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+), 3 deletions(-) diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml index 3ea8d94ecea..8df6113fe54 100644 --- a/hash/ibm5150.xml +++ b/hash/ibm5150.xml @@ -9139,17 +9139,17 @@ has been replaced with an all-zero block. --> - Speedball II - Brutal Deluxe + Speedball 2 - Brutal Deluxe 1990 Imageworks - + - + @@ -9208,6 +9208,23 @@ has been replaced with an all-zero block. --> + + Stellar 7 + 1990 + Dynamix + + + + + + + + + + + + + Strike Force diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml index fd8f18a41b1..7c140fb0704 100644 --- a/hash/ibm5170.xml +++ b/hash/ibm5170.xml @@ -7142,6 +7142,42 @@ + + Blake Stone: Aliens of Gold (v3.0) + 1994 + Apogee Software + + + + + + + + + + + + + + + + Blake Stone: Aliens of Gold (v2.1) + 1994 + Apogee Software + + + + + + + + + + + + + + Body Blows 1993 @@ -9473,6 +9509,28 @@ + + Simon the Sorcerer + 1993 + Infocom + + + + + + + + + + + + + + + + + + Space Quest V: The Next Mutation (3.5", v1.04) 1993