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https://github.com/holub/mame
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alphatro: Correct various timings; differentiate PAL and NTSC versions
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AJR
parent
91325200b0
commit
591012d891
@ -47,14 +47,13 @@
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#include "softlist.h"
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#include "speaker.h"
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#define MAIN_CLOCK XTAL(4'000'000)
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class alphatro_state : public driver_device
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{
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public:
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alphatro_state(const machine_config &mconfig, device_type type, const char *tag)
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alphatro_state(const machine_config &mconfig, device_type type, const char *tag, bool is_ntsc)
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: driver_device(mconfig, type, tag)
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, m_is_ntsc(is_ntsc)
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, m_ram(*this, RAM_TAG)
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, m_p_videoram(*this, "videoram")
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, m_screen(*this, "screen")
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@ -93,13 +92,13 @@ private:
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DECLARE_WRITE8_MEMBER(rama000_w);
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DECLARE_READ8_MEMBER (rame000_r);
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DECLARE_WRITE8_MEMBER(rame000_w);
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DECLARE_READ8_MEMBER(port10_r);
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DECLARE_WRITE8_MEMBER(port10_w);
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DECLARE_WRITE8_MEMBER(port20_w);
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DECLARE_READ8_MEMBER(port30_r);
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DECLARE_WRITE8_MEMBER(port30_w);
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DECLARE_READ8_MEMBER(portf0_r);
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DECLARE_WRITE8_MEMBER(portf0_w);
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uint8_t port10_r();
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void port10_w(uint8_t data);
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void port20_w(uint8_t data);
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uint8_t port30_r();
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void port30_w(uint8_t data);
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uint8_t portf0_r();
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void portf0_w(uint8_t data);
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DECLARE_WRITE_LINE_MEMBER(txdata_callback);
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DECLARE_WRITE_LINE_MEMBER(hrq_w);
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DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
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@ -118,6 +117,7 @@ private:
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void monbank_map(address_map &map);
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void rombank_map(address_map &map);
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const bool m_is_ntsc;
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uint8_t *m_ram_ptr;
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required_device<ram_device> m_ram;
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required_shared_ptr<u8> m_p_videoram;
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@ -146,6 +146,22 @@ private:
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required_device<generic_slot_device> m_cart;
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};
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class alphatro_pal_state : public alphatro_state
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{
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public:
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alphatro_pal_state(const machine_config &mconfig, device_type type, const char *tag)
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: alphatro_state(mconfig, type, tag, false)
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{ }
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};
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class alphatro_ntsc_state : public alphatro_state
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{
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public:
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alphatro_ntsc_state(const machine_config &mconfig, device_type type, const char *tag)
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: alphatro_state(mconfig, type, tag, true)
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{ }
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};
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void alphatro_state::update_banking()
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{
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if (m_port_10 & 0x80) // RAM at 0000?
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@ -213,7 +229,7 @@ WRITE8_MEMBER(alphatro_state::rama000_w) { m_ram_ptr[offset+0xa000] = data; }
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READ8_MEMBER (alphatro_state::rame000_r) { return m_ram_ptr[offset+0xe000]; }
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WRITE8_MEMBER(alphatro_state::rame000_w) { m_ram_ptr[offset+0xe000] = data; }
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READ8_MEMBER( alphatro_state::port10_r )
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uint8_t alphatro_state::port10_r()
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{
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// Bit 0 -> 1 = FDC is installed, 0 = not
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// Bit 1 -> 1 = Graphic Board is installed, 0 = not
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@ -222,7 +238,7 @@ READ8_MEMBER( alphatro_state::port10_r )
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// Bit 6 -> 1 = NTSC, 0 = PAL
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// Bit 7 -> 1 = vblank or hblank, 0 = active display area
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u8 retval = 0x40;
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u8 retval = m_is_ntsc ? 0x40 : 0x00;
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// we'll get "FDC present" and "graphics expansion present" from the config switches
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retval |= (m_config->read() & 3);
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@ -235,7 +251,7 @@ READ8_MEMBER( alphatro_state::port10_r )
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return retval;
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}
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WRITE8_MEMBER( alphatro_state::port10_w )
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void alphatro_state::port10_w(uint8_t data)
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{
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// Bit 0 -> 0 = 40 cols; 1 = 80 cols
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// Bit 1 -> 0 = display enable, 1 = display inhibit
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@ -246,9 +262,17 @@ WRITE8_MEMBER( alphatro_state::port10_w )
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// Bit 6 -> 1 = select ROM pack at A000, 0 = RAM at A000
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// Bit 7 -> 0 = ROM enabled at 0, 1 = RAM enabled
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m_port_10 = data;
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if (BIT(data ^ m_port_10, 0))
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{
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if (BIT(data, 0))
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m_crtc->set_unscaled_clock(16_MHz_XTAL / 8);
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else if (m_is_ntsc || system_bios() == 3) // kludge for bios 2, which expects a NTSC clock even for ~50 Hz video
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m_crtc->set_unscaled_clock(14.318181_MHz_XTAL / 16);
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else
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m_crtc->set_unscaled_clock(17.73447_MHz_XTAL / 16);
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}
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data &= 0xfe;
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m_port_10 = data;
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m_beep->set_state(BIT(data, 4));
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@ -260,7 +284,7 @@ WRITE8_MEMBER( alphatro_state::port10_w )
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update_banking();
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}
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WRITE8_MEMBER( alphatro_state::port20_w )
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void alphatro_state::port20_w(uint8_t data)
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{
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// Bit 0 -> 0 = CRTC reset release, 1 = CRTC reset enable
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// Bit 1 -> 0 = Centronics reset release, 1 = Centronics reset enable
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@ -276,7 +300,7 @@ WRITE8_MEMBER( alphatro_state::port20_w )
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update_banking();
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}
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READ8_MEMBER( alphatro_state::port30_r )
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uint8_t alphatro_state::port30_r()
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{
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// Bit 0 -> SIOC
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// Bit 1 -> 1 = vsync, 0 = not
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@ -290,17 +314,17 @@ READ8_MEMBER( alphatro_state::port30_r )
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return retval;
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}
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WRITE8_MEMBER( alphatro_state::port30_w )
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void alphatro_state::port30_w(uint8_t data)
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{
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m_port_30 = data;
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}
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READ8_MEMBER( alphatro_state::portf0_r )
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uint8_t alphatro_state::portf0_r()
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{
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return m_fdc_irq << 6;
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}
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WRITE8_MEMBER( alphatro_state::portf0_w)
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void alphatro_state::portf0_w(uint8_t data)
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{
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if ((data & 0x1) && !(m_port_f0))
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{
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@ -588,6 +612,8 @@ GFXDECODE_END
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void alphatro_state::machine_start()
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{
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m_port_10 = 0x01;
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save_item(NAME(m_port_10));
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save_item(NAME(m_port_20));
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save_item(NAME(m_cass_data));
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@ -598,7 +624,8 @@ void alphatro_state::machine_start()
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void alphatro_state::machine_reset()
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{
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m_ram_ptr = m_ram->pointer();
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m_port_10 = m_port_20 = 0;
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port10_w(0);
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m_port_20 = 0;
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update_banking();
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m_cass_data[0] = m_cass_data[1] = m_cass_data[2] = m_cass_data[3] = 0;
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@ -702,24 +729,25 @@ static void alphatro_floppies(device_slot_interface &device)
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MACHINE_CONFIG_START(alphatro_state::alphatro)
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/* basic machine hardware */
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MCFG_DEVICE_ADD("maincpu",Z80,MAIN_CLOCK)
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MCFG_DEVICE_ADD("maincpu", Z80, 16_MHz_XTAL / 4)
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MCFG_DEVICE_PROGRAM_MAP(alphatro_map)
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MCFG_DEVICE_IO_MAP(alphatro_io)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not correct
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MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update)
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MCFG_SCREEN_SIZE(32*8, 32*8)
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MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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if (m_is_ntsc)
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screen.set_raw(16_MHz_XTAL, 1016, 0, 640, 271, 0, 216);
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else
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screen.set_raw(16_MHz_XTAL, 1016, 0, 640, 314, 0, 240);
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screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update));
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MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_alphatro)
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MCFG_PALETTE_ADD("palette", 9) // 8 colours + amber
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MCFG_PALETTE_INIT_OWNER(alphatro_state, alphatro)
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/* sound hardware */
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SPEAKER(config, "mono").front_center();
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BEEP(config, "beeper", 950).add_route(ALL_OUTPUTS, "mono", 1.00); /* piezo-device needs to be measured */
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BEEP(config, "beeper", 16_MHz_XTAL / 4 / 13 / 128).add_route(ALL_OUTPUTS, "mono", 1.00); // nominally 2.4 kHz
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WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
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/* Devices */
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@ -730,7 +758,7 @@ MACHINE_CONFIG_START(alphatro_state::alphatro)
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MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatro_floppies, "525dd", alphatro_state::floppy_formats)
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MCFG_SOFTWARE_LIST_ADD("flop_list", "alphatro_flop")
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I8257(config, m_dmac, MAIN_CLOCK);
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I8257(config, m_dmac, 16_MHz_XTAL / 4);
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m_dmac->out_hrq_cb().set(FUNC(alphatro_state::hrq_w));
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m_dmac->in_memr_cb().set(FUNC(alphatro_state::ram0000_r));
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m_dmac->out_memw_cb().set(FUNC(alphatro_state::ram0000_w));
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@ -738,16 +766,16 @@ MACHINE_CONFIG_START(alphatro_state::alphatro)
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m_dmac->out_iow_cb<2>().set("fdc", FUNC(upd765a_device::mdma_w));
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m_dmac->out_tc_cb().set("fdc", FUNC(upd765a_device::tc_line_w));
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MC6845(config, m_crtc, XTAL(12'288'000) / 8); // clk unknown
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HD6845(config, m_crtc, 16_MHz_XTAL / 8);
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m_crtc->set_screen(m_screen);
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m_crtc->set_show_border_area(false);
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m_crtc->set_char_width(8);
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m_crtc->set_update_row_callback(FUNC(alphatro_state::crtc_update_row), this);
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I8251(config, m_usart, 0);
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I8251(config, m_usart, 16_MHz_XTAL / 4);
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m_usart->txd_handler().set(FUNC(alphatro_state::txdata_callback));
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clock_device &usart_clock(CLOCK(config, "usart_clock", 19218)); // 19218 to load a real tape, 19222 to load a tape made by this driver
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clock_device &usart_clock(CLOCK(config, "usart_clock", /*16_MHz_XTAL / 4 / 13 / 16*/ 19218)); // 19218 to load a real tape, 19222 to load a tape made by this driver
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usart_clock.signal_handler().set(m_usart, FUNC(i8251_device::write_txc));
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usart_clock.signal_handler().append(m_usart, FUNC(i8251_device::write_rxc));
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@ -806,4 +834,7 @@ ROM_START( alphatro )
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ROMX_LOAD( "b40r_ic1067.bin", 0x0000, 0x1000, CRC(543e3ee8) SHA1(3e6c6f8c85d3a5d0735edfec52709c5670ff1646), ROM_BIOS(2) )
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ROM_END
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COMP( 1983, alphatro, 0, 0, alphatro, alphatro, alphatro_state, empty_init, "Triumph-Adler", "Alphatronic PC", MACHINE_SUPPORTS_SAVE )
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#define rom_alphatron rom_alphatro
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COMP( 1983, alphatro, 0, 0, alphatro, alphatro, alphatro_pal_state, empty_init, "Triumph-Adler", "Alphatronic PC (PAL)", MACHINE_SUPPORTS_SAVE )
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COMP( 1983, alphatron, alphatro, 0, alphatro, alphatro, alphatro_ntsc_state, empty_init, "Triumph-Adler", "Alphatronic PC (NTSC)", MACHINE_SUPPORTS_SAVE )
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@ -1115,6 +1115,7 @@ alphatp30
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@source:alphatro.cpp
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alphatro //
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alphatron //
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@source:altair.cpp
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al8800bt //
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