pc9801.cpp: proper support for MEMSW device [Angelo Salese]

This commit is contained in:
angelosa 2019-08-14 17:31:38 +02:00
parent 696e7bd942
commit 597c4e2f8e
7 changed files with 237 additions and 14 deletions

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@ -27815,6 +27815,7 @@ only have some part of Windows file and a Video driver(CLGD?).
<publisher>ナツメ (Natsume)</publisher>
<info name="alt_title" value="魔浄理子 淫靡界 インビゾーン" />
<info name="release" value="198907xx" />
<info name="usage" value="Set MEMSW4 to $08 otherwise sound fails to detect during boot" />
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Disk A"/>
<dataarea name="flop" size="1265664">

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@ -2752,6 +2752,8 @@ files {
MAME_DIR .. "src/mame/machine/pc9801_kbd.h",
MAME_DIR .. "src/mame/machine/pc9801_cd.cpp",
MAME_DIR .. "src/mame/machine/pc9801_cd.h",
MAME_DIR .. "src/mame/machine/pc9801_memsw.cpp",
MAME_DIR .. "src/mame/machine/pc9801_memsw.h",
MAME_DIR .. "src/mame/drivers/tk80bs.cpp",
}

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@ -2131,18 +2131,6 @@ MACHINE_START_MEMBER(pc9801_state,pc9821ap2)
MACHINE_RESET_MEMBER(pc9801_state,pc9801_common)
{
memset(m_tvram.get(), 0, sizeof(uint16_t) * 0x2000);
/* this looks like to be some kind of backup ram, system will boot with green colors otherwise */
{
int i;
static const uint8_t default_memsw_data[0x10] =
{
0xe1, 0x48, 0xe1, 0x05, 0xe1, 0x04, 0xe1, 0x00, 0xe1, 0x01, 0xe1, 0x00, 0xe1, 0x00, 0xe1, 0x6e
// 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff
};
for(i=0;i<0x10;i++)
m_tvram[(0x3fe0>>1)+i] = default_memsw_data[i];
}
m_beeper->set_state(0);
@ -2382,6 +2370,8 @@ void pc9801_state::pc9801_common(machine_config &config)
I8251(config, m_sio, 0);
PC9801_MEMSW(config, m_memsw, 0);
UPD765A(config, m_fdc_2hd, 8'000'000, true, true);
m_fdc_2hd->intrq_wr_callback().set(m_pic2, FUNC(pic8259_device::ir3_w));
m_fdc_2hd->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq2_w)).invert();

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@ -22,6 +22,7 @@
#include "machine/ram.h"
#include "machine/timer.h"
#include "machine/upd1990a.h"
#include "machine/pc9801_memsw.h"
#include "machine/upd765.h"
#include "bus/scsi/pc9801_sasi.h"
@ -90,6 +91,7 @@ public:
m_fdc_2hd(*this, "upd765_2hd"),
m_fdc_2dd(*this, "upd765_2dd"),
m_rtc(*this, UPD1990A_TAG),
m_memsw(*this, "memsw"),
m_keyb(*this, "keyb"),
m_sio(*this, UPD8251_TAG),
m_hgdc1(*this, "upd7220_chr"),
@ -140,6 +142,7 @@ private:
required_device<upd765a_device> m_fdc_2hd;
optional_device<upd765a_device> m_fdc_2dd;
required_device<upd1990a_device> m_rtc;
required_device<pc9801_memsw_device> m_memsw;
required_device<pc9801_kbd_device> m_keyb;
required_device<i8251_device> m_sio;
required_device<upd7220_device> m_hgdc1;

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@ -0,0 +1,166 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
PC-9801 MEMSW interface
A CMOS-like interface that maps in the TVRAM area
Reference URL:
http://ohta.music.coocan.jp/packen/board/memsw.htm
Running the MON command under BASIC allows the user to change these
settings.
ssw -> for displaying current settings on screen;
ssw# -> to change the given #
List of settings, parenthesis for default if not zero
SW1 $A3FE2
xx-- ---- stop bit length (01)
--x- ---- parity specification
---x ---- parity check
---- xx-- data bit length (10)
---- --x- communication method
---- ---x X parameter
SW2 $A3FE6
x--- ---- S parameter
-x-- ---- line feed code when sending
--x- ---- line feed code when receiving
---x ---- Japanese shift code
---- xxxx transfer speed (0101)
SW3 $A3FEA
x--- ---- Operation when DEL code is received (input / output mode)
x--- ---- Operation when DEL code is received (terminal mode)
-x-- ---- Text screen color
--x- ---- Maximum operating frequency for V30 coprocessor
---x ---- With or without V30 coprocessor
---- x--- Coprocessor for 80286,386
---- -xxx Conventional memory size (100)
SW4 $A3FEE
x--- ---- Expansion ROM CE000-CFFFF
-x-- ---- Expansion ROM CA000-CBFFF
--x- ---- Expansion ROM D4000-D5FFF
---x ---- Expansion ROM D0000-D3FFF
---- x--- Expansion ROM CC000-CFFFF
---- -x-- Expansion ROM C8000-C9FFF
---- --xx (Unused)
SW5 $A3FF2
xxxx ---- Select boot device (0000)
1100 ---- SCSI HDD #1
1011 ---- HDD #2
1010 ---- HDD #1
1000 ---- ROM BASIC
0110 ---- MO disk
0100 ---- 1MB FDD
0010 ---- 640K FDD
0000 ---- standard
???? ---- ROM BASIC
---- x--- Screen Hard copy color
---- -x-- Use HDD user ID
---- --x- Prioritize HDD with device name
---- ---x PC-PR201 series used (1)
SW5 $A3FF6
--x- ---- Use modem-NCU control function
---x ---- Extended screen hard copy function
---- x--- Use monitor mode (Use extended monitor mode)
xx-- -xxx (Unused)
TODO:
- Is the mapping truly aligned to 2 bytes? Looks more like 4, needs real
HW verification.
***************************************************************************/
#include "emu.h"
#include "pc9801_memsw.h"
#include "coreutil.h"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
DEFINE_DEVICE_TYPE(PC9801_MEMSW, pc9801_memsw_device, "pc9801_memsw", "NEC PC-9801 Memory Switch device")
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// pc9801_memsw_device - constructor
//-------------------------------------------------
pc9801_memsw_device::pc9801_memsw_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, PC9801_MEMSW, tag, owner, clock),
device_nvram_interface(mconfig, *this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void pc9801_memsw_device::device_start()
{
save_pointer(NAME(m_bram), m_bram_size);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void pc9801_memsw_device::device_reset()
{
}
void pc9801_memsw_device::nvram_default()
{
system_time systime;
const uint8_t default_memsw_data[0x10] =
{
0xe1, 0x48, 0xe1, 0x05,
0xe1, 0x04, 0xe1, 0x00,
0xe1, 0x01, 0xe1, 0x00,
0xe1, 0x00, 0xe1, 0x00
};
memcpy(m_bram, default_memsw_data, m_bram_size);
machine().current_datetime(systime);
m_bram[0xf] = dec_2_bcd(systime.local_time.year - 2000) & 0xff;
}
void pc9801_memsw_device::nvram_read(emu_file &file)
{
file.read(m_bram, m_bram_size);
}
void pc9801_memsw_device::nvram_write(emu_file &file)
{
file.write(m_bram, m_bram_size);
}
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
uint8_t pc9801_memsw_device::read(uint8_t offset)
{
return m_bram[offset];
}
void pc9801_memsw_device::write( uint8_t offset, uint8_t data )
{
m_bram[offset] = data;
}

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@ -0,0 +1,56 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
Template for skeleton device
***************************************************************************/
#ifndef MAME_MACHINE_PC9801_MEMSW_H
#define MAME_MACHINE_PC9801_MEMSW_H
#pragma once
#include "machine/nvram.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> pc9801_memsw_device
class pc9801_memsw_device : public device_t,
public device_nvram_interface
{
public:
// construction/destruction
pc9801_memsw_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
uint8_t read(uint8_t offset);
void write(uint8_t offset, uint8_t data);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void nvram_default() override;
virtual void nvram_read(emu_file &file) override;
virtual void nvram_write(emu_file &file) override;
private:
uint8_t m_bram[0x10];
const uint8_t m_bram_size = 0x10;
};
// device type definition
DECLARE_DEVICE_TYPE(PC9801_MEMSW, pc9801_memsw_device)
#endif // MAME_MACHINE_PC9801_MEMSW_H

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@ -448,15 +448,20 @@ READ16_MEMBER(pc9801_state::tvram_r)
if((offset & 0x1000) && (mem_mask == 0xff00))
return 0xffff;
res = m_tvram[offset];
if(offset < (0x3fe0>>1))
res = m_tvram[offset];
else
res = m_memsw->read(offset & 0xf);
return res;
}
WRITE16_MEMBER(pc9801_state::tvram_w)
{
if(offset < (0x3fe2>>1) || m_video_ff[MEMSW_REG])
if(offset < (0x3fe0>>1))
COMBINE_DATA(&m_tvram[offset]);
else if(m_video_ff[MEMSW_REG])
m_memsw->write(offset & 0x0f, data);
COMBINE_DATA(&m_video_ram_1[offset]); //TODO: check me
}