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othello.cpp: device_finder (nw)

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This commit is contained in:
Ivan Vangelista 2018-06-13 19:22:27 +02:00
parent cdad2b1fc1
commit 59aae07e13
1 changed files with 42 additions and 44 deletions
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86
src/mame/drivers/othello.cpp
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@ -25,7 +25,7 @@ Todo:
- hook up upd7751c sample player (it works correctly but there's main cpu side write(latch/command) missing)
- correct colors (based on the color DAC (24 resistors) on pcb
- cocktail mode
- map a bunch of unknown read/writes (related to above i think)
- map a bunch of unknown read/writes (related to above I think)
Notes:
@ -52,7 +52,7 @@ Limit for help/undo (matta):
#include "speaker.h"
#define TILE_WIDTH 6
constexpr uint8_t TILE_WIDTH = 6;
class othello_state : public driver_device
@ -62,13 +62,22 @@ public:
: driver_device(mconfig, type, tag),
m_videoram(*this, "videoram"),
m_maincpu(*this, "maincpu"),
m_ay1(*this, "ay1"),
m_ay2(*this, "ay2"),
m_ay(*this, "ay%u", 0U),
m_n7751(*this, "n7751"),
m_i8243(*this, "n7751_8243"),
m_palette(*this, "palette"),
m_soundlatch(*this, "soundlatch")
m_soundlatch(*this, "soundlatch"),
m_n7751_data(*this, "n7751data")
{
}
void othello(machine_config &config);
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
private:
/* memory pointers */
required_shared_ptr<uint8_t> m_videoram;
@ -79,19 +88,19 @@ public:
int m_ay_select;
int m_ack_data;
uint8_t m_n7751_command;
// uint32_t m_n7751_rom_address;
int m_sound_addr;
int m_n7751_busy;
/* devices */
required_device<cpu_device> m_maincpu;
required_device<ay8910_device> m_ay1;
required_device<ay8910_device> m_ay2;
mc6845_device *m_mc6845;
device_t *m_n7751;
required_device_array<ay8910_device, 2> m_ay;
required_device<n7751_device> m_n7751;
required_device<i8243_device> m_i8243;
required_device<palette_device> m_palette;
required_device<generic_latch_8_device> m_soundlatch;
required_region_ptr<uint8_t> m_n7751_data;
DECLARE_READ8_MEMBER(unk_87_r);
DECLARE_WRITE8_MEMBER(unk_8a_w);
DECLARE_WRITE8_MEMBER(unk_8c_w);
@ -108,11 +117,10 @@ public:
DECLARE_READ8_MEMBER(n7751_command_r);
DECLARE_WRITE8_MEMBER(n7751_p2_w);
DECLARE_WRITE8_MEMBER(n7751_rom_control_w);
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_PALETTE_INIT(othello);
MC6845_UPDATE_ROW(crtc_update_row);
void othello(machine_config &config);
void audio_map(address_map &map);
void audio_portmap(address_map &map);
void main_map(address_map &map);
@ -123,18 +131,15 @@ public:
MC6845_UPDATE_ROW( othello_state::crtc_update_row )
{
const rgb_t *palette = m_palette->palette()->entry_list_raw();
int cx, x;
uint32_t data_address;
uint32_t tmp;
const uint8_t *gfx = memregion("gfx")->base();
for(cx = 0; cx < x_count; ++cx)
for(int cx = 0; cx < x_count; ++cx)
{
data_address = ((m_videoram[ma + cx] + m_tile_bank) << 4) | ra;
tmp = gfx[data_address] | (gfx[data_address + 0x2000] << 8) | (gfx[data_address + 0x4000] << 16);
uint32_t data_address = ((m_videoram[ma + cx] + m_tile_bank) << 4) | ra;
uint32_t tmp = gfx[data_address] | (gfx[data_address + 0x2000] << 8) | (gfx[data_address + 0x4000] << 16);
for(x = 0; x < TILE_WIDTH; ++x)
for(int x = 0; x < TILE_WIDTH; ++x)
{
bitmap.pix32(y, (cx * TILE_WIDTH + x) ^ 1) = palette[tmp & 0x0f];
tmp >>= 4;
@ -144,8 +149,7 @@ MC6845_UPDATE_ROW( othello_state::crtc_update_row )
PALETTE_INIT_MEMBER(othello_state, othello)
{
int i;
for (i = 0; i < palette.entries(); i++)
for (int i = 0; i < palette.entries(); i++)
{
palette.set_pen_color(i, rgb_t(0xff, 0x00, 0xff));
}
@ -164,7 +168,7 @@ void othello_state::main_map(address_map &map)
{
map(0x0000, 0x1fff).rom();
map(0x8000, 0x97ff).noprw(); /* not populated */
map(0x9800, 0x9fff).ram().share("videoram");
map(0x9800, 0x9fff).ram().share(m_videoram);
map(0xf000, 0xffff).ram();
}
@ -249,14 +253,14 @@ WRITE8_MEMBER(othello_state::ack_w)
WRITE8_MEMBER(othello_state::ay_address_w)
{
if (m_ay_select & 1) m_ay1->address_w(space, 0, data);
if (m_ay_select & 2) m_ay2->address_w(space, 0, data);
if (m_ay_select & 1) m_ay[0]->address_w(space, 0, data);
if (m_ay_select & 2) m_ay[1]->address_w(space, 0, data);
}
WRITE8_MEMBER(othello_state::ay_data_w)
{
if (m_ay_select & 1) m_ay1->data_w(space, 0, data);
if (m_ay_select & 2) m_ay2->data_w(space, 0, data);
if (m_ay_select & 1) m_ay[0]->data_w(space, 0, data);
if (m_ay_select & 2) m_ay[1]->data_w(space, 0, data);
}
void othello_state::audio_map(address_map &map)
@ -309,7 +313,7 @@ WRITE8_MEMBER(othello_state::n7751_rom_control_w)
READ8_MEMBER(othello_state::n7751_rom_r)
{
return memregion("n7751data")->base()[m_sound_addr];
return m_n7751_data[m_sound_addr];
}
READ8_MEMBER(othello_state::n7751_command_r)
@ -319,10 +323,8 @@ READ8_MEMBER(othello_state::n7751_command_r)
WRITE8_MEMBER(othello_state::n7751_p2_w)
{
i8243_device *device = machine().device<i8243_device>("n7751_8243");
/* write to P2; low 4 bits go to 8243 */
device->p2_w(space, offset, data & 0x0f);
m_i8243->p2_w(space, offset, data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
@ -377,9 +379,6 @@ INPUT_PORTS_END
void othello_state::machine_start()
{
m_mc6845 = machine().device<mc6845_device>("crtc");
m_n7751 = machine().device("n7751");
save_item(NAME(m_tile_bank));
save_item(NAME(m_ay_select));
save_item(NAME(m_ack_data));
@ -401,25 +400,24 @@ void othello_state::machine_reset()
MACHINE_CONFIG_START(othello_state::othello)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu",Z80,XTAL(8'000'000)/2)
MCFG_DEVICE_ADD(m_maincpu, Z80, XTAL(8'000'000)/2)
MCFG_DEVICE_PROGRAM_MAP(main_map)
MCFG_DEVICE_IO_MAP(main_portmap)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", othello_state, irq0_line_hold)
MCFG_DEVICE_ADD("audiocpu",Z80,XTAL(3'579'545))
MCFG_DEVICE_ADD("audiocpu", Z80, XTAL(3'579'545))
MCFG_DEVICE_PROGRAM_MAP(audio_map)
MCFG_DEVICE_IO_MAP(audio_portmap)
MCFG_DEVICE_ADD("n7751", N7751, XTAL(6'000'000))
MCFG_DEVICE_ADD(m_n7751, N7751, XTAL(6'000'000))
MCFG_MCS48_PORT_T1_IN_CB(GND) // labelled as "TEST", connected to ground
MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, othello_state, n7751_command_r))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, othello_state, n7751_rom_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, othello_state, n7751_p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE("n7751_8243", i8243_device, prog_w))
MCFG_I8243_ADD("n7751_8243", NOOP, WRITE8(*this, othello_state,n7751_rom_control_w))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w))
MCFG_I8243_ADD(m_i8243, NOOP, WRITE8(*this, othello_state, n7751_rom_control_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -429,7 +427,7 @@ MACHINE_CONFIG_START(othello_state::othello)
MCFG_SCREEN_VISIBLE_AREA(0*8, 64*6-1, 0*8, 64*8-1)
MCFG_SCREEN_UPDATE_DEVICE("crtc", h46505_device, screen_update)
MCFG_PALETTE_ADD("palette", 0x10)
MCFG_PALETTE_ADD(m_palette, 0x10)
MCFG_PALETTE_INIT_OWNER(othello_state, othello)
MCFG_MC6845_ADD("crtc", H46505, "screen", 1000000 /* ? MHz */) /* H46505 @ CPU clock */
@ -440,12 +438,12 @@ MACHINE_CONFIG_START(othello_state::othello)
/* sound hardware */
SPEAKER(config, "speaker").front_center();
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_8_ADD(m_soundlatch)
MCFG_DEVICE_ADD("ay1", AY8910, 2000000)
MCFG_DEVICE_ADD(m_ay[0], AY8910, 2000000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.15)
MCFG_DEVICE_ADD("ay2", AY8910, 2000000)
MCFG_DEVICE_ADD(m_ay[1], AY8910, 2000000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.15)
MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.3) // unknown DAC