Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-23 08:49:55 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

deco_mlc: had to make a copy of the memmap to fix fatalerror

Browse Source
This commit is contained in:
hap 2016-06-20 18:02:05 +02:00
parent e925c1a71c
commit 59c9d3d581
2 changed files with 26 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/mame/drivers/coolridr.cpp
View File

@ -3005,7 +3005,7 @@ WRITE32_MEMBER(coolridr_state::sysh1_sound_dma_w)
static ADDRESS_MAP_START( coolridr_submap, AS_PROGRAM, 32, coolridr_state )
AM_RANGE(0x00000000, 0x0001ffff) AM_ROM AM_SHARE("share2") // note: SH7032 only supports 64KB
AM_RANGE(0x00000000, 0x0001ffff) AM_ROM // note: SH7032 only supports 64KB
AM_RANGE(0x01000000, 0x0100ffff) AM_RAM //communication RAM
@ -3031,9 +3031,6 @@ static ADDRESS_MAP_START( coolridr_submap, AS_PROGRAM, 32, coolridr_state )
AM_RANGE(0x0610001c, 0x0610001f) AM_READWRITE8(analog_mux_r,analog_mux_w,0x000000ff) //AM_WRITENOP
AM_RANGE(0x06200000, 0x06200fff) AM_RAM //network related?
AM_RANGE(0x07ffe000, 0x07ffffff) AM_RAM // On-Chip RAM (actually mapped at 0x0fffe000-0x0fffffff)
AM_RANGE(0x20000000, 0x2001ffff) AM_ROM AM_SHARE("share2")
AM_RANGE(0x60000000, 0x600003ff) AM_WRITENOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( aquastge_submap, AS_PROGRAM, 32, coolridr_state )

28
src/mame/drivers/deco_mlc.cpp
View File

@ -288,7 +288,7 @@ WRITE16_MEMBER( deco_mlc_state::sh96_protection_region_0_146_w )
/******************************************************************************/
static ADDRESS_MAP_START( decomlc_map, AS_PROGRAM, 32, deco_mlc_state )
static ADDRESS_MAP_START( avengrgs_map, AS_PROGRAM, 32, deco_mlc_state )
AM_RANGE(0x0000000, 0x00fffff) AM_ROM AM_MIRROR(0xff000000)
AM_RANGE(0x0100000, 0x011ffff) AM_RAM AM_SHARE("mlc_ram") AM_MIRROR(0xff000000)
AM_RANGE(0x0200000, 0x0200003) AM_READ(mlc_200000_r) AM_MIRROR(0xff000000)
@ -308,7 +308,29 @@ static ADDRESS_MAP_START( decomlc_map, AS_PROGRAM, 32, deco_mlc_state )
AM_RANGE(0x044001c, 0x044001f) AM_READWRITE(mlc_44001c_r, mlc_44001c_w) AM_MIRROR(0xff000000)
AM_RANGE(0x0500000, 0x0500003) AM_WRITE(avengrs_eprom_w) AM_MIRROR(0xff000000)
AM_RANGE(0x0600000, 0x0600007) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff000000) AM_MIRROR(0xff000000)
AM_RANGE(0x070f000, 0x070ffff) AM_READWRITE16(sh96_protection_region_0_146_r, sh96_protection_region_0_146_w, 0xffff0000) AM_MIRROR(0xff000000)
ADDRESS_MAP_END
static ADDRESS_MAP_START( decomlc_map, AS_PROGRAM, 32, deco_mlc_state )
AM_RANGE(0x0000000, 0x00fffff) AM_ROM
AM_RANGE(0x0100000, 0x011ffff) AM_RAM AM_SHARE("mlc_ram")
AM_RANGE(0x0200000, 0x0200003) AM_READ(mlc_200000_r)
AM_RANGE(0x0200004, 0x0200007) AM_READ(mlc_200004_r)
AM_RANGE(0x0200070, 0x0200073) AM_READ(mlc_200070_r)
AM_RANGE(0x0200074, 0x0200077) AM_READ(mlc_scanline_r)
AM_RANGE(0x020007c, 0x020007f) AM_READ(mlc_20007c_r)
AM_RANGE(0x0200000, 0x020007f) AM_WRITE(mlc_irq_w) AM_SHARE("irq_ram")
AM_RANGE(0x0200080, 0x02000ff) AM_RAM AM_SHARE("mlc_clip_ram")
AM_RANGE(0x0204000, 0x0206fff) AM_READWRITE( mlc_spriteram_r, mlc_spriteram_w )
AM_RANGE(0x0280000, 0x029ffff) AM_RAM AM_SHARE("mlc_vram")
AM_RANGE(0x0300000, 0x0307fff) AM_RAM_WRITE(avengrs_palette_w) AM_SHARE("paletteram")
AM_RANGE(0x0400000, 0x0400003) AM_READ_PORT("INPUTS")
AM_RANGE(0x0440000, 0x0440003) AM_READ_PORT("INPUTS2")
AM_RANGE(0x0440004, 0x0440007) AM_READ_PORT("INPUTS3")
AM_RANGE(0x0440008, 0x044000b) AM_READ(mlc_440008_r)
AM_RANGE(0x044001c, 0x044001f) AM_READWRITE(mlc_44001c_r, mlc_44001c_w)
AM_RANGE(0x0500000, 0x0500003) AM_WRITE(avengrs_eprom_w)
AM_RANGE(0x0600000, 0x0600007) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff000000)
AM_RANGE(0x070f000, 0x070ffff) AM_READWRITE16(sh96_protection_region_0_146_r, sh96_protection_region_0_146_w, 0xffff0000)
ADDRESS_MAP_END
/******************************************************************************/
@ -482,7 +504,7 @@ static MACHINE_CONFIG_START( avengrgs, deco_mlc_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH2,42000000/2) /* 21 MHz clock confirmed on real board */
MCFG_CPU_PROGRAM_MAP(decomlc_map)
MCFG_CPU_PROGRAM_MAP(avengrgs_map)
MCFG_MACHINE_RESET_OVERRIDE(deco_mlc_state,mlc)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom") /* Actually 93c45 */