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https://github.com/holub/mame
synced 2025-04-22 00:11:58 +03:00
video/pc_vga_oak: convert $3de/$3df to address_space, allow Spitfire to boot
This commit is contained in:
angelosa
parent
f68a0c03e6
commit
5a10b11eed
@ -15,6 +15,7 @@ oak_oti111_vga_device::oak_oti111_vga_device(const machine_config &mconfig, cons
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, m_xga(*this, "xga")
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{
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m_main_if_space_config = address_space_config("io_regs", ENDIANNESS_LITTLE, 8, 4, 0, address_map_constructor(FUNC(oak_oti111_vga_device::io_3bx_3dx_map), this));
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m_oak_space_config = address_space_config("oak_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(oak_oti111_vga_device::oak_map), this));
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}
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void oak_oti111_vga_device::device_add_mconfig(machine_config &config)
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@ -25,11 +26,30 @@ void oak_oti111_vga_device::device_add_mconfig(machine_config &config)
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m_xga->set_type(xga_copro_device::TYPE::OTI111);
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}
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device_memory_interface::space_config_vector oak_oti111_vga_device::memory_space_config() const
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{
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auto r = svga_device::memory_space_config();
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r.emplace_back(std::make_pair(EXT_REG, &m_oak_space_config));
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return r;
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}
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void oak_oti111_vga_device::device_start()
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{
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svga_device::device_start();
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}
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void oak_oti111_vga_device::device_reset()
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{
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svga_device::device_reset();
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// Spitfire BIOS doesn't explicitly set IOAS at boot
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m_ioas = true;
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m_memory_size = 0x0a;
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}
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void oak_oti111_vga_device::io_3bx_3dx_map(address_map &map)
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{
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svga_device::io_3bx_3dx_map(map);
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// TODO: convert to address_space
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map(0x0e, 0xe).lrw8(
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map(0x0e, 0x0e).lrw8(
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NAME([this] (offs_t offset) {
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return m_oak_idx;
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}),
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@ -37,26 +57,151 @@ void oak_oti111_vga_device::io_3bx_3dx_map(address_map &map)
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m_oak_idx = data;
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})
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);
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map(0x0f, 0xf).lrw8(
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map(0x0f, 0x0f).lrw8(
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NAME([this] (offs_t offset) {
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return m_oak_idx <= 0x3a ? m_oak_regs[m_oak_idx] : space().unmap();
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return space(EXT_REG).read_byte(m_oak_idx);
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}),
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NAME([this] (offs_t offset, u8 data) {
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m_oak_regs[m_oak_idx] = data;
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switch(m_oak_idx)
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{
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case 0x21:
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svga.rgb8_en = BIT(data, 2);
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break;
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case 0x33:
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vga.crtc.no_wrap = BIT(data, 0);
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break;
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}
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space(EXT_REG).write_byte(m_oak_idx, data);
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})
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);
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}
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// TODO: convert to map
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void oak_oti111_vga_device::oak_map(address_map &map)
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{
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// status, set by BIOS for memory size
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map(0x02, 0x02).lrw8(
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NAME([this] (offs_t offset) {
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//LOG("OAK02: Status read\n");
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return m_memory_size;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOG("OAK02: Status %02x\n", data);
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m_memory_size = data & 0x0e;
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})
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);
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//map(0x03, 0x03) OTI Test 1
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//map(0x04, 0x04) OTI Test 2
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//map(0x06, 0x06) Video Clock Select
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// Hardware Configuration 1
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map(0x07, 0x07).lr8(
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NAME([] () {
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// TODO: MD[7:0] pins
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return 0x91;
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})
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);
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// Hardware Configuration 2
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map(0x08, 0x08).lr8(
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NAME([] () {
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// TODO: MD[15:8] pins
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return 0x81;
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})
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);
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// Hardware Configuration 3
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map(0x09, 0x09).lr8(
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NAME([] () {
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// TODO: MD[23:16] pins
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return 0x00;
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})
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);
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// i2c Control
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map(0x0c, 0x0c).lrw8(
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NAME([this] (offs_t offset) {
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// HACK: loopback DDC for now
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return (m_i2c_data & 0x3) << 4;
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}),
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NAME([this] (offs_t offset, u8 data) {
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m_i2c_data = data & 3;
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})
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);
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// DSW port
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map(0x0d, 0x0d).lr8(
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NAME([] () {
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// TODO: read_cb
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return 0xff;
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})
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);
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//map(0x0e, 0x0e) EEPROM Control
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//map(0x0f, 0x0f) Power Management Control
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//map(0x10, 0x10) Local Bus Control
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//map(0x11, 0x11) (backward-)Compatible Segment
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//map(0x13, 0x13) ISA Bus Control
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//map(0x14, 0x14) Video Memory Mapping
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//(bit 0 -> enable linear segment)
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//map(0x15, 0x15) Memory & MMIO Enable
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//(bit 7 -> enable MMIO)
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//map(0x19, 0x19) Configuration/DAC/Auxiliary Range
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//map(0x20, 0x20) Display FIFO Depth
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map(0x21, 0x21).lrw8(
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NAME([this] (offs_t offset) {
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return svga.rgb8_en << 2;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOG("OAK21: Mode Select %02x\n", data);
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svga.rgb8_en = BIT(data, 2);
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recompute_params();
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})
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);
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//map(0x22, 0x22) Feature Select
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//map(0x23, 0x23) Extended Read Segment
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//map(0x24, 0x24) Extended Write Segment
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//map(0x25, 0x25) Extended Common R/W Segment
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//map(0x26, 0x26) RASn Control
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//map(0x27, 0x27) CASn Control
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//map(0x28, 0x28) Refresh Control
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//map(0x29, 0x29) Hardware Window Aribtration
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//map(0x30, 0x30) OTI CRT Overflow
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//map(0x31, 0x31) CRT Start Address
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//map(0x32, 0x32) HSync/2 Start
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map(0x33, 0x33).lrw8(
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NAME([this] (offs_t offset) {
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return vga.crtc.no_wrap;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOG("OAK33: CRT Address Compatibility %02x\n", data);
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vga.crtc.no_wrap = BIT(data, 0);
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})
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);
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//map(0x38, 0x38) Pixel i/f
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//map(0x39, 0x3a) Extended Overscan Color
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//HC = Hardware Cursor
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//HW = Hardware Window
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//map(0x80, 0x81) HC & HW window H Position Start
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//map(0x82, 0x83) HC & HW window V Position Start
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//map(0x84, 0x84) HC Horizontal Preset/HW Width Low
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//map(0x85, 0x85) HW Width High
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//map(0x86, 0x86) HC Vertical Preset/HW Height Low
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//map(0x87, 0x87) HW Height High
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//map(0x88, 0x8a) HC Start Address
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//map(0x8c, 0x8f) HC Color 0
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//map(0x90, 0x93) HC Color 1
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//map(0x94, 0x94) HC Control
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//map(0x96, 0x97) HW Control
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//map(0x98, 0x9a) HW Mask Map Start Address
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//map(0x9b, 0x9b) Multimedia Mask Map Offset
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//map(0x9c, 0x9e) HW Start Address
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//map(0x9f, 0x9f) HW Address Offset
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//map(0xa0, 0xa1) Video Window Width
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//map(0xa2, 0xa3) Video Window Height
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// Scratch Pad
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map(0xf0, 0xf7).lrw8(
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NAME([this] (offs_t offset) {
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return m_scratchpad[offset];
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}),
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NAME([this] (offs_t offset, u8 data) {
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m_scratchpad[offset] = data;
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})
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);
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}
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// TODO: move this logic to standalone OAK XGA core
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u8 oak_oti111_vga_device::xga_read(offs_t offset)
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{
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switch(offset)
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@ -74,12 +219,6 @@ void oak_oti111_vga_device::xga_write(offs_t offset, u8 data)
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m_xga->xga_write(offset, data);
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}
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void oak_oti111_vga_device::device_start()
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{
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svga_device::device_start();
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std::fill(std::begin(m_oak_regs), std::end(m_oak_regs), 0);
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}
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void oak_oti111_vga_device::ramdac_mmio_map(address_map &map)
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{
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map.unmap_value_high();
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@ -18,17 +18,27 @@ public:
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void xga_write(offs_t offset, u8 data);
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void ramdac_mmio_map(address_map &map);
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void oak_map(address_map &map);
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protected:
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virtual void device_add_mconfig(machine_config &config) override;
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual uint16_t offset() override;
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virtual void io_3bx_3dx_map(address_map &map) override;
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private:
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u8 m_oak_regs[0x3b];
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u8 m_oak_idx;
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virtual space_config_vector memory_space_config() const override;
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address_space_config m_oak_space_config;
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required_device<xga_copro_device> m_xga;
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u8 m_oak_idx = 0;
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u8 m_memory_size = 0;
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u8 m_i2c_data = 0;
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u8 m_scratchpad[8]{};
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};
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DECLARE_DEVICE_TYPE(OTI111, oak_oti111_vga_device)
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