mirror of
https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
Miodrag Milanovic
commit
5a33ceba75
@ -30,6 +30,24 @@
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#include "sh3comn.h"
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#include "sh4tmu.h"
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#if SH4_USE_FASTRAM_OPTIMIZATION
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void sh34_base_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
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{
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if (m_fastram_select < ARRAY_LENGTH(m_fastram))
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{
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m_fastram[m_fastram_select].start = start;
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m_fastram[m_fastram_select].end = end;
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m_fastram[m_fastram_select].readonly = readonly;
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m_fastram[m_fastram_select].base = base;
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m_fastram_select++;
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}
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}
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#else
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void sh34_base_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
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{
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}
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#endif
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CPU_DISASSEMBLE( sh4 );
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CPU_DISASSEMBLE( sh4be );
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@ -79,7 +97,17 @@ sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type ty
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, c_md7(0)
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, c_md8(0)
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, c_clock(0)
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#if SH4_USE_FASTRAM_OPTIMIZATION
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, m_bigendian(endianness == ENDIANNESS_BIG)
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, m_byte_xor(m_bigendian ? BYTE8_XOR_BE(0) : BYTE8_XOR_LE(0))
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, m_word_xor(m_bigendian ? WORD2_XOR_BE(0) : WORD2_XOR_LE(0))
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, m_dword_xor(m_bigendian ? DWORD_XOR_BE(0) : DWORD_XOR_LE(0))
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, m_fastram_select(0)
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#endif
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{
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#if SH4_USE_FASTRAM_OPTIMIZATION
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memset(m_fastram, 0, sizeof(m_fastram));
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#endif
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}
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@ -233,7 +261,22 @@ inline UINT8 sh34_base_device::RB(offs_t A)
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if (A >= 0xe0000000)
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return m_program->read_byte(A);
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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return fastbase[_A ^ m_byte_xor];
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}
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return m_program->read_byte(_A);
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#else
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return m_program->read_byte(A & AM);
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#endif
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}
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inline UINT16 sh34_base_device::RW(offs_t A)
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@ -241,7 +284,22 @@ inline UINT16 sh34_base_device::RW(offs_t A)
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if (A >= 0xe0000000)
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return m_program->read_word(A);
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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return ((UINT16*)fastbase)[(_A ^ m_word_xor) >> 1];
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}
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return m_program->read_word(_A);
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#else
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return m_program->read_word(A & AM);
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#endif
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}
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inline UINT32 sh34_base_device::RL(offs_t A)
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@ -249,7 +307,22 @@ inline UINT32 sh34_base_device::RL(offs_t A)
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if (A >= 0xe0000000)
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return m_program->read_dword(A);
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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return ((UINT32*)fastbase)[(_A^m_dword_xor) >> 2];
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}
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return m_program->read_dword(_A);
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#else
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return m_program->read_dword(A & AM);
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#endif
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}
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inline void sh34_base_device::WB(offs_t A, UINT8 V)
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@ -259,8 +332,23 @@ inline void sh34_base_device::WB(offs_t A, UINT8 V)
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m_program->write_byte(A,V);
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return;
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}
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (m_fastram[ramnum].readonly == TRUE || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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fastbase[_A ^ m_byte_xor] = V;
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return;
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}
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m_program->write_byte(_A,V);
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#else
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m_program->write_byte(A & AM,V);
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#endif
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}
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inline void sh34_base_device::WW(offs_t A, UINT16 V)
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@ -270,8 +358,23 @@ inline void sh34_base_device::WW(offs_t A, UINT16 V)
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m_program->write_word(A,V);
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return;
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}
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (m_fastram[ramnum].readonly == TRUE || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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((UINT16*)fastbase)[(_A ^ m_word_xor) >> 1] = V;
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return;
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}
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m_program->write_word(_A,V);
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#else
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m_program->write_word(A & AM,V);
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#endif
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}
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inline void sh34_base_device::WL(offs_t A, UINT32 V)
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@ -281,8 +384,22 @@ inline void sh34_base_device::WL(offs_t A, UINT32 V)
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m_program->write_dword(A,V);
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return;
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}
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#if SH4_USE_FASTRAM_OPTIMIZATION
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const offs_t _A = A & AM;
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for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
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{
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if (m_fastram[ramnum].readonly == TRUE || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
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{
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continue;
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}
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void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
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((UINT32*)fastbase)[(_A ^ m_dword_xor) >> 2] = V;
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return;
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}
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m_program->write_dword(_A,V);
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#else
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m_program->write_dword(A & AM,V);
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#endif
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}
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/* code cycles t-bit
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@ -11,6 +11,9 @@
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#ifndef __SH4_H__
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#define __SH4_H__
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// doesn't actually seem to improve performance at all
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#define SH4_USE_FASTRAM_OPTIMIZATION 0
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#define SH4_MAX_FASTRAM 3
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#define SH4_INT_NONE -1
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enum
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@ -171,6 +174,10 @@ public:
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// construction/destruction
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sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness, address_map_constructor internal);
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//#if SH4_USE_FASTRAM_OPTIMIZATION
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void add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
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//#endif
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static void set_md0(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md0 = md0; }
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static void set_md1(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md1 = md0; }
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static void set_md2(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md2 = md0; }
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@ -683,6 +690,21 @@ protected:
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UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask) { return m_SH4_CHCR3; }
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UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask) { return m_SH4_DMAOR; }
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#if SH4_USE_FASTRAM_OPTIMIZATION
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/* fast RAM */
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bool m_bigendian;
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UINT32 m_byte_xor;
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UINT32 m_word_xor;
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UINT32 m_dword_xor;
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UINT32 m_fastram_select;
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struct
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{
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offs_t start; /* start of the RAM block */
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offs_t end; /* end of the RAM block */
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UINT8 readonly; /* TRUE if read-only */
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void * base; /* base in memory where the RAM lives */
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} m_fastram[SH4_MAX_FASTRAM];
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#endif
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};
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@ -188,15 +188,20 @@ public:
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m_serflash(*this, "game"),
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m_eeprom(*this, "eeprom"),
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m_ram(*this, "mainram"),
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m_rombase(*this, "rombase"),
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m_blitrate(*this, "BLITRATE"),
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m_eepromout(*this, "EEPROMOUT") { }
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m_eepromout(*this, "EEPROMOUT"),
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m_idleramoffs(0),
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m_idlepc(0)
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{ }
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required_device<cpu_device> m_maincpu;
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required_device<sh34_base_device> m_maincpu;
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required_device<epic12_device> m_blitter;
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required_device<serflash_device> m_serflash;
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required_device<rtc9701_device> m_eeprom;
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required_shared_ptr<UINT64> m_ram;
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required_shared_ptr<UINT64> m_rombase;
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DECLARE_READ8_MEMBER(cv1k_flash_io_r);
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DECLARE_WRITE8_MEMBER(cv1k_flash_io_w);
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@ -209,13 +214,7 @@ public:
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virtual void machine_reset();
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/* game specific */
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DECLARE_READ64_MEMBER(mushisam_speedup_r);
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DECLARE_READ64_MEMBER(ibara_speedup_r);
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DECLARE_READ64_MEMBER(espgal2_speedup_r);
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DECLARE_READ64_MEMBER(mushitam_speedup_r);
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DECLARE_READ64_MEMBER(pinkswts_speedup_r);
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DECLARE_READ64_MEMBER(deathsml_speedup_r);
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DECLARE_READ64_MEMBER(dpddfk_speedup_r);
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DECLARE_READ64_MEMBER(cv1k_speedup_r);
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DECLARE_DRIVER_INIT(mushisam);
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DECLARE_DRIVER_INIT(ibara);
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DECLARE_DRIVER_INIT(espgal2);
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@ -226,6 +225,10 @@ public:
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required_ioport m_blitrate;
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required_ioport m_eepromout;
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UINT32 m_idleramoffs;
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UINT32 m_idlepc;
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void install_cv1k_speedups(UINT32 idleramoff, UINT32 idlepc, bool is_typed);
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};
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@ -327,7 +330,7 @@ WRITE8_MEMBER( cv1k_state::serial_rtc_eeprom_w )
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static ADDRESS_MAP_START( cv1k_map, AS_PROGRAM, 64, cv1k_state )
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AM_RANGE(0x00000000, 0x003fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITENOP // mmmbanc writes here on startup for some reason..
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AM_RANGE(0x00000000, 0x003fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITENOP AM_SHARE("rombase") // mmmbanc writes here on startup for some reason..
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AM_RANGE(0x0c000000, 0x0c7fffff) AM_RAM AM_SHARE("mainram") AM_MIRROR(0x800000) // work RAM
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AM_RANGE(0x10000000, 0x10000007) AM_READWRITE8(cv1k_flash_io_r, cv1k_flash_io_w, U64(0xffffffffffffffff))
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AM_RANGE(0x10400000, 0x10400007) AM_DEVWRITE8("ymz770", ymz770_device, write, U64(0xffffffffffffffff))
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@ -337,7 +340,7 @@ static ADDRESS_MAP_START( cv1k_map, AS_PROGRAM, 64, cv1k_state )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( cv1k_d_map, AS_PROGRAM, 64, cv1k_state )
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AM_RANGE(0x00000000, 0x003fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITENOP // mmmbanc writes here on startup for some reason..
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||||
AM_RANGE(0x00000000, 0x003fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITENOP AM_SHARE("rombase") // mmmbanc writes here on startup for some reason..
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AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_SHARE("mainram") // work RAM
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AM_RANGE(0x10000000, 0x10000007) AM_READWRITE8(cv1k_flash_io_r, cv1k_flash_io_w, U64(0xffffffffffffffff))
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AM_RANGE(0x10400000, 0x10400007) AM_DEVWRITE8("ymz770", ymz770_device, write, U64(0xffffffffffffffff))
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@ -821,85 +824,60 @@ ROM_START( dfkbl )
|
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ROM_LOAD16_WORD_SWAP( "u24", 0x400000, 0x400000, CRC(31f9eb0a) SHA1(322158779e969bb321241065dd49c1167b91ff6c) )
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ROM_END
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|
||||
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READ64_MEMBER( cv1k_state::mushisam_speedup_r )
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READ64_MEMBER( cv1k_state::cv1k_speedup_r )
|
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{
|
||||
if (m_maincpu->pc()== 0xc04a2aa ) m_maincpu->spin_until_time( attotime::from_usec(10)); // mushisam / mushisamb
|
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// else printf("read %08x\n", m_maincpu->pc());
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return m_ram[0x00024d8/8];
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if (m_maincpu->pc()== m_idlepc ) m_maincpu->spin_until_time( attotime::from_usec(10));
|
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return m_ram[m_idleramoffs/8];
|
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}
|
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|
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void cv1k_state::install_cv1k_speedups(UINT32 idleramoff, UINT32 idlepc, bool is_typed)
|
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{
|
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m_idleramoffs = idleramoff;
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m_idlepc = idlepc;
|
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|
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m_maincpu->space(AS_PROGRAM).install_read_handler(0xc000000+m_idleramoffs, 0xc000000+m_idleramoffs+7, read64_delegate(FUNC(cv1k_state::cv1k_speedup_r),this));
|
||||
|
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m_maincpu->add_fastram(0x00000000, 0x003fffff, TRUE, m_rombase);
|
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|
||||
m_maincpu->add_fastram(0x0c000000, 0x0c000000+m_idleramoffs-1, FALSE, m_ram);
|
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m_maincpu->add_fastram(0x0c000000+m_idleramoffs+8, is_typed ? 0x0cffffff : 0x0c7fffff, FALSE, m_ram + ((m_idleramoffs+8)/8));
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,mushisam)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc0024d8, 0xc0024df, read64_delegate(FUNC(cv1k_state::mushisam_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::ibara_speedup_r )
|
||||
{
|
||||
if (m_maincpu->pc()== 0xc04a0aa ) m_maincpu->spin_until_time( attotime::from_usec(10)); // ibara / mushisama
|
||||
return m_ram[0x0022f0/8];
|
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install_cv1k_speedups(0x024d8, 0xc04a2aa, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,ibara)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc0022f0, 0xc0022f7, read64_delegate(FUNC(cv1k_state::ibara_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::espgal2_speedup_r )
|
||||
{
|
||||
if (m_maincpu->pc()== 0xc05177a ) m_maincpu->spin_until_time( attotime::from_usec(10)); // espgal2
|
||||
return m_ram[0x002310/8];
|
||||
install_cv1k_speedups(0x022f0, 0xc04a0aa, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,espgal2)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc002310, 0xc002317, read64_delegate(FUNC(cv1k_state::espgal2_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::mushitam_speedup_r )
|
||||
{
|
||||
if (m_maincpu->pc()== 0xc04a0da) m_maincpu->spin_until_time( attotime::from_usec(10)); // mushitam / mushitama
|
||||
return m_ram[0x0022f0/8];
|
||||
install_cv1k_speedups(0x02310, 0xc05177a, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,mushitam)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc0022f0, 0xc0022f7, read64_delegate(FUNC(cv1k_state::mushitam_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::pinkswts_speedup_r )
|
||||
{
|
||||
// pinkswts / pinkswtsa / pinkswtsb / pinkswtsx / futari15 / futari15a / futari10 / futaribl / futariblj / ibarablk / ibarablka / mmpork / mmmbanc
|
||||
if (m_maincpu->pc()== 0xc05176a ) m_maincpu->spin_until_time( attotime::from_usec(10));
|
||||
return m_ram[0x002310/8];
|
||||
install_cv1k_speedups(0x0022f0, 0xc04a0da, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,pinkswts)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc002310, 0xc002317, read64_delegate(FUNC(cv1k_state::pinkswts_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::deathsml_speedup_r )
|
||||
{
|
||||
if (m_maincpu->pc()== 0xc0519a2 ) m_maincpu->spin_until_time( attotime::from_usec(10)); // deathsml
|
||||
return m_ram[0x002310/8];
|
||||
install_cv1k_speedups(0x02310, 0xc05176a, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,deathsml)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc002310, 0xc002317, read64_delegate(FUNC(cv1k_state::deathsml_speedup_r),this));
|
||||
}
|
||||
|
||||
READ64_MEMBER( cv1k_state::dpddfk_speedup_r )
|
||||
{
|
||||
if (m_maincpu->pc()== 0xc1d1346 ) m_maincpu->spin_until_time( attotime::from_usec(10)); // dpddfk / dpddfk10 / dsmbl
|
||||
return m_ram[0x002310/8];
|
||||
install_cv1k_speedups(0x02310, 0xc0519a2, false);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(cv1k_state,dpddfk)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc002310, 0xc002317, read64_delegate(FUNC(cv1k_state::dpddfk_speedup_r),this));
|
||||
install_cv1k_speedups(0x02310, 0xc1d1346, true);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user