From 5a57d03cfe07bf47bc6862f403fb811bebbfa956 Mon Sep 17 00:00:00 2001 From: Sandro Ronco Date: Tue, 12 Jan 2021 13:39:14 +0100 Subject: [PATCH] -Acorn Archimedes code reorganization: (#7627) * Separated Acorn IOC and MEMC into devices. * Emulated 8051-based serial keyboard. * acorn_machine/memc.cpp: Ensure only one logical page is mapped to a single physical page. * Fixed RISC OS POST IOC register test. * aa310.cpp: Added debug code to display RISC OS POST failures. -machine/archimedes_keyb.cpp: Dumped Acorn Archimedes keyboard microcontroller. [Phil Pemberton] --- scripts/src/machine.lua | 24 ++ scripts/target/mame/arcade.lua | 2 + scripts/target/mame/mess.lua | 4 + src/devices/machine/acorn_ioc.cpp | 411 +++++++++++++++++++ src/devices/machine/acorn_ioc.h | 130 ++++++ src/devices/machine/acorn_memc.cpp | 509 ++++++++++++++++++++++++ src/devices/machine/acorn_memc.h | 102 +++++ src/mame/drivers/aa310.cpp | 564 +++++++++++++++------------ src/mame/machine/archimedes_keyb.cpp | 392 +++++++++++++++++++ src/mame/machine/archimedes_keyb.h | 79 ++++ 10 files changed, 1967 insertions(+), 250 deletions(-) create mode 100644 src/devices/machine/acorn_ioc.cpp create mode 100644 src/devices/machine/acorn_ioc.h create mode 100644 src/devices/machine/acorn_memc.cpp create mode 100644 src/devices/machine/acorn_memc.h create mode 100644 src/mame/machine/archimedes_keyb.cpp create mode 100644 src/mame/machine/archimedes_keyb.h diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index dc2f9864fb7..dd34d60bfbc 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -70,6 +70,30 @@ files { } +-------------------------------------------------- +-- +--@src/devices/machine/acorn_ioc.h,MACHINES["ACORN_IOC"] = true +-------------------------------------------------- + +if (MACHINES["ACORN_IOC"]~=null) then + files { + MAME_DIR .. "src/devices/machine/acorn_ioc.cpp", + MAME_DIR .. "src/devices/machine/acorn_ioc.h", + } +end + +-------------------------------------------------- +-- +--@src/devices/machine/acorn_memc.h,MACHINES["ACORN_MEMC"] = true +-------------------------------------------------- + +if (MACHINES["ACORN_MEMC"]~=null) then + files { + MAME_DIR .. "src/devices/machine/acorn_memc.cpp", + MAME_DIR .. "src/devices/machine/acorn_memc.h", + } +end + -------------------------------------------------- -- --@src/devices/machine/acorn_vidc.h,MACHINES["ACORN_VIDC"] = true diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 3344c2854c0..3d8d4b0fac4 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -394,6 +394,8 @@ VIDEOS["VRENDER0"] = true -- specify available machine cores -------------------------------------------------- +MACHINES["ACORN_IOC"] = true +MACHINES["ACORN_MEMC"] = true MACHINES["ACORN_VIDC"] = true MACHINES["AKIKO"] = true MACHINES["ALPHA_8921"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index aac794dddcc..0ac2a6bd64a 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -453,6 +453,8 @@ MACHINES["7200FIFO"] = true MACHINES["8530SCC"] = true MACHINES["AAKARTDEV"] = true MACHINES["ACIA6850"] = true +MACHINES["ACORN_IOC"] = true +MACHINES["ACORN_MEMC"] = true MACHINES["ACORN_VIDC"] = true MACHINES["ADC0804"] = true MACHINES["ADC0808"] = true @@ -1616,6 +1618,8 @@ files { createMESSProjects(_target, _subtarget, "acorn") files { MAME_DIR .. "src/mame/drivers/aa310.cpp", + MAME_DIR .. "src/mame/machine/archimedes_keyb.cpp", + MAME_DIR .. "src/mame/machine/archimedes_keyb.h", MAME_DIR .. "src/mame/drivers/accomm.cpp", MAME_DIR .. "src/mame/drivers/acrnsys1.cpp", MAME_DIR .. "src/mame/drivers/acrnsys.cpp", diff --git a/src/devices/machine/acorn_ioc.cpp b/src/devices/machine/acorn_ioc.cpp new file mode 100644 index 00000000000..1a879cb7a2d --- /dev/null +++ b/src/devices/machine/acorn_ioc.cpp @@ -0,0 +1,411 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller, Sandro Ronco +/************************************************************************************************** + + Acorn RISC Machine Input/Output Controller (IOC) + + TODO: + - support IOEB used in the ARM250 (partially implemented in aristmk5.cpp) + +**************************************************************************************************/ + +#include "emu.h" +#include "acorn_ioc.h" + +//#define VERBOSE 1 +#include "logmacro.h" + + +DEFINE_DEVICE_TYPE(ACORN_IOC, acorn_ioc_device, "ioc", "Acorn IOC") + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +acorn_ioc_device::acorn_ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ACORN_IOC, tag, owner, clock) + , device_serial_interface(mconfig, *this) + , m_peripherals_r(*this) + , m_peripherals_w(*this) + , m_giop_r(*this) + , m_giop_w(*this) + , m_irq_w(*this) + , m_fiq_w(*this) + , m_kout_w(*this) + , m_baud_w(*this) +{ +} + +void acorn_ioc_device::device_resolve_objects() +{ + m_peripherals_r.resolve_all_safe(0xffffffff); + m_peripherals_w.resolve_all_safe(); + m_giop_r.resolve_all_safe(1); + m_giop_w.resolve_all_safe(); + m_irq_w.resolve_safe(); + m_fiq_w.resolve_safe(); + m_kout_w.resolve_safe(); + m_baud_w.resolve(); +} + +void acorn_ioc_device::device_start() +{ + for (int i=0; i <4; i++) + m_timers[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(acorn_ioc_device::timer_tick), this)); + + save_item(NAME(m_ir)); + save_item(NAME(m_if)); + save_item(NAME(m_baud)); + save_item(NAME(m_timercnt)); + save_item(NAME(m_timerout)); + save_item(NAME(m_regs)); +} + +void acorn_ioc_device::device_reset() +{ + std::fill(std::begin(m_regs), std::end(m_regs), 0); + m_regs[IRQ_STATUS_A] = 0x10 | 0x80; // set up POR (Power On Reset) and Force IRQ at start-up + m_regs[IRQ_STATUS_B] = 0x40; // set up KART Tx empty + m_regs[FIQ_STATUS] = 0x80; // set up Force FIQ + + m_ir = CLEAR_LINE; + m_if = CLEAR_LINE; + m_baud = CLEAR_LINE; + + // KART interface + set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2); + set_rate(31250); + + for (int i = 0; i < 6; i++) + m_giop_w[i](1); + + for (int i=0; i < 2; i++) + { + m_timercnt[i] = 0; + m_timerout[i] = 0; + set_timer(i); + } + + transmit_register_reset(); + receive_register_reset(); +} + +void acorn_ioc_device::map(address_map &map) +{ + // Typical configuration + // IOA[2:6] --> A[2:6] Internal registers address + // IOA[16:18] --> B[0:2] Peripherals select + // IOA[19:20] --> T[0:1] Peripherals access timing + // IOA[21] --> CS Chip select + map(0x00200000, 0x0020007f).mirror(0x0018ff80).rw(FUNC(acorn_ioc_device::registers_r), FUNC(acorn_ioc_device::registers_w)); + map(0x00210000, 0x0021ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<1>), FUNC(acorn_ioc_device::periph_w<1>)); + map(0x00220000, 0x0022ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<2>), FUNC(acorn_ioc_device::periph_w<2>)); + map(0x00230000, 0x0023ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<3>), FUNC(acorn_ioc_device::periph_w<3>)); + map(0x00240000, 0x0024ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<4>), FUNC(acorn_ioc_device::periph_w<4>)); + map(0x00250000, 0x0025ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<5>), FUNC(acorn_ioc_device::periph_w<5>)); + map(0x00260000, 0x0026ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<6>), FUNC(acorn_ioc_device::periph_w<6>)); + map(0x00270000, 0x0027ffff).select(0x00180000).rw(FUNC(acorn_ioc_device::periph_r<7>), FUNC(acorn_ioc_device::periph_w<7>)); +} + +TIMER_CALLBACK_MEMBER(acorn_ioc_device::timer_tick) +{ + // all timers always run + set_timer(param); + + // but only timers 0 and 1 generate IRQs + switch (param) + { + case 0: + change_interrupt(IRQ_STATUS_A, 0x20, ASSERT_LINE); + break; + + case 1: + change_interrupt(IRQ_STATUS_A, 0x40, ASSERT_LINE); + break; + + case 2: + m_baud ^= 1; + m_baud_w(m_baud ? ASSERT_LINE : CLEAR_LINE); + break; + } +} + +void acorn_ioc_device::change_interrupt(int reg, uint8_t mask, int state) +{ + if (state) + m_regs[reg] |= mask; + else + m_regs[reg] &= ~mask; + + update_interrups(); +} + +void acorn_ioc_device::tra_complete() +{ + change_interrupt(IRQ_STATUS_B, 0x40, ASSERT_LINE); // KART Rx empty +} + +void acorn_ioc_device::rcv_complete() +{ + receive_register_extract(); + m_regs[KART] = get_received_char(); + change_interrupt(IRQ_STATUS_B, 0x80, ASSERT_LINE); // KART Rx full +} + +void acorn_ioc_device::tra_callback() +{ + m_kout_w(transmit_register_get_data_bit()); +} + +void acorn_ioc_device::set_timer(int tmr) +{ + double freq = 0; + + switch (tmr) + { + case 0: // Timers + case 1: + if (m_timercnt[tmr] == 0) + m_timers[tmr]->adjust(attotime::never, tmr); + else + m_timers[tmr]->adjust(attotime::from_usec(m_timercnt[tmr] / 2), tmr); // TODO: ARM timings are quite off there, it should be latch and not latch/2 + break; + + case 2: // Baud generator + freq = (double)clock() / 8 / (double)(m_timercnt[tmr] + 1); + if (!m_baud_w.isnull()) + m_timers[tmr]->adjust(attotime::from_usec(freq), tmr); + break; + + case 3: // KART clock + freq = (double)clock() / 8 / (double)((m_timercnt[tmr] + 1) * 16); + set_rate((int)freq); + break; + } +} + +void acorn_ioc_device::latch_timer_cnt(int tmr) +{ + // find out how many 2 MHz ticks have gone by + m_timerout[tmr] = m_timercnt[tmr] - (uint32_t)m_timers[tmr]->elapsed().as_ticks(clock() / 4); +} + +WRITE_LINE_MEMBER(acorn_ioc_device::if_w) +{ + // set on falling edge + if (m_if && !state) + change_interrupt(IRQ_STATUS_A, 0x04, ASSERT_LINE); + + m_if = state; +} + +WRITE_LINE_MEMBER(acorn_ioc_device::ir_w) +{ + // set on rising edge + if (!m_ir && state) + change_interrupt(IRQ_STATUS_A, 0x08, ASSERT_LINE); + + m_ir = state; +} + +void acorn_ioc_device::update_interrups() +{ + if ((m_regs[IRQ_STATUS_A] & m_regs[IRQ_MASK_A]) || (m_regs[IRQ_STATUS_B] & m_regs[IRQ_MASK_B])) + m_irq_w(ASSERT_LINE); + else + m_irq_w(CLEAR_LINE); + + if (m_regs[FIQ_STATUS] & m_regs[FIQ_MASK]) + m_fiq_w(ASSERT_LINE); + else + m_fiq_w(CLEAR_LINE); +} + +uint32_t acorn_ioc_device::registers_r(offs_t offset, uint32_t mem_mask) +{ + LOG("%s: IOC R %02x = %02x\n", machine().describe_context(), offset, m_regs[offset]); + + uint8_t data = 0; + switch (offset & 0x1f) + { + case CONTROL: + // x--- ---- IR line + // -x-- ---- IF line + // --xx xxxx GPIO (C0-C5) + + for (int i = 0; i < 6; i++) + data |= m_giop_r[i]() << i; + + data |= m_if << 6; + data |= m_ir << 7; + return data; + + case KART: + change_interrupt(IRQ_STATUS_B, 0x80, CLEAR_LINE); + return m_regs[KART]; + + case IRQ_STATUS_A: + // x--- ---- Always 1 (force IRQ) + // -x-- ---- Timer 1 + // --x- ---- Timer 0 + // ---x ---- POR line + // ---- x-- IR line + // ---- -x-- IF line + // ---- --x- IL7 line + // ---- ---x IL6 line + + return m_regs[IRQ_STATUS_A]; + + case IRQ_REQUEST_A: + return m_regs[IRQ_STATUS_A] & m_regs[IRQ_MASK_A]; + + case IRQ_MASK_A: + return m_regs[IRQ_MASK_A]; + + case IRQ_STATUS_B: + // x--- ---- KART Rx full + // -x-- ---- KART Tx empty + // --xx xxxx IL0-IL5 lines + + return m_regs[IRQ_STATUS_B]; + + case IRQ_REQUEST_B: + return m_regs[IRQ_STATUS_B] & m_regs[IRQ_MASK_B]; + + case IRQ_MASK_B: + return m_regs[IRQ_MASK_B]; + + case FIQ_STATUS: + // x--- ---- Always 1 (force FIQ) + // -x-- ---- IL0 line + // --xx x--- C5, C4 and C3 lines + // ---- -x-- IF line + // ---- --xx FH0 and FH1 lines + + return m_regs[FIQ_STATUS]; + + case FIQ_REQUEST: + return m_regs[FIQ_STATUS] & m_regs[FIQ_MASK]; + + case FIQ_MASK: + return m_regs[FIQ_MASK]; + + case T0_LATCH_LO: + return m_timerout[0] & 0xff; + + case T0_LATCH_HI: + return (m_timerout[0] >> 8) & 0xff; + + case T1_LATCH_LO: + return m_timerout[1] & 0xff; + + case T1_LATCH_HI: + return (m_timerout[1] >> 8) & 0xff; + + case T2_LATCH_LO: + return m_timerout[2] & 0xff; + + case T2_LATCH_HI: + return (m_timerout[2] >> 8) & 0xff; + + case T3_LATCH_LO: + return m_timerout[3] & 0xff; + + case T3_LATCH_HI: + return (m_timerout[3] >> 8) & 0xff; + + default: + return m_regs[offset & 0x1f]; + } +} + +void acorn_ioc_device::registers_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + LOG("%s: IOC W %02x = %02x\n", machine().describe_context(), offset, data); + + // IOC uses the data bus lines D16-D23 as inputs, this also works with byte store (STRB) + // because the ARM CPU repeats the byte four times across the data bus. + if (ACCESSING_BITS_16_31) + data >>= 16; + + switch (offset & 0x1f) + { + case CONTROL: + for (int i = 0; i < 6; i++) + m_giop_w[i](BIT(data, i)); + break; + + case KART: + change_interrupt(IRQ_STATUS_B, 0x40, CLEAR_LINE); + m_regs[KART] = data; + transmit_register_setup(data); + break; + + case IRQ_REQUEST_A: + m_regs[IRQ_STATUS_A] &= ~(data & 0x7c); + update_interrups(); // check pending irqs + break; + + case IRQ_MASK_A: + m_regs[IRQ_MASK_A] = data; + update_interrups(); + break; + + case IRQ_MASK_B: + m_regs[IRQ_MASK_B] = data; + update_interrups(); + break; + + case FIQ_MASK: + m_regs[FIQ_MASK] = data; + update_interrups(); + break; + + case T0_LATCH_LO: case T0_LATCH_HI: + case T1_LATCH_LO: case T1_LATCH_HI: + case T2_LATCH_LO: case T2_LATCH_HI: + case T3_LATCH_LO: case T3_LATCH_HI: + m_regs[offset] = data; + break; + + case T0_LATCH: // Timer 0 latch + latch_timer_cnt(0); + break; + + case T1_LATCH: // Timer 1 latch + latch_timer_cnt(1); + break; + + case T2_LATCH: // Timer 2 latch + latch_timer_cnt(2); + break; + + case T3_LATCH: // Timer 3 latch + latch_timer_cnt(3); + break; + + case T0_GO: // Timer 0 start + m_timercnt[0] = m_regs[T0_LATCH_HI] << 8 | m_regs[T0_LATCH_LO]; + set_timer(0); + break; + + case T1_GO: // Timer 1 start + m_timercnt[1] = m_regs[T1_LATCH_HI] << 8 | m_regs[T1_LATCH_LO]; + set_timer(1); + break; + + case T2_GO: // Timer 2 start + m_timercnt[2] = m_regs[T2_LATCH_HI] << 8 | m_regs[T2_LATCH_LO]; + set_timer(2); + break; + + case T3_GO: // Timer 3 start + m_timercnt[3] = m_regs[T3_LATCH_HI] << 8 | m_regs[T3_LATCH_LO]; + set_timer(3); + break; + + default: + m_regs[offset & 0x1f] = data; + break; + } +} diff --git a/src/devices/machine/acorn_ioc.h b/src/devices/machine/acorn_ioc.h new file mode 100644 index 00000000000..50477cf8b24 --- /dev/null +++ b/src/devices/machine/acorn_ioc.h @@ -0,0 +1,130 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller, Sandro Ronco +/************************************************************************************************** + + Acorn RISC Machine Input/Output Controller (IOC) + +**************************************************************************************************/ + +#ifndef MAME_MACHINE_ACORN_IOC_H +#define MAME_MACHINE_ACORN_IOC_H + +#pragma once + +#include "diserial.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> acorn_ioc_device + +class acorn_ioc_device : public device_t, public device_serial_interface +{ +public: + acorn_ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template auto peripheral_r() { static_assert(N >= 1 && N <= 7); return m_peripherals_r[N - 1].bind(); } + template auto peripheral_w() { static_assert(N >= 1 && N <= 7); return m_peripherals_w[N - 1].bind(); } + template auto gpio_r() { static_assert(N <= 5); return m_giop_r[N].bind(); } + template auto gpio_w() { static_assert(N <= 5); return m_giop_w[N].bind(); } + auto irq_w() { return m_irq_w.bind(); } + auto fiq_w() { return m_fiq_w.bind(); } + auto baud_w() { return m_baud_w.bind(); } + auto kout_w() { return m_kout_w.bind(); } + + void map(address_map &map); + + uint32_t registers_r(offs_t offset, uint32_t mem_mask = ~0); + void registers_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + template uint32_t periph_r(offs_t offset, uint32_t mem_mask = ~0) { return m_peripherals_r[N - 1](offset, mem_mask); } + template void periph_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_peripherals_w[N - 1](offset, data, mem_mask); } + + DECLARE_WRITE_LINE_MEMBER(il0_w) { change_interrupt(IRQ_STATUS_B, 0x01, state); change_interrupt(FIQ_STATUS, 0x40, state); } + DECLARE_WRITE_LINE_MEMBER(il1_w) { change_interrupt(IRQ_STATUS_B, 0x02, state); } + DECLARE_WRITE_LINE_MEMBER(il2_w) { change_interrupt(IRQ_STATUS_B, 0x04, state); } + DECLARE_WRITE_LINE_MEMBER(il3_w) { change_interrupt(IRQ_STATUS_B, 0x08, state); } + DECLARE_WRITE_LINE_MEMBER(il4_w) { change_interrupt(IRQ_STATUS_B, 0x10, state); } + DECLARE_WRITE_LINE_MEMBER(il5_w) { change_interrupt(IRQ_STATUS_B, 0x20, state); } + DECLARE_WRITE_LINE_MEMBER(il6_w) { change_interrupt(IRQ_STATUS_A, 0x01, state); } + DECLARE_WRITE_LINE_MEMBER(il7_w) { change_interrupt(IRQ_STATUS_A, 0x02, state); } + DECLARE_WRITE_LINE_MEMBER(fh0_w) { change_interrupt(FIQ_STATUS , 0x01, state); } + DECLARE_WRITE_LINE_MEMBER(fh1_w) { change_interrupt(FIQ_STATUS , 0x02, state); } + DECLARE_WRITE_LINE_MEMBER(fl_w) { change_interrupt(FIQ_STATUS , 0x04, !state); } + DECLARE_WRITE_LINE_MEMBER(por_w) { if (state) change_interrupt(IRQ_STATUS_A, 0x10, state); } + DECLARE_WRITE_LINE_MEMBER(kin_w) { rx_w(state); } + DECLARE_WRITE_LINE_MEMBER(if_w); + DECLARE_WRITE_LINE_MEMBER(ir_w); + +protected: + // device-level overrides + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_reset() override; + + // device_serial_interface overrides + virtual void tra_callback() override; + virtual void tra_complete() override; + virtual void rcv_complete() override; + +private: + void update_interrups(); + void change_interrupt(int reg, uint8_t mask, int state); + void set_timer(int tmr); + void latch_timer_cnt(int tmr); + TIMER_CALLBACK_MEMBER(timer_tick); + + enum // registers + { + CONTROL = 0x00 / 4, + KART = 0x04 / 4, + IRQ_STATUS_A = 0x10 / 4, + IRQ_REQUEST_A = 0x14 / 4, + IRQ_MASK_A = 0x18 / 4, + IRQ_STATUS_B = 0x20 / 4, + IRQ_REQUEST_B = 0x24 / 4, + IRQ_MASK_B = 0x28 / 4, + FIQ_STATUS = 0x30 / 4, + FIQ_REQUEST = 0x34 / 4, + FIQ_MASK = 0x38 / 4, + T0_LATCH_LO = 0x40 / 4, + T0_LATCH_HI = 0x44 / 4, + T0_GO = 0x48 / 4, + T0_LATCH = 0x4c / 4, + T1_LATCH_LO = 0x50 / 4, + T1_LATCH_HI = 0x54 / 4, + T1_GO = 0x58 / 4, + T1_LATCH = 0x5c / 4, + T2_LATCH_LO = 0x60 / 4, + T2_LATCH_HI = 0x64 / 4, + T2_GO = 0x68 / 4, + T2_LATCH = 0x6c / 4, + T3_LATCH_LO = 0x70 / 4, + T3_LATCH_HI = 0x74 / 4, + T3_GO = 0x78 / 4, + T3_LATCH = 0x7c / 4, + }; + + devcb_read32::array<7> m_peripherals_r; + devcb_write32::array<7> m_peripherals_w; + devcb_read_line::array<6> m_giop_r; + devcb_write_line::array<6> m_giop_w; + devcb_write_line m_irq_w; + devcb_write_line m_fiq_w; + devcb_write_line m_kout_w; + devcb_write_line m_baud_w; + emu_timer * m_timers[4]; + + int m_ir; + int m_if; + int m_baud; + uint32_t m_timercnt[4]; + uint32_t m_timerout[4]; + uint8_t m_regs[0x20]; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(ACORN_IOC, acorn_ioc_device) + +#endif // MAME_MACHINE_ACORN_IOC_H diff --git a/src/devices/machine/acorn_memc.cpp b/src/devices/machine/acorn_memc.cpp new file mode 100644 index 00000000000..ebf13443e6e --- /dev/null +++ b/src/devices/machine/acorn_memc.cpp @@ -0,0 +1,509 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller, Sandro Ronco +/************************************************************************************************** + + Acorn RISC Machine Memory Controller (MEMC) + + TODO: + - VIDC DMA interface needs to be cleaned up. + - Slave mode. + +**************************************************************************************************/ + +#include "emu.h" +#include "acorn_memc.h" + +#include "debug/debugcon.h" +#include "debug/debugcmd.h" +#include "debugger.h" + +#include + +//#define VERBOSE 1 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(ACORN_MEMC, acorn_memc_device, "memc", "Acorn MEMC") + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +acorn_memc_device::acorn_memc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ACORN_MEMC, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , m_vidc(*this, finder_base::DUMMY_TAG) + , m_space_config("MEMC", ENDIANNESS_LITTLE, 32, 26, 0) + , m_abort_w(*this) + , m_sirq_w(*this) + , m_output_dram_rowcol(false) +{ +} + +//------------------------------------------------- +// memory_space_config - return a description of +// any address spaces owned by this device +//------------------------------------------------- + +device_memory_interface::space_config_vector acorn_memc_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(0, &m_space_config) + }; +} + +void acorn_memc_device::memc_map_debug_commands(int ref, const std::vector ¶ms) +{ + uint64_t offset; + if (params.size() != 1 || !machine().debugger().commands().validate_number_parameter(params[0], offset)) + return; + + // figure out the page number and offset in the page + uint32_t pagesize = m_page_sizes[m_pagesize]; + uint32_t page = offset / pagesize; + uint32_t poffs = offset % pagesize; + + machine().debugger().console().printf("0x%08lx == ", offset); + if (offset >= 0x02000000) + machine().debugger().console().printf("physical\n"); + else if (m_pages[page] == -1) + machine().debugger().console().printf("unmapped\n"); + else + machine().debugger().console().printf("0x%08lx (PPL %x)\n", 0x02000000 | ((m_pages[page] * pagesize) + poffs), m_pages_ppl[page]); +} + +void acorn_memc_device::device_resolve_objects() +{ + m_abort_w.resolve_safe(); + m_sirq_w.resolve_safe(); +} + +void acorn_memc_device::device_start() +{ + m_space = &space(); + + save_item(NAME(m_spvmd)); + save_item(NAME(m_pagesize)); + save_item(NAME(m_latchrom)); + save_item(NAME(m_video_dma_on)); + save_item(NAME(m_sound_dma_on)); + save_item(NAME(m_cursor_enabled)); + save_item(NAME(m_os_mode)); + save_item(NAME(m_vidinit)); + save_item(NAME(m_vidstart)); + save_item(NAME(m_vidend)); + save_item(NAME(m_vidcur)); + save_item(NAME(m_cinit)); + save_item(NAME(m_sndstart)); + save_item(NAME(m_sndend)); + save_item(NAME(m_sndcur)); + save_item(NAME(m_sndendcur)); + save_item(NAME(m_pages)); + save_item(NAME(m_pages_ppl)); + + if (machine().debug_flags & DEBUG_FLAG_ENABLED) + { + using namespace std::placeholders; + machine().debugger().console().register_command("memc_map", CMDFLAG_NONE, 0, 1, 1, std::bind(&acorn_memc_device::memc_map_debug_commands, this, _1, _2)); + } +} + +void acorn_memc_device::device_reset() +{ + m_latchrom = true; // map in the boot ROM + m_pagesize = 0; + m_video_dma_on = false; + m_sound_dma_on = false; + m_cursor_enabled = false; + m_os_mode = false; + m_vidinit = 0; + m_vidstart = 0; + m_vidend = 0; + m_vidcur = 0; + m_cinit = 0; + m_sndstart = 0; + m_sndend = 0; + m_sndcur = 0; + m_sndendcur = 0; + m_spvmd = ASSERT_LINE; + + // kill all MEMC mappings + std::fill(std::begin(m_pages), std::end(m_pages), -1); // indicate unmapped + std::fill(std::begin(m_pages_ppl), std::end(m_pages_ppl), 0); +} + +uint32_t acorn_memc_device::invalid_access(bool is_write, offs_t offset, uint32_t data, uint32_t mem_mask) +{ + if (!machine().side_effects_disabled()) + { + if (is_write) + logerror("abort W 0x%08x 0x%08x (0x%08x)\n", offset << 2, data, mem_mask); + else + logerror("abort R 0x%08x (0x%08x)\n", offset << 2, mem_mask); + + m_abort_w(ASSERT_LINE); + } + + return 0xdeadbeef; +} + +bool acorn_memc_device::is_valid_access(int page, bool write) +{ + if (m_pages[page] != -1) + { + if (m_spvmd || machine().side_effects_disabled()) + return true; + + switch (m_pages_ppl[page]) + { + case 0: return true; + case 1: return m_os_mode || (write == false); + case 2: return m_os_mode && (write == false); + case 3: return m_os_mode && (write == false); + } + } + + return false; +} + +void acorn_memc_device::registers_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + // is it a register? + if ((data & 0x03e00000) != 0x03600000) + return; + + LOG("%s: MEMC W %02x = %04x\n", machine().describe_context(), (data >> 17) & 7, data & 0xffff); + + switch ((data >> 17) & 7) + { + case 0: // Video init + m_vidinit = ((data >> 2) & 0x7fff) * 16; + break; + + case 1: // Video start + m_vidstart = ((data >> 2) & 0x7fff) * 16; + break; + + case 2: // Video end + m_vidend = ((data >> 2) & 0x7fff) * 16; + break; + + case 3: // Cursor init + m_cursor_enabled = true; + if (m_vidc.found()) + m_vidc->set_cursor_enable(m_cursor_enabled); + + m_cinit = ((data >> 2) & 0x7fff) * 16; + break; + + case 4: // Sound start + m_sirq_w(CLEAR_LINE); + m_sndstart = ((data >> 2) & 0x7fff) * 16; + break; + + case 5: // Sound end + // end buffer is actually +16 bytes wrt sound start + // TODO: it actually don't apply for ertictac and poizone? + m_sndend = ((data >> 2) & 0x7fff) * 16; + break; + + case 6: // Sound pointer + m_sndcur = m_sndstart; + m_sndendcur = m_sndend; + m_sirq_w(ASSERT_LINE); + break; + + case 7: // Control + // --x- ---- ---- ---- Test Mode + // ---x ---- ---- ---- OS Mode + // ---- x--- ---- ---- Sound DMA + // ---- -x-- ---- ---- Video DMA + // ---- --xx ---- ---- DRAM refresh config + // ---- ---- xx-- ---- High ROM access time + // ---- ---- --xx ---- Low ROM access time + // ---- ---- ---- xx-- Page size + // ---- ---- ---- --xx Not used + + m_pagesize = BIT(data, 2, 2); + m_video_dma_on = BIT(data, 10); + m_sound_dma_on = BIT(data, 11); + m_os_mode = BIT(data, 12); + + LOG("%s MEMC: %x to Control (page size %d, %s, %s)\n", machine().describe_context(), data & 0x1ffc, m_page_sizes[m_pagesize], m_video_dma_on ? "Video DMA on" : "Video DMA off", m_sound_dma_on ? "Sound DMA on" : "Sound DMA off"); + + if (m_video_dma_on) + { + m_vidcur = 0; + // TODO: update internally + } + else + { + m_cursor_enabled = false; + if (m_vidc.found()) + m_vidc->set_cursor_enable(m_cursor_enabled); + } + + if (m_vidc.found()) + m_vidc->update_sound_mode(m_sound_dma_on); + + if (m_sound_dma_on) + { + //logerror("MEMC: Starting audio DMA at %d uSec, buffer from %x to %x\n", ((m_regs[0xc0]&0xff)-2)*8, m_sndstart, m_sndend); + //logerror("MEMC: audio DMA start, sound freq %d, sndhz = %f\n", (m_regs[0xc0] & 0xff)-2, sndhz); + + m_sndcur = m_sndstart; + m_sndendcur = m_sndend; + } + break; + default: + logerror("MEMC: %06x to unknown reg %d\n", data & 0x1ffff, (data >> 17) & 7); + break; + } +} + + +//************************************************************************** +// +// 22 2222 1111 1111 1100 0000 0000 +// 54 3210 9876 5432 1098 7654 3210 +// 4k page: 11 1LLL LLLL LLLL LLAA MPPP PPPP +// 8k page: 11 1LLL LLLL LLLM LLAA MPPP PPPP +// 16k page: 11 1LLL LLLL LLxM LLAA MPPP PPPP +// 32k page: 11 1LLL LLLL LxxM LLAA MPPP PPPP +// 3 8 2 9 0 f f +// +// L - logical page +// P - physical page +// A - access permissions +// M - MEMC number (for machines with multiple MEMCs) +// +// The logical page is encoded with bits 11+10 being the most significant bits +// (in that order), and the rest being bit 22 down. +// +// The physical page is encoded differently depending on the page size : +// +// 4k page: bits 6-0 being bits 6-0 +// 8k page: bits 6-1 being bits 5-0, bit 0 being bit 6 +// 16k page: bits 6-2 being bits 4-0, bits 1-0 being bits 6-5 +// 32k page: bits 6-3 being bits 4-0, bit 0 being bit 4, bit 2 being bit 5, bit 1 being bit 6 +// +//************************************************************************** + +void acorn_memc_device::page_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + uint32_t logaddr = 0; + uint32_t phyaddr = 0; + uint32_t memc = 0; + + switch (m_pagesize) + { + case 0: + phyaddr = BIT(data, 0, 7); + logaddr = BIT(data, 12, 11) | (BIT(data, 10, 2) << 11); + memc = BIT(data, 7); + break; + + case 1: + phyaddr = BIT(data, 1, 6) | (BIT(data, 0) << 6); + logaddr = BIT(data, 13, 10) | (BIT(data, 10, 2) << 10); + memc = BIT(data, 7) | (BIT(data, 12) << 1); + break; + + case 2: + phyaddr = BIT(data, 2, 5) | (BIT(data, 0, 2) << 5); + logaddr = BIT(data, 14, 9) | (BIT(data, 10, 2) << 9); + memc = BIT(data, 7) | (BIT(data, 12) << 1); + break; + + case 3: + phyaddr = BIT(data, 3, 4) | (BIT(data, 0) << 4) | (BIT(data, 1) << 6) | (BIT(data, 2) << 5); + logaddr = BIT(data, 15, 8) | (BIT(data, 10, 2) << 8); + memc = BIT(data, 7) | (BIT(data, 12) << 1); + break; + } + + // always make sure ROM mode is disconnected when this occurs + m_latchrom = false; + + phyaddr += memc * 0x80; + + // unmap all logical pages that resolve to the same physical address + for (int i=0; i < 0x2000; i++) + if (m_pages[i] == phyaddr) + m_pages[i] = -1; + + // now go ahead and set the mapping in the page table + m_pages[logaddr] = phyaddr; + m_pages_ppl[logaddr] = BIT(data, 8, 2); + + LOG("%s = MEMC_PAGE(%d): W %08x: logaddr %08x to phyaddr %08x, MEMC %d, perms %d\n", machine().describe_context(), m_pages[logaddr], data, logaddr * m_page_sizes[m_pagesize], phyaddr * m_page_sizes[m_pagesize], memc, m_pages_ppl[logaddr]); +} + + +// TODO: what type of DMA this is, burst or cycle steal? Docs doesn't explain it (4 usec is the DRAM refresh). */ +// TODO: Erotictac and Poizone sets up vidinit register AFTER vidend, for double buffering? (fixes Poizone "Eterna" logo display on attract) +// TODO: understand how to make quazer to work (sets video DMA param in-flight) +void acorn_memc_device::do_video_dma() +{ + uint32_t size = (m_vidend - m_vidstart + 0x10) & 0x1fffff; + uint32_t offset_ptr = m_vidinit; + + if (offset_ptr >= m_vidend + 0x10) // TODO: correct? + offset_ptr = m_vidstart; + + //popmessage("%08x %08x %08x",m_vidstart, m_vidinit, m_vidend); + + if (m_vidc.found()) + { + for (m_vidcur = 0; m_vidcur < size; m_vidcur++) + { + m_vidc->write_vram(m_vidcur, m_space->read_byte(dram_address((offset_ptr)))); + offset_ptr++; + if (offset_ptr >= m_vidend + 0x10) // TODO: correct? + offset_ptr = m_vidstart; + } + + if (m_cursor_enabled) + { + uint16_t ccur_size = m_vidc->get_cursor_size() & 0x1ff; + + for (int ccur = 0; ccur < ccur_size; ccur++) + m_vidc->write_cram(ccur, m_space->read_byte(dram_address((m_cinit + ccur)))); + } + } +} + +void acorn_memc_device::do_sound_dma() +{ + if (m_vidc.found()) + { + for (int ch = 0; ch < 8; ch++) + m_vidc->write_dac(ch, m_space->read_byte(dram_address(m_sndcur + ch))); + } + + m_sndcur += 8; + + if (m_sndcur >= m_sndendcur) + { + m_sirq_w(ASSERT_LINE); + + // TODO: nuke this implementation detail, repeated below + if (m_vidc.found()) + m_vidc->update_sound_mode(m_sound_dma_on); + + if (m_sound_dma_on) + { + //logerror("Chaining to next: start %x end %x\n", m_sndstart, m_sndend); + m_sndcur = m_sndstart; + m_sndendcur = m_sndend; + } + else if (m_vidc.found()) + { + for (int ch=0; ch<8; ch++) + m_vidc->clear_dac(ch); + } + } +} + +WRITE_LINE_MEMBER(acorn_memc_device::spvmd_w) +{ + m_spvmd = state; + m_abort_w(CLEAR_LINE); +} + +WRITE_LINE_MEMBER(acorn_memc_device::sndrq_w) +{ + if (state && m_sound_dma_on) + do_sound_dma(); +} + + +WRITE_LINE_MEMBER(acorn_memc_device::vidrq_w) +{ + if (state && m_video_dma_on) + do_video_dma(); +} + +uint32_t acorn_memc_device::dram_address(uint32_t address) +{ + if (m_output_dram_rowcol) + { + // The correct DRAM row / column for every page size is shown in Appendix A of the Acorn MEMC datasheet + // xx-- ---- ---- ---- ---- ---- MEMC (for systems with multiple MEMC) + // --xx xxxx xxxx ---- ---- ---- DRAM row + // ---- ---- ---- xxxx xxxx xx-- DRAM column + // ---- ---- ---- ---- ---- --xx CAS + + switch (m_pagesize) + { + // Page size MEMC Unused DRAM row Unused DRAM column CAS Mask unused + case 0: address = bitswap<24>(address, 23, 22, 21,20, 11,10,9,8,7,6,5,4, 19, 18,17,16,15,14,13,12,3,2, 1,0) & 0xcff7ff; break; + case 1: address = bitswap<24>(address, 23, 22, 21, 12,11,10,9,8,7,6,5,4, 20, 18,17,16,15,14,13,19,3,2, 1,0) & 0xdff7ff; break; + case 2: address = bitswap<24>(address, 23, 22, 21, 12,11,10,9,8,7,6,5,4, 20,18,17,16,15,14,13,19,3,2, 1,0) & 0xdfffff; break; + case 3: address = bitswap<24>(address, 23, 22, 13,12,11,10,9,8,7,6,5,4, 20,18,17,16,15,14,21,19,3,2, 1,0) & 0xffffff; break; + } + } + + return 0x02000000 | address; +} + +uint32_t acorn_memc_device::logical_r(offs_t offset, uint32_t mem_mask) +{ + // are we mapping in the boot ROM? + if (m_latchrom) + return m_space->read_dword(0x3800000 | ((offset & 0x1fffff) << 2), mem_mask); + + // figure out the page number and offset in the page + uint32_t pagesize = m_page_sizes[m_pagesize]; + uint32_t page = (offset << 2) / pagesize; + uint32_t poffs = (offset << 2) % pagesize; + + if (is_valid_access(page, false)) + return m_space->read_dword(dram_address(m_pages[page] * pagesize + poffs), mem_mask); + else + return invalid_access(false, offset, 0, mem_mask); +} + + +void acorn_memc_device::logical_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + // if the boot ROM is mapped, ignore writes + if (m_latchrom) + return; + + // figure out the page number and offset in the page + uint32_t pagesize = m_page_sizes[m_pagesize]; + uint32_t page = (offset << 2) / pagesize; + uint32_t poffs = (offset << 2) % pagesize; + + if (is_valid_access(page, true)) + m_space->write_dword(dram_address(m_pages[page] * pagesize + poffs), data, mem_mask); + else + invalid_access(true, offset, data, mem_mask); +} + + +uint32_t acorn_memc_device::high_mem_r(offs_t offset, uint32_t mem_mask) +{ + uint32_t addr = offset << 2; + m_latchrom = false; + + if (!m_spvmd) + return invalid_access(false, addr, 0, mem_mask); + else if (addr < 0x1000000) // DRAM + return m_space->read_dword(dram_address(addr), mem_mask); + else + return m_space->read_dword(0x2000000 | addr, mem_mask); +} + +void acorn_memc_device::high_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + uint32_t addr = offset << 2; + m_latchrom = false; + + if (!m_spvmd) + invalid_access(true, addr, data, mem_mask); + else if (addr < 0x1000000) // DRAM + m_space->write_dword(dram_address(addr), data, mem_mask); + else + m_space->write_dword(0x2000000 | addr, data, mem_mask); +} diff --git a/src/devices/machine/acorn_memc.h b/src/devices/machine/acorn_memc.h new file mode 100644 index 00000000000..f0b687ac195 --- /dev/null +++ b/src/devices/machine/acorn_memc.h @@ -0,0 +1,102 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller, Sandro Ronco +/************************************************************************************************** + + Acorn RISC Machine Memory Controller (MEMC) + +**************************************************************************************************/ + +#ifndef MAME_MACHINE_ACORN_MEMC_H +#define MAME_MACHINE_ACORN_MEMC_H + +#pragma once + +#include "machine/acorn_vidc.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> acorn_memc_device + +class acorn_memc_device : public device_t, public device_memory_interface +{ +public: + acorn_memc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template + acorn_memc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&vidc_tag) + : acorn_memc_device(mconfig, tag, owner, clock) + { + m_vidc.set_tag(std::forward(vidc_tag)); + } + + auto abort_w() { return m_abort_w.bind(); } + auto sirq_w() { return m_sirq_w.bind(); } + + // enable/disable the output of the correct DRAM row and column for DRAM access. + // This allows to emulate the correct DRAM mirrors that are used by RISC OS to detect the installed RAM, + // but requires a bitswap on every access and is not required by machines with 2 or more MB of RAM. + void output_dram_rowcol(bool v) { m_output_dram_rowcol = v; } + + uint32_t logical_r(offs_t offset, uint32_t mem_mask = ~0); + void logical_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void page_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void registers_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t high_mem_r(offs_t offset, uint32_t mem_mask = ~0); + void high_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + + DECLARE_WRITE_LINE_MEMBER(spvmd_w); + DECLARE_WRITE_LINE_MEMBER(sndrq_w); + DECLARE_WRITE_LINE_MEMBER(vidrq_w); + +protected: + // device-level overrides + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_reset() override; + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + +private: + void memc_map_debug_commands(int ref, const std::vector ¶ms); + uint32_t dram_address(uint32_t address); + bool is_valid_access(int page, bool write); + uint32_t invalid_access(bool is_write, offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void do_sound_dma(); + void do_video_dma(); + + static constexpr const int m_page_sizes[4] = { 4096, 8192, 16384, 32768 }; + optional_device m_vidc; + const address_space_config m_space_config; + + address_space * m_space; + devcb_write_line m_abort_w; + devcb_write_line m_sirq_w; + bool m_output_dram_rowcol; + int m_spvmd; + uint8_t m_pagesize; + bool m_latchrom; + bool m_video_dma_on; + bool m_sound_dma_on; + bool m_cursor_enabled; + bool m_os_mode; + uint32_t m_vidinit; + uint32_t m_vidstart; + uint32_t m_vidend; + uint32_t m_vidcur; + uint32_t m_cinit; + uint32_t m_sndstart; + uint32_t m_sndend; + uint32_t m_sndcur; + uint32_t m_sndendcur; + int16_t m_pages[0x2000]; // the logical RAM area is 32 megs, and the smallest page size is 4k + uint8_t m_pages_ppl[0x2000]; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(ACORN_MEMC, acorn_memc_device) + +#endif // MAME_MACHINE_ACORN_MEMC_H diff --git a/src/mame/drivers/aa310.cpp b/src/mame/drivers/aa310.cpp index 2d7804e3c9d..d8e240bca98 100644 --- a/src/mame/drivers/aa310.cpp +++ b/src/mame/drivers/aa310.cpp @@ -29,6 +29,7 @@ * AGC20 - Acorn A4000 2MB HD 80 * * Notes: + * - Hold DEL down during boot reset the CMOS memory to the default values. * - default NVRAM is plainly wrong. Use the status/configure commands to set up properly * (Scroll Lock is currently mapped with Right SHIFT, use this to move to next page of status). * In order to load a floppy, you need at very least: @@ -38,8 +39,13 @@ * Then reboot / reset the machine, and use cat to (attempt) to load a floppy contents. * * TODO: - * - RISC OS Alarm app crash the whole OS * - RISC OS Draw app uses unimplemented copro instructions + * - Move joystick ports into slot devices. + * - Add ABORT line support to the ARM core. + * - Hard disc controller. + * - Serial interface. + * - 82c711. + * - Podules expansions. * * * @@ -84,26 +90,40 @@ #include "emu.h" -#include "includes/archimds.h" #include "cpu/arm/arm.h" #include "formats/acorn_dsk.h" #include "formats/apd_dsk.h" #include "formats/jfd_dsk.h" #include "formats/pc_dsk.h" +#include "imagedev/floppy.h" +#include "machine/acorn_ioc.h" +#include "machine/acorn_memc.h" +#include "machine/acorn_vidc.h" +#include "machine/archimedes_keyb.h" +#include "machine/pcf8583.h" #include "machine/ram.h" #include "machine/wd_fdc.h" #include "screen.h" #include "softlist.h" #include "speaker.h" -class aa310_state : public archimedes_state +namespace { + +class aa310_state : public driver_device { public: aa310_state(const machine_config &mconfig, device_type type, const char *tag) - : archimedes_state(mconfig, type, tag) - , m_physram(*this, "physicalram") + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_ioc(*this, "ioc") + , m_memc(*this, "memc") + , m_vidc(*this, "vidc") + , m_fdc(*this, "fdc") + , m_floppy0(*this, "fdc:0") + , m_floppy1(*this, "fdc:1") , m_ram(*this, RAM_TAG) + , m_joy(*this, "joy_p%u", 1U) { } void aa5000a(machine_config &config); @@ -121,18 +141,16 @@ public: void aa440(machine_config &config); void aa4201(machine_config &config); - void init_aa310(); - - DECLARE_INPUT_CHANGED_MEMBER(key_stroke); - DECLARE_INPUT_CHANGED_MEMBER(send_mouse_input); - private: - required_shared_ptr m_physram; - - uint32_t aa310_psy_wram_r(offs_t offset); - void aa310_psy_wram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_WRITE_LINE_MEMBER(aa310_wd177x_intrq_w); - DECLARE_WRITE_LINE_MEMBER(aa310_wd177x_drq_w); + uint32_t fdc_r(offs_t offset); + void fdc_w(offs_t offset, uint32_t data); + uint32_t peripheral2_r(offs_t offset); + uint32_t peripheral5_r(offs_t offset); + void peripheral5_w(offs_t offset, uint32_t data); + uint32_t dram_r(offs_t offset, uint32_t mem_mask = ~0); + void dram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + DECLARE_READ_LINE_MEMBER(floppy_ready_r); + DECLARE_WRITE_LINE_MEMBER(sound_mute_w); virtual void machine_start() override; virtual void machine_reset() override; @@ -140,230 +158,260 @@ private: DECLARE_FLOPPY_FORMATS( floppy_formats ); void aa310_mem(address_map &map); + void aa310_arm_mem(address_map &map); + required_device m_maincpu; + required_device m_ioc; + required_device m_memc; + required_device m_vidc; + required_device m_fdc; + required_device m_floppy0; + required_device m_floppy1; required_device m_ram; + optional_ioport_array<2> m_joy; + + floppy_image_device *m_selected_floppy; + std::unique_ptr m_dram; }; - -WRITE_LINE_MEMBER(aa310_state::aa310_wd177x_intrq_w) +uint32_t aa310_state::fdc_r(offs_t offset) { - if (state) - archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY); - else - archimedes_clear_fiq(ARCHIMEDES_FIQ_FLOPPY); + return m_fdc->read(offset & 0x03); } -WRITE_LINE_MEMBER(aa310_state::aa310_wd177x_drq_w) +void aa310_state::fdc_w(offs_t offset, uint32_t data) { - if (state) - archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY_DRQ); - else - archimedes_clear_fiq(ARCHIMEDES_FIQ_FLOPPY_DRQ); + return m_fdc->write(offset & 0x03, data & 0xff); } -uint32_t aa310_state::aa310_psy_wram_r(offs_t offset) +uint32_t aa310_state::peripheral2_r(offs_t offset) { - return m_physram[offset]; + // RTFM joystick interface routes here + // TODO: slot interface for econet (reads registers 0 and 1 during boot) + switch ((offset << 2) & 0xffff) + { + case 0x00: + return 0xed; // ID for econet + case 0x04: + return m_joy[0].read_safe(0xff); + case 0x08: + // Top Banana reads there and do various checks, + // disallowing player 1 joy use if they fails (?) + return m_joy[1].read_safe(0xff); + } + + return 0xffffffff; } -void aa310_state::aa310_psy_wram_w(offs_t offset, uint32_t data, uint32_t mem_mask) +uint32_t aa310_state::peripheral5_r(offs_t offset) { - COMBINE_DATA(&m_physram[offset]); + switch ((offset << 2) & 0xfc) + { + case 0x18: return 0x00; // FDC latch B + case 0x40: return 0x00; // FDC latch A + case 0x50: return 0x00; // FDC type, an 82c711 returns 5 here + case 0x70: return 0x0f; // monitor type, TBD + case 0x74: return 0xff; // unknown + case 0x78: // serial joystick? + case 0x7c: + logerror("FDC: reading Joystick port %04x at PC=%08x\n",offset << 2, m_maincpu->pc()); + return 0xff; + + } + + return 0xffffffff; } - -void aa310_state::init_aa310() +void aa310_state::peripheral5_w(offs_t offset, uint32_t data) { - uint32_t ram_size = m_ram->size(); + switch ((offset << 2) & 0xfc) + { + case 0x00: // HD63463 + break; - m_maincpu->space(AS_PROGRAM).unmap_readwrite(0x02000000, 0x02ffffff); - m_maincpu->space(AS_PROGRAM).install_read_handler(0x02000000, 0x02000000+(ram_size-1), read32sm_delegate(*this, FUNC(aa310_state::aa310_psy_wram_r))); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x02000000, 0x02000000+(ram_size-1), write32s_delegate(*this, FUNC(aa310_state::aa310_psy_wram_w))); + case 0x08: // HD63463 DACK + break; - archimedes_driver_init(); + case 0x10: // Printer port + { + // compared to RTFM they reversed bits 0-3 (or viceversa, dunno what came out first) + // for pragmatic convenience we bitswap here, but this should really be a slot option at some point. + // TODO: understand how player 2 inputs routes, related somehow to CONTROL bit 6 (cfr. blitz in SW list) + // TODO: paradr2k polls here with bit 7 and fails detection (Vertical Twist) + uint8_t cur_joy_in = bitswap<8>(m_joy[0].read_safe(0xff),7,6,5,4,0,1,2,3); + uint8_t joy_serial_data = (data & 0xff) ^ 0xff; + bool serial_on = false; + + if (joy_serial_data == 0x20) + serial_on = true; + else if (joy_serial_data & cur_joy_in) + serial_on = true; + + // wants printer irq for some reason (connected on parallel?) + m_ioc->il6_w(serial_on ? ASSERT_LINE : CLEAR_LINE); + break; + } + case 0x18: // Latch B + // xxx- ---- Not used + // ---x ---- Printer Strobe + // ---- x--- FDC Reset + // ---- --x- FDC DDEN + m_fdc->dden_w(BIT(data, 1)); + m_fdc->mr_w(BIT(data, 3)); + break; + + case 0x40: // Latch A + // x--- ---- Not used + // -x-- ---- Floppy disc INUSE + // --x- ---- Floppy motor + // ---x ---- Side select + // ---- xxxx Floppy disc select + + // Debug code to display RISC OS 3 POST failures + const int post_debug = 0; + if (post_debug && BIT(data, 17)) + { + static attotime last_time(0, 0); + static int bitpos = 0; + + if (BIT(data, 16) && bitpos <= 32) + { + bool state = (machine().time() - last_time) > m_maincpu->clocks_to_attotime(2000000); + + switch (32 - bitpos) + { + // Status flags + case 0: printf("00000001 %-4s Self-test due to power on\n" , state ? "On" : "Off"); break; + case 1: printf("00000002 %-4s Self-test due to interface hardware\n", state ? "On" : "Off"); break; + case 2: printf("00000004 %-4s Self-test due to test link\n" , state ? "On" : "Off"); break; + case 3: printf("00000008 %-4s Long memory test performed\n" , state ? "On" : "Off"); break; + case 4: printf("00000010 %-4s ARM 3 fitted\n" , state ? "On" : "Off"); break; + case 5: printf("00000020 %-4s Long memory test disabled\n" , state ? "On" : "Off"); break; + case 6: printf("00000040 %-4s PC-style IO world detected\n" , state ? "On" : "Off"); break; + case 7: printf("00000080 %-4s VRAM detected\n" , state ? "On" : "Off"); break; + + // Fault flags + case 8: printf("00000100 %-4s CMOS RAM checksum error\n" , state ? "Fail" : "Pass"); break; + case 9: printf("00000200 %-4s ROM failed checksum test\n" , state ? "Fail" : "Pass"); break; + case 10: printf("00000400 %-4s MEMC CAM mapping failed\n" , state ? "Fail" : "Pass"); break; + case 11: printf("00000800 %-4s MEMC protection failed\n" , state ? "Fail" : "Pass"); break; + case 12: printf("00001000 %-4s IOC register test failed\n" , state ? "Fail" : "Pass"); break; + case 14: printf("00004000 %-4s VIDC Virq timing failed\n" , state ? "Fail" : "Pass"); break; + case 15: printf("00008000 %-4s VIDC Sirq timing failed\n" , state ? "Fail" : "Pass"); break; + case 16: printf("00010000 %-4s CMOS unreadable\n" , state ? "Fail" : "Pass"); break; + case 17: printf("00020000 %-4s RAM control line failure\n" , state ? "Fail" : "Pass"); break; + case 18: printf("00040000 %-4s Long RAM test failure\n" , state ? "Fail" : "Pass"); break; + } + + bitpos++; + } + + last_time = machine().time(); + } + + if (!BIT(data, 0)) m_selected_floppy = m_floppy0->get_device(); + if (!BIT(data, 1)) m_selected_floppy = m_floppy1->get_device(); + if (!BIT(data, 2)) m_selected_floppy = nullptr; // floppy 2 + if (!BIT(data, 3)) m_selected_floppy = nullptr; // floppy 3 + + m_fdc->set_floppy(m_selected_floppy); + + if (m_selected_floppy) + { + m_selected_floppy->mon_w(BIT(data, 5)); + m_selected_floppy->ss_w(!(BIT(data, 4))); + } + break; + } +} + +READ_LINE_MEMBER( aa310_state::floppy_ready_r ) +{ + if (m_selected_floppy) + return !m_selected_floppy->ready_r(); + + return 0; +} + +WRITE_LINE_MEMBER( aa310_state::sound_mute_w ) +{ + // popmessage("Muting sound, contact MAME/MESSdev"); +} + +uint32_t aa310_state::dram_r(offs_t offset, uint32_t mem_mask) +{ + return m_dram[offset]; +} + +void aa310_state::dram_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&m_dram[offset]); } void aa310_state::machine_start() { - archimedes_init(); + // LK14 and LK15 are used to configure the installed RAM, different configurations + // create different memory mirrors that RISC OS uses to detect the available RAM. + int dram_size = m_ram->size() / 1024; + m_dram = nullptr; + switch (dram_size) + { + case 512: // 512 kB + case 1024: // 1 MB + // for configurations with less than 2 MB it is necessary to use a custom handler in order to emulate the correct memory mirrors. + m_memc->output_dram_rowcol(true); + m_memc->space(0).install_readwrite_handler(0x02000000,0x021fffff, dram_size == 512 ? 0x000ff7ff : 0x001ff7ff, 0x00e00000, 0, + read32s_delegate (*this, FUNC(aa310_state::dram_r)), + write32s_delegate(*this, FUNC(aa310_state::dram_w))); + + // for better performance we allocate 2 MB and mask out unused lines in the handlers + m_dram = std::make_unique(2048 * 1024 / 4); + save_pointer(NAME(m_dram), 2048 * 1024 / 4); + break; + case 2048: // 2 MB + m_memc->space(0).install_ram(0x02000000, 0x021fffff, 0x00e00000, m_ram->pointer()); + break; + case 4096: // 4 MB + m_memc->space(0).install_ram(0x02000000, 0x023fffff, 0x00c00000, m_ram->pointer()); + break; + case 4096 * 2: // 8 MB + m_memc->space(0).install_ram(0x02000000, 0x027fffff, 0x00800000, m_ram->pointer()); + break; + case 4096 * 3: // 12 MB + m_memc->space(0).install_ram(0x02000000, 0x02bfffff, 0x00000000, m_ram->pointer()); + break; + case 4096 * 4: // 16 MB + m_memc->space(0).install_ram(0x02000000, 0x02ffffff, 0x00000000, m_ram->pointer()); + break; + default: + fatalerror("Archimedes %d kB RAM not supported", dram_size); + break; + } } void aa310_state::machine_reset() { - archimedes_reset(); + m_selected_floppy = m_floppy0->get_device(); +} + +void aa310_state::aa310_arm_mem(address_map &map) +{ + map(0x00000000, 0x01ffffff).rw(m_memc, FUNC(acorn_memc_device::logical_r), FUNC(acorn_memc_device::logical_w)); + map(0x02000000, 0x03ffffff).rw(m_memc, FUNC(acorn_memc_device::high_mem_r), FUNC(acorn_memc_device::high_mem_w)); } void aa310_state::aa310_mem(address_map &map) { - map(0x00000000, 0x01ffffff).rw(FUNC(aa310_state::archimedes_memc_logical_r), FUNC(aa310_state::archimedes_memc_logical_w)); - map(0x02000000, 0x02ffffff).ram().share("physicalram"); /* physical RAM - 16 MB for now, should be 512k for the A310 */ - map(0x03000000, 0x033fffff).rw(FUNC(aa310_state::archimedes_ioc_r), FUNC(aa310_state::archimedes_ioc_w)); + map(0x00000000, 0x01ffffff).rw(m_memc, FUNC(acorn_memc_device::logical_r), FUNC(acorn_memc_device::logical_w)); + map(0x02000000, 0x02ffffff).noprw(); // installed in machine_start + map(0x03000000, 0x033fffff).m(m_ioc, FUNC(acorn_ioc_device::map)); map(0x03400000, 0x035fffff).rom().region("extension", 0x000000).w(m_vidc, FUNC(acorn_vidc10_device::write)); - map(0x03600000, 0x037fffff).rom().region("extension", 0x200000).w(FUNC(aa310_state::archimedes_memc_w)); - map(0x03800000, 0x03ffffff).rom().region("maincpu", 0).w(FUNC(aa310_state::archimedes_memc_page_w)); -} - - -INPUT_CHANGED_MEMBER(aa310_state::key_stroke) -{ - uint8_t row_val = uint8_t(param) >> 4; - uint8_t col_val = uint8_t(param) & 0xf; - - if(newval && !oldval) - m_kart->send_keycode_down(row_val,col_val); - - if(oldval && !newval) - m_kart->send_keycode_up(row_val,col_val); -} - -INPUT_CHANGED_MEMBER(aa310_state::send_mouse_input) -{ - int x = ioport("MOUSEX")->read(); - int y = ioport("MOUSEY")->read(); - - if (x > 0x7fff) x = x - 0xffff; - if (y > 0x7fff) y = y - 0xffff; - if (x > 63) x = 63; - if (y > 63) y = 63; - if (x < -63) x = -63; - if (y < -63) y = -63; - - m_kart->send_mouse(x & 0x7f, y & 0x7f); + map(0x03600000, 0x037fffff).rom().region("extension", 0x200000).w(m_memc, FUNC(acorn_memc_device::registers_w)); + map(0x03800000, 0x03ffffff).rom().region("maincpu", 0).w(m_memc, FUNC(acorn_memc_device::page_w)); } static INPUT_PORTS_START( aa310 ) - PORT_START("dip") /* DIP switches */ - PORT_BIT(0xfd, 0xfd, IPT_UNUSED) - - PORT_START("key0") /* KEY ROW 0 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x00) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x01) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x02) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x03) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x04) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x05) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x06) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x07) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x08) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x09) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("F12") PORT_CODE(KEYCODE_F12) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0c) - PORT_BIT(0x2000, 0x00, IPT_KEYBOARD) PORT_NAME("Print") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0d) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("Scroll") /*PORT_CODE(KEYCODE_SCRLOCK)*/ PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("Break") PORT_CODE(KEYCODE_PAUSE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x0f) - - PORT_START("key1") /* KEY ROW 1 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("` ~") PORT_CODE(KEYCODE_TILDE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x10) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("1 !") PORT_CODE(KEYCODE_1) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x11) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("2 \"") PORT_CODE(KEYCODE_2) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x12) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("3 #") PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x13) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("4 $") PORT_CODE(KEYCODE_4) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x14) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("5 %") PORT_CODE(KEYCODE_5) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x15) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("6 &") PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x16) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("7 '") PORT_CODE(KEYCODE_7) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x17) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("8 *") PORT_CODE(KEYCODE_8) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x18) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("9 (") PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x19) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("0 )") PORT_CODE(KEYCODE_0) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("- _") PORT_CODE(KEYCODE_MINUS) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("= +") PORT_CODE(KEYCODE_EQUALS) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1c) - PORT_BIT(0x2000, 0x00, IPT_KEYBOARD) PORT_NAME("\xc2\xa3") PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1d) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("Back Space") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("Insert") PORT_CODE(KEYCODE_INSERT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x1f) - - PORT_START("key2") /* KEY ROW 2 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("Home") PORT_CODE(KEYCODE_HOME) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x20) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("PG UP") PORT_CODE(KEYCODE_PGUP) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x21) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("Numlock") PORT_CODE(KEYCODE_NUMLOCK) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x22) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x23) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("*") PORT_CODE(KEYCODE_ASTERISK) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x24) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("#") PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x25) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x26) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("q Q") PORT_CODE(KEYCODE_Q) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x27) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("w W") PORT_CODE(KEYCODE_W) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x28) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("e E") PORT_CODE(KEYCODE_E) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x29) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("r R") PORT_CODE(KEYCODE_R) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("t T") PORT_CODE(KEYCODE_T) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("y Y") PORT_CODE(KEYCODE_Y) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2c) - PORT_BIT(0x2000, 0x00, IPT_KEYBOARD) PORT_NAME("u U") PORT_CODE(KEYCODE_U) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2d) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("i I") PORT_CODE(KEYCODE_I) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("o O") PORT_CODE(KEYCODE_O) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x2f) - - PORT_START("key3") /* KEY ROW 3 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("p P") PORT_CODE(KEYCODE_P) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x30) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("[ {") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x31) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("] }") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x32) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("\\ |") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x33) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("DELETE") PORT_CODE(KEYCODE_DEL) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x34) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("COPY") PORT_CODE(KEYCODE_END) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x35) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("PG DN") PORT_CODE(KEYCODE_PGDN) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x36) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("KP 7") PORT_CODE(KEYCODE_7_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x37) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("KP 8") PORT_CODE(KEYCODE_8_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x38) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("KP 9") PORT_CODE(KEYCODE_9_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x39) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("KP -") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("a A") PORT_CODE(KEYCODE_A) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3c) - PORT_BIT(0x2000, 0x00, IPT_KEYBOARD) PORT_NAME("s S") PORT_CODE(KEYCODE_S) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3d) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("d D") PORT_CODE(KEYCODE_D) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("f F") PORT_CODE(KEYCODE_F) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x3f) - - PORT_START("key4") /* KEY ROW 4 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("g G") PORT_CODE(KEYCODE_G) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x40) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("h H") PORT_CODE(KEYCODE_H) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x41) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("j J") PORT_CODE(KEYCODE_J) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x42) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("k K") PORT_CODE(KEYCODE_K) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x43) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("l L") PORT_CODE(KEYCODE_L) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x44) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("; :") PORT_CODE(KEYCODE_COLON) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x45) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("' \"") PORT_CODE(KEYCODE_QUOTE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x46) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x47) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("KP 4") PORT_CODE(KEYCODE_4_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x48) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("KP 5") PORT_CODE(KEYCODE_5_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x49) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("KP 6") PORT_CODE(KEYCODE_6_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x4a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("KP +") PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x4b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("SHIFT (L)") PORT_CODE(KEYCODE_LSHIFT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x4c) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("z Z") PORT_CODE(KEYCODE_Z) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x4e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("x X") PORT_CODE(KEYCODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x4f) - - PORT_START("key5") /* KEY ROW 5 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("c C") PORT_CODE(KEYCODE_C) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x50) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("v V") PORT_CODE(KEYCODE_V) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x51) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("b B") PORT_CODE(KEYCODE_B) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x52) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("n N") PORT_CODE(KEYCODE_N) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x53) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("m M") PORT_CODE(KEYCODE_M) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x54) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME(", <") PORT_CODE(KEYCODE_COMMA) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x55) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x56) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x57) - PORT_BIT(0x0100, 0x00, IPT_KEYBOARD) PORT_NAME("SHIFT (R)") PORT_CODE(KEYCODE_RSHIFT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x58) - PORT_BIT(0x0200, 0x00, IPT_KEYBOARD) PORT_NAME("Up") PORT_CODE(KEYCODE_UP) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x59) - PORT_BIT(0x0400, 0x00, IPT_KEYBOARD) PORT_NAME("KP 1") PORT_CODE(KEYCODE_1_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5a) - PORT_BIT(0x0800, 0x00, IPT_KEYBOARD) PORT_NAME("KP 2") PORT_CODE(KEYCODE_2_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5b) - PORT_BIT(0x1000, 0x00, IPT_KEYBOARD) PORT_NAME("KP 3") PORT_CODE(KEYCODE_3_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5c) - PORT_BIT(0x2000, 0x00, IPT_KEYBOARD) PORT_NAME("CAPS") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5d) - PORT_BIT(0x4000, 0x00, IPT_KEYBOARD) PORT_NAME("ALT (L)") PORT_CODE(KEYCODE_LALT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5e) - PORT_BIT(0x8000, 0x00, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x5f) - - PORT_START("key6") /* KEY ROW 6 */ - PORT_BIT(0x0001, 0x00, IPT_KEYBOARD) PORT_NAME("ALT (R)") PORT_CODE(KEYCODE_RALT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x60) - PORT_BIT(0x0002, 0x00, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_RCONTROL) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x61) - PORT_BIT(0x0004, 0x00, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x62) - PORT_BIT(0x0008, 0x00, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x63) - PORT_BIT(0x0010, 0x00, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x64) - PORT_BIT(0x0020, 0x00, IPT_KEYBOARD) PORT_NAME("KP 0") PORT_CODE(KEYCODE_0_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x65) - PORT_BIT(0x0040, 0x00, IPT_KEYBOARD) PORT_NAME("KP .") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x66) - PORT_BIT(0x0080, 0x00, IPT_KEYBOARD) PORT_NAME("KP ENTER") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x67) - - PORT_START("MOUSE") - PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("Mouse Left") PORT_CODE(MOUSECODE_BUTTON1) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x70) - PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("Mouse Center") PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x71) - PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("Mouse Right") PORT_CODE(MOUSECODE_BUTTON3) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, key_stroke, 0x72) - - PORT_START("MOUSEX") - PORT_BIT( 0xffff, 0x00, IPT_MOUSE_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, send_mouse_input, 0) PORT_RESET - - PORT_START("MOUSEY") - PORT_BIT( 0xffff, 0x00, IPT_MOUSE_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, aa310_state, send_mouse_input, 0) PORT_RESET PORT_REVERSE - // standard Atari/Commodore DB9 // TODO: 10 different joystick configurations (!), some of them supports multiple buttons as well PORT_START("joy_p1") @@ -399,52 +447,62 @@ static void aa310_floppies(device_slot_interface &device) device.option_add("35hd", FLOPPY_35_HD); } -WRITE_LINE_MEMBER( archimedes_state::a310_kart_tx_w ) -{ - if(state) - archimedes_request_irq_b(ARCHIMEDES_IRQB_KBD_RECV_FULL); - else - archimedes_clear_irq_b(ARCHIMEDES_IRQB_KBD_RECV_FULL); -} - -WRITE_LINE_MEMBER( archimedes_state::a310_kart_rx_w ) -{ - if(state) - archimedes_request_irq_b(ARCHIMEDES_IRQB_KBD_XMIT_EMPTY); - else - archimedes_clear_irq_b(ARCHIMEDES_IRQB_KBD_XMIT_EMPTY); -} void aa310_state::aa310(machine_config &config) { /* basic machine hardware */ ARM(config, m_maincpu, 24_MHz_XTAL / 3); /* ARM2 8 MHz */ - m_maincpu->set_addrmap(AS_PROGRAM, &aa310_state::aa310_mem); + m_maincpu->set_addrmap(AS_PROGRAM, &aa310_state::aa310_arm_mem); m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020); - AAKART(config, m_kart, 8000000/256); - m_kart->out_tx_callback().set(FUNC(archimedes_state::a310_kart_tx_w)); - m_kart->out_rx_callback().set(FUNC(archimedes_state::a310_kart_rx_w)); + ACORN_MEMC(config, m_memc, 24_MHz_XTAL / 3, m_vidc); + m_memc->set_addrmap(0, &aa310_state::aa310_mem); + m_memc->sirq_w().set(m_ioc, FUNC(acorn_ioc_device::il1_w)); + + ACORN_IOC(config, m_ioc, 24_MHz_XTAL / 3); + m_ioc->fiq_w().set_inputline(m_maincpu, ARM_FIRQ_LINE); + m_ioc->irq_w().set_inputline(m_maincpu, ARM_IRQ_LINE); + m_ioc->kout_w().set("keyboard", FUNC(archimedes_keyboard_device::kin_w)); + m_ioc->peripheral_r<1>().set(FUNC(aa310_state::fdc_r)); + m_ioc->peripheral_w<1>().set(FUNC(aa310_state::fdc_w)); + m_ioc->peripheral_r<2>().set(FUNC(aa310_state::peripheral2_r)); + m_ioc->peripheral_w<2>().set_log("IOC: Econet W"); + m_ioc->peripheral_r<3>().set_log("IOC: Serial R"); + m_ioc->peripheral_w<3>().set_log("IOC: Serial W"); + m_ioc->peripheral_r<4>().set_log("IOC: Podule R"); + m_ioc->peripheral_w<4>().set_log("IOC: Podule W"); + m_ioc->peripheral_r<5>().set(FUNC(aa310_state::peripheral5_r)); + m_ioc->peripheral_w<5>().set(FUNC(aa310_state::peripheral5_w)); + m_ioc->peripheral_r<6>().set_log("IOC: External Expansion R"); + m_ioc->peripheral_w<6>().set_log("IOC: External Expansion W"); + m_ioc->gpio_r<0>().set("i2cmem", FUNC(pcf8583_device::sda_r)); + m_ioc->gpio_w<0>().set("i2cmem", FUNC(pcf8583_device::sda_w)); + m_ioc->gpio_w<1>().set("i2cmem", FUNC(pcf8583_device::scl_w)); + m_ioc->gpio_r<2>().set(FUNC(aa310_state::floppy_ready_r)); + m_ioc->gpio_w<5>().set(FUNC(aa310_state::sound_mute_w)); + + ARCHIMEDES_KEYBOARD(config, "keyboard").kout().set(m_ioc, FUNC(acorn_ioc_device::kin_w)); PCF8583(config, "i2cmem", 32.768_kHz_XTAL); - SCREEN(config, "screen", SCREEN_TYPE_RASTER); + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.screen_vblank().set(m_ioc, FUNC(acorn_ioc_device::ir_w)); ACORN_VIDC10(config, m_vidc, 24_MHz_XTAL); m_vidc->set_screen("screen"); - m_vidc->vblank().set(FUNC(aa310_state::vblank_irq)); - m_vidc->sound_drq().set(FUNC(aa310_state::sound_drq)); + m_vidc->vblank().set(m_memc, FUNC(acorn_memc_device::vidrq_w)); + m_vidc->sound_drq().set(m_memc, FUNC(acorn_memc_device::sndrq_w)); RAM(config, m_ram).set_default_size("1M"); - wd1772_device& fdc(WD1772(config, "fdc", 8000000 / 1)); // TODO: frequency + wd1772_device& fdc(WD1772(config, m_fdc, 24_MHz_XTAL / 3)); fdc.set_disable_motor_control(true); - fdc.intrq_wr_callback().set(FUNC(aa310_state::aa310_wd177x_intrq_w)); - fdc.drq_wr_callback().set(FUNC(aa310_state::aa310_wd177x_drq_w)); - FLOPPY_CONNECTOR(config, "fdc:0", aa310_floppies, "35dd", aa310_state::floppy_formats).enable_sound(true); + fdc.intrq_wr_callback().set(m_ioc, FUNC(acorn_ioc_device::fh1_w)); + fdc.drq_wr_callback().set(m_ioc, FUNC(acorn_ioc_device::fh0_w)); + FLOPPY_CONNECTOR(config, m_floppy0, aa310_floppies, "35dd", aa310_state::floppy_formats).enable_sound(true); // rarely had 2nd FDD installed, space was used for HDD - FLOPPY_CONNECTOR(config, "fdc:1", aa310_floppies, nullptr, aa310_state::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy1, aa310_floppies, nullptr, aa310_state::floppy_formats).enable_sound(true); SOFTWARE_LIST(config, "flop_list").set_original("archimedes"); @@ -531,12 +589,13 @@ void aa310_state::aa4(machine_config &config) m_maincpu->set_clock(24_MHz_XTAL); // ARM3 /* video hardware */ - SCREEN(config.replace(), "screen", SCREEN_TYPE_LCD); + screen_device &screen(SCREEN(config.replace(), "screen", SCREEN_TYPE_LCD)); + screen.screen_vblank().set(m_ioc, FUNC(acorn_ioc_device::ir_w)); ACORN_VIDC10_LCD(config.replace(), m_vidc, 24_MHz_XTAL); m_vidc->set_screen("screen"); - m_vidc->vblank().set(FUNC(aa310_state::vblank_irq)); - m_vidc->sound_drq().set(FUNC(aa310_state::sound_drq)); + m_vidc->vblank().set(m_memc, FUNC(acorn_memc_device::vidrq_w)); + m_vidc->sound_drq().set(m_memc, FUNC(acorn_memc_device::sndrq_w)); /* 765 FDC */ @@ -613,8 +672,8 @@ ROM_START( aa305 ) ROM_REGION32_LE( 0x400000, "extension", ROMREGION_ERASE00 ) ROM_REGION( 0x100, "i2cmem", ROMREGION_ERASE00 ) - ROMX_LOAD( "cmos_arthur.bin", 0x0000, 0x0100, CRC(017cdf3b) SHA1(03aa58fc8578de2019a34c6eeb4072e953f3444f), ROM_BIOS(0) ) - ROMX_LOAD( "cmos_arthur.bin", 0x0000, 0x0100, CRC(017cdf3b) SHA1(03aa58fc8578de2019a34c6eeb4072e953f3444f), ROM_BIOS(1) ) + ROMX_LOAD( "cmos_arthur.bin", 0x0000, 0x0100, CRC(4be5a84f) SHA1(2a6e52af01e23665a884f4693e2a397d731f7e4a), ROM_BIOS(0) ) + ROMX_LOAD( "cmos_arthur.bin", 0x0000, 0x0100, CRC(4be5a84f) SHA1(2a6e52af01e23665a884f4693e2a397d731f7e4a), ROM_BIOS(1) ) ROMX_LOAD( "cmos_riscos2.bin", 0x0000, 0x0100, CRC(763b14e3) SHA1(0ccd41648a798ba4a5d92c19c24b605a8927fb76), ROM_BIOS(2) ) ROMX_LOAD( "cmos_riscos2.bin", 0x0000, 0x0100, CRC(763b14e3) SHA1(0ccd41648a798ba4a5d92c19c24b605a8927fb76), ROM_BIOS(3) ) ROMX_LOAD( "cmos_riscos3.bin", 0x0000, 0x0100, CRC(0da2d31d) SHA1(4a5277f27e23f0eae9daa8cc5a4818a322f579a5), ROM_BIOS(4) ) @@ -701,6 +760,7 @@ ROM_END ROM_START( aa4 ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASEFF ) + // RISC OS 3.10 (30 Apr 1992) ROM_LOAD32_WORD( "0296,061-01.ic4", 0x000000, 0x100000, CRC(b77fe215) SHA1(57b19ea4b97a9b6a240aa61211c2c134cb295aa0) ) ROM_LOAD32_WORD( "0296,062-01.ic15", 0x000002, 0x100000, CRC(d42e196e) SHA1(64243d39d1bca38b10761f66a8042c883bde87a4) ) @@ -715,6 +775,7 @@ ROM_END ROM_START( aa3010 ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASEFF ) + // RISC OS 3.11 (29 Sep 1992) ROM_LOAD32_WORD( "0296,061-02.ic17", 0x000000, 0x100000, CRC(552fc3aa) SHA1(b2f1911e53d7377f2e69e1a870139745d3df494b) ) ROM_LOAD32_WORD( "0296,062-02.ic18", 0x000002, 0x100000, CRC(308d5a4a) SHA1(b309e1dd85670a06d77ec504dbbec6c42336329f) ) @@ -728,18 +789,21 @@ ROM_END #define rom_aa3020 rom_aa3010 #define rom_aa4000 rom_aa3010 +} // anonymous namespace + + /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP( 1987, aa305, aa310, 0, aa305, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 305", MACHINE_NOT_WORKING) -COMP( 1987, aa310, 0, 0, aa310, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 310", MACHINE_NOT_WORKING) -COMP( 1987, aa440, aa310, 0, aa440, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 440", MACHINE_NOT_WORKING) -COMP( 1989, aa3000, aa310, 0, aa3000, aa310, aa310_state, init_aa310, "Acorn", "BBC A3000", MACHINE_NOT_WORKING) -COMP( 1989, aa4101, aa310, 0, aa4101, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 410/1", MACHINE_NOT_WORKING) -COMP( 1989, aa4201, aa310, 0, aa4201, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 420/1", MACHINE_NOT_WORKING) -COMP( 1989, aa4401, aa310, 0, aa4401, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 440/1", MACHINE_NOT_WORKING) -COMP( 1990, aa540, aa310, 0, aa540, aa310, aa310_state, init_aa310, "Acorn", "Archimedes 540", MACHINE_NOT_WORKING) -COMP( 1991, aa5000, 0, 0, aa5000, aa310, aa310_state, init_aa310, "Acorn", "Acorn A5000", MACHINE_NOT_WORKING) -COMP( 1992, aa4, aa5000, 0, aa4, aa310, aa310_state, init_aa310, "Acorn", "Acorn A4", MACHINE_NOT_WORKING) -COMP( 1992, aa3010, aa4000, 0, aa3010, aa310, aa310_state, init_aa310, "Acorn", "Acorn A3010", MACHINE_NOT_WORKING) -COMP( 1992, aa3020, aa4000, 0, aa3020, aa310, aa310_state, init_aa310, "Acorn", "Acorn A3020", MACHINE_NOT_WORKING) -COMP( 1992, aa4000, 0, 0, aa4000, aa310, aa310_state, init_aa310, "Acorn", "Acorn A4000", MACHINE_NOT_WORKING) -COMP( 1993, aa5000a, aa5000, 0, aa5000a, aa310, aa310_state, init_aa310, "Acorn", "Acorn A5000 Alpha", MACHINE_NOT_WORKING) +COMP( 1987, aa305, aa310, 0, aa305, aa310, aa310_state, empty_init, "Acorn", "Archimedes 305", MACHINE_NOT_WORKING) +COMP( 1987, aa310, 0, 0, aa310, aa310, aa310_state, empty_init, "Acorn", "Archimedes 310", MACHINE_NOT_WORKING) +COMP( 1987, aa440, aa310, 0, aa440, aa310, aa310_state, empty_init, "Acorn", "Archimedes 440", MACHINE_NOT_WORKING) +COMP( 1989, aa3000, aa310, 0, aa3000, aa310, aa310_state, empty_init, "Acorn", "BBC A3000", MACHINE_NOT_WORKING) +COMP( 1989, aa4101, aa310, 0, aa4101, aa310, aa310_state, empty_init, "Acorn", "Archimedes 410/1", MACHINE_NOT_WORKING) +COMP( 1989, aa4201, aa310, 0, aa4201, aa310, aa310_state, empty_init, "Acorn", "Archimedes 420/1", MACHINE_NOT_WORKING) +COMP( 1989, aa4401, aa310, 0, aa4401, aa310, aa310_state, empty_init, "Acorn", "Archimedes 440/1", MACHINE_NOT_WORKING) +COMP( 1990, aa540, aa310, 0, aa540, aa310, aa310_state, empty_init, "Acorn", "Archimedes 540", MACHINE_NOT_WORKING) +COMP( 1991, aa5000, 0, 0, aa5000, aa310, aa310_state, empty_init, "Acorn", "Acorn A5000", MACHINE_NOT_WORKING) +COMP( 1992, aa4, aa5000, 0, aa4, aa310, aa310_state, empty_init, "Acorn", "Acorn A4", MACHINE_NOT_WORKING) +COMP( 1992, aa3010, aa4000, 0, aa3010, aa310, aa310_state, empty_init, "Acorn", "Acorn A3010", MACHINE_NOT_WORKING) +COMP( 1992, aa3020, aa4000, 0, aa3020, aa310, aa310_state, empty_init, "Acorn", "Acorn A3020", MACHINE_NOT_WORKING) +COMP( 1992, aa4000, 0, 0, aa4000, aa310, aa310_state, empty_init, "Acorn", "Acorn A4000", MACHINE_NOT_WORKING) +COMP( 1993, aa5000a, aa5000, 0, aa5000a, aa310, aa310_state, empty_init, "Acorn", "Acorn A5000 Alpha", MACHINE_NOT_WORKING) diff --git a/src/mame/machine/archimedes_keyb.cpp b/src/mame/machine/archimedes_keyb.cpp new file mode 100644 index 00000000000..a50b7cea07a --- /dev/null +++ b/src/mame/machine/archimedes_keyb.cpp @@ -0,0 +1,392 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, Sandro Ronco +/********************************************************************** + + Acorn Archimedes keyboard + +*********************************************************************/ + +#include "emu.h" +#include "archimedes_keyb.h" + + +/*************************************************************************** + IMPLEMENTATION +***************************************************************************/ + +DEFINE_DEVICE_TYPE(ARCHIMEDES_KEYBOARD, archimedes_keyboard_device, "archimedes_keyboard", "Acorn Archimedes Keyboard") + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +static INPUT_PORTS_START( archimedes_keyboard ) + PORT_START("ROW.0") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_NUMLOCK) PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK)) + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(PGUP)) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PAUSE) PORT_CHAR(UCHAR_MAMEKEY(PAUSE)) PORT_NAME("Break") + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SCRLOCK) PORT_CHAR(UCHAR_MAMEKEY(SCRLOCK)) + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_OTHER) // Keyboard ID bit 4 + PORT_BIT(0xfe00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.1") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_OTHER) // Keyboard ID bit 5 + PORT_BIT(0xfe00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.2") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.3") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.4") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.5") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.6") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_NAME("Return") + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.7") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.8") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('#') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL)) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(END)) PORT_NAME("Copy") + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_CHAR(UCHAR_MAMEKEY(PGDN)) + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_OTHER) // Keyboard ID bit 0 + PORT_BIT(0xfe00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.9") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR('*') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(0xa3) PORT_CHAR(0xa4) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(UCHAR_MAMEKEY(BACKSPACE)) PORT_NAME("Back Space") + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_OTHER) // Keyboard ID bit 1 + PORT_BIT(0xfe00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.10") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.11") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR('/') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10)) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12)) + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.12") + PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') + PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') + PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) + PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) + PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) + PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.13") + PORT_BIT(0x00ff, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) + PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) + PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) + PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PRTSCR) PORT_CHAR(UCHAR_MAMEKEY(PRTSCR)) PORT_NAME("Print") + PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) + PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL)) + PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(RALT)) + + PORT_START("ROW.14") + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_OTHER) // Keyboard ID bit 2 + PORT_BIT(0xfeff, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("ROW.15") + PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_OTHER) // Keyboard ID bit 3 + PORT_BIT(0xfeff, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("MOUSE.0") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_MOUSE_X) PORT_SENSITIVITY(50) PORT_KEYDELTA(0) PORT_RESET PORT_CODE(MOUSECODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, archimedes_keyboard_device, update_mouse_input, 0) + + PORT_START("MOUSE.1") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_MOUSE_Y) PORT_SENSITIVITY(50) PORT_KEYDELTA(0) PORT_RESET PORT_CODE(MOUSECODE_Y) PORT_CHANGED_MEMBER(DEVICE_SELF, archimedes_keyboard_device, update_mouse_input, 1) PORT_REVERSE + + PORT_START("MOUSE.2") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(MOUSECODE_BUTTON1) PORT_NAME("Mouse Left") + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(MOUSECODE_BUTTON2) PORT_NAME("Mouse Center") + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(MOUSECODE_BUTTON3) PORT_NAME("Mouse Right") +INPUT_PORTS_END + + +ioport_constructor archimedes_keyboard_device::device_input_ports() const +{ + return INPUT_PORTS_NAME( archimedes_keyboard ); +} + + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// archimedes_keyboard_device - constructor +//------------------------------------------------- + +archimedes_keyboard_device::archimedes_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ARCHIMEDES_KEYBOARD, tag, owner, clock) + , device_serial_interface(mconfig, *this) + , m_mcu(*this, "mcu") + , m_kout(*this) + , m_keyboard(*this, "ROW.%u", 0U) + , m_mouse(*this, "MOUSE.%u", 0U) + , m_leds(*this, "keyb_led.%u", 0U) +{ +} + + +void archimedes_keyboard_device::device_resolve_objects() +{ + m_kout.resolve_safe(); + m_leds.resolve(); +} + +void archimedes_keyboard_device::device_start() +{ + // KART interface + set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2); + set_rate(31250); + + m_mouse_timer = timer_alloc(); + + save_item(NAME(m_mouse_x)); + save_item(NAME(m_mouse_y)); + save_item(NAME(m_mouse_phase)); + save_item(NAME(m_mouse_xref)); + save_item(NAME(m_mouse_xdir)); + save_item(NAME(m_mouse_yref)); + save_item(NAME(m_mouse_ydir)); + save_item(NAME(m_mux)); +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void archimedes_keyboard_device::device_reset() +{ + m_mouse_x = 0; + m_mouse_y = 0; + m_mouse_phase = 1; + m_mouse_xref = 1; + m_mouse_xdir = 1; + m_mouse_yref = 1; + m_mouse_ydir = 1; + m_mux = 0; + + transmit_register_reset(); + receive_register_reset(); + + m_mouse_timer->adjust(attotime::from_hz(1000 * 4), 0, attotime::from_hz(1000 * 4)); +} + +//------------------------------------------------- +// device_add_mconfig - add device configuration +//------------------------------------------------- + +void archimedes_keyboard_device::device_add_mconfig(machine_config &config) +{ + I8051(config, m_mcu, 12_MHz_XTAL); // Philips 8051AH-2 + m_mcu->port_in_cb<0>().set([this]() { return m_keyboard[m_mux & 0x0f]->read() & 0xff; }); + m_mcu->port_in_cb<1>().set([this]() { return (m_keyboard[m_mux & 0x0f]->read() >> 8) & 0xff; }); + m_mcu->port_in_cb<2>().set(FUNC(archimedes_keyboard_device::mouse_r)); + m_mcu->port_in_cb<3>().set([this]() { return m_mouse[2]->read() & 0xff; }); + m_mcu->port_out_cb<2>().set([this](uint8_t data) { m_mux = data; }); + m_mcu->port_out_cb<3>().set(FUNC(archimedes_keyboard_device::leds_w)); + m_mcu->serial_rx_cb().set([this]() { return get_received_char(); }); + m_mcu->serial_tx_cb().set(FUNC(archimedes_keyboard_device::tx_w)); +} + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +ROM_START( archimedes_keyboard ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD("acorn_0280,022-01_philips_8051ah-2.bin", 0x0000, 0x1000, CRC(95095d38) SHA1(b9fd0000d77987f76fd48348fe2c6988818f40cb)) +ROM_END + + +const tiny_rom_entry *archimedes_keyboard_device::device_rom_region() const +{ + return ROM_NAME( archimedes_keyboard ); +} + +void archimedes_keyboard_device::tra_complete() +{ +} + +void archimedes_keyboard_device::rcv_complete() +{ + receive_register_extract(); + m_mcu->set_input_line(MCS51_RX_LINE, ASSERT_LINE); + m_mcu->set_input_line(MCS51_RX_LINE, CLEAR_LINE); +} + +void archimedes_keyboard_device::tra_callback() +{ + m_kout(transmit_register_get_data_bit()); +} + +void archimedes_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + // Mouse quadrature signals + // Increase Decrease + // REF DIR REF DIR + // 1 1 1 1 + // 1 0 0 1 + // 0 0 0 0 + // 0 1 1 0 + + switch (m_mouse_phase) + { + case 0: + m_mouse_xdir = m_mouse_xref = 1; + m_mouse_ydir = m_mouse_yref = 1; + break; + case 1: + m_mouse_xref = m_mouse_x < 0 ? 0 : 1; + m_mouse_xdir = m_mouse_x > 0 ? 0 : 1; + m_mouse_yref = m_mouse_y < 0 ? 0 : 1; + m_mouse_ydir = m_mouse_y > 0 ? 0 : 1; + break; + case 2: + m_mouse_xdir = m_mouse_xref = m_mouse_x != 0 ? 0 : 1; + m_mouse_ydir = m_mouse_yref = m_mouse_y != 0 ? 0 : 1; + break; + case 3: + m_mouse_xref = m_mouse_x > 0 ? 0 : 1; + m_mouse_xdir = m_mouse_x < 0 ? 0 : 1; + m_mouse_yref = m_mouse_y > 0 ? 0 : 1; + m_mouse_ydir = m_mouse_y < 0 ? 0 : 1; + if (m_mouse_x > 0) m_mouse_x--; + if (m_mouse_x < 0) m_mouse_x++; + if (m_mouse_y > 0) m_mouse_y--; + if (m_mouse_y < 0) m_mouse_y++; + break; + } + + m_mouse_phase = (m_mouse_phase + 1) & 3; +} + +void archimedes_keyboard_device::leds_w(uint8_t data) +{ + // Keyboard LEDs + // --- -x-- Caps Lock + // --- x--- Scroll Lock + // --x ---- Num Lock + + for (int i = 0; i < 3; i++) + m_leds[i] = BIT(data, 2 + i); +} + +uint8_t archimedes_keyboard_device::mouse_r() +{ + return (m_mouse_xref << 4) | (m_mouse_xdir << 5) | (m_mouse_yref << 6) | (m_mouse_ydir << 7); +} + +void archimedes_keyboard_device::tx_w(uint8_t data) +{ + if (is_transmit_register_empty()) + transmit_register_setup(data); +} + +INPUT_CHANGED_MEMBER(archimedes_keyboard_device::update_mouse_input) +{ + if (param == 0) + m_mouse_x = (int16_t)m_mouse[0]->read(); + + if (param == 1) + m_mouse_y = (int16_t)m_mouse[1]->read(); +} diff --git a/src/mame/machine/archimedes_keyb.h b/src/mame/machine/archimedes_keyb.h new file mode 100644 index 00000000000..08207f0f6b8 --- /dev/null +++ b/src/mame/machine/archimedes_keyb.h @@ -0,0 +1,79 @@ +// license:LGPL-2.1+ +// copyright-holders:Angelo Salese, Sandro Ronco +/********************************************************************** + + Acorn Archimedes keyboard + +*********************************************************************/ + +#ifndef MAME_MACHINE_ARCHIMEDES_KEYB_H +#define MAME_MACHINE_ARCHIMEDES_KEYB_H + +#pragma once + +#include "cpu/mcs51/mcs51.h" + +#include "diserial.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> archimedes_keyboard_device + +class archimedes_keyboard_device : public device_t, public device_serial_interface +{ +public: + // construction/destruction + archimedes_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + + auto kout() { return m_kout.bind(); } + + DECLARE_WRITE_LINE_MEMBER(kin_w) { rx_w(state); } + DECLARE_INPUT_CHANGED_MEMBER(update_mouse_input); + +protected: + // device-level overrides + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // optional information overrides + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual ioport_constructor device_input_ports() const override; + + // device_serial_interface overrides + virtual void tra_callback() override; + virtual void tra_complete() override; + virtual void rcv_complete() override; + +private: + void tx_w(uint8_t data); + uint8_t mouse_r(); + void leds_w(uint8_t data); + + required_device m_mcu; + devcb_write_line m_kout; + required_ioport_array<16> m_keyboard; + required_ioport_array<3> m_mouse; + output_finder<3> m_leds; + + emu_timer * m_mouse_timer; + uint8_t m_mouse_phase; + uint8_t m_mouse_xdir; + uint8_t m_mouse_xref; + uint8_t m_mouse_ydir; + uint8_t m_mouse_yref; + int16_t m_mouse_x; + int16_t m_mouse_y; + uint8_t m_mux; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(ARCHIMEDES_KEYBOARD, archimedes_keyboard_device) + + +#endif // MAME_MACHINE_ARCHIMEDES_KEYB_H