diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index 261c47a5e2a..88d8a38f7a4 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2756,6 +2756,18 @@ if (MACHINES["S3C44B0"]~=null) then } end +--------------------------------------------------- +-- +--@src/devices/machine/sa1110.h,MACHINES["SA1110"] = true +--------------------------------------------------- + +if (MACHINES["SA1110"]~=null) then + files { + MAME_DIR .. "src/devices/machine/sa1110.cpp", + MAME_DIR .. "src/devices/machine/sa1110.h", + } +end + --------------------------------------------------- -- --@src/devices/machine/saa1043.h,MACHINES["SAA1043"] = true diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 7b7203800a6..376a95cbeeb 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -609,6 +609,7 @@ MACHINES["S2636"] = true MACHINES["S3520CF"] = true MACHINES["S3C24XX"] = true --MACHINES["S3C44B0"] = true +--MACHINES["SA1110"] = true MACHINES["SATURN"] = true MACHINES["SCC68070"] = true MACHINES["SCN_PCI"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index 541899da7c0..74ab818cc2d 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -634,6 +634,7 @@ MACHINES["S_SMP"] = true MACHINES["S3520CF"] = true MACHINES["S3C24XX"] = true MACHINES["S3C44B0"] = true +MACHINES["SA1110"] = true MACHINES["SAA1043"] = true MACHINES["SATURN"] = true MACHINES["SCC68070"] = true diff --git a/src/devices/machine/sa1110.cpp b/src/devices/machine/sa1110.cpp new file mode 100644 index 00000000000..ae75340f2ce --- /dev/null +++ b/src/devices/machine/sa1110.cpp @@ -0,0 +1,227 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/************************************************************************** + * + * Intel XScale SA1110 peripheral emulation + * + **************************************************************************/ + +#include "emu.h" +#include "sa1110.h" + +#define LOG_UNKNOWN (1 << 1) +#define LOG_INTC (1 << 2) +#define LOG_POWER (1 << 3) +#define LOG_ALL (LOG_UNKNOWN | LOG_INTC | LOG_POWER) + +#define VERBOSE (LOG_ALL) +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(SA1110_PERIPHERALS, sa1110_periphs_device, "sa1110_periphs", "Intel XScale SA1110 Peripherals") + +sa1110_periphs_device::sa1110_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, SA1110_PERIPHERALS, tag, owner, clock) + , m_maincpu(*this, finder_base::DUMMY_TAG) +{ +} + +/* + + Intel SA-1110 Interrupt Controller + + pg. 81 to 88 Intel StrongARM SA-1110 Microprocessor Developer's Manual + +*/ + +void sa1110_periphs_device::update_interrupts() +{ + m_intc_regs.icfp = (m_intc_regs.icpr & m_intc_regs.icmr) & m_intc_regs.iclr; + m_intc_regs.icip = (m_intc_regs.icpr & m_intc_regs.icmr) & (~m_intc_regs.iclr); + m_maincpu->set_input_line(ARM7_FIRQ_LINE, m_intc_regs.icfp ? ASSERT_LINE : CLEAR_LINE); + m_maincpu->set_input_line(ARM7_IRQ_LINE, m_intc_regs.icip ? ASSERT_LINE : CLEAR_LINE); +} + +void sa1110_periphs_device::set_irq_line(uint32_t line, int irq_state) +{ + m_intc_regs.icpr &= ~line; + m_intc_regs.icpr |= irq_state ? line : 0; + update_interrupts(); +} + +uint32_t sa1110_periphs_device::intc_r(offs_t offset, uint32_t mem_mask) +{ + switch (offset) + { + case REG_ICIP: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller IRQ Pending Register: %08x & %08x\n", m_intc_regs.icip, mem_mask); + return m_intc_regs.icip; + case REG_ICMR: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller Mask Register: %08x & %08x\n", m_intc_regs.icmr, mem_mask); + return m_intc_regs.icmr; + case REG_ICLR: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller Level Register: %08x & %08x\n", m_intc_regs.iclr, mem_mask); + return m_intc_regs.iclr; + case REG_ICFP: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller FIQ Pending Register: %08x & %08x\n", m_intc_regs.icfp, mem_mask); + return m_intc_regs.icfp; + case REG_ICPR: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller Pending Register: %08x & %08x\n", m_intc_regs.icpr, mem_mask); + return m_intc_regs.icpr; + case REG_ICCR: + LOGMASKED(LOG_INTC, "sa1110 intc_r: Interrupt Controller Control Register: %08x & %08x\n", m_intc_regs.iccr, mem_mask); + return m_intc_regs.iccr; + default: + LOGMASKED(LOG_INTC | LOG_UNKNOWN, "sa1110 intc_r: Unknown address: %08x\n", INTC_BASE_ADDR | (offset << 2)); + break; + } + return 0; +} + +void sa1110_periphs_device::intc_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + switch (offset) + { + case REG_ICIP: + LOGMASKED(LOG_INTC, "sa1110 intc_w: (Invalid Write) Interrupt Controller IRQ Pending Register: %08x & %08x\n", data, mem_mask); + break; + case REG_ICMR: + LOGMASKED(LOG_INTC, "sa1110 intc_w: Interrupt Controller Mask Register: %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_intc_regs.icmr); + break; + case REG_ICLR: + LOGMASKED(LOG_INTC, "sa1110 intc_w: Interrupt Controller Level Register: %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_intc_regs.iclr); + break; + case REG_ICFP: + LOGMASKED(LOG_INTC, "sa1110 intc_w: (Invalid Write) Interrupt Controller FIQ Pending Register: %08x & %08x\n", data, mem_mask); + break; + case REG_ICPR: + LOGMASKED(LOG_INTC, "sa1110_intc_w: (Invalid Write) Interrupt Controller Pending Register: %08x & %08x\n", data, mem_mask); + break; + case REG_ICCR: + LOGMASKED(LOG_INTC, "sa1110 intc_w: Interrupt Controller Control Register: %08x & %08x\n", data, mem_mask); + m_intc_regs.iccr = BIT(data, 0); + break; + default: + LOGMASKED(LOG_INTC | LOG_UNKNOWN, "sa1110 intc_w: Unknown address: %08x = %08x & %08x\n", INTC_BASE_ADDR | (offset << 2), data, mem_mask); + break; + } +} + +/* + + Intel SA-1110 Power Controller + + pg. 104 to 111 Intel StrongARM SA-1110 Microprocessor Developer's Manual + +*/ + +uint32_t sa1110_periphs_device::power_r(offs_t offset, uint32_t mem_mask) +{ + switch (offset) + { + case REG_PMCR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Control Register: %08x\n", machine().describe_context(), m_power_regs.pmcr); + return m_power_regs.pmcr; + case REG_PSSR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Sleep Status Register: %08x\n", machine().describe_context(), m_power_regs.pssr); + return m_power_regs.pssr; + case REG_PSPR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Scratch Pad Register: %08x\n", machine().describe_context(), m_power_regs.pspr); + return m_power_regs.pspr; + case REG_PWER: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Wake-up Enable Register: %08x\n", machine().describe_context(), m_power_regs.pwer); + return m_power_regs.pwer; + case REG_PCFR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager General Configuration Register: %08x\n", machine().describe_context(), m_power_regs.pcfr); + return m_power_regs.pcfr; + case REG_PPCR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager PLL Configuration Register: %08x\n", machine().describe_context(), m_power_regs.ppcr); + return m_power_regs.ppcr; + case REG_PGSR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Sleep State Register: %08x\n", machine().describe_context(), m_power_regs.pgsr); + return m_power_regs.pgsr; + case REG_POSR: + LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Oscillator Status Register: %08x\n", machine().describe_context(), m_power_regs.posr); + return m_power_regs.posr; + default: + LOGMASKED(LOG_POWER | LOG_UNKNOWN, "%s: power_r: Unknown address: %08x\n", machine().describe_context(), POWER_BASE_ADDR | (offset << 2)); + break; + } + return 0; +} + +void sa1110_periphs_device::power_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + switch (offset) + { + case REG_PMCR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pmcr); + break; + case REG_PSSR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Sleep Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_power_regs.pssr &= ~(data & 0x0000001f); + break; + case REG_PSPR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Scratch Pad Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pspr); + break; + case REG_PWER: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Wake-Up Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pwer); + break; + case REG_PCFR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager General Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pcfr); + break; + case REG_PPCR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager PLL Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.ppcr); + break; + case REG_PGSR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager GPIO Sleep State Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pgsr); + break; + case REG_POSR: + LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Oscillator Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + break; + default: + LOGMASKED(LOG_POWER | LOG_UNKNOWN, "%s: power_w: Unknown address: %08x = %08x & %08x\n", machine().describe_context(), POWER_BASE_ADDR | (offset << 2), + data, mem_mask); + break; + } +} + +void sa1110_periphs_device::device_start() +{ + save_item(NAME(m_intc_regs.icip), m_intc_regs.icip); + save_item(NAME(m_intc_regs.icmr), m_intc_regs.icmr); + save_item(NAME(m_intc_regs.iclr), m_intc_regs.iclr); + save_item(NAME(m_intc_regs.iccr), m_intc_regs.iccr); + save_item(NAME(m_intc_regs.icfp), m_intc_regs.icfp); + save_item(NAME(m_intc_regs.icpr), m_intc_regs.icpr); + + save_item(NAME(m_power_regs.pmcr), m_power_regs.pmcr); + save_item(NAME(m_power_regs.pssr), m_power_regs.pssr); + save_item(NAME(m_power_regs.pspr), m_power_regs.pspr); + save_item(NAME(m_power_regs.pwer), m_power_regs.pwer); + save_item(NAME(m_power_regs.pcfr), m_power_regs.pcfr); + save_item(NAME(m_power_regs.ppcr), m_power_regs.ppcr); + save_item(NAME(m_power_regs.pgsr), m_power_regs.pgsr); + save_item(NAME(m_power_regs.posr), m_power_regs.posr); +} + +void sa1110_periphs_device::device_reset() +{ + memset(&m_intc_regs, 0, sizeof(m_intc_regs)); + memset(&m_power_regs, 0, sizeof(m_power_regs)); +} + +void sa1110_periphs_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ +} + +void sa1110_periphs_device::device_add_mconfig(machine_config &config) +{ +} diff --git a/src/devices/machine/sa1110.h b/src/devices/machine/sa1110.h new file mode 100644 index 00000000000..0296ab1c2eb --- /dev/null +++ b/src/devices/machine/sa1110.h @@ -0,0 +1,96 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/************************************************************************** + * + * Intel XScale SA1110 peripheral emulation + * + **************************************************************************/ + +#ifndef MAME_MACHINE_SA1110 +#define MAME_MACHINE_SA1110 + +#pragma once + +#include "cpu/arm7/arm7.h" +#include "cpu/arm7/arm7core.h" +#include "sound/dmadac.h" +#include "emupal.h" + +class sa1110_periphs_device : public device_t +{ +public: + template + sa1110_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag) + : sa1110_periphs_device(mconfig, tag, owner, clock) + { + m_maincpu.set_tag(std::forward(cpu_tag)); + } + + sa1110_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + uint32_t intc_r(offs_t offset, uint32_t mem_mask = ~0); + void intc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t power_r(offs_t offset, uint32_t mem_mask = ~0); + void power_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + +protected: + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + void update_interrupts(); + void set_irq_line(uint32_t line, int state); + + enum + { + INTC_BASE_ADDR = 0x90050000, + REG_ICIP = (0x00000000 >> 2), + REG_ICMR = (0x00000004 >> 2), + REG_ICLR = (0x00000008 >> 2), + REG_ICCR = (0x0000000c >> 2), + REG_ICFP = (0x00000010 >> 2), + REG_ICPR = (0x00000020 >> 2), + + POWER_BASE_ADDR = 0x90020000, + REG_PMCR = (0x00000000 >> 2), + REG_PSSR = (0x00000004 >> 2), + REG_PSPR = (0x00000008 >> 2), + REG_PWER = (0x0000000c >> 2), + REG_PCFR = (0x00000010 >> 2), + REG_PPCR = (0x00000014 >> 2), + REG_PGSR = (0x00000018 >> 2), + REG_POSR = (0x0000001c >> 2) + }; + + struct intc_regs + { + uint32_t icip; + uint32_t icmr; + uint32_t iclr; + uint32_t iccr; + uint32_t icfp; + uint32_t icpr; + }; + + struct power_regs + { + uint32_t pmcr; + uint32_t pssr; + uint32_t pspr; + uint32_t pwer; + uint32_t pcfr; + uint32_t ppcr; + uint32_t pgsr; + uint32_t posr; + }; + + intc_regs m_intc_regs; + power_regs m_power_regs; + + required_device m_maincpu; +}; + +DECLARE_DEVICE_TYPE(SA1110_PERIPHERALS, sa1110_periphs_device) + +#endif // MAME_MACHINE_SA1110 diff --git a/src/mame/drivers/zaurus.cpp b/src/mame/drivers/zaurus.cpp index cc0ffd84454..b8d80ce1aeb 100644 --- a/src/mame/drivers/zaurus.cpp +++ b/src/mame/drivers/zaurus.cpp @@ -5,10 +5,7 @@ Sharp Zaurus PDA skeleton driver (SL, ARM/Linux based, 4th generation) TODO: - - PXA-255 ID opcode fails on this - ARM TLB look-up errors? - - RTC IRQ doesn't fire? - - For whatever reason, after RTC check ARM executes invalid code at 0-0x200 - Dumps are questionable ========================================================================================================================================= @@ -1407,6 +1404,7 @@ Note: #include "cpu/arm7/arm7.h" #include "cpu/arm7/arm7core.h" #include "machine/pxa255.h" +#include "machine/sa1110.h" #include "machine/timer.h" #include "emupal.h" #include "screen.h" @@ -1423,14 +1421,46 @@ class zaurus_state : public driver_device public: zaurus_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) - , m_pxa_periphs(*this, "pxa_periphs") , m_maincpu(*this, "maincpu") , m_ram(*this, "ram") + { } + +protected: + // driver_device overrides + virtual void machine_start() override; + virtual void machine_reset() override; + + // devices + required_device m_maincpu; + required_shared_ptr m_ram; +}; + +class zaurus_sa_state : public zaurus_state +{ +public: + zaurus_sa_state(const machine_config &mconfig, device_type type, const char *tag) + : zaurus_state(mconfig, type, tag) + , m_sa_periphs(*this, "sa_periphs") + { } + + void zaurus_sa1110(machine_config &config); + +private: + void main_map(address_map &map); + + required_device m_sa_periphs; +}; + +class zaurus_pxa_state : public zaurus_state +{ +public: + zaurus_pxa_state(const machine_config &mconfig, device_type type, const char *tag) + : zaurus_state(mconfig, type, tag) + , m_pxa_periphs(*this, "pxa_periphs") , m_power(*this, "PWR") { } - void zaurus_base(machine_config &config); - void zaurus_sa1110(machine_config &config); + void zaurus_pxa_base(machine_config &config); void zaurus_pxa250(machine_config &config); void zaurus_pxa255(machine_config &config); void zaurus_pxa270(machine_config &config); @@ -1438,20 +1468,21 @@ public: DECLARE_INPUT_CHANGED_MEMBER( system_start ); private: - // driver_device overrides - virtual void machine_start() override; - virtual void machine_reset() override; + void main_map(address_map &map); - void zaurus_map(address_map &map); - - // devices required_device m_pxa_periphs; - required_device m_maincpu; - required_shared_ptr m_ram; required_ioport m_power; }; -void zaurus_state::zaurus_map(address_map &map) +void zaurus_sa_state::main_map(address_map &map) +{ + map(0x00000000, 0x00ffffff).ram().region("firmware", 0); + map(0x90020000, 0x9002001f).rw(m_sa_periphs, FUNC(sa1110_periphs_device::power_r), FUNC(sa1110_periphs_device::power_w)); + map(0x90050000, 0x90050023).rw(m_sa_periphs, FUNC(sa1110_periphs_device::intc_r), FUNC(sa1110_periphs_device::intc_w)); + map(0xc0000000, 0xc07fffff).ram().share("ram"); +} + +void zaurus_pxa_state::main_map(address_map &map) { map(0x00000000, 0x001fffff).ram().region("firmware", 0); map(0x40000000, 0x400002ff).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::dma_r), FUNC(pxa255_periphs_device::dma_w)); @@ -1466,16 +1497,18 @@ void zaurus_state::zaurus_map(address_map &map) map(0xa0000000, 0xa07fffff).ram().share("ram"); } -INPUT_CHANGED_MEMBER( zaurus_state::system_start ) +INPUT_CHANGED_MEMBER( zaurus_pxa_state::system_start ) { m_pxa_periphs->gpio_bit_w(10, m_power->read()); } -static INPUT_PORTS_START( zaurus ) - PORT_START("PWR") - PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start System") PORT_CHANGED_MEMBER(DEVICE_SELF, zaurus_state, system_start, 0) +static INPUT_PORTS_START( zaurus_sa ) INPUT_PORTS_END +static INPUT_PORTS_START( zaurus_pxa ) + PORT_START("PWR") + PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start System") PORT_CHANGED_MEMBER(DEVICE_SELF, zaurus_pxa_state, system_start, 0) +INPUT_PORTS_END void zaurus_state::machine_start() { @@ -1485,37 +1518,36 @@ void zaurus_state::machine_reset() { } -void zaurus_state::zaurus_base(machine_config &config) -{ - m_maincpu->set_addrmap(AS_PROGRAM, &zaurus_state::zaurus_map); -} - -void zaurus_state::zaurus_sa1110(machine_config &config) +void zaurus_sa_state::zaurus_sa1110(machine_config &config) { SA1110(config, m_maincpu, SA1110_CLOCK); - PXA255_PERIPHERALS(config, m_pxa_periphs, SA1110_CLOCK, m_maincpu); // TODO: Correct peripherals - zaurus_base(config); + m_maincpu->set_addrmap(AS_PROGRAM, &zaurus_sa_state::main_map); + + SA1110_PERIPHERALS(config, m_sa_periphs, SA1110_CLOCK, m_maincpu); } -void zaurus_state::zaurus_pxa250(machine_config &config) +void zaurus_pxa_state::zaurus_pxa250(machine_config &config) { PXA250(config, m_maincpu, PXA250_CLOCK); - PXA255_PERIPHERALS(config, m_pxa_periphs, PXA250_CLOCK, m_maincpu); // TODO: Correct peripherals - zaurus_base(config); + m_maincpu->set_addrmap(AS_PROGRAM, &zaurus_pxa_state::main_map); + + PXA255_PERIPHERALS(config, m_pxa_periphs, PXA250_CLOCK, m_maincpu); } -void zaurus_state::zaurus_pxa255(machine_config &config) +void zaurus_pxa_state::zaurus_pxa255(machine_config &config) { PXA255(config, m_maincpu, PXA255_CLOCK); + m_maincpu->set_addrmap(AS_PROGRAM, &zaurus_pxa_state::main_map); + PXA255_PERIPHERALS(config, m_pxa_periphs, PXA255_CLOCK, m_maincpu); - zaurus_base(config); } -void zaurus_state::zaurus_pxa270(machine_config &config) +void zaurus_pxa_state::zaurus_pxa270(machine_config &config) { PXA270(config, m_maincpu, PXA270_CLOCK); + m_maincpu->set_addrmap(AS_PROGRAM, &zaurus_pxa_state::main_map); + PXA255_PERIPHERALS(config, m_pxa_periphs, PXA270_CLOCK, m_maincpu); // TODO: Correct peripherals - zaurus_base(config); } /*************************************************************************** @@ -1563,10 +1595,10 @@ ROM_START( zslc1000 ) ROM_LOAD( "openzaurus 3.5.3 - zimage-sharp sl-c1000-20050427214434.bin", 0x000000, 0x128980, BAD_DUMP CRC(1e1a9279) SHA1(909ac3f00385eced55822d6a155b79d9d25f43b3) ) ROM_END -COMP( 2002, zsl5500, 0, 0, zaurus_sa1110, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-5500 \"Collie\"", MACHINE_IS_SKELETON ) -COMP( 2002, zslc500, 0, 0, zaurus_pxa250, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-C500", MACHINE_IS_SKELETON ) -COMP( 2002, zsl5600, 0, 0, zaurus_pxa250, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-5600 / SL-B500 \"Poodle\"", MACHINE_IS_SKELETON ) -COMP( 2003, zslc750, 0, 0, zaurus_pxa255, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-C750 \"Shepherd\" (Japan)", MACHINE_IS_SKELETON ) -COMP( 2004, zslc760, 0, 0, zaurus_pxa255, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-C760 \"Husky\" (Japan)", MACHINE_IS_SKELETON ) -COMP( 200?, zslc3000, 0, 0, zaurus_pxa270, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-C3000 \"Spitz\" (Japan)", MACHINE_IS_SKELETON ) -COMP( 200?, zslc1000, 0, 0, zaurus_pxa270, zaurus, zaurus_state, empty_init, "Sharp", "Zaurus SL-C3000 \"Akita\" (Japan)", MACHINE_IS_SKELETON ) +COMP( 2002, zsl5500, 0, 0, zaurus_sa1110, zaurus_sa, zaurus_sa_state, empty_init, "Sharp", "Zaurus SL-5500 \"Collie\"", MACHINE_IS_SKELETON ) +COMP( 2002, zslc500, 0, 0, zaurus_pxa250, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-C500", MACHINE_IS_SKELETON ) +COMP( 2002, zsl5600, 0, 0, zaurus_pxa250, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-5600 / SL-B500 \"Poodle\"", MACHINE_IS_SKELETON ) +COMP( 2003, zslc750, 0, 0, zaurus_pxa255, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-C750 \"Shepherd\" (Japan)", MACHINE_IS_SKELETON ) +COMP( 2004, zslc760, 0, 0, zaurus_pxa255, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-C760 \"Husky\" (Japan)", MACHINE_IS_SKELETON ) +COMP( 200?, zslc3000, 0, 0, zaurus_pxa270, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-C3000 \"Spitz\" (Japan)", MACHINE_IS_SKELETON ) +COMP( 200?, zslc1000, 0, 0, zaurus_pxa270, zaurus_pxa, zaurus_pxa_state, empty_init, "Sharp", "Zaurus SL-C3000 \"Akita\" (Japan)", MACHINE_IS_SKELETON )