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tms9914: added SR & PP FSMs, typo fixed
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fulivi
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cff3741078
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5b2b482a52
@ -7,7 +7,6 @@
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Texas Instruments TMS9914(A) GPIB Controller
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TODO:
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- A few minor FSMs only used in non-controller devices (SR,PP)
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- A few interface commands
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- A few auxiliary commands
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@ -77,8 +76,8 @@ constexpr uint8_t REG_INT0_INT_MASK = 0x3f; // Mask of actual interrupt bits
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// Interrupt status/mask 1
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constexpr unsigned REG_INT1_IFC_BIT = 0; // IFC received
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constexpr unsigned REG_INT1_MA_BIT = 1; // My address received
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constexpr unsigned REG_INT1_SRQ_BIT = 2; // SRQ asserted
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constexpr unsigned REG_INT1_SRQ_BIT = 1; // SRQ asserted
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constexpr unsigned REG_INT1_MA_BIT = 2; // My address received
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constexpr unsigned REG_INT1_DCAS_BIT = 3; // DCAS state active
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constexpr unsigned REG_INT1_APT_BIT = 4; // Address Pass-Through
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constexpr unsigned REG_INT1_UNC_BIT = 5; // Unrecognized command
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@ -182,13 +181,8 @@ tms9914_device::tms9914_device(const machine_config &mconfig, const char *tag, d
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m_accrq_write_func(*this)
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{
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// Silence compiler complaints about unused variables
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(void)REG_INT0_RLC_BIT;
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(void)REG_INT0_SPAS_BIT;
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(void)REG_INT1_IFC_BIT;
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(void)REG_INT1_SRQ_BIT;
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(void)REG_INT1_GET_BIT;
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(void)REG_SERIAL_P_MASK;
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(void)REG_SERIAL_P_RSV1_BIT;
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}
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// Signal inputs
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@ -219,7 +213,11 @@ WRITE_LINE_MEMBER(tms9914_device::ifc_w)
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WRITE_LINE_MEMBER(tms9914_device::srq_w)
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{
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bool prev_srq = get_signal(IEEE_488_SRQ);
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set_ext_signal(IEEE_488_SRQ , state);
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if (cont_r() && !prev_srq && get_signal(IEEE_488_SRQ)) {
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set_int1_bit(REG_INT1_SRQ_BIT);
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}
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}
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WRITE_LINE_MEMBER(tms9914_device::atn_w)
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@ -263,15 +261,17 @@ void tms9914_device::write(offs_t offset, uint8_t data)
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break;
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case REG_W_SERIAL_P:
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m_reg_serial_p = data;
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// TODO: update FSM?
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{
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uint8_t diff = m_reg_2nd_serial_p ^ data;
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m_reg_2nd_serial_p = data;
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if (BIT(diff , REG_SERIAL_P_RSV1_BIT)) {
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update_fsm();
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}
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}
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break;
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case REG_W_PARALLEL_P:
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m_reg_2nd_parallel_p = data;
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if (!m_pp_ppas) {
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m_reg_parallel_p = data;
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}
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break;
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case REG_W_DO:
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@ -435,6 +435,7 @@ void tms9914_device::device_start()
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save_item(NAME(m_reg_int1_mask));
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save_item(NAME(m_reg_address));
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save_item(NAME(m_reg_serial_p));
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save_item(NAME(m_reg_2nd_serial_p));
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save_item(NAME(m_reg_parallel_p));
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save_item(NAME(m_reg_2nd_parallel_p));
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save_item(NAME(m_reg_di));
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@ -453,6 +454,7 @@ void tms9914_device::device_start()
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save_item(NAME(m_stdl));
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save_item(NAME(m_shdw));
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save_item(NAME(m_vstdl));
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save_item(NAME(m_rsvd2));
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save_item(NAME(m_ah_state));
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save_item(NAME(m_ah_adhs));
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save_item(NAME(m_ah_anhs));
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@ -501,6 +503,7 @@ void tms9914_device::device_reset()
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m_accrq_line = true; // Ensure change is propagated
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m_reg_serial_p = 0;
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m_reg_2nd_serial_p = 0;
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m_reg_parallel_p = 0;
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m_reg_2nd_parallel_p = 0;
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@ -735,6 +738,10 @@ void tms9914_device::update_fsm()
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// BO interrupt is raised when SGNS state is entered
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set_int0_bit(REG_INT0_BO_BIT);
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}
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if (prev_state == FSM_SH_STRS && m_t_state == FSM_T_SPAS &&
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(m_sr_state == FSM_SR_APRS1 || m_sr_state == FSM_SR_APRS2)) {
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set_int0_bit(REG_INT0_SPAS_BIT);
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}
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}
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// SH outputs
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// EOI is controlled by SH & C FSMs
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@ -743,14 +750,22 @@ void tms9914_device::update_fsm()
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uint8_t dio_byte = 0;
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set_signal(IEEE_488_DAV , m_sh_state == FSM_SH_STRS);
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if (sh_active()) {
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dio_byte = m_t_state == FSM_T_SPAS ? m_reg_serial_p : m_reg_do;
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if (m_t_state == FSM_T_SPAS) {
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dio_byte = m_reg_serial_p & REG_SERIAL_P_MASK;
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if (m_sr_state == FSM_SR_APRS1 || m_sr_state == FSM_SR_APRS2) {
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// Set RQS
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BIT_SET(dio_byte , 6);
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}
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} else {
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dio_byte = m_reg_do;
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}
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eoi_signal = m_t_eoi_state == FSM_T_ERAS || m_t_eoi_state == FSM_T_ENAS;
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}
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// AH FSM
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prev_state = m_ah_state;
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bool ah_reset = m_swrst ||
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(get_signal(IEEE_488_ATN) && m_c_state != FSM_C_CIDS && m_c_state != FSM_C_CADS) ||
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(get_signal(IEEE_488_ATN) && cont_r()) ||
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(!get_signal(IEEE_488_ATN) && m_l_state != FSM_L_LADS && m_l_state != FSM_L_LACS);
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if (ah_reset) {
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m_ah_state = FSM_AH_AIDS;
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@ -841,6 +856,9 @@ void tms9914_device::update_fsm()
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if (!get_signal(IEEE_488_ATN)) {
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if (m_t_spms) {
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m_t_state = FSM_T_SPAS;
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// When entering SPAS, serial poll register is copied into the
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// register that is actually output (as it's double buffered)
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m_reg_serial_p = m_reg_2nd_serial_p;
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} else {
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m_t_state = FSM_T_TACS;
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}
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@ -862,7 +880,7 @@ void tms9914_device::update_fsm()
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if (m_t_state != prev_state) {
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changed = true;
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}
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if (m_t_spms && (m_swrst || get_ifcin() || (m_c_state != FSM_C_CIDS && m_c_state != FSM_C_CADS))) {
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if (m_t_spms && (m_swrst || get_ifcin() || cont_r())) {
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m_t_spms = false;
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changed = true;
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}
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@ -899,7 +917,77 @@ void tms9914_device::update_fsm()
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}
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// No direct L outputs
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// TODO: SR & PP FSMs
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// PP FSM
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if (!m_pp_ppas) {
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// PPSS
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if (!m_swrst && get_signal(IEEE_488_ATN) && get_signal(IEEE_488_EOI) && !cont_r()) {
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m_pp_ppas = true;
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changed = true;
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// Copy m_reg_2nd_parallel_p when entering PPAS
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m_reg_parallel_p = m_reg_2nd_parallel_p;
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}
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} else {
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// PPAS
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if (m_swrst || !get_signal(IEEE_488_ATN) || !get_signal(IEEE_488_EOI) || cont_r()) {
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m_pp_ppas = false;
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changed = true;
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}
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}
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// PP output
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if (m_pp_ppas) {
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dio_byte |= m_reg_parallel_p;
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}
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// SR FSM
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prev_state = m_sr_state;
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if (m_swrst) {
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m_sr_state = FSM_SR_NPRS;
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} else {
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switch (m_sr_state) {
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case FSM_SR_NPRS:
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if (m_t_state != FSM_T_SPAS &&
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(BIT(m_reg_2nd_serial_p , REG_SERIAL_P_RSV1_BIT) || m_rsvd2)) {
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m_sr_state = FSM_SR_SRQS;
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}
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break;
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case FSM_SR_SRQS:
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if (m_t_state == FSM_T_SPAS) {
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m_sr_state = FSM_SR_APRS1;
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} else if (!BIT(m_reg_2nd_serial_p , REG_SERIAL_P_RSV1_BIT) && !m_rsvd2) {
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m_sr_state = FSM_SR_NPRS;
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}
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break;
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case FSM_SR_APRS1:
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if (m_t_state == FSM_T_SPAS && m_sh_state == FSM_SH_STRS) {
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m_rsvd2 = false;
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}
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if (!BIT(m_reg_2nd_serial_p , REG_SERIAL_P_RSV1_BIT) && !m_rsvd2) {
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m_sr_state = FSM_SR_APRS2;
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}
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break;
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case FSM_SR_APRS2:
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if (m_t_state == FSM_T_SPAS) {
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if (m_sh_state == FSM_SH_STRS) {
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m_rsvd2 = false;
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}
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} else {
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m_sr_state = FSM_SR_NPRS;
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}
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break;
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default:
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LOG("Invalid SR state %d\n" , m_sr_state);
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m_sr_state = FSM_SR_NPRS;
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}
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}
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if (m_sr_state != prev_state) {
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changed = true;
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}
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// SR outputs
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set_signal(IEEE_488_SRQ , m_sr_state == FSM_SR_SRQS);
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// RL FSM
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if (m_rl_state != FSM_RL_LOCS && (m_swrst || !get_signal(IEEE_488_REN))) {
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@ -1097,11 +1185,17 @@ void tms9914_device::if_cmd_received(uint8_t if_cmd)
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break;
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case IFCMD_SPE:
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// TODO:
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if (!get_ifcin() && !m_t_spms) {
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m_t_spms = true;
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m_ext_state_change = true;
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}
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break;
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case IFCMD_SPD:
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// TODO:
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if (m_t_spms) {
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m_t_spms = false;
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m_ext_state_change = true;
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}
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break;
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case IFCMD_UNL:
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@ -1387,7 +1481,7 @@ void tms9914_device::do_aux_cmd(unsigned cmd , bool set_bit)
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break;
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case AUXCMD_STDL:
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LOG("Unimplemented STDL cmd\n");
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LOG("Unimplemented STDL=%d cmd\n" , set_bit);
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break;
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case AUXCMD_SHDW:
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@ -1401,11 +1495,14 @@ void tms9914_device::do_aux_cmd(unsigned cmd , bool set_bit)
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break;
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case AUXCMD_VSTDL:
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LOG("Unimplemented VSTDL cmd\n");
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LOG("Unimplemented VSTDL=%d cmd\n" , set_bit);
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break;
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case AUXCMD_RSV2:
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LOG("Unimplemented RSV2 cmd\n");
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if (set_bit != m_rsvd2) {
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m_rsvd2 = set_bit;
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update_fsm();
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}
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break;
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default:
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@ -117,6 +117,7 @@ private:
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uint8_t m_reg_int1_mask;
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uint8_t m_reg_address;
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uint8_t m_reg_serial_p;
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uint8_t m_reg_2nd_serial_p;
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uint8_t m_reg_parallel_p;
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uint8_t m_reg_2nd_parallel_p;
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uint8_t m_reg_di;
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@ -137,6 +138,7 @@ private:
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bool m_stdl;
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bool m_shdw;
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bool m_vstdl;
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bool m_rsvd2;
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// AH (Acceptor Handshake) states
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enum {
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