From 5b7312e998acd74938fdbd9c2aa1d6986627c665 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 12 Feb 2017 00:29:20 +0100 Subject: [PATCH] pic16c5x: added RTCC pin (not called T0, plus it was implemented in reverse) (nw) --- src/devices/cpu/pic16c5x/pic16c5x.cpp | 38 ++++++++++----------------- src/devices/cpu/pic16c5x/pic16c5x.h | 9 ++----- 2 files changed, 16 insertions(+), 31 deletions(-) diff --git a/src/devices/cpu/pic16c5x/pic16c5x.cpp b/src/devices/cpu/pic16c5x/pic16c5x.cpp index d07ef796190..5bad2b3f193 100644 --- a/src/devices/cpu/pic16c5x/pic16c5x.cpp +++ b/src/devices/cpu/pic16c5x/pic16c5x.cpp @@ -129,7 +129,6 @@ pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type , m_write_a(*this) , m_write_b(*this) , m_write_c(*this) - , m_read_t0(*this) { } @@ -202,9 +201,6 @@ void pic16c5x_device::update_internalram_ptr() #define ADDR (m_opcode.b.l & 0x1f) -#define RISING_EDGE_T0 (( (int)(T0_in - m_old_T0) > 0) ? 1 : 0) -#define FALLING_EDGE_T0 (( (int)(T0_in - m_old_T0) < 0) ? 1 : 0) - /******** The following is the Status Flag register definition. *********/ /* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */ @@ -850,7 +846,6 @@ void pic16c5x_device::device_start() m_write_a.resolve_safe(); m_write_b.resolve_safe(); m_write_c.resolve_safe(); - m_read_t0.resolve_safe(0); /* ensure the internal ram pointers are set before get_info is called */ update_internalram_ptr(); @@ -861,7 +856,7 @@ void pic16c5x_device::device_start() save_item(NAME(m_TRISA)); save_item(NAME(m_TRISB)); save_item(NAME(m_TRISC)); - save_item(NAME(m_old_T0)); + save_item(NAME(m_rtcc)); save_item(NAME(m_old_data)); save_item(NAME(m_picRAMmask)); save_item(NAME(m_WDT)); @@ -998,7 +993,6 @@ void pic16c5x_device::pic16c5x_reset_regs() FSR |= (uint8_t)(~m_picRAMmask); m_prescaler = 0; m_delay_timer = 0; - m_old_T0 = 0; m_inst_cycles = 0; } @@ -1083,6 +1077,18 @@ void pic16c5x_device::pic16c5x_update_timer(int counts) } } +WRITE_LINE_MEMBER(pic16c5x_device::write_rtcc) +{ + state = (state) ? 1 : 0; + + /* Count mode, edge triggered */ + if (T0CS && state != m_rtcc) + if ((T0SE && !state) || (!T0SE && state)) + pic16c5x_update_timer(1); + + m_rtcc = state; +} + /**************************************************************************** * Execute IPeriod. Return 0 if emulation should be stopped @@ -1090,8 +1096,6 @@ void pic16c5x_device::pic16c5x_update_timer(int counts) void pic16c5x_device::execute_run() { - uint8_t T0_in; - update_internalram_ptr(); do @@ -1123,21 +1127,7 @@ void pic16c5x_device::execute_run() (this->*s_opcode_00x[(m_opcode.b.l & 0x1f)].function)(); } - if (T0CS) { /* Count mode */ - T0_in = m_read_t0() ? 1 : 0; - if (T0SE) { /* Count falling edge T0 input */ - if (FALLING_EDGE_T0) { - pic16c5x_update_timer(1); - } - } - else { /* Count rising edge T0 input */ - if (RISING_EDGE_T0) { - pic16c5x_update_timer(1); - } - } - m_old_T0 = T0_in; - } - else { /* Timer mode */ + if (!T0CS) { /* Timer mode */ if (m_delay_timer) { m_delay_timer--; } diff --git a/src/devices/cpu/pic16c5x/pic16c5x.h b/src/devices/cpu/pic16c5x/pic16c5x.h index e7b8c3f7387..4e4b0efae09 100644 --- a/src/devices/cpu/pic16c5x/pic16c5x.h +++ b/src/devices/cpu/pic16c5x/pic16c5x.h @@ -44,10 +44,6 @@ enum #define MCFG_PIC16C5x_WRITE_C_CB(_devcb) \ devcb = &pic16c5x_device::set_write_c_callback(*device, DEVCB_##_devcb); -// T0 pin (readline) -#define MCFG_PIC16C5x_T0_CB(_devcb) \ - devcb = &pic16c5x_device::set_t0_callback(*device, DEVCB_##_devcb); - // CONFIG register #define MCFG_PIC16C5x_SET_CONFIG(_data) \ pic16c5x_device::set_config_static(*device, _data); @@ -77,7 +73,7 @@ public: template static devcb_base &set_write_b_callback(device_t &device, _Object object) { return downcast(device).m_write_b.set_callback(object); } template static devcb_base &set_write_c_callback(device_t &device, _Object object) { return downcast(device).m_write_c.set_callback(object); } - template static devcb_base &set_t0_callback(device_t &device, _Object object) { return downcast(device).m_read_t0.set_callback(object); } + DECLARE_WRITE_LINE_MEMBER(write_rtcc); // RTCC pin /**************************************************************************** * Function to configure the CONFIG register. This is actually hard-wired @@ -151,7 +147,7 @@ private: int m_picmodel; int m_delay_timer; uint16_t m_temp_config; - uint8_t m_old_T0; + int m_rtcc; int8_t m_old_data; uint8_t m_picRAMmask; int m_inst_cycles; @@ -167,7 +163,6 @@ private: devcb_write8 m_write_a; devcb_write8 m_write_b; devcb_write8 m_write_c; - devcb_read_line m_read_t0; // For debugger int m_debugger_temp;