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MIPS3 DRC: Always set BadVaddr on TLB miss. The TLB handler needs this to fill in the table. (nw)

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This commit is contained in:
Ted Green 2019-04-10 08:42:39 -06:00
parent 0c8f328da4
commit 5bd849d96f
1 changed files with 1 additions and 2 deletions
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3
src/devices/cpu/mips/mips3drc.cpp
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@ -733,8 +733,7 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
{
/* set BadVAddr to the fault address */
UML_GETEXP(block, I0); // getexp i0
UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
UML_MOVc(block, COND_Z, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0,Z
UML_MOV(block, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0
}
if (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE)